8393 lines
591 KiB
Plaintext
8393 lines
591 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: 80314 On-Chip Peripherals
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; @Props: Released
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; @Author: MAR
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; @Changelog: 2004-12-20 MAR
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; @Manufacturer: INTEL - Intel Corporation
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; @Core: (ARM), 80200, Intel
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: per80314.per 17469 2024-02-09 16:23:08Z kwisniewski $
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config 16. 8.
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width 0x19
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base ad:0x00000000
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tree "PCI-1 Configuration"
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tree "Embedded PCI-to-PCI Bridge Configuration Registers (primary mode)"
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group asd:(0x1000*1.)++0xfff
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line.long 0x000 "PT_ID,PCI ID Register"
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hexmask.long.word 0x000 16.--31. 1. " D_ID ,Device ID"
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hexmask.long.word 0x000 0.--15. 1. " V_ID ,Vendor ID"
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line.long 0x004 "PT_CSR,PCI Control and Status Register"
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bitfld.long 0x004 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
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bitfld.long 0x004 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
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textline " "
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bitfld.long 0x004 29. " R_MA ,Received Master Abort" "Not detected,Detected"
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bitfld.long 0x004 28. " R_TA ,Received Target Abort" "Not detected,Detected"
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textline " "
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bitfld.long 0x004 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
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bitfld.long 0x004 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
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textline " "
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bitfld.long 0x004 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
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bitfld.long 0x004 23. " TFBBC ,Target Fast Back to Back Capable" "Not capable,Capable"
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textline " "
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bitfld.long 0x004 21. " DEV66 ,Device 66 MHz" "Not capable,Capable"
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bitfld.long 0x004 20. " CAP_L ,Capabilites List" "Not Supported,Supported"
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textline " "
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bitfld.long 0x004 9. " MFBBC ,Master Fast Back to Back Enable" "Disabled,Enabled"
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bitfld.long 0x004 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 7. " WAIT ,Wait Cycle Control" "Disabled,Enabled"
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bitfld.long 0x004 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 5. " VGAPS ,VGA Palette Snoop" "Disabled,Enabled"
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bitfld.long 0x004 4. " MWI_EN ,Memory Write and Invalidate Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 3. " SC ,Special Cycles" "Disabled,Enabled"
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bitfld.long 0x004 2. " BM ,Bus Master" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 1. " MS ,Memory Space" "Disabled,Enabled"
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bitfld.long 0x004 0. " IOS ,IO Space" "Disabled,Enabled"
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line.long 0x008 "PT_CLASS,Transparent PCI Class Register"
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hexmask.long.byte 0x008 24.--31. 1. " BASE ,Base Class Code"
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hexmask.long.byte 0x008 16.--23. 1. " SUB ,Sub Class Code"
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textline " "
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hexmask.long.byte 0x008 8.--15. 1. " PROG ,Programming Interface"
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hexmask.long.byte 0x008 0.--7. 1. " RID ,Revision ID"
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line.long 0x00c "PT_MISC0,Transparent PCI Miscellaneous 0 Register"
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bitfld.long 0x00c 31. " BISTC ,BIST Capable" "Not capable,Capable"
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bitfld.long 0x00c 30. " SBIST ,Start BIST" "Not capable,Capable"
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textline " "
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hexmask.long.byte 0x00c 24.--27. 1. " CCODE ,Completion Code"
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bitfld.long 0x00c 23. " MFUNCT ,Multifunction Device" "Not Multifunction,Multifunction"
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textline " "
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hexmask.long.byte 0x00c 16.--22. 1. " LAYOUT ,Configuration Space Layout conforms to PCI to PCI bridge layout"
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hexmask.long.byte 0x00c 8.--15. 1. " LTIMER ,Latency Timer"
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textline " "
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hexmask.long.byte 0x00c 0.--7. 1. " CLINE ,Cacheline Size"
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line.long 0x010 "P2S_BAR,PCI Base Address Register"
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hexmask.long.word 0x010 16.--31. 1. " BA ,Base Address"
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bitfld.long 0x010 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
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textline " "
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bitfld.long 0x010 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
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bitfld.long 0x010 0. " SPACE ,PCI Bus Address Space" "Low,High"
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line.long 0x014 "P2S_BAR0_UPPER,PCI Configuration Register 14"
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hexmask.long.long 0x014 0.--31. 1. " BA ,Base Address"
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line.long 0x018 "PT_BUSNUM,Transparent PCI Bus Number Register"
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hexmask.long.byte 0x018 24.--31. 1. " S_LTIMER ,Secondary Latency Timer"
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hexmask.long.byte 0x018 16.--23. 1. " SUB_BUS_NUM ,Subordinate Bus Number"
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textline " "
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hexmask.long.byte 0x018 8.--15. 1. " S_BUS_NUM ,Secondary Bus Number"
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hexmask.long.byte 0x018 0.--7. 1. " P_BUS_NUM ,Primary Bus Number"
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line.long 0x01c "PT_MISC1,Transparent PCI Miscellaneous 1 Register-Primary Mode"
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bitfld.long 0x01c 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
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bitfld.long 0x01c 23. " S_TFBBC ,Secondary Target Fast Back to Back Capable" "Not capable,Capable"
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textline " "
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bitfld.long 0x01c 21. " S_DEV66 ,Secondary Device 66MHz" "Not capable,Capable"
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hexmask.long.byte 0x01c 12.--15. 1. " IO_LA ,IO Limit Address"
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textline " "
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hexmask.long.byte 0x01c 4.--7. 1. " IO_BA ,IO Base Address"
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line.long 0x020 "PT_MIO_BL,Transparent PCI MIO Base and Limit Register"
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hexmask.long.word 0x020 20.--31. 1. " LA ,Limit Address"
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hexmask.long.word 0x020 4.--15. 1. " BA ,Base Address"
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line.long 0x024 "PT_PFM_BL,Transparent PCI PFM Base and Limit Register"
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hexmask.long.word 0x024 20.--31. 1. " LA ,Limit Address"
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hexmask.long.word 0x024 4.--15. 1. " BA ,Base Address"
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line.long 0x028 "PT_PFM_B_UPPER,Transparent PCI PFM Base Upper Address Register"
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hexmask.long.long 0x028 0.--31. 1. " BA ,Base Address"
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line.long 0x02c "PT_PFM_L_UPPER,Transparent PCI PFM Limit Upper Address Register"
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hexmask.long.long 0x02c 0.--31. 1. " LA ,Limit Address"
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line.long 0x030 "PT_IO_UPPER,Transparent PCI I/O Address Upper 16 Bits Register"
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hexmask.long.word 0x030 16.--31. 1. " IO_LA ,I/O Limit Address"
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hexmask.long.word 0x030 0.--15. 1. " IO_BA ,I/O Base Address"
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line.long 0x034 "PT_CAP,Transparent PCI Capability Pointer Register"
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hexmask.long.word 0x034 0.--7. 1. " CAP_PTR ,Capabilites Pointer"
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line.long 0x038 "PT_EROM,Transparent PCI Expansion ROM Register"
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hexmask.long.byte 0x038 25.--31. 1. " BA[6:0] ,Expansion ROM Base Address"
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bitfld.long 0x038 0. " EN ,Expansion ROM Decode Enable" "Disabled,Enabled"
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line.long 0x03c "PT_MISC2,Transparent PCI Miscellaneous 2 Register"
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bitfld.long 0x03c 27. " DISCARD_SERR ,Discard Timer SERR# Enable" "Not asserted,Asserted"
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bitfld.long 0x03c 26. " DISCARD_STAT ,Discard Timeout Status" "No timeout,Timeout"
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textline " "
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bitfld.long 0x03c 25. " DISCARD2 ,Secondary Discard Timer" "2^15 cycles,2^10 cycles"
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bitfld.long 0x03c 24. " DISCARD1 ,Primary Discard Timer" "2^15 cycles,2^10 cycles"
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textline " "
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bitfld.long 0x03c 23. " S_FPTP_EN ,Secondary Fast Back to Back Enable" "Disabled,Enabled"
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bitfld.long 0x03c 22. " S_RESET ,Secondary Bus Reset" "No reset,Reset"
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textline " "
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bitfld.long 0x03c 21. " MA_ERR ,Master Abort Error" "All 1s,Target"
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bitfld.long 0x03c 19. " VGA_EN ,VGA Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x03c 18. " ISA_EN ,ISA Enable" "Disabled,Enabled"
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bitfld.long 0x03c 17. " SERR_FOR ,Primary SERR# Forward Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x03c 16. " S_PERESP ,Secondary Parity Error Response" "Not assert,Assert"
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hexmask.long.byte 0x03c 8.--15. 1. " INT_PIN ,Interrupt Pin"
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textline " "
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hexmask.long.byte 0x03c 0.--7. 1. " INT_LINE ,Interrupt Line"
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tree.end
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tree "Embedded PCI-to-PCI Bridge Configuration Registers (secondary mode)"
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group asd:(0x1000*1.)++0xfff
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line.long 0x000 "PT_ID,PCI ID Register"
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hexmask.long.word 0x000 16.--31. 1. " D_ID ,Device ID"
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hexmask.long.word 0x000 0.--15. 1. " V_ID ,Vendor ID"
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line.long 0x004 "PT_CSR,PCI Control and Status Register"
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bitfld.long 0x004 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
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bitfld.long 0x004 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
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textline " "
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bitfld.long 0x004 29. " R_MA ,Received Master Abort" "Not detected,Detected"
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bitfld.long 0x004 28. " R_TA ,Received Target Abort" "Not detected,Detected"
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textline " "
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bitfld.long 0x004 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
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bitfld.long 0x004 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
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textline " "
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bitfld.long 0x004 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
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bitfld.long 0x004 23. " TFBBC ,Target Fast Back to Back Capable" "Not capable,Capable"
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textline " "
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bitfld.long 0x004 21. " DEV66 ,Device 66 MHz" "Not capable,Capable"
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bitfld.long 0x004 20. " CAP_L ,Capabilites List" "Not Supported,Supported"
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textline " "
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bitfld.long 0x004 9. " MFBBC ,Master Fast Back to Back Enable" "Disabled,Enabled"
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bitfld.long 0x004 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 7. " WAIT ,Wait Cycle Control" "Disabled,Enabled"
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bitfld.long 0x004 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 5. " VGAPS ,VGA Palette Snoop" "Disabled,Enabled"
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bitfld.long 0x004 4. " MWI_EN ,Memory Write and Invalidate Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 3. " SC ,Special Cycles" "Disabled,Enabled"
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bitfld.long 0x004 2. " BM ,Bus Master" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 1. " MS ,Memory Space" "Disabled,Enabled"
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bitfld.long 0x004 0. " IOS ,IO Space" "Disabled,Enabled"
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line.long 0x008 "PT_CLASS,Transparent PCI Class Register"
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hexmask.long.byte 0x008 24.--31. 1. " BASE ,Base Class Code"
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hexmask.long.byte 0x008 16.--23. 1. " SUB ,Sub Class Code"
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textline " "
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hexmask.long.byte 0x008 8.--15. 1. " PROG ,Programming Interface"
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hexmask.long.byte 0x008 0.--7. 1. " RID ,Revision ID"
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line.long 0x00c "PT_MISC0,Transparent PCI Miscellaneous 0 Register"
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bitfld.long 0x00c 31. " BISTC ,BIST Capable" "Not capable,Capable"
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bitfld.long 0x00c 30. " SBIST ,Start BIST" "Not capable,Capable"
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textline " "
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hexmask.long.byte 0x00c 24.--27. 1. " CCODE ,Completion Code"
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bitfld.long 0x00c 23. " MFUNCT ,Multifunction Device" "Not Multifunction,Multifunction"
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textline " "
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hexmask.long.byte 0x00c 16.--22. 1. " LAYOUT ,Configuration Space Layout conforms to PCI to PCI bridge layout"
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hexmask.long.byte 0x00c 8.--15. 1. " LTIMER ,Latency Timer"
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textline " "
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hexmask.long.byte 0x00c 0.--7. 1. " CLINE ,Cacheline Size"
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line.long 0x010 "P2S_BAR,PCI Base Address Register"
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hexmask.long.word 0x010 16.--31. 1. " BA ,Base Address"
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bitfld.long 0x010 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
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textline " "
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bitfld.long 0x010 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
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bitfld.long 0x010 0. " SPACE ,PCI Bus Address Space" "Low,High"
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line.long 0x014 "P2S_BAR0_UPPER,PCI Configuration Register 14"
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hexmask.long.long 0x014 0.--31. 1. " BA ,Base Address"
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line.long 0x018 "PT_BUSNUM,Transparent PCI Bus Number Register"
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hexmask.long.byte 0x018 24.--31. 1. " S_LTIMER ,Secondary Latency Timer"
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hexmask.long.byte 0x018 16.--23. 1. " SUB_BUS_NUM ,Subordinate Bus Number"
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textline " "
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hexmask.long.byte 0x018 8.--15. 1. " S_BUS_NUM ,Secondary Bus Number"
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hexmask.long.byte 0x018 0.--7. 1. " P_BUS_NUM ,Primary Bus Number"
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line.long 0x01c "PT_MISC1,Transparent PCI Miscellaneous 1 Register-Secondary Mode"
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bitfld.long 0x01c 31. " S_D_PE ,Secondary Detected Parity Error" "No parity error,Parity error"
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bitfld.long 0x01c 30. " S_S_SERR ,Secondary Singaled SERR#" "Not asserted,Asserted"
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textline " "
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bitfld.long 0x01c 29. " S_R_MA ,Secondary Received Master Abort" "Not detected,Detected"
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bitfld.long 0x01c 28. " S_R_TA ,Secondary Received Target Abort" "Not detected,Detected"
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textline " "
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bitfld.long 0x01c 27. " S_S_TA ,Secondary Signaled Target Abort" "Not terminated,Terminated"
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bitfld.long 0x01c 25.--26. " S_DEVSEL ,Secondary Device Select Timing" "Fast,Medium,Slow,Reserved"
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textline " "
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bitfld.long 0x01c 24. " S_MDP_D ,Secondary Master Data Parity Detected" "No parity error,Parity error"
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bitfld.long 0x01c 23. " S_TFBBC ,Secondary Target Fast Back to Back Capable" "Not Capable,Capable"
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textline " "
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bitfld.long 0x01c 21. " SDEV66 ,Secondary Device 66 MHz" "Not Capable,Capable"
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hexmask.long.byte 0x01c 12.--15. 1. " IO_LA ,I/O Limit Address"
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textline " "
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hexmask.long.byte 0x01c 4.--7. 1. " IO_BA ,I/O Base Address"
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line.long 0x020 "PT_MIO_BL,Transparent PCI MIO Base and Limit Register"
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hexmask.long.word 0x020 20.--31. 1. " LA ,Limit Address"
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hexmask.long.word 0x020 4.--15. 1. " BA ,Base Address"
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line.long 0x024 "PT_PFM_BL,Transparent PCI PFM Base and Limit Register"
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hexmask.long.word 0x024 20.--31. 1. " LA ,Limit Address"
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hexmask.long.word 0x024 4.--15. 1. " BA ,Base Address"
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line.long 0x028 "PT_PFM_B_UPPER,Transparent PCI PFM Base Upper Address Register"
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hexmask.long.long 0x028 0.--31. 1. " BA ,Base Address"
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line.long 0x02c "PT_PFM_L_UPPER,Transparent PCI PFM Limit Upper Address Register"
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hexmask.long.long 0x02c 0.--31. 1. " LA ,Limit Address"
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line.long 0x030 "PT_IO_UPPER,Transparent PCI I/O Address Upper 16 Bits Register"
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hexmask.long.word 0x030 16.--31. 1. " IO_LA ,I/O Limit Address"
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hexmask.long.word 0x030 0.--15. 1. " IO_BA ,I/O Base Address"
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line.long 0x034 "PT_CAP,Transparent PCI Capability Pointer Register"
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hexmask.long.word 0x034 0.--7. 1. " CAP_PTR ,Capabilites Pointer"
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line.long 0x038 "PT_EROM,Transparent PCI Expansion ROM Register"
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hexmask.long.byte 0x038 25.--31. 1. " BA[6:0] ,Expansion ROM Base Address"
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bitfld.long 0x038 0. " EN ,Expansion ROM Decode Enable" "Disabled,Enabled"
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line.long 0x03c "PT_MISC2,Transparent PCI Miscellaneous 2 Register"
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bitfld.long 0x03c 27. " DISCARD_SERR ,Discard Timer SERR# Enable" "Not asserted,Asserted"
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bitfld.long 0x03c 26. " DISCARD_STAT ,Discard Timeout Status" "No timeout,Timeout"
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textline " "
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bitfld.long 0x03c 25. " DISCARD2 ,Secondary Discard Timer" "2^15 cycles,2^10 cycles"
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bitfld.long 0x03c 24. " DISCARD1 ,Primary Discard Timer" "2^15 cycles,2^10 cycles"
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textline " "
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bitfld.long 0x03c 23. " S_FPTP_EN ,Secondary Fast Back to Back Enable" "Disabled,Enabled"
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bitfld.long 0x03c 22. " S_RESET ,Secondary Bus Reset" "No reset,Reset"
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textline " "
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bitfld.long 0x03c 21. " MA_ERR ,Master Abort Error" "All 1s,Target"
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bitfld.long 0x03c 19. " VGA_EN ,VGA Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x03c 18. " ISA_EN ,ISA Enable" "Disabled,Enabled"
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bitfld.long 0x03c 17. " SERR_FOR ,Primary SERR# Forward Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x03c 16. " S_PERESP ,Secondary Parity Error Response" "Not assert,Assert"
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hexmask.long.byte 0x03c 8.--15. 1. " INT_PIN ,Interrupt Pin"
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textline " "
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hexmask.long.byte 0x03c 0.--7. 1. " INT_LINE ,Interrupt Line"
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tree.end
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tree "Transparent PCI-to-PCI Bridge Configuration Registers"
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group asd:(0x1000*1.)++0xfff
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line.long 0x000 "PE_ID,PCI ID Register"
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hexmask.long.word 0x000 16.--31. 1. " DID ,Device ID"
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hexmask.long.word 0x000 0.--15. 1. " VID ,Vendor ID"
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line.long 0x004 "PE_CSR,PCI Control and Status Register"
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bitfld.long 0x004 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
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bitfld.long 0x004 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
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textline " "
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bitfld.long 0x004 29. " R_MA ,Received Master Abort" "Not detected,Detected"
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bitfld.long 0x004 28. " R_TA ,Received Target Abort" "Not detected,Detected"
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textline " "
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bitfld.long 0x004 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
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bitfld.long 0x004 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
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textline " "
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bitfld.long 0x004 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
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bitfld.long 0x004 23. " TFBBC ,Target Fast Back to Back Capable" "Not capable,Capable"
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textline " "
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bitfld.long 0x004 21. " DEV66 ,Device 66 MHz" "Not capable,Capable"
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bitfld.long 0x004 20. " CAP_L ,Capabilites List" "Not supported,Supported"
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textline " "
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bitfld.long 0x004 19. " INT_STAT ,Interrupt Status" "Clear,Set"
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bitfld.long 0x004 10. " INT_DIS ,Interrupt Disable" "Enabled,Disabled"
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textline " "
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bitfld.long 0x004 9. " MFBBC ,Master Fast Back to Back Enable" "Disabled,Enabled"
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bitfld.long 0x004 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 7. " WAIT ,Wait Cycle Control" "Disabled,Enabled"
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bitfld.long 0x004 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 5. " VGAPS ,VGA Palette Snoop" "Disabled,Enabled"
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bitfld.long 0x004 4. " MWI_EN ,Memory Write and Invalidate Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 3. " SC ,Special Cycles" "Disabled,Enabled"
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bitfld.long 0x004 2. " BM ,Bus Master" "Disabled,Enabled"
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textline " "
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bitfld.long 0x004 1. " MS ,Memory Space" "Disabled,Enabled"
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bitfld.long 0x004 0. " IOS ,I/O Space" "Disabled,Enabled"
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line.long 0x008 "PE_CLASS,PCI Class Register"
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hexmask.long.byte 0x008 24.--31. 1. " BASE ,Base Class Code"
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hexmask.long.byte 0x008 16.--23. 1. " SUB ,Sub Class Code"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--15. 1. " PROG ,Programming Interface"
|
|
hexmask.long.byte 0x008 0.--7. 1. " RID ,Revision ID"
|
|
line.long 0x00c "PE_MISC0,PCI Miscellaneous 0 Register"
|
|
bitfld.long 0x00c 31. " BIST ,BIST Capable" "Not capable,Capable"
|
|
bitfld.long 0x00c 30. " SBIST ,Start BIST" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 24.--27. 1. " CCODE ,Completion Code"
|
|
bitfld.long 0x00c 23. " MFUNCT ,Multifunction Device" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 16.--22. 1. " LAYOUT ,Configuration Space Layout conforms to PCI device layout"
|
|
hexmask.long.byte 0x00c 8.--15. 1. " LTIMER ,Latency Timer"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 0.--7. 1. " CLINE ,Cacheline Size"
|
|
line.long 0x010 "P2S_BAR0,PCI Base Address Register 0 "
|
|
hexmask.long.word 0x010 16.--31. 1. " BA ,Base Address[31:16]"
|
|
bitfld.long 0x010 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x010 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x010 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x014 "P2S_BAR0_UPPER,PCI Base Address Register 0 Upper"
|
|
hexmask.long.long 0x014 0.--31. 1. " BA ,Base Address Upper Bits[63:32]"
|
|
line.long 0x018 "P2S_BAR2,PCI Memory Base Address Register 2"
|
|
hexmask.long.word 0x018 16.--31. 1. " BA ,Base Address[31:16]"
|
|
bitfld.long 0x018 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x018 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x018 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x01c "P2S_BAR2_UPPER,PCI Memory Base Address Register 2 Upper 32 bits"
|
|
hexmask.long.long 0x01c 0.--31. 1. " BA ,Base Address[63:32]"
|
|
line.long 0x020 "P2S_BAR3,PCI Memory Base Address Register 3"
|
|
hexmask.long.word 0x020 16.--31. 1. " BA ,Base Address[31:15]"
|
|
bitfld.long 0x020 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x020 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x020 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x024 "P2S_BAR3_UPPER,PCI Memory Base Address Register 3 Upper 32 bits"
|
|
hexmask.long.long 0x024 0.--31. 1. " BA ,Base Address[63:32]"
|
|
line.long 0x02c "PE_SID,PCI Subsystem ID Register"
|
|
hexmask.long.word 0x02c 16.--31. 1. " SID ,Subsystem ID"
|
|
hexmask.long.word 0x02c 0.--15. 1. " SVID ,Subsystem Vendor ID"
|
|
line.long 0x030 "PE_EROM,Embedded PCI Expansion ROM Register"
|
|
hexmask.long.byte 0x030 25.--31. 1. " BA[6:0] ,Expansion ROM Base Address"
|
|
bitfld.long 0x030 0. " EN ,Expansion ROM Decode Enable" "Disabled,Enabled"
|
|
line.long 0x034 "PE_CAP,PCI Capability Pointer Register"
|
|
hexmask.long.byte 0x034 0.--7. 1. " CAP_PTR ,Capabilities Pointer"
|
|
line.long 0x03c "PE_MISC2,PCI Miscellaneous 2 Register"
|
|
hexmask.long.byte 0x03c 24.--31. 1. " MAX_LAT[7:0] ,Maximum Latency"
|
|
hexmask.long.byte 0x03c 16.--23. 1. " MIN_GNT[7:0] ,Minimum Grant"
|
|
textline " "
|
|
hexmask.long.byte 0x03c 8.--15. 1. " INT_PIN[7:0] ,Interrupt Pin"
|
|
hexmask.long.byte 0x03c 0.--7. 1. " INT_LINE[7:0] ,Interrupt Line"
|
|
tree.end
|
|
tree "Device Specific Configuration Registers (embedded mode)"
|
|
group asd:(0x1000*1.)++0xfff
|
|
line.long 0x040 "MISC_CSR,Miscellaneous Control and Status Register"
|
|
hexmask.long.byte 0x040 24.--31. 1. " DEV_ID ,Internal Device ID"
|
|
hexmask.long.byte 0x040 16.--23. 1. " VER_ID ,Internal Version ID"
|
|
textline " "
|
|
bitfld.long 0x040 15. " VPD_EN ,PCI Vital Product Data" "Disabled,Enabled"
|
|
bitfld.long 0x040 10. " M66EN ,Latched Value of M66EN pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 9. " CTL_RSC ,Controlling Resource at power-up" "Low,High"
|
|
bitfld.long 0x040 8. " D64 ,64 Bit bus at power-up" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 7. " PCI_LCK ,PCI lockout" "Not set,Reset"
|
|
bitfld.long 0x040 6. " SOFT_RES ,Software Reset" "Not set,Reset"
|
|
textline " "
|
|
bitfld.long 0x040 5. " PRIMARY ,Power-up as primary interface" "Low,High"
|
|
bitfld.long 0x040 4. " TRANS ,Power-up as a transparent Bridge Port" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 1. " BAR0_EN ,Primary PCI Registers Base Address Register 0 enable" "Disabled,Enabled"
|
|
line.long 0x044 "SERR_DIS,PCI SERR# Event Disable Register"
|
|
bitfld.long 0x044 6. " DR_ND ,Delayed Read No Data" "Assert,Not assert"
|
|
bitfld.long 0x044 5. " DW_ND ,Delayed Write Non Delivery" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 4. " PW_MA ,Posted Write Master Abort" "Assert,Not assert"
|
|
bitfld.long 0x044 3. " PW_TA ,Posted Write Target Abort" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 2. " PW_RETRY ,Posted Write Max Retry" "Assert,Not assert"
|
|
line.long 0x048 "SERR_STAT,PCI SERR Status Register"
|
|
bitfld.long 0x048 7. " D_TOUT ,Delayed Cycle Time Out" "Clear,Set"
|
|
bitfld.long 0x048 6. " DR_ND ,Delayed Read No Data from Target" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 5. " DW_ND ,Delayed Write Non Delivery" "Clear,Set"
|
|
bitfld.long 0x048 4. " PW_MA ,Posted Write Master Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 3. " PW_TA ,Posted Write Target Abort" "Clear,Set"
|
|
bitfld.long 0x048 2. " PW_RETRY ,Posted Write Max Retry" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 1. " PW_DPE ,Posted Write Data Parity Error" "Clear,Set"
|
|
bitfld.long 0x048 0. " APE ,Address Parity Error" "Clear,Set"
|
|
line.long 0x04c "P2S_PAGE_SIZES,PCI BAR Setup Register"
|
|
hexmask.long.byte 0x04c 27.--31. 1. " FAB_BAR_SIZE ,Fabric Bar Page Size"
|
|
bitfld.long 0x04c 26. " FAB_BAR_NOTRAN ,Fabric Bar Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 24. " FAB_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04c 11.--15. 1. " BAR2_SIZE ,Bar2 Page Size"
|
|
textline " "
|
|
bitfld.long 0x04c 10. " BAR2_NOTRAN ,Bar2 Address Translation Control" "Enabled,Disabled"
|
|
bitfld.long 0x04c 8. " BAR2_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x04c 3.--7. 1. " BAR3_SIZE ,Bar3 Page Size"
|
|
bitfld.long 0x04c 2. " BAR3_NOTRAN ,Bar3 Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 0. " BAR3_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
line.long 0x050 "P_VPD_CSR,VPD Control and Status Register"
|
|
hexmask.long.byte 0x050 29.--31. 1. " VPD_PORT_NUM[3:0] ,Port where VPD resides"
|
|
hexmask.long.tbyte 0x050 4.--23. 1. " VPD_OFFSET[19:0] ,Address offset within VPD_PORT where accesses are sent"
|
|
line.long 0x064 "PT_PFM_FABRIC_BL,PCI Transparent PFM Fabric Base Register"
|
|
hexmask.long.tbyte 0x064 15.--31. 1. " FAB_BAR ,PFM Fabric Base Address[31:15]"
|
|
line.long 0x068 "PT_PFM_FABRIC_B_UPPER,PCI Transparent PFM Fabric Base Upper Register"
|
|
hexmask.long.long 0x068 0.--31. 1. " FAB_BAR ,PFM Fabric Base Address[63:32]"
|
|
line.long 0x0c8 "P_SLOT_ID,PCI Slot Identification Register"
|
|
hexmask.long.byte 0x0c8 24.--31. 1. " CHASSIS ,Chassis Number"
|
|
bitfld.long 0x0c8 21. " FIC ,First In Chassis" "Not a parent,Parent"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 16.--20. 1. " EXP_SLOT[4:0] ,Expansion Slot"
|
|
hexmask.long.byte 0x0c8 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to PMC block"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0cc "P_PMC,PCI Power Management Capability Register"
|
|
hexmask.long.byte 0x0cc 27.--31. 1. " PME_SUP ,PME Support"
|
|
bitfld.long 0x0cc 26. " D2_SP ,D2 Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0cc 25. " D1_SP ,D1 Support" "Not supported,Supported"
|
|
bitfld.long 0x0cc 21. " DSI ,Device Specific Initialization" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0cc 19. " PME_CK ,PME Clock" "Not required,Required"
|
|
bitfld.long 0x0cc 16.--18. " PM_VER[2:0] ,Power Management Version" "0,1,2,3,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x0cc 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Hot Swap Block"
|
|
hexmask.long.byte 0x0cc 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d0 "P_PMCS,PCI Power Management Control and Status Register"
|
|
bitfld.long 0x0d0 23. " BPCC_EN ,Bus Power/Clock Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0d0 22. " B2_B3 ,B2_B3 Support for D3hot" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0d0 15. " PME_ST ,PME Status" "Clear,Set"
|
|
bitfld.long 0x0d0 8. " PME_EN ,PME Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0d0 0.--1. " PWR_ST[1:0] ,Power State" "D0,Reserved,Reserved,D3hot"
|
|
line.long 0x0d4 "P_HS_CSR,PCI Compact PCI Hot Swap Control and Status Register"
|
|
bitfld.long 0x0d4 23. " INS ,ENUM# Status Insertion" "Negated,Asserted"
|
|
bitfld.long 0x0d4 22. " EXT ,ENUM# Status Extraction" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0d4 19. " LOO ,LED ON/OFF" "Off,On"
|
|
bitfld.long 0x0d4 17. " EIM ,ENUM# Signal Mask" "Enabled,Masked"
|
|
textline " "
|
|
hexmask.long.byte 0x0d4 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Vital Product Data"
|
|
hexmask.long.byte 0x0d4 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d8 "P_VPDC,PCI Vital Products Data Capability Register"
|
|
bitfld.long 0x0d8 31. " F ,Data Transfer Complete Flag" "Clear,Set"
|
|
hexmask.long.byte 0x0d8 16.--23. 1. " VPDA ,Vital Product Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x0d8 8.--15. 1. " NXT_PTR ,Next Pointer to Message Signaled Interrupt"
|
|
hexmask.long.byte 0x0d8 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0dc "P_VPDD,PCI Vital Products Data Register"
|
|
hexmask.long.long 0x0dc 0.--31. 1. " VPD_DATA ,VPD Data"
|
|
line.long 0x0e0 "P_MSIC,PCI Message Signaled Interrupt Control Register"
|
|
bitfld.long 0x0e0 23. " CAP64 ,64-bit Address Capable" "Not capable,Capable"
|
|
hexmask.long.byte 0x0e0 20.--22. 1. " MM_EN ,Multiple Message Enable"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 17.--19. 1. " MM_CAP ,Multiple Message Capable"
|
|
bitfld.long 0x0e0 16. " MSI_EN ,Message Signaled Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 8.--15. 1. " NXT_PTR ,Next Pointer to PCI-X"
|
|
hexmask.long.byte 0x0e0 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0e4 "P_MSIA,PCI Message Signaled Interrupt Address Register"
|
|
hexmask.long.long 0x0e4 2.--31. 1. " MSI_ADDR[31:2] ,Message Signaled Interrupt Address"
|
|
line.long 0x0e8 "P_MSIA_UPPER,PCI Message Signaled Interrupt Address Upper Register"
|
|
hexmask.long.long 0x0e8 0.--31. 1. " MSI_ADDR ,Message Signaled Interrupt Address Upper"
|
|
line.long 0x0ec "P_MSID,PCI Message Signaled Interrupt Data Register"
|
|
hexmask.long.word 0x0ec 2.--15. 1. " MSI_DATA[15:2] ,Message Signaled Interrupt Data"
|
|
line.long 0x0f0 "P_PCI/X_C,PCI-X Capability Register (Embedded Mode)"
|
|
hexmask.long.byte 0x0f0 20.--22. 1. " MAX_SPLIT ,Max Split Transactions"
|
|
hexmask.long.byte 0x0f0 20.--22. 1. " MAX_BC ,Max Memory Read Byte Count"
|
|
textline " "
|
|
bitfld.long 0x0f0 17. " RO_EN ,Enable Relaxed Ordering" "Disabled,Enabled"
|
|
bitfld.long 0x0f0 16. " P_DPERR ,Data Parity Error Recovery Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0f0 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer"
|
|
hexmask.long.byte 0x0f0 0.--7. 1. " CAP_ID[7:0] ,Capability ID for PCI-X"
|
|
line.long 0x0f4 "P_PCI/X_S,PCI-X Status Register (Embedded Mode)"
|
|
bitfld.long 0x0f4 29. " P_RSPE ,Received Split Completion Error Message" "Clear,Set"
|
|
hexmask.long.byte 0x0f4 26.--28. 1. " P_MAX_CUM ,Maximum Cumulative Read Size"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 23.--25. 1. " P_MAX_SPLIT ,Max Split Transactions handled"
|
|
hexmask.long.byte 0x0f4 21.--22. 1. " P_MAX_RD ,Max Memory Read Byte Count"
|
|
textline " "
|
|
bitfld.long 0x0f4 20. " P_COMP ,Device Complexity" "Low,Bridge"
|
|
bitfld.long 0x0f4 19. " S_USC ,Secondary Unexpected Split Completion" "Accepted,Not accepted"
|
|
textline " "
|
|
bitfld.long 0x0f4 18. " S_SCD ,Secondary Split Completion Discarded" "Not discarted,Discarted"
|
|
bitfld.long 0x0f4 17. " S_133CAP ,133 Mhz Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x0f4 16. " S_D64 ,Secondary 64-bit Device" "Not capable,Capable"
|
|
hexmask.long.byte 0x0f4 8.--15. 1. " BUS_NUM ,Bus Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 3.--7. 1. " DEV_NUM ,Device Number"
|
|
hexmask.long.byte 0x0f4 0.--2. 1. " FUNC_NUM ,Function Number"
|
|
line.long 0x0f8 "P_PCI/X_UP,PCI-X Upstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0f8 16.--31. 1. " SPLIT_COM_LMT_U[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0f8 0.--15. 1. " SPLIT_TRANS_CAP_U ,Split Transaction Capacity"
|
|
line.long 0x0fc "P_PCI/X_DOWN,PCI-X Downstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0fc 16.--31. 1. " SPLIT_COM_LMT_D[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0fc 0.--15. 1. " SPLIT_TRANS_CAP_D ,Split Transaction Capacity"
|
|
tree.end
|
|
tree "Device Specific Configuration Registers (transparent mode)"
|
|
group asd:(0x1000*1.)++0xfff
|
|
line.long 0x040 "MISC_CSR,Miscellaneous Control and Status Register"
|
|
hexmask.long.byte 0x040 24.--31. 1. " DEV_ID ,Internal Device ID"
|
|
hexmask.long.byte 0x040 16.--23. 1. " VER_ID ,Internal Version ID"
|
|
textline " "
|
|
bitfld.long 0x040 15. " VPD_EN ,PCI Vital Product Data" "Disabled,Enabled"
|
|
bitfld.long 0x040 10. " M66EN ,Latched Value of M66EN pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 9. " CTL_RSC ,Controlling Resource at power-up" "Low,High"
|
|
bitfld.long 0x040 8. " D64 ,64 Bit bus at power-up" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 7. " PCI_LCK ,PCI lockout" "Not set,Reset"
|
|
bitfld.long 0x040 6. " SOFT_RES ,Software Reset" "Not set,Reset"
|
|
textline " "
|
|
bitfld.long 0x040 5. " PRIMARY ,Power-up as primary interface" "Low,High"
|
|
bitfld.long 0x040 4. " TRANS ,Power-up as a transparent Bridge Port" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 1. " BAR0_EN ,Primary PCI Registers Base Address Register 0 enable" "Disabled,Enabled"
|
|
line.long 0x044 "SERR_DIS,PCI SERR# Event Disable Register"
|
|
bitfld.long 0x044 6. " DR_ND ,Delayed Read No Data" "Assert,Not assert"
|
|
bitfld.long 0x044 5. " DW_ND ,Delayed Write Non Delivery" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 4. " PW_MA ,Posted Write Master Abort" "Assert,Not assert"
|
|
bitfld.long 0x044 3. " PW_TA ,Posted Write Target Abort" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 2. " PW_RETRY ,Posted Write Max Retry" "Assert,Not assert"
|
|
line.long 0x048 "SERR_STAT,PCI SERR Status Register"
|
|
bitfld.long 0x048 7. " D_TOUT ,Delayed Cycle Time Out" "Clear,Set"
|
|
bitfld.long 0x048 6. " DR_ND ,Delayed Read No Data from Target" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 5. " DW_ND ,Delayed Write Non Delivery" "Clear,Set"
|
|
bitfld.long 0x048 4. " PW_MA ,Posted Write Master Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 3. " PW_TA ,Posted Write Target Abort" "Clear,Set"
|
|
bitfld.long 0x048 2. " PW_RETRY ,Posted Write Max Retry" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 1. " PW_DPE ,Posted Write Data Parity Error" "Clear,Set"
|
|
bitfld.long 0x048 0. " APE ,Address Parity Error" "Clear,Set"
|
|
line.long 0x04c "P2S_PAGE_SIZES,PCI BAR Setup Register"
|
|
hexmask.long.byte 0x04c 27.--31. 1. " FAB_BAR_SIZE ,Fabric Bar Page Size"
|
|
bitfld.long 0x04c 26. " FAB_BAR_NOTRAN ,Fabric Bar Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 24. " FAB_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04c 11.--15. 1. " BAR2_SIZE ,Bar2 Page Size"
|
|
textline " "
|
|
bitfld.long 0x04c 10. " BAR2_NOTRAN ,Bar2 Address Translation Control" "Enabled,Disabled"
|
|
bitfld.long 0x04c 8. " BAR2_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x04c 3.--7. 1. " BAR3_SIZE ,Bar3 Page Size"
|
|
bitfld.long 0x04c 2. " BAR3_NOTRAN ,Bar3 Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 0. " BAR3_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
line.long 0x050 "P_VPD_CSR,VPD Control and Status Register"
|
|
hexmask.long.byte 0x050 29.--31. 1. " VPD_PORT_NUM[3:0] ,Port where VPD resides"
|
|
hexmask.long.tbyte 0x050 4.--23. 1. " VPD_OFFSET[19:0] ,Address offset within VPD_PORT where accesses are sent"
|
|
line.long 0x064 "PT_PFM_FABRIC_BL,PCI Transparent PFM Fabric Base Register"
|
|
hexmask.long.tbyte 0x064 15.--31. 1. " FAB_BAR ,PFM Fabric Base Address[31:15]"
|
|
line.long 0x068 "PT_PFM_FABRIC_B_UPPER,PCI Transparent PFM Fabric Base Upper Register"
|
|
hexmask.long.long 0x068 0.--31. 1. " FAB_BAR ,PFM Fabric Base Address[63:32]"
|
|
line.long 0x0c8 "P_SLOT_ID,PCI Slot Identification Register"
|
|
hexmask.long.byte 0x0c8 24.--31. 1. " CHASSIS ,Chassis Number"
|
|
bitfld.long 0x0c8 21. " FIC ,First In Chassis" "Not a parent,Parent"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 16.--20. 1. " EXP_SLOT[4:0] ,Expansion Slot"
|
|
hexmask.long.byte 0x0c8 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to PMC block"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0cc "P_PMC,PCI Power Management Capability Register"
|
|
hexmask.long.byte 0x0cc 27.--31. 1. " PME_SUP ,PME Support"
|
|
bitfld.long 0x0cc 26. " D2_SP ,D2 Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0cc 25. " D1_SP ,D1 Support" "Not supported,Supported"
|
|
bitfld.long 0x0cc 21. " DSI ,Device Specific Initialization" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0cc 19. " PME_CK ,PME Clock" "Not required,Required"
|
|
bitfld.long 0x0cc 16.--18. " PM_VER[2:0] ,Power Management Version" "0,1,2,3,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x0cc 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Hot Swap Block"
|
|
hexmask.long.byte 0x0cc 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d0 "P_PMCS,PCI Power Management Control and Status Register"
|
|
bitfld.long 0x0d0 23. " BPCC_EN ,Bus Power/Clock Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0d0 22. " B2_B3 ,B2_B3 Support for D3hot" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0d0 15. " PME_ST ,PME Status" "Clear,Set"
|
|
bitfld.long 0x0d0 8. " PME_EN ,PME Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0d0 0.--1. " PWR_ST[1:0] ,Power State" "D0,Reserved,Reserved,D3hot"
|
|
line.long 0x0d4 "P_HS_CSR,PCI Compact PCI Hot Swap Control and Status Register"
|
|
bitfld.long 0x0d4 23. " INS ,ENUM# Status Insertion" "Negated,Asserted"
|
|
bitfld.long 0x0d4 22. " EXT ,ENUM# Status Extraction" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0d4 19. " LOO ,LED ON/OFF" "Off,On"
|
|
bitfld.long 0x0d4 17. " EIM ,ENUM# Signal Mask" "Enabled,Masked"
|
|
textline " "
|
|
hexmask.long.byte 0x0d4 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Vital Product Data"
|
|
hexmask.long.byte 0x0d4 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d8 "P_VPDC,PCI Vital Products Data Capability Register"
|
|
bitfld.long 0x0d8 31. " F ,Data Transfer Complete Flag" "Clear,Set"
|
|
hexmask.long.byte 0x0d8 16.--23. 1. " VPDA ,Vital Product Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x0d8 8.--15. 1. " NXT_PTR ,Next Pointer to Message Signaled Interrupt"
|
|
hexmask.long.byte 0x0d8 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0dc "P_VPDD,PCI Vital Products Data Register"
|
|
hexmask.long.long 0x0dc 0.--31. 1. " VPD_DATA ,VPD Data"
|
|
line.long 0x0e0 "P_MSIC,PCI Message Signaled Interrupt Control Register"
|
|
bitfld.long 0x0e0 23. " CAP64 ,64-bit Address Capable" "Not capable,Capable"
|
|
hexmask.long.byte 0x0e0 20.--22. 1. " MM_EN ,Multiple Message Enable"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 17.--19. 1. " MM_CAP ,Multiple Message Capable"
|
|
bitfld.long 0x0e0 16. " MSI_EN ,Message Signaled Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 8.--15. 1. " NXT_PTR ,Next Pointer to PCI-X"
|
|
hexmask.long.byte 0x0e0 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0e4 "P_MSIA,PCI Message Signaled Interrupt Address Register"
|
|
hexmask.long.long 0x0e4 2.--31. 1. " MSI_ADDR[31:2] ,Message Signaled Interrupt Address"
|
|
line.long 0x0e8 "P_MSIA_UPPER,PCI Message Signaled Interrupt Address Upper Register"
|
|
hexmask.long.long 0x0e8 0.--31. 1. " MSI_ADDR ,Message Signaled Interrupt Address Upper"
|
|
line.long 0x0ec "P_MSID,PCI Message Signaled Interrupt Data Register"
|
|
hexmask.long.word 0x0ec 2.--15. 1. " MSI_DATA[15:2] ,Message Signaled Interrupt Data"
|
|
line.long 0x0f0 "P_PCI/X_C,PCI-X Capability Register (Transparent Mode)"
|
|
bitfld.long 0x0f0 22.--24. " S_FREQ ,Secondary Clock Frequency" "Conventional,66 Mhz,100 Mhz,133 Mhz,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x0f0 21. " S_SRD ,Secondary Split Request Delayed" "No delay,Delay"
|
|
textline " "
|
|
bitfld.long 0x0f0 20. " S_SCO ,Secondary Split Completion Overrun" "Accepted,Not accepted"
|
|
bitfld.long 0x0f0 19. " S_USC ,Secondary Unexpected Split Completion" "Accepted,Not accepted"
|
|
textline " "
|
|
bitfld.long 0x0f0 18. " S_SCD ,Secondary Split Completion Discarded" "Not discarted,Discarted"
|
|
bitfld.long 0x0f0 17. " S_133CAP ,Secondary 133 Mhz Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x0f0 16. " S_D64 ,Secondary 64-bit Device" "Not capable,Capable"
|
|
hexmask.long.byte 0x0f0 8.--15. 1. " NXT_PTR ,Next Pointer"
|
|
textline " "
|
|
hexmask.long.byte 0x0f0 0.--7. 1. " CAP_ID ,Capability ID for PCI-X"
|
|
line.long 0x0f4 "P_PCI/X_S,PCI-X Status Register (Transparent Mode)"
|
|
bitfld.long 0x0f4 21. " P_SRD ,Split Request Delayed" "No delay,Delay"
|
|
bitfld.long 0x0f4 20. " P_SCO ,Split Completion Overrun" "Accepted,Not accepted"
|
|
textline " "
|
|
bitfld.long 0x0f4 19. " S_USC ,Secondary Unexpected Split Completion" "Accepted,Not accepted"
|
|
bitfld.long 0x0f4 18. " S_SCD ,Secondary Split Completion Discarded" "Not discarted,Discarted"
|
|
textline " "
|
|
bitfld.long 0x0f4 17. " S_133CAP ,Secondary 133 Mhz Capable" "Not capable,Capable"
|
|
bitfld.long 0x0f4 16. " S_D64 ,Secondary 64-bit Device" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 8.--15. 1. " BUS_NUM ,Bus Number"
|
|
hexmask.long.byte 0x0f4 3.--7. 1. " DEV_NUM ,Device Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 0.--2. 1. " FUNC_NUM ,Function Number"
|
|
line.long 0x0f8 "P_PCI/X_UP,PCI-X Upstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0f8 16.--31. 1. " SPLIT_COM_LMT_U[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0f8 0.--15. 1. " SPLIT_TRANS_CAP_U ,Split Transaction Capacity"
|
|
line.long 0x0fc "P_PCI/X_DOWN,PCI-X Downstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0fc 16.--31. 1. " SPLIT_COM_LMT_D[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0fc 0.--15. 1. " SPLIT_TRANS_CAP_D ,Split Transaction Capacity"
|
|
tree.end
|
|
tree "Miscellaneous Registers"
|
|
group asd:(0x1000*1.)++0xfff
|
|
line.long 0x10c "ARB_CTRL,PCI Arbitration Control Register"
|
|
bitfld.long 0x10c 15. " M7_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 14. " M6_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 13. " M5_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 12. " M4_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 11. " M3_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 10. " M2_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 9. " M1_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 8. " FL_PRI ,Arbitration Level for the block on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 6.--7. " TO_CNT ,Time-out Count" "16 CLKs,32 CLKs,64 CLKs,OFF"
|
|
bitfld.long 0x10c 3. " PARK ,Secondary PCI Bus Parking Algorithm" "Last master,Specific master"
|
|
textline " "
|
|
bitfld.long 0x10c 0.--2. " BM_PARK ,Parked Master" "PCI/X Block,M1,M2,M3,M4,M5,M6,M7"
|
|
line.long 0x110 "P_CSR_SHADOW,PCI Control and Status Shadow Register"
|
|
bitfld.long 0x110 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x110 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x110 29. " R_MA ,Received Master Abort" "Not detected,Detected"
|
|
bitfld.long 0x110 28. " R_TA ,Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x110 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x110 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
|
|
textline " "
|
|
bitfld.long 0x110 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
|
|
bitfld.long 0x110 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x110 2. " BM ,Bus Master" "Disabled,Enabled"
|
|
bitfld.long 0x110 1. " MS ,Memory Space" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x110 0. " IOS ,IO Space" "Disabled,Enabled"
|
|
line.long 0x114 "P_MISC1_SHADOW,Transparent PCI Miscellaneous 1 Shadow Register"
|
|
bitfld.long 0x114 31. " S_D_PE ,Secondary Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x114 30. " S_S_SERR ,Secondary Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x114 29. " S_R_MA ,Secondary Received Master Abort" "Not generated,Generated"
|
|
bitfld.long 0x114 28. " S_R_TA ,Secondary Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x114 27. " S_S_TA ,Secondary Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x114 24. " S_MDP_D ,Secondary Master Data Parity Detected" "No parity error,Parity error"
|
|
line.long 0x118 "P_MISC2_SHADOW,Transparent PCI Miscellaneous 2 Shadow Register"
|
|
bitfld.long 0x118 27. " DISCARD_SERR ,Discard Timer SERR# Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x118 26. " DISCARD_STAT ,Discard Timeout Status" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x118 25. " DISCARD2 ,Secondary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
bitfld.long 0x118 24. " DISCARD1 ,Primary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
textline " "
|
|
bitfld.long 0x118 22. " S_RESET ,Secondary Bus Reset" "No reset,Reset"
|
|
bitfld.long 0x118 21. " MA_ERR ,Master Abort Error" "All 1's,Target"
|
|
textline " "
|
|
bitfld.long 0x118 17. " SERR_FOR ,Primary SERR# Forward Enable" "Disabled,Enabled"
|
|
bitfld.long 0x118 16. " P_PERESP ,Primary Parity Error Response" "Not assert,Assert"
|
|
line.long 0x11c "SERR_STAT_SHADOW,PCI SERR# Status Shadow Register"
|
|
bitfld.long 0x11c 22. " DR_ND ,Delayed Read No Data from Target" "Clear,Set"
|
|
bitfld.long 0x11c 21. " DW_ND ,Delayed Write Non Delivery" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x11c 20. " PW_MA ,Posted Write Master Abort" "Clear,Set"
|
|
bitfld.long 0x11c 19. " PW_TA ,Posted Write Target Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x11c 18. " PW_RETRY ,Posted Write Max Retry" "Clear,Set"
|
|
bitfld.long 0x11c 17. " PW_DPE ,Posted Write Data Parity Error" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x11c 16. " APE ,Address Parity Error" "Clear,Set"
|
|
line.long 0x120 "P_PCI/X_C_SHADOW,PCI-X Capability Shadow Register"
|
|
bitfld.long 0x120 24. " S_FREQ ,Secondary Clock Frequency" "Low,High"
|
|
bitfld.long 0x120 21. " S_SRD ,Secondary Split Request Delayed" "No delay,Delay"
|
|
textline " "
|
|
bitfld.long 0x120 20. " S_SCO ,Secondary Split Completion Overrun" "Accepted,Terminated"
|
|
bitfld.long 0x120 19. " S_USC ,Secondary Unexpected Split Completion" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x120 18. " S_SCD ,Secondary Split Completion Discarded" "Not Discarted,Discarted"
|
|
line.long 0x124 "P_PCI/X_S_SHADOW,PCI-X Bridge Status Shadow Register"
|
|
bitfld.long 0x124 21. " P_SRD ,Split Request Delayed" "No delay,Delay"
|
|
bitfld.long 0x124 20. " S_SCO ,Split Completion Overrun" "Accepted,Terminated"
|
|
textline " "
|
|
bitfld.long 0x124 19. " S_USC ,Unexpected Split Completion" "Not received,Received"
|
|
bitfld.long 0x124 18. " S_SCD ,Split Completion Discarded" "Not Discarted,Discarted"
|
|
line.long 0x128 "P_LAST_OP_SHADOW,PCI Last Transaction Shadow Register"
|
|
bitfld.long 0x128 12. " L ,Last PCI op address size" "32 bit,64 bit"
|
|
hexmask.long.byte 0x128 8.--11. 1. " CMD ,Last PCI command"
|
|
textline " "
|
|
hexmask.long.byte 0x128 4.--7. 1. " BE[7:4] ,Left-most byte enables with 64 bit PCI bus"
|
|
hexmask.long.byte 0x128 0.--3. 1. " BE[3:0] ,Right-most byte enables with 64 or 32 bit PCI bus"
|
|
line.long 0x12c "P_LAST_ADDR_UPPER_SHADOW,PCI Last Upper Address Shadow Register"
|
|
hexmask.long.long 0x12c 0.--31. 1. " ADDR[63:32] ,Upper part of last PCI transaction address"
|
|
line.long 0x130 "P_LAST_ADDR_LOWER_SHADOW,PCI Last Lower Address Shadow Register"
|
|
hexmask.long.long 0x130 0.--31. 1. " ADDR[31:0] ,Lower part of last PCI transaction address"
|
|
line.long 0x134 "P_LAST_ATTR_SHADOW,PCI Last Attribute Register"
|
|
bitfld.long 0x134 30. " NS ,No Snoop" "Low,High"
|
|
bitfld.long 0x134 29. " RO ,Relaxed ordering" "Low,High"
|
|
textline " "
|
|
hexmask.long.byte 0x134 24.--28. 1. " TAG ,Transaction Tag"
|
|
hexmask.long.byte 0x134 16.--23. 1. " REQ_BUS ,Requester bus number"
|
|
textline " "
|
|
hexmask.long.byte 0x134 11.--15. 1. " REQ_DEV ,Requester device number"
|
|
hexmask.long.byte 0x134 8.--10. 1. " REQ_FUNC ,Requester function number"
|
|
textline " "
|
|
hexmask.long.byte 0x134 0.--7. 1. " BYTE_CNT ,Transaction size"
|
|
line.long 0x180 "IRP_CFG_CTL,Interrupt Control Register"
|
|
bitfld.long 0x180 14.--15. " INTD_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
bitfld.long 0x180 12.--13. " INTC_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
textline " "
|
|
bitfld.long 0x180 10.--11. " INTB_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
bitfld.long 0x180 8.--9. " INTA_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
textline " "
|
|
bitfld.long 0x180 4.--5. " LOC_INT_DEST ,Destination of PCI block internal interrupt" "Controller,INTA Out,MSI Out,Other"
|
|
bitfld.long 0x180 3. " INTD_DIR ,Interrupt Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x180 2. " INTC_DIR ,Interrupt Direction" "Input,Output"
|
|
bitfld.long 0x180 1. " INTB_DIR ,Interrupt Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x180 0. " INTA_DIR ,Interrupt Direction" "Input,Output"
|
|
line.long 0x184 "IRP_STAT,Interrupt Status Register"
|
|
bitfld.long 0x184 30. " DR_ND ,Copy of Delayed Read No Data from Target" "Clear,Set"
|
|
bitfld.long 0x184 29. " DW_ND ,Copy of Delayed Write Non Delivery" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 28. " PW_MA ,Copy of Posted Write Master Abort" "Clear,Set"
|
|
bitfld.long 0x184 27. " PW_TA ,Copy of Posted Write Target Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 26. " PW_RETRY ,Copy of Posted Write Max Retry" "Clear,Set"
|
|
bitfld.long 0x184 25. " PW_DPE ,Copy of Posted Write Data Parity Error" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 24. " APE ,Copy of Address Parity Error" "Clear,Set"
|
|
bitfld.long 0x184 23. " P_CSR ,There is an interrupt in the P_CSR Register" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 22. " P_INT ,There is an interrupt in the P_INTAD Register" "Clear,Set"
|
|
bitfld.long 0x184 20. " HS_CSR ,There is an interrupt in the HS_CSR Register" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 19. " X_CAP ,There is an interrupt in the PCI/X _CAP Register" "Clear,Set"
|
|
bitfld.long 0x184 18. " XBGE ,There is an interrupt in the PCI/X _BRIDGE Register" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 17. " FAB ,There is an interrupt in the Fabric Int Register" "Clear,Set"
|
|
line.long 0x188 "IRP_ENABLE,Interrupt Enable Register"
|
|
bitfld.long 0x188 31. " D_TOUT ,Enable Delayed Cycle Time Out interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 30. " DR_ND ,Enable Delayed Read No Data from Target interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 29. " DW_ND ,Enable Delayed Write Non Delivery interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 28. " PW_MA ,Enable Posted Write Master Abort interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 27. " PW_TA ,Enable Posted Write Target Abort interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 26. " PW_RETRY ,Enable Max Retry interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 25. " PW_DPE ,Enable Posted Write Data Parity Error interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 24. " APE ,Enable Address Parity Error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 23. " P_CSR ,Enable P_CSR Register interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 22. " P_INT ,Enable P_INTAD Register interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 20. " HS_CSR ,Enable HS_CSR Register interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 19. " X_CAP ,Enable PCI/X _CAP Register interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 18. " XBGE ,Enable PCI/X _BRIDGE Reg interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 17. " FAB ,Enable Fabric Int Register interrupt" "Disabled,Enabled"
|
|
line.long 0x18c "IRP_INTAD,Interrupt CSR Register"
|
|
bitfld.long 0x18c 19. " INTD_EN ,Enable INTD interrupt to interrupt processor" "Disabled,Enabled"
|
|
bitfld.long 0x18c 18. " INTC_EN ,Enable INTC interrupt to interrupt processor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18c 17. " INTB_EN ,Enable INTB interrupt to interrupt processor" "Disabled,Enabled"
|
|
bitfld.long 0x18c 16. " INTA_EN ,Enable INTA interrupt to interrupt processor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18c 4. " PME ,Power Transitioning interrupt" "Clear,Set"
|
|
bitfld.long 0x18c 3. " INTD ,INTD pending interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x18c 2. " INTC ,INTC pending interrupt" "Clear,Set"
|
|
bitfld.long 0x18c 1. " INTB ,INTB pending interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x18c 0. " INTA ,INTA pending interrupt" "Clear,Set"
|
|
line.long 0x19c "P_VID_OVERRIDE,Override Register"
|
|
hexmask.long.word 0x19c 16.--31. 1. " DID ,Write to this field updates the read-only value at offset 0x00"
|
|
hexmask.long.word 0x19c 0.--15. 1. " VID ,Write to this field updates the read-only value at offset 0x00"
|
|
line.long 0x1a0 "P_CLASS_OVERRIDE,Override Register"
|
|
hexmask.long.byte 0x1a0 24.--31. 1. " BASE[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
hexmask.long.byte 0x1a0 16.--23. 1. " SUB[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
textline " "
|
|
hexmask.long.byte 0x1a0 8.--15. 1. " PROG[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
hexmask.long.byte 0x1a0 0.--7. 1. " RID[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
line.long 0x1a4 "PE_SID_OVERRIDE,Override Register"
|
|
hexmask.long.word 0x1a4 16.--31. 1. " SID[15:0] ,Write to this field updates the read-only value at embedded register offset 0x02C"
|
|
hexmask.long.word 0x1a4 0.--15. 1. " SVID[15:0] ,Write to this field updates the read-only value at embedded register offset 0x02C"
|
|
line.long 0x1a8 "P_SLOT_ID_OVERRIDE,Override Register"
|
|
hexmask.long.byte 0x1a8 24.--31. 1. " CHASSIS ,Write to this field updates the read-only value at register offset 0x0C8"
|
|
bitfld.long 0x1a8 21. " FIC ,Write to this field updates the read-only value at register offset 0x0C8" "Not a parent,Parent"
|
|
textline " "
|
|
hexmask.long.byte 0x1a8 16.--20. 1. " EXP_SLOT ,Write to this field updates the read-only value at register offset 0x0C8"
|
|
tree.end
|
|
tree "SFN Fabric Registers"
|
|
group asd:(0x1000*1.)++0xfff
|
|
line.long 0x200 "PFAB_CSR,Fabric Command/Status Register"
|
|
bitfld.long 0x200 31. " S2P_BAR ,S2P BAR Response" "Clear,Set"
|
|
bitfld.long 0x200 30. " SYNC_OVERRUN ,Sync Overrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x200 29. " BAD_P2S ,Bad P2S packet" "Clear,Set"
|
|
bitfld.long 0x200 28. " TEA ,Indicates that a timeout error occurred on a fabric packet" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x200 26. " RESP TIMOUT ,This bit is set when a request to the SFN has timed out" "No timeout,Timeout"
|
|
bitfld.long 0x200 24. " INVLD_RESP ,This bit indicates an unexpected response from the SFN" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x200 23. " INT_ENABLE_MASK[7] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 22. " INT_ENABLE_MASK[6] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 21. " INT_ENABLE_MASK[5] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 20. " INT_ENABLE_MASK[4] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 19. " INT_ENABLE_MASK[3] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 18. " INT_ENABLE_MASK[2] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 17. " INT_ENABLE_MASK[1] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 16. " INT_ENABLE_MASK[0] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 15. " BAR3[31] ,Bit 31 of S2P BAR3 when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 14. " BAR3[30] ,Bit 30 of S2P BAR3 when in non-comp mode" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x200 13. " BAR3_SIZE ,S2P BAR3 Size when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 12. " BAR3_EN ,S2P BAR3 Enable when in non-comp mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 11. " TIME_EN[1] ,Request timer value bit 1" "Low,High"
|
|
bitfld.long 0x200 10. " SFN_RLX_ORDER ,Allows multiple packets from the same transaction to be requested out of order" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x200 9. " NON-COMP_BAR_MODE ,Non compatible BAR mode" "Clear,Set"
|
|
bitfld.long 0x200 8. " SW_RST ,Software Reset" "Disabled,Reset"
|
|
textline " "
|
|
bitfld.long 0x200 7. " BAR4[31] ,Bit 31 of S2P Bar4 when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 6. " BAR4[30] ,Bit 30 of O2P Bar4 when in non-comp mode" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x200 5. " BAR4_SIZE ,O2P Bar4 Size when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 4. " BAR4_EN ,O2P Bar4 Enable when in non-comp mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 3. " TIME_EN[0] ,Request timer value bit 0" "Low,High"
|
|
bitfld.long 0x200 2. " RGSWAP ,Byte swap PCI register accesses" "Don't swap,Swap"
|
|
textline " "
|
|
bitfld.long 0x200 1. " WSWAP ,32 bit within 64 bit fabric Word swap enable" "Don't swap,Swap"
|
|
bitfld.long 0x200 0. " BSWAP ,Byte within 64 bit fabric word swap enable" "Don't swap,Swap"
|
|
line.long 0x204 "PFAB_BAR0,Fabric Base Address Register 0"
|
|
hexmask.long.byte 0x204 24.--31. 1. " PFAB_BAR0[31:24] ,PCI Configuration Generation Base Address"
|
|
bitfld.long 0x204 0. " BAR0_EN ,PFAB BAR0 enable" "Disabled,Enabled"
|
|
line.long 0x208 "PFAB_BAR0_UPPER,Fabric Base Address Register 0 Upper"
|
|
hexmask.long.long 0x208 0.--31. 1. " PFAB_BAR0[63:32] ,PCI Configuration Generation Upper Base Address"
|
|
line.long 0x20c "PFAB_IO,IO Space Base Address Register"
|
|
hexmask.long.word 0x20c 16.--31. 1. " BAR[31:16] ,I/O Base Address"
|
|
bitfld.long 0x20c 0. " EN ,I/O Window Enable" "Disabled,Enabled"
|
|
line.long 0x210 "PFAB_IO_UPPER,IO Space Base Address Register Upper"
|
|
hexmask.long.long 0x210 0.--31. 1. " BAR[63:32] ,I/O Upper Base Address"
|
|
line.long 0x214 "PFAB_MEM32,MEM32 Space Base Address Register"
|
|
hexmask.long.byte 0x214 29.--31. 1. " BA[31:29] ,Mem32 Base Address"
|
|
bitfld.long 0x214 17. " SIZE ,Mem32 window size" "512 M,1 G"
|
|
textline " "
|
|
bitfld.long 0x214 16. " EN ,Mem32 window enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x214 0.--11. 1. " BA[43:32] ,Mem32 Base Address"
|
|
line.long 0x218 "PFAB_MEM32_REMAP,MEM32 Space Remap Register"
|
|
hexmask.long.tbyte 0x218 12.--31. 1. " Remap[31:12] ,Mem32 Remap Value"
|
|
line.long 0x21c "PFAB_MEM32_MASK,MEM32 Space Mask Register"
|
|
hexmask.long.tbyte 0x21c 12.--31. 1. " Mask[31:12] ,Mem32 Mask Value"
|
|
line.long 0x220 "PFAB_PFM3,Memory Space Base Address Register"
|
|
hexmask.long.byte 0x220 30.--31. 1. " BA[31:30] ,PFM3 Base Address"
|
|
hexmask.long.word 0x220 18.--29. 1. " BA[59:48] ,PFM3 Base Address"
|
|
textline " "
|
|
bitfld.long 0x220 17. " SIZE ,PFM3 window size" "1 G,2 G"
|
|
bitfld.long 0x220 16. " EN ,PFM3 window enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x220 0.--15. 1. " BA[47:32] ,PFM3 Base Address"
|
|
line.long 0x224 "PFAB_PFM3_REMAP_UPPER,Memory Space Upper Remap Register"
|
|
hexmask.long.tbyte 0x224 12.--31. 1. " REMAP[63:44] ,PFM3 Upper Remap"
|
|
line.long 0x228 "PFAB_PFM3_REMAP_LOWER,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x228 12.--31. 1. " REMAP[31:12] ,PFM3 Lower Remap"
|
|
hexmask.long.word 0x228 0.--11. 1. " REMAP[43:32] ,PFM3 Lower Remap"
|
|
line.long 0x22c "PFAB_PFM3_MASK,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x22c 12.--31. 1. " MASK[31:12] ,PFM3 Mask Value"
|
|
hexmask.long.word 0x22c 0.--11. 1. " MASK[43:32] ,PFM3 Mask Value"
|
|
line.long 0x230 "PFAB_PFM4,Memory Space Base Address Register"
|
|
hexmask.long.byte 0x230 30.--31. 1. " BA[31:30] ,PFM4 Base Address"
|
|
hexmask.long.word 0x230 18.--29. 1. " BA[59:48] ,PFM4 Base Address"
|
|
textline " "
|
|
bitfld.long 0x230 17. " SIZE ,PFM4 window size" "1 G,2 G"
|
|
bitfld.long 0x230 16. " EN ,PFM4 window enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x230 0.--15. 1. " BA[47:32] ,PFM4 Base Address"
|
|
line.long 0x234 "PFAB_PFM4_REMAP_UPPER,Memory Space Upper Remap Register"
|
|
hexmask.long.tbyte 0x234 12.--31. 1. " REMAP[63:44] ,PFM4 Upper Remap"
|
|
line.long 0x238 "PFAB_PFM4_REMAP_LOWER,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x238 12.--31. 1. " REMAP[31:12] ,PFM4 Lower Remap"
|
|
hexmask.long.word 0x238 0.--11. 1. " REMAP[43:32] ,PFM4 Lower Remap"
|
|
line.long 0x23c "PFAB_PFM4_MASK,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x23c 12.--31. 1. " MASK[31:12] ,PFM4 Mask Value"
|
|
hexmask.long.word 0x23c 0.--11. 1. " MASK[43:32] ,PFM4 Mask Value"
|
|
line.long 0x240 "PFAB_SYNC_BAR,Sync Packet Base Address Register"
|
|
hexmask.long.tbyte 0x240 8.--31. 1. " SYNC_BAR[31:8] ,Sync Base Address Register"
|
|
bitfld.long 0x240 0. " EN ,Enable for sync bar" "Disabled,Enabled"
|
|
line.long 0x244 "PFAB_SYNC_BAR_UPPER,Sync Packet Base Address Register Upper"
|
|
hexmask.long.long 0x244 0.--31. 1. " SYNC_BAR[63:32] ,Sync Base Address Register Upper"
|
|
tree.end
|
|
group asd:(0x1000*1.)++0xfff "Expansion ROM Register"
|
|
line.long 0x2fc "EROM_MAP,Expansion ROM Map Register"
|
|
hexmask.long.byte 0x2fc 25.--31. 1. " MAP[6:0] ,Expansion ROM Base Address"
|
|
hexmask.long.byte 0x2fc 0.--3. 1. " DST[3:0] ,Expansion ROM Port Destination"
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Tables"
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 0"
|
|
group asd:(0x1000*1.+0x008*0.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT0,P2S_FAB_BAR_LUT0 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER0,P2S_FAB BAR_LUT_UPPER0 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 1"
|
|
group asd:(0x1000*1.+0x008*1.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT1,P2S_FAB_BAR_LUT1 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER1,P2S_FAB BAR_LUT_UPPER1 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 2"
|
|
group asd:(0x1000*1.+0x008*2.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT2,P2S_FAB_BAR_LUT2 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER2,P2S_FAB BAR_LUT_UPPER2 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 3"
|
|
group asd:(0x1000*1.+0x008*3.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT3,P2S_FAB_BAR_LUT3 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER3,P2S_FAB BAR_LUT_UPPER3 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 4"
|
|
group asd:(0x1000*1.+0x008*4.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT4,P2S_FAB_BAR_LUT4 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER4,P2S_FAB BAR_LUT_UPPER4 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 5"
|
|
group asd:(0x1000*1.+0x008*5.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT5,P2S_FAB_BAR_LUT5 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER5,P2S_FAB BAR_LUT_UPPER5 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 6"
|
|
group asd:(0x1000*1.+0x008*6.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT6,P2S_FAB_BAR_LUT6 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER6,P2S_FAB BAR_LUT_UPPER6 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 7"
|
|
group asd:(0x1000*1.+0x008*7.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT7,P2S_FAB_BAR_LUT7 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER7,P2S_FAB BAR_LUT_UPPER7 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 8"
|
|
group asd:(0x1000*1.+0x008*8.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT8,P2S_FAB_BAR_LUT8 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER8,P2S_FAB BAR_LUT_UPPER8 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 9"
|
|
group asd:(0x1000*1.+0x008*9.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT9,P2S_FAB_BAR_LUT9 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER9,P2S_FAB BAR_LUT_UPPER9 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 10"
|
|
group asd:(0x1000*1.+0x008*10.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT10,P2S_FAB_BAR_LUT10 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER10,P2S_FAB BAR_LUT_UPPER10 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 11"
|
|
group asd:(0x1000*1.+0x008*11.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT11,P2S_FAB_BAR_LUT11 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER11,P2S_FAB BAR_LUT_UPPER11 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 12"
|
|
group asd:(0x1000*1.+0x008*12.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT12,P2S_FAB_BAR_LUT12 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER12,P2S_FAB BAR_LUT_UPPER12 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 13"
|
|
group asd:(0x1000*1.+0x008*13.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT13,P2S_FAB_BAR_LUT13 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER13,P2S_FAB BAR_LUT_UPPER13 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 14"
|
|
group asd:(0x1000*1.+0x008*14.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT14,P2S_FAB_BAR_LUT14 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER14,P2S_FAB BAR_LUT_UPPER14 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 15"
|
|
group asd:(0x1000*1.+0x008*15.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT15,P2S_FAB_BAR_LUT15 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER15,P2S_FAB BAR_LUT_UPPER15 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 16"
|
|
group asd:(0x1000*1.+0x008*16.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT16,P2S_FAB_BAR_LUT16 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER16,P2S_FAB BAR_LUT_UPPER16 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 17"
|
|
group asd:(0x1000*1.+0x008*17.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT17,P2S_FAB_BAR_LUT17 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER17,P2S_FAB BAR_LUT_UPPER17 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 18"
|
|
group asd:(0x1000*1.+0x008*18.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT18,P2S_FAB_BAR_LUT18 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER18,P2S_FAB BAR_LUT_UPPER18 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 19"
|
|
group asd:(0x1000*1.+0x008*19.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT19,P2S_FAB_BAR_LUT19 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER19,P2S_FAB BAR_LUT_UPPER19 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 20"
|
|
group asd:(0x1000*1.+0x008*20.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT20,P2S_FAB_BAR_LUT20 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER20,P2S_FAB BAR_LUT_UPPER20 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 21"
|
|
group asd:(0x1000*1.+0x008*21.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT21,P2S_FAB_BAR_LUT21 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER21,P2S_FAB BAR_LUT_UPPER21 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 22"
|
|
group asd:(0x1000*1.+0x008*22.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT22,P2S_FAB_BAR_LUT22 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER22,P2S_FAB BAR_LUT_UPPER22 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 23"
|
|
group asd:(0x1000*1.+0x008*23.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT23,P2S_FAB_BAR_LUT23 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER23,P2S_FAB BAR_LUT_UPPER23 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 24"
|
|
group asd:(0x1000*1.+0x008*24.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT24,P2S_FAB_BAR_LUT24 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER24,P2S_FAB BAR_LUT_UPPER24 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 25"
|
|
group asd:(0x1000*1.+0x008*25.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT25,P2S_FAB_BAR_LUT25 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER25,P2S_FAB BAR_LUT_UPPER25 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 26"
|
|
group asd:(0x1000*1.+0x008*26.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT26,P2S_FAB_BAR_LUT26 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER26,P2S_FAB BAR_LUT_UPPER26 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 27"
|
|
group asd:(0x1000*1.+0x008*27.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT27,P2S_FAB_BAR_LUT27 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER27,P2S_FAB BAR_LUT_UPPER27 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 28"
|
|
group asd:(0x1000*1.+0x008*28.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT28,P2S_FAB_BAR_LUT28 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER28,P2S_FAB BAR_LUT_UPPER28 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 29"
|
|
group asd:(0x1000*1.+0x008*29.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT29,P2S_FAB_BAR_LUT29 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER29,P2S_FAB BAR_LUT_UPPER29 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 30"
|
|
group asd:(0x1000*1.+0x008*30.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT30,P2S_FAB_BAR_LUT30 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER30,P2S_FAB BAR_LUT_UPPER30 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 31"
|
|
group asd:(0x1000*1.+0x008*31.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT31,P2S_FAB_BAR_LUT31 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER31,P2S_FAB BAR_LUT_UPPER31 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Tables"
|
|
tree "PCI BAR2 Look-up Table 0"
|
|
group asd:(0x1000*1.+0x008*0.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT0,P2S_BAR2_LUT0 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER0,P2S_BAR2_LUT_UPPER0 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 1"
|
|
group asd:(0x1000*1.+0x008*1.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT1,P2S_BAR2_LUT1 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER1,P2S_BAR2_LUT_UPPER1 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 2"
|
|
group asd:(0x1000*1.+0x008*2.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT2,P2S_BAR2_LUT2 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER2,P2S_BAR2_LUT_UPPER2 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 3"
|
|
group asd:(0x1000*1.+0x008*3.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT3,P2S_BAR2_LUT3 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER3,P2S_BAR2_LUT_UPPER3 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 4"
|
|
group asd:(0x1000*1.+0x008*4.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT4,P2S_BAR2_LUT4 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER4,P2S_BAR2_LUT_UPPER4 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 5"
|
|
group asd:(0x1000*1.+0x008*5.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT5,P2S_BAR2_LUT5 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER5,P2S_BAR2_LUT_UPPER5 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 6"
|
|
group asd:(0x1000*1.+0x008*6.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT6,P2S_BAR2_LUT6 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER6,P2S_BAR2_LUT_UPPER6 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 7"
|
|
group asd:(0x1000*1.+0x008*7.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT7,P2S_BAR2_LUT7 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER7,P2S_BAR2_LUT_UPPER7 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 8"
|
|
group asd:(0x1000*1.+0x008*8.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT8,P2S_BAR2_LUT8 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER8,P2S_BAR2_LUT_UPPER8 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 9"
|
|
group asd:(0x1000*1.+0x008*9.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT9,P2S_BAR2_LUT9 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER9,P2S_BAR2_LUT_UPPER9 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 10"
|
|
group asd:(0x1000*1.+0x008*10.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT10,P2S_BAR2_LUT10 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER10,P2S_BAR2_LUT_UPPER10 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 11"
|
|
group asd:(0x1000*1.+0x008*11.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT11,P2S_BAR2_LUT11 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER11,P2S_BAR2_LUT_UPPER11 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 12"
|
|
group asd:(0x1000*1.+0x008*12.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT12,P2S_BAR2_LUT12 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER12,P2S_BAR2_LUT_UPPER12 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 13"
|
|
group asd:(0x1000*1.+0x008*13.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT13,P2S_BAR2_LUT13 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER13,P2S_BAR2_LUT_UPPER13 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 14"
|
|
group asd:(0x1000*1.+0x008*14.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT14,P2S_BAR2_LUT14 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER14,P2S_BAR2_LUT_UPPER14 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 15"
|
|
group asd:(0x1000*1.+0x008*15.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT15,P2S_BAR2_LUT15 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER15,P2S_BAR2_LUT_UPPER15 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 16"
|
|
group asd:(0x1000*1.+0x008*16.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT16,P2S_BAR2_LUT16 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER16,P2S_BAR2_LUT_UPPER16 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 17"
|
|
group asd:(0x1000*1.+0x008*17.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT17,P2S_BAR2_LUT17 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER17,P2S_BAR2_LUT_UPPER17 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 18"
|
|
group asd:(0x1000*1.+0x008*18.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT18,P2S_BAR2_LUT18 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER18,P2S_BAR2_LUT_UPPER18 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 19"
|
|
group asd:(0x1000*1.+0x008*19.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT19,P2S_BAR2_LUT19 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER19,P2S_BAR2_LUT_UPPER19 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 20"
|
|
group asd:(0x1000*1.+0x008*20.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT20,P2S_BAR2_LUT20 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER20,P2S_BAR2_LUT_UPPER20 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 21"
|
|
group asd:(0x1000*1.+0x008*21.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT21,P2S_BAR2_LUT21 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER21,P2S_BAR2_LUT_UPPER21 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 22"
|
|
group asd:(0x1000*1.+0x008*22.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT22,P2S_BAR2_LUT22 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER22,P2S_BAR2_LUT_UPPER22 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 23"
|
|
group asd:(0x1000*1.+0x008*23.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT23,P2S_BAR2_LUT23 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER23,P2S_BAR2_LUT_UPPER23 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 24"
|
|
group asd:(0x1000*1.+0x008*24.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT24,P2S_BAR2_LUT24 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER24,P2S_BAR2_LUT_UPPER24 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 25"
|
|
group asd:(0x1000*1.+0x008*25.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT25,P2S_BAR2_LUT25 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER25,P2S_BAR2_LUT_UPPER25 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 26"
|
|
group asd:(0x1000*1.+0x008*26.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT26,P2S_BAR2_LUT26 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER26,P2S_BAR2_LUT_UPPER26 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 27"
|
|
group asd:(0x1000*1.+0x008*27.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT27,P2S_BAR2_LUT27 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER27,P2S_BAR2_LUT_UPPER27 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 28"
|
|
group asd:(0x1000*1.+0x008*28.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT28,P2S_BAR2_LUT28 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER28,P2S_BAR2_LUT_UPPER28 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 29"
|
|
group asd:(0x1000*1.+0x008*29.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT29,P2S_BAR2_LUT29 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER29,P2S_BAR2_LUT_UPPER29 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 30"
|
|
group asd:(0x1000*1.+0x008*30.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT30,P2S_BAR2_LUT30 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER30,P2S_BAR2_LUT_UPPER30 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 31"
|
|
group asd:(0x1000*1.+0x008*31.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT31,P2S_BAR2_LUT31 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER31,P2S_BAR2_LUT_UPPER31 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Tables"
|
|
tree "PCI BAR3 Look-up Table 0"
|
|
group asd:(0x1000*1.+0x008*0.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT0,P2S_BAR3_LUT0 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER0,P2S_BAR3_LUT_UPPER0 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 1"
|
|
group asd:(0x1000*1.+0x008*1.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT1,P2S_BAR3_LUT1 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER1,P2S_BAR3_LUT_UPPER1 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 2"
|
|
group asd:(0x1000*1.+0x008*2.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT2,P2S_BAR3_LUT2 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER2,P2S_BAR3_LUT_UPPER2 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 3"
|
|
group asd:(0x1000*1.+0x008*3.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT3,P2S_BAR3_LUT3 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER3,P2S_BAR3_LUT_UPPER3 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 4"
|
|
group asd:(0x1000*1.+0x008*4.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT4,P2S_BAR3_LUT4 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER4,P2S_BAR3_LUT_UPPER4 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 5"
|
|
group asd:(0x1000*1.+0x008*5.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT5,P2S_BAR3_LUT5 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER5,P2S_BAR3_LUT_UPPER5 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 6"
|
|
group asd:(0x1000*1.+0x008*6.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT6,P2S_BAR3_LUT6 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER6,P2S_BAR3_LUT_UPPER6 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 7"
|
|
group asd:(0x1000*1.+0x008*7.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT7,P2S_BAR3_LUT7 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER7,P2S_BAR3_LUT_UPPER7 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 8"
|
|
group asd:(0x1000*1.+0x008*8.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT8,P2S_BAR3_LUT8 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER8,P2S_BAR3_LUT_UPPER8 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 9"
|
|
group asd:(0x1000*1.+0x008*9.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT9,P2S_BAR3_LUT9 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER9,P2S_BAR3_LUT_UPPER9 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 10"
|
|
group asd:(0x1000*1.+0x008*10.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT10,P2S_BAR3_LUT10 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER10,P2S_BAR3_LUT_UPPER10 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 11"
|
|
group asd:(0x1000*1.+0x008*11.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT11,P2S_BAR3_LUT11 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER11,P2S_BAR3_LUT_UPPER11 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 12"
|
|
group asd:(0x1000*1.+0x008*12.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT12,P2S_BAR3_LUT12 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER12,P2S_BAR3_LUT_UPPER12 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 13"
|
|
group asd:(0x1000*1.+0x008*13.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT13,P2S_BAR3_LUT13 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER13,P2S_BAR3_LUT_UPPER13 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 14"
|
|
group asd:(0x1000*1.+0x008*14.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT14,P2S_BAR3_LUT14 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER14,P2S_BAR3_LUT_UPPER14 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 15"
|
|
group asd:(0x1000*1.+0x008*15.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT15,P2S_BAR3_LUT15 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER15,P2S_BAR3_LUT_UPPER15 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 16"
|
|
group asd:(0x1000*1.+0x008*16.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT16,P2S_BAR3_LUT16 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER16,P2S_BAR3_LUT_UPPER16 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 17"
|
|
group asd:(0x1000*1.+0x008*17.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT17,P2S_BAR3_LUT17 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER17,P2S_BAR3_LUT_UPPER17 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 18"
|
|
group asd:(0x1000*1.+0x008*18.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT18,P2S_BAR3_LUT18 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER18,P2S_BAR3_LUT_UPPER18 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 19"
|
|
group asd:(0x1000*1.+0x008*19.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT19,P2S_BAR3_LUT19 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER19,P2S_BAR3_LUT_UPPER19 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 20"
|
|
group asd:(0x1000*1.+0x008*20.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT20,P2S_BAR3_LUT20 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER20,P2S_BAR3_LUT_UPPER20 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 21"
|
|
group asd:(0x1000*1.+0x008*21.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT21,P2S_BAR3_LUT21 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER21,P2S_BAR3_LUT_UPPER21 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 22"
|
|
group asd:(0x1000*1.+0x008*22.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT22,P2S_BAR3_LUT22 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER22,P2S_BAR3_LUT_UPPER22 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 23"
|
|
group asd:(0x1000*1.+0x008*23.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT23,P2S_BAR3_LUT23 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER23,P2S_BAR3_LUT_UPPER23 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 24"
|
|
group asd:(0x1000*1.+0x008*24.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT24,P2S_BAR3_LUT24 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER24,P2S_BAR3_LUT_UPPER24 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 25"
|
|
group asd:(0x1000*1.+0x008*25.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT25,P2S_BAR3_LUT25 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER25,P2S_BAR3_LUT_UPPER25 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 26"
|
|
group asd:(0x1000*1.+0x008*26.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT26,P2S_BAR3_LUT26 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER26,P2S_BAR3_LUT_UPPER26 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 27"
|
|
group asd:(0x1000*1.+0x008*27.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT27,P2S_BAR3_LUT27 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER27,P2S_BAR3_LUT_UPPER27 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 28"
|
|
group asd:(0x1000*1.+0x008*28.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT28,P2S_BAR3_LUT28 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER28,P2S_BAR3_LUT_UPPER28 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 29"
|
|
group asd:(0x1000*1.+0x008*29.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT29,P2S_BAR3_LUT29 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER29,P2S_BAR3_LUT_UPPER29 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 30"
|
|
group asd:(0x1000*1.+0x008*30.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT30,P2S_BAR3_LUT30 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER30,P2S_BAR3_LUT_UPPER30 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 31"
|
|
group asd:(0x1000*1.+0x008*31.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT31,P2S_BAR3_LUT31 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER31,P2S_BAR3_LUT_UPPER31 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "PCI-2 Configuration"
|
|
tree "Embedded PCI-to-PCI Bridge Configuration Registers (primary mode)"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x000 "PT_ID,PCI ID Register"
|
|
hexmask.long.word 0x000 16.--31. 1. " D_ID ,Device ID"
|
|
hexmask.long.word 0x000 0.--15. 1. " V_ID ,Vendor ID"
|
|
line.long 0x004 "PT_CSR,PCI Control and Status Register"
|
|
bitfld.long 0x004 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x004 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x004 29. " R_MA ,Received Master Abort" "Not detected,Detected"
|
|
bitfld.long 0x004 28. " R_TA ,Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x004 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x004 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
|
|
textline " "
|
|
bitfld.long 0x004 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
|
|
bitfld.long 0x004 23. " TFBBC ,Target Fast Back to Back Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x004 21. " DEV66 ,Device 66 MHz" "Not capable,Capable"
|
|
bitfld.long 0x004 20. " CAP_L ,Capabilites List" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x004 9. " MFBBC ,Master Fast Back to Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 7. " WAIT ,Wait Cycle Control" "Disabled,Enabled"
|
|
bitfld.long 0x004 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 5. " VGAPS ,VGA Palette Snoop" "Disabled,Enabled"
|
|
bitfld.long 0x004 4. " MWI_EN ,Memory Write and Invalidate Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 3. " SC ,Special Cycles" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " BM ,Bus Master" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " MS ,Memory Space" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " IOS ,IO Space" "Disabled,Enabled"
|
|
line.long 0x008 "PT_CLASS,Transparent PCI Class Register"
|
|
hexmask.long.byte 0x008 24.--31. 1. " BASE ,Base Class Code"
|
|
hexmask.long.byte 0x008 16.--23. 1. " SUB ,Sub Class Code"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--15. 1. " PROG ,Programming Interface"
|
|
hexmask.long.byte 0x008 0.--7. 1. " RID ,Revision ID"
|
|
line.long 0x00c "PT_MISC0,Transparent PCI Miscellaneous 0 Register"
|
|
bitfld.long 0x00c 31. " BISTC ,BIST Capable" "Not capable,Capable"
|
|
bitfld.long 0x00c 30. " SBIST ,Start BIST" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 24.--27. 1. " CCODE ,Completion Code"
|
|
bitfld.long 0x00c 23. " MFUNCT ,Multifunction Device" "Not Multifunction,Multifunction"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 16.--22. 1. " LAYOUT ,Configuration Space Layout conforms to PCI to PCI bridge layout"
|
|
hexmask.long.byte 0x00c 8.--15. 1. " LTIMER ,Latency Timer"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 0.--7. 1. " CLINE ,Cacheline Size"
|
|
line.long 0x010 "P2S_BAR,PCI Base Address Register"
|
|
hexmask.long.word 0x010 16.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x010 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x010 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x010 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x014 "P2S_BAR0_UPPER,PCI Configuration Register 14"
|
|
hexmask.long.long 0x014 0.--31. 1. " BA ,Base Address"
|
|
line.long 0x018 "PT_BUSNUM,Transparent PCI Bus Number Register"
|
|
hexmask.long.byte 0x018 24.--31. 1. " S_LTIMER ,Secondary Latency Timer"
|
|
hexmask.long.byte 0x018 16.--23. 1. " SUB_BUS_NUM ,Subordinate Bus Number"
|
|
textline " "
|
|
hexmask.long.byte 0x018 8.--15. 1. " S_BUS_NUM ,Secondary Bus Number"
|
|
hexmask.long.byte 0x018 0.--7. 1. " P_BUS_NUM ,Primary Bus Number"
|
|
line.long 0x01c "PT_MISC1,Transparent PCI Miscellaneous 1 Register-Primary Mode"
|
|
bitfld.long 0x01c 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
|
|
bitfld.long 0x01c 23. " S_TFBBC ,Secondary Target Fast Back to Back Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x01c 21. " S_DEV66 ,Secondary Device 66MHz" "Not capable,Capable"
|
|
hexmask.long.byte 0x01c 12.--15. 1. " IO_LA ,IO Limit Address"
|
|
textline " "
|
|
hexmask.long.byte 0x01c 4.--7. 1. " IO_BA ,IO Base Address"
|
|
line.long 0x020 "PT_MIO_BL,Transparent PCI MIO Base and Limit Register"
|
|
hexmask.long.word 0x020 20.--31. 1. " LA ,Limit Address"
|
|
hexmask.long.word 0x020 4.--15. 1. " BA ,Base Address"
|
|
line.long 0x024 "PT_PFM_BL,Transparent PCI PFM Base and Limit Register"
|
|
hexmask.long.word 0x024 20.--31. 1. " LA ,Limit Address"
|
|
hexmask.long.word 0x024 4.--15. 1. " BA ,Base Address"
|
|
line.long 0x028 "PT_PFM_B_UPPER,Transparent PCI PFM Base Upper Address Register"
|
|
hexmask.long.long 0x028 0.--31. 1. " BA ,Base Address"
|
|
line.long 0x02c "PT_PFM_L_UPPER,Transparent PCI PFM Limit Upper Address Register"
|
|
hexmask.long.long 0x02c 0.--31. 1. " LA ,Limit Address"
|
|
line.long 0x030 "PT_IO_UPPER,Transparent PCI I/O Address Upper 16 Bits Register"
|
|
hexmask.long.word 0x030 16.--31. 1. " IO_LA ,I/O Limit Address"
|
|
hexmask.long.word 0x030 0.--15. 1. " IO_BA ,I/O Base Address"
|
|
line.long 0x034 "PT_CAP,Transparent PCI Capability Pointer Register"
|
|
hexmask.long.word 0x034 0.--7. 1. " CAP_PTR ,Capabilites Pointer"
|
|
line.long 0x038 "PT_EROM,Transparent PCI Expansion ROM Register"
|
|
hexmask.long.byte 0x038 25.--31. 1. " BA[6:0] ,Expansion ROM Base Address"
|
|
bitfld.long 0x038 0. " EN ,Expansion ROM Decode Enable" "Disabled,Enabled"
|
|
line.long 0x03c "PT_MISC2,Transparent PCI Miscellaneous 2 Register"
|
|
bitfld.long 0x03c 27. " DISCARD_SERR ,Discard Timer SERR# Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x03c 26. " DISCARD_STAT ,Discard Timeout Status" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x03c 25. " DISCARD2 ,Secondary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
bitfld.long 0x03c 24. " DISCARD1 ,Primary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
textline " "
|
|
bitfld.long 0x03c 23. " S_FPTP_EN ,Secondary Fast Back to Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x03c 22. " S_RESET ,Secondary Bus Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x03c 21. " MA_ERR ,Master Abort Error" "All 1s,Target"
|
|
bitfld.long 0x03c 19. " VGA_EN ,VGA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x03c 18. " ISA_EN ,ISA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x03c 17. " SERR_FOR ,Primary SERR# Forward Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x03c 16. " S_PERESP ,Secondary Parity Error Response" "Not assert,Assert"
|
|
hexmask.long.byte 0x03c 8.--15. 1. " INT_PIN ,Interrupt Pin"
|
|
textline " "
|
|
hexmask.long.byte 0x03c 0.--7. 1. " INT_LINE ,Interrupt Line"
|
|
tree.end
|
|
tree "Embedded PCI-to-PCI Bridge Configuration Registers (secondary mode)"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x000 "PT_ID,PCI ID Register"
|
|
hexmask.long.word 0x000 16.--31. 1. " D_ID ,Device ID"
|
|
hexmask.long.word 0x000 0.--15. 1. " V_ID ,Vendor ID"
|
|
line.long 0x004 "PT_CSR,PCI Control and Status Register"
|
|
bitfld.long 0x004 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x004 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x004 29. " R_MA ,Received Master Abort" "Not detected,Detected"
|
|
bitfld.long 0x004 28. " R_TA ,Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x004 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x004 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
|
|
textline " "
|
|
bitfld.long 0x004 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
|
|
bitfld.long 0x004 23. " TFBBC ,Target Fast Back to Back Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x004 21. " DEV66 ,Device 66 MHz" "Not capable,Capable"
|
|
bitfld.long 0x004 20. " CAP_L ,Capabilites List" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x004 9. " MFBBC ,Master Fast Back to Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 7. " WAIT ,Wait Cycle Control" "Disabled,Enabled"
|
|
bitfld.long 0x004 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 5. " VGAPS ,VGA Palette Snoop" "Disabled,Enabled"
|
|
bitfld.long 0x004 4. " MWI_EN ,Memory Write and Invalidate Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 3. " SC ,Special Cycles" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " BM ,Bus Master" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " MS ,Memory Space" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " IOS ,IO Space" "Disabled,Enabled"
|
|
line.long 0x008 "PT_CLASS,Transparent PCI Class Register"
|
|
hexmask.long.byte 0x008 24.--31. 1. " BASE ,Base Class Code"
|
|
hexmask.long.byte 0x008 16.--23. 1. " SUB ,Sub Class Code"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--15. 1. " PROG ,Programming Interface"
|
|
hexmask.long.byte 0x008 0.--7. 1. " RID ,Revision ID"
|
|
line.long 0x00c "PT_MISC0,Transparent PCI Miscellaneous 0 Register"
|
|
bitfld.long 0x00c 31. " BISTC ,BIST Capable" "Not capable,Capable"
|
|
bitfld.long 0x00c 30. " SBIST ,Start BIST" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 24.--27. 1. " CCODE ,Completion Code"
|
|
bitfld.long 0x00c 23. " MFUNCT ,Multifunction Device" "Not Multifunction,Multifunction"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 16.--22. 1. " LAYOUT ,Configuration Space Layout conforms to PCI to PCI bridge layout"
|
|
hexmask.long.byte 0x00c 8.--15. 1. " LTIMER ,Latency Timer"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 0.--7. 1. " CLINE ,Cacheline Size"
|
|
line.long 0x010 "P2S_BAR,PCI Base Address Register"
|
|
hexmask.long.word 0x010 16.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x010 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x010 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x010 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x014 "P2S_BAR0_UPPER,PCI Configuration Register 14"
|
|
hexmask.long.long 0x014 0.--31. 1. " BA ,Base Address"
|
|
line.long 0x018 "PT_BUSNUM,Transparent PCI Bus Number Register"
|
|
hexmask.long.byte 0x018 24.--31. 1. " S_LTIMER ,Secondary Latency Timer"
|
|
hexmask.long.byte 0x018 16.--23. 1. " SUB_BUS_NUM ,Subordinate Bus Number"
|
|
textline " "
|
|
hexmask.long.byte 0x018 8.--15. 1. " S_BUS_NUM ,Secondary Bus Number"
|
|
hexmask.long.byte 0x018 0.--7. 1. " P_BUS_NUM ,Primary Bus Number"
|
|
line.long 0x01c "PT_MISC1,Transparent PCI Miscellaneous 1 Register-Secondary Mode"
|
|
bitfld.long 0x01c 31. " S_D_PE ,Secondary Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x01c 30. " S_S_SERR ,Secondary Singaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x01c 29. " S_R_MA ,Secondary Received Master Abort" "Not detected,Detected"
|
|
bitfld.long 0x01c 28. " S_R_TA ,Secondary Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x01c 27. " S_S_TA ,Secondary Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x01c 25.--26. " S_DEVSEL ,Secondary Device Select Timing" "Fast,Medium,Slow,Reserved"
|
|
textline " "
|
|
bitfld.long 0x01c 24. " S_MDP_D ,Secondary Master Data Parity Detected" "No parity error,Parity error"
|
|
bitfld.long 0x01c 23. " S_TFBBC ,Secondary Target Fast Back to Back Capable" "Not Capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x01c 21. " SDEV66 ,Secondary Device 66 MHz" "Not Capable,Capable"
|
|
hexmask.long.byte 0x01c 12.--15. 1. " IO_LA ,I/O Limit Address"
|
|
textline " "
|
|
hexmask.long.byte 0x01c 4.--7. 1. " IO_BA ,I/O Base Address"
|
|
line.long 0x020 "PT_MIO_BL,Transparent PCI MIO Base and Limit Register"
|
|
hexmask.long.word 0x020 20.--31. 1. " LA ,Limit Address"
|
|
hexmask.long.word 0x020 4.--15. 1. " BA ,Base Address"
|
|
line.long 0x024 "PT_PFM_BL,Transparent PCI PFM Base and Limit Register"
|
|
hexmask.long.word 0x024 20.--31. 1. " LA ,Limit Address"
|
|
hexmask.long.word 0x024 4.--15. 1. " BA ,Base Address"
|
|
line.long 0x028 "PT_PFM_B_UPPER,Transparent PCI PFM Base Upper Address Register"
|
|
hexmask.long.long 0x028 0.--31. 1. " BA ,Base Address"
|
|
line.long 0x02c "PT_PFM_L_UPPER,Transparent PCI PFM Limit Upper Address Register"
|
|
hexmask.long.long 0x02c 0.--31. 1. " LA ,Limit Address"
|
|
line.long 0x030 "PT_IO_UPPER,Transparent PCI I/O Address Upper 16 Bits Register"
|
|
hexmask.long.word 0x030 16.--31. 1. " IO_LA ,I/O Limit Address"
|
|
hexmask.long.word 0x030 0.--15. 1. " IO_BA ,I/O Base Address"
|
|
line.long 0x034 "PT_CAP,Transparent PCI Capability Pointer Register"
|
|
hexmask.long.word 0x034 0.--7. 1. " CAP_PTR ,Capabilites Pointer"
|
|
line.long 0x038 "PT_EROM,Transparent PCI Expansion ROM Register"
|
|
hexmask.long.byte 0x038 25.--31. 1. " BA[6:0] ,Expansion ROM Base Address"
|
|
bitfld.long 0x038 0. " EN ,Expansion ROM Decode Enable" "Disabled,Enabled"
|
|
line.long 0x03c "PT_MISC2,Transparent PCI Miscellaneous 2 Register"
|
|
bitfld.long 0x03c 27. " DISCARD_SERR ,Discard Timer SERR# Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x03c 26. " DISCARD_STAT ,Discard Timeout Status" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x03c 25. " DISCARD2 ,Secondary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
bitfld.long 0x03c 24. " DISCARD1 ,Primary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
textline " "
|
|
bitfld.long 0x03c 23. " S_FPTP_EN ,Secondary Fast Back to Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x03c 22. " S_RESET ,Secondary Bus Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x03c 21. " MA_ERR ,Master Abort Error" "All 1s,Target"
|
|
bitfld.long 0x03c 19. " VGA_EN ,VGA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x03c 18. " ISA_EN ,ISA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x03c 17. " SERR_FOR ,Primary SERR# Forward Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x03c 16. " S_PERESP ,Secondary Parity Error Response" "Not assert,Assert"
|
|
hexmask.long.byte 0x03c 8.--15. 1. " INT_PIN ,Interrupt Pin"
|
|
textline " "
|
|
hexmask.long.byte 0x03c 0.--7. 1. " INT_LINE ,Interrupt Line"
|
|
tree.end
|
|
tree "Transparent PCI-to-PCI Bridge Configuration Registers"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x000 "PE_ID,PCI ID Register"
|
|
hexmask.long.word 0x000 16.--31. 1. " DID ,Device ID"
|
|
hexmask.long.word 0x000 0.--15. 1. " VID ,Vendor ID"
|
|
line.long 0x004 "PE_CSR,PCI Control and Status Register"
|
|
bitfld.long 0x004 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x004 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x004 29. " R_MA ,Received Master Abort" "Not detected,Detected"
|
|
bitfld.long 0x004 28. " R_TA ,Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x004 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x004 25.--26. " DEVSEL ,Device Select Timing" "Fast,Medium,Slow,Reserved"
|
|
textline " "
|
|
bitfld.long 0x004 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
|
|
bitfld.long 0x004 23. " TFBBC ,Target Fast Back to Back Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x004 21. " DEV66 ,Device 66 MHz" "Not capable,Capable"
|
|
bitfld.long 0x004 20. " CAP_L ,Capabilites List" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x004 19. " INT_STAT ,Interrupt Status" "Clear,Set"
|
|
bitfld.long 0x004 10. " INT_DIS ,Interrupt Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x004 9. " MFBBC ,Master Fast Back to Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 7. " WAIT ,Wait Cycle Control" "Disabled,Enabled"
|
|
bitfld.long 0x004 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 5. " VGAPS ,VGA Palette Snoop" "Disabled,Enabled"
|
|
bitfld.long 0x004 4. " MWI_EN ,Memory Write and Invalidate Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 3. " SC ,Special Cycles" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " BM ,Bus Master" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " MS ,Memory Space" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " IOS ,I/O Space" "Disabled,Enabled"
|
|
line.long 0x008 "PE_CLASS,PCI Class Register"
|
|
hexmask.long.byte 0x008 24.--31. 1. " BASE ,Base Class Code"
|
|
hexmask.long.byte 0x008 16.--23. 1. " SUB ,Sub Class Code"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--15. 1. " PROG ,Programming Interface"
|
|
hexmask.long.byte 0x008 0.--7. 1. " RID ,Revision ID"
|
|
line.long 0x00c "PE_MISC0,PCI Miscellaneous 0 Register"
|
|
bitfld.long 0x00c 31. " BIST ,BIST Capable" "Not capable,Capable"
|
|
bitfld.long 0x00c 30. " SBIST ,Start BIST" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 24.--27. 1. " CCODE ,Completion Code"
|
|
bitfld.long 0x00c 23. " MFUNCT ,Multifunction Device" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 16.--22. 1. " LAYOUT ,Configuration Space Layout conforms to PCI device layout"
|
|
hexmask.long.byte 0x00c 8.--15. 1. " LTIMER ,Latency Timer"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 0.--7. 1. " CLINE ,Cacheline Size"
|
|
line.long 0x010 "P2S_BAR0,PCI Base Address Register 0 "
|
|
hexmask.long.word 0x010 16.--31. 1. " BA ,Base Address[31:16]"
|
|
bitfld.long 0x010 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x010 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x010 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x014 "P2S_BAR0_UPPER,PCI Base Address Register 0 Upper"
|
|
hexmask.long.long 0x014 0.--31. 1. " BA ,Base Address Upper Bits[63:32]"
|
|
line.long 0x018 "P2S_BAR2,PCI Memory Base Address Register 2"
|
|
hexmask.long.word 0x018 16.--31. 1. " BA ,Base Address[31:16]"
|
|
bitfld.long 0x018 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x018 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x018 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x01c "P2S_BAR2_UPPER,PCI Memory Base Address Register 2 Upper 32 bits"
|
|
hexmask.long.long 0x01c 0.--31. 1. " BA ,Base Address[63:32]"
|
|
line.long 0x020 "P2S_BAR3,PCI Memory Base Address Register 3"
|
|
hexmask.long.word 0x020 16.--31. 1. " BA ,Base Address[31:15]"
|
|
bitfld.long 0x020 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable"
|
|
textline " "
|
|
bitfld.long 0x020 1.--2. " TYPE ,Type" "32-bit space,Reserved,64-bit space,Reserved"
|
|
bitfld.long 0x020 0. " SPACE ,PCI Bus Address Space" "Low,High"
|
|
line.long 0x024 "P2S_BAR3_UPPER,PCI Memory Base Address Register 3 Upper 32 bits"
|
|
hexmask.long.long 0x024 0.--31. 1. " BA ,Base Address[63:32]"
|
|
line.long 0x02c "PE_SID,PCI Subsystem ID Register"
|
|
hexmask.long.word 0x02c 16.--31. 1. " SID ,Subsystem ID"
|
|
hexmask.long.word 0x02c 0.--15. 1. " SVID ,Subsystem Vendor ID"
|
|
line.long 0x030 "PE_EROM,Embedded PCI Expansion ROM Register"
|
|
hexmask.long.byte 0x030 25.--31. 1. " BA[6:0] ,Expansion ROM Base Address"
|
|
bitfld.long 0x030 0. " EN ,Expansion ROM Decode Enable" "Disabled,Enabled"
|
|
line.long 0x034 "PE_CAP,PCI Capability Pointer Register"
|
|
hexmask.long.byte 0x034 0.--7. 1. " CAP_PTR ,Capabilities Pointer"
|
|
line.long 0x03c "PE_MISC2,PCI Miscellaneous 2 Register"
|
|
hexmask.long.byte 0x03c 24.--31. 1. " MAX_LAT[7:0] ,Maximum Latency"
|
|
hexmask.long.byte 0x03c 16.--23. 1. " MIN_GNT[7:0] ,Minimum Grant"
|
|
textline " "
|
|
hexmask.long.byte 0x03c 8.--15. 1. " INT_PIN[7:0] ,Interrupt Pin"
|
|
hexmask.long.byte 0x03c 0.--7. 1. " INT_LINE[7:0] ,Interrupt Line"
|
|
tree.end
|
|
tree "Device Specific Configuration Registers (embedded mode)"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x040 "MISC_CSR,Miscellaneous Control and Status Register"
|
|
hexmask.long.byte 0x040 24.--31. 1. " DEV_ID ,Internal Device ID"
|
|
hexmask.long.byte 0x040 16.--23. 1. " VER_ID ,Internal Version ID"
|
|
textline " "
|
|
bitfld.long 0x040 15. " VPD_EN ,PCI Vital Product Data" "Disabled,Enabled"
|
|
bitfld.long 0x040 10. " M66EN ,Latched Value of M66EN pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 9. " CTL_RSC ,Controlling Resource at power-up" "Low,High"
|
|
bitfld.long 0x040 8. " D64 ,64 Bit bus at power-up" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 7. " PCI_LCK ,PCI lockout" "Not set,Reset"
|
|
bitfld.long 0x040 6. " SOFT_RES ,Software Reset" "Not set,Reset"
|
|
textline " "
|
|
bitfld.long 0x040 5. " PRIMARY ,Power-up as primary interface" "Low,High"
|
|
bitfld.long 0x040 4. " TRANS ,Power-up as a transparent Bridge Port" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 1. " BAR0_EN ,Primary PCI Registers Base Address Register 0 enable" "Disabled,Enabled"
|
|
line.long 0x044 "SERR_DIS,PCI SERR# Event Disable Register"
|
|
bitfld.long 0x044 6. " DR_ND ,Delayed Read No Data" "Assert,Not assert"
|
|
bitfld.long 0x044 5. " DW_ND ,Delayed Write Non Delivery" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 4. " PW_MA ,Posted Write Master Abort" "Assert,Not assert"
|
|
bitfld.long 0x044 3. " PW_TA ,Posted Write Target Abort" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 2. " PW_RETRY ,Posted Write Max Retry" "Assert,Not assert"
|
|
line.long 0x048 "SERR_STAT,PCI SERR Status Register"
|
|
bitfld.long 0x048 7. " D_TOUT ,Delayed Cycle Time Out" "Clear,Set"
|
|
bitfld.long 0x048 6. " DR_ND ,Delayed Read No Data from Target" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 5. " DW_ND ,Delayed Write Non Delivery" "Clear,Set"
|
|
bitfld.long 0x048 4. " PW_MA ,Posted Write Master Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 3. " PW_TA ,Posted Write Target Abort" "Clear,Set"
|
|
bitfld.long 0x048 2. " PW_RETRY ,Posted Write Max Retry" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 1. " PW_DPE ,Posted Write Data Parity Error" "Clear,Set"
|
|
bitfld.long 0x048 0. " APE ,Address Parity Error" "Clear,Set"
|
|
line.long 0x04c "P2S_PAGE_SIZES,PCI BAR Setup Register"
|
|
hexmask.long.byte 0x04c 27.--31. 1. " FAB_BAR_SIZE ,Fabric Bar Page Size"
|
|
bitfld.long 0x04c 26. " FAB_BAR_NOTRAN ,Fabric Bar Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 24. " FAB_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04c 11.--15. 1. " BAR2_SIZE ,Bar2 Page Size"
|
|
textline " "
|
|
bitfld.long 0x04c 10. " BAR2_NOTRAN ,Bar2 Address Translation Control" "Enabled,Disabled"
|
|
bitfld.long 0x04c 8. " BAR2_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x04c 3.--7. 1. " BAR3_SIZE ,Bar3 Page Size"
|
|
bitfld.long 0x04c 2. " BAR3_NOTRAN ,Bar3 Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 0. " BAR3_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
line.long 0x050 "P_VPD_CSR,VPD Control and Status Register"
|
|
hexmask.long.byte 0x050 29.--31. 1. " VPD_PORT_NUM[3:0] ,Port where VPD resides"
|
|
hexmask.long.tbyte 0x050 4.--23. 1. " VPD_OFFSET[19:0] ,Address offset within VPD_PORT where accesses are sent"
|
|
line.long 0x064 "PT_PFM_FABRIC_BL,PCI Transparent PFM Fabric Base Register"
|
|
hexmask.long.tbyte 0x064 15.--31. 1. " FAB_BAR ,PFM Fabric Base Address[31:15]"
|
|
line.long 0x068 "PT_PFM_FABRIC_B_UPPER,PCI Transparent PFM Fabric Base Upper Register"
|
|
hexmask.long.long 0x068 0.--31. 1. " FAB_BAR ,PFM Fabric Base Address[63:32]"
|
|
line.long 0x0c8 "P_SLOT_ID,PCI Slot Identification Register"
|
|
hexmask.long.byte 0x0c8 24.--31. 1. " CHASSIS ,Chassis Number"
|
|
bitfld.long 0x0c8 21. " FIC ,First In Chassis" "Not a parent,Parent"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 16.--20. 1. " EXP_SLOT[4:0] ,Expansion Slot"
|
|
hexmask.long.byte 0x0c8 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to PMC block"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0cc "P_PMC,PCI Power Management Capability Register"
|
|
hexmask.long.byte 0x0cc 27.--31. 1. " PME_SUP ,PME Support"
|
|
bitfld.long 0x0cc 26. " D2_SP ,D2 Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0cc 25. " D1_SP ,D1 Support" "Not supported,Supported"
|
|
bitfld.long 0x0cc 21. " DSI ,Device Specific Initialization" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0cc 19. " PME_CK ,PME Clock" "Not required,Required"
|
|
bitfld.long 0x0cc 16.--18. " PM_VER[2:0] ,Power Management Version" "0,1,2,3,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x0cc 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Hot Swap Block"
|
|
hexmask.long.byte 0x0cc 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d0 "P_PMCS,PCI Power Management Control and Status Register"
|
|
bitfld.long 0x0d0 23. " BPCC_EN ,Bus Power/Clock Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0d0 22. " B2_B3 ,B2_B3 Support for D3hot" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0d0 15. " PME_ST ,PME Status" "Clear,Set"
|
|
bitfld.long 0x0d0 8. " PME_EN ,PME Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0d0 0.--1. " PWR_ST[1:0] ,Power State" "D0,Reserved,Reserved,D3hot"
|
|
line.long 0x0d4 "P_HS_CSR,PCI Compact PCI Hot Swap Control and Status Register"
|
|
bitfld.long 0x0d4 23. " INS ,ENUM# Status Insertion" "Negated,Asserted"
|
|
bitfld.long 0x0d4 22. " EXT ,ENUM# Status Extraction" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0d4 19. " LOO ,LED ON/OFF" "Off,On"
|
|
bitfld.long 0x0d4 17. " EIM ,ENUM# Signal Mask" "Enabled,Masked"
|
|
textline " "
|
|
hexmask.long.byte 0x0d4 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Vital Product Data"
|
|
hexmask.long.byte 0x0d4 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d8 "P_VPDC,PCI Vital Products Data Capability Register"
|
|
bitfld.long 0x0d8 31. " F ,Data Transfer Complete Flag" "Clear,Set"
|
|
hexmask.long.byte 0x0d8 16.--23. 1. " VPDA ,Vital Product Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x0d8 8.--15. 1. " NXT_PTR ,Next Pointer to Message Signaled Interrupt"
|
|
hexmask.long.byte 0x0d8 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0dc "P_VPDD,PCI Vital Products Data Register"
|
|
hexmask.long.long 0x0dc 0.--31. 1. " VPD_DATA ,VPD Data"
|
|
line.long 0x0e0 "P_MSIC,PCI Message Signaled Interrupt Control Register"
|
|
bitfld.long 0x0e0 23. " CAP64 ,64-bit Address Capable" "Not capable,Capable"
|
|
hexmask.long.byte 0x0e0 20.--22. 1. " MM_EN ,Multiple Message Enable"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 17.--19. 1. " MM_CAP ,Multiple Message Capable"
|
|
bitfld.long 0x0e0 16. " MSI_EN ,Message Signaled Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 8.--15. 1. " NXT_PTR ,Next Pointer to PCI-X"
|
|
hexmask.long.byte 0x0e0 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0e4 "P_MSIA,PCI Message Signaled Interrupt Address Register"
|
|
hexmask.long.long 0x0e4 2.--31. 1. " MSI_ADDR[31:2] ,Message Signaled Interrupt Address"
|
|
line.long 0x0e8 "P_MSIA_UPPER,PCI Message Signaled Interrupt Address Upper Register"
|
|
hexmask.long.long 0x0e8 0.--31. 1. " MSI_ADDR ,Message Signaled Interrupt Address Upper"
|
|
line.long 0x0ec "P_MSID,PCI Message Signaled Interrupt Data Register"
|
|
hexmask.long.word 0x0ec 2.--15. 1. " MSI_DATA[15:2] ,Message Signaled Interrupt Data"
|
|
line.long 0x0f0 "P_PCI/X_C,PCI-X Capability Register (Embedded Mode)"
|
|
hexmask.long.byte 0x0f0 20.--22. 1. " MAX_SPLIT ,Max Split Transactions"
|
|
hexmask.long.byte 0x0f0 20.--22. 1. " MAX_BC ,Max Memory Read Byte Count"
|
|
textline " "
|
|
bitfld.long 0x0f0 17. " RO_EN ,Enable Relaxed Ordering" "Disabled,Enabled"
|
|
bitfld.long 0x0f0 16. " P_DPERR ,Data Parity Error Recovery Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0f0 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer"
|
|
hexmask.long.byte 0x0f0 0.--7. 1. " CAP_ID[7:0] ,Capability ID for PCI-X"
|
|
line.long 0x0f4 "P_PCI/X_S,PCI-X Status Register (Embedded Mode)"
|
|
bitfld.long 0x0f4 29. " P_RSPE ,Received Split Completion Error Message" "Clear,Set"
|
|
hexmask.long.byte 0x0f4 26.--28. 1. " P_MAX_CUM ,Maximum Cumulative Read Size"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 23.--25. 1. " P_MAX_SPLIT ,Max Split Transactions handled"
|
|
hexmask.long.byte 0x0f4 21.--22. 1. " P_MAX_RD ,Max Memory Read Byte Count"
|
|
textline " "
|
|
bitfld.long 0x0f4 20. " P_COMP ,Device Complexity" "Low,Bridge"
|
|
bitfld.long 0x0f4 19. " S_USC ,Secondary Unexpected Split Completion" "Accepted,Not accepted"
|
|
textline " "
|
|
bitfld.long 0x0f4 18. " S_SCD ,Secondary Split Completion Discarded" "Not discarted,Discarted"
|
|
bitfld.long 0x0f4 17. " S_133CAP ,133 Mhz Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x0f4 16. " S_D64 ,Secondary 64-bit Device" "Not capable,Capable"
|
|
hexmask.long.byte 0x0f4 8.--15. 1. " BUS_NUM ,Bus Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 3.--7. 1. " DEV_NUM ,Device Number"
|
|
hexmask.long.byte 0x0f4 0.--2. 1. " FUNC_NUM ,Function Number"
|
|
line.long 0x0f8 "P_PCI/X_UP,PCI-X Upstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0f8 16.--31. 1. " SPLIT_COM_LMT_U[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0f8 0.--15. 1. " SPLIT_TRANS_CAP_U ,Split Transaction Capacity"
|
|
line.long 0x0fc "P_PCI/X_DOWN,PCI-X Downstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0fc 16.--31. 1. " SPLIT_COM_LMT_D[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0fc 0.--15. 1. " SPLIT_TRANS_CAP_D ,Split Transaction Capacity"
|
|
tree.end
|
|
tree "Device Specific Configuration Registers (transparent mode)"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x040 "MISC_CSR,Miscellaneous Control and Status Register"
|
|
hexmask.long.byte 0x040 24.--31. 1. " DEV_ID ,Internal Device ID"
|
|
hexmask.long.byte 0x040 16.--23. 1. " VER_ID ,Internal Version ID"
|
|
textline " "
|
|
bitfld.long 0x040 15. " VPD_EN ,PCI Vital Product Data" "Disabled,Enabled"
|
|
bitfld.long 0x040 10. " M66EN ,Latched Value of M66EN pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 9. " CTL_RSC ,Controlling Resource at power-up" "Low,High"
|
|
bitfld.long 0x040 8. " D64 ,64 Bit bus at power-up" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 7. " PCI_LCK ,PCI lockout" "Not set,Reset"
|
|
bitfld.long 0x040 6. " SOFT_RES ,Software Reset" "Not set,Reset"
|
|
textline " "
|
|
bitfld.long 0x040 5. " PRIMARY ,Power-up as primary interface" "Low,High"
|
|
bitfld.long 0x040 4. " TRANS ,Power-up as a transparent Bridge Port" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x040 1. " BAR0_EN ,Primary PCI Registers Base Address Register 0 enable" "Disabled,Enabled"
|
|
line.long 0x044 "SERR_DIS,PCI SERR# Event Disable Register"
|
|
bitfld.long 0x044 6. " DR_ND ,Delayed Read No Data" "Assert,Not assert"
|
|
bitfld.long 0x044 5. " DW_ND ,Delayed Write Non Delivery" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 4. " PW_MA ,Posted Write Master Abort" "Assert,Not assert"
|
|
bitfld.long 0x044 3. " PW_TA ,Posted Write Target Abort" "Assert,Not assert"
|
|
textline " "
|
|
bitfld.long 0x044 2. " PW_RETRY ,Posted Write Max Retry" "Assert,Not assert"
|
|
line.long 0x048 "SERR_STAT,PCI SERR Status Register"
|
|
bitfld.long 0x048 7. " D_TOUT ,Delayed Cycle Time Out" "Clear,Set"
|
|
bitfld.long 0x048 6. " DR_ND ,Delayed Read No Data from Target" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 5. " DW_ND ,Delayed Write Non Delivery" "Clear,Set"
|
|
bitfld.long 0x048 4. " PW_MA ,Posted Write Master Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 3. " PW_TA ,Posted Write Target Abort" "Clear,Set"
|
|
bitfld.long 0x048 2. " PW_RETRY ,Posted Write Max Retry" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x048 1. " PW_DPE ,Posted Write Data Parity Error" "Clear,Set"
|
|
bitfld.long 0x048 0. " APE ,Address Parity Error" "Clear,Set"
|
|
line.long 0x04c "P2S_PAGE_SIZES,PCI BAR Setup Register"
|
|
hexmask.long.byte 0x04c 27.--31. 1. " FAB_BAR_SIZE ,Fabric Bar Page Size"
|
|
bitfld.long 0x04c 26. " FAB_BAR_NOTRAN ,Fabric Bar Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 24. " FAB_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04c 11.--15. 1. " BAR2_SIZE ,Bar2 Page Size"
|
|
textline " "
|
|
bitfld.long 0x04c 10. " BAR2_NOTRAN ,Bar2 Address Translation Control" "Enabled,Disabled"
|
|
bitfld.long 0x04c 8. " BAR2_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x04c 3.--7. 1. " BAR3_SIZE ,Bar3 Page Size"
|
|
bitfld.long 0x04c 2. " BAR3_NOTRAN ,Bar3 Address Translation Control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04c 0. " BAR3_EN ,Fabric Bar Enable" "Disabled,Enabled"
|
|
line.long 0x050 "P_VPD_CSR,VPD Control and Status Register"
|
|
hexmask.long.byte 0x050 29.--31. 1. " VPD_PORT_NUM[3:0] ,Port where VPD resides"
|
|
hexmask.long.tbyte 0x050 4.--23. 1. " VPD_OFFSET[19:0] ,Address offset within VPD_PORT where accesses are sent"
|
|
line.long 0x064 "PT_PFM_FABRIC_BL,PCI Transparent PFM Fabric Base Register"
|
|
hexmask.long.tbyte 0x064 15.--31. 1. " FAB_BAR ,PFM Fabric Base Address[31:15]"
|
|
line.long 0x068 "PT_PFM_FABRIC_B_UPPER,PCI Transparent PFM Fabric Base Upper Register"
|
|
hexmask.long.long 0x068 0.--31. 1. " FAB_BAR ,PFM Fabric Base Address[63:32]"
|
|
line.long 0x0c8 "P_SLOT_ID,PCI Slot Identification Register"
|
|
hexmask.long.byte 0x0c8 24.--31. 1. " CHASSIS ,Chassis Number"
|
|
bitfld.long 0x0c8 21. " FIC ,First In Chassis" "Not a parent,Parent"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 16.--20. 1. " EXP_SLOT[4:0] ,Expansion Slot"
|
|
hexmask.long.byte 0x0c8 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to PMC block"
|
|
textline " "
|
|
hexmask.long.byte 0x0c8 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0cc "P_PMC,PCI Power Management Capability Register"
|
|
hexmask.long.byte 0x0cc 27.--31. 1. " PME_SUP ,PME Support"
|
|
bitfld.long 0x0cc 26. " D2_SP ,D2 Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0cc 25. " D1_SP ,D1 Support" "Not supported,Supported"
|
|
bitfld.long 0x0cc 21. " DSI ,Device Specific Initialization" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0cc 19. " PME_CK ,PME Clock" "Not required,Required"
|
|
bitfld.long 0x0cc 16.--18. " PM_VER[2:0] ,Power Management Version" "0,1,2,3,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x0cc 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Hot Swap Block"
|
|
hexmask.long.byte 0x0cc 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d0 "P_PMCS,PCI Power Management Control and Status Register"
|
|
bitfld.long 0x0d0 23. " BPCC_EN ,Bus Power/Clock Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0d0 22. " B2_B3 ,B2_B3 Support for D3hot" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x0d0 15. " PME_ST ,PME Status" "Clear,Set"
|
|
bitfld.long 0x0d0 8. " PME_EN ,PME Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0d0 0.--1. " PWR_ST[1:0] ,Power State" "D0,Reserved,Reserved,D3hot"
|
|
line.long 0x0d4 "P_HS_CSR,PCI Compact PCI Hot Swap Control and Status Register"
|
|
bitfld.long 0x0d4 23. " INS ,ENUM# Status Insertion" "Negated,Asserted"
|
|
bitfld.long 0x0d4 22. " EXT ,ENUM# Status Extraction" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0d4 19. " LOO ,LED ON/OFF" "Off,On"
|
|
bitfld.long 0x0d4 17. " EIM ,ENUM# Signal Mask" "Enabled,Masked"
|
|
textline " "
|
|
hexmask.long.byte 0x0d4 8.--15. 1. " NXT_PTR[7:0] ,Next Pointer to Vital Product Data"
|
|
hexmask.long.byte 0x0d4 0.--7. 1. " CAP_ID[7:0] ,Capability ID"
|
|
line.long 0x0d8 "P_VPDC,PCI Vital Products Data Capability Register"
|
|
bitfld.long 0x0d8 31. " F ,Data Transfer Complete Flag" "Clear,Set"
|
|
hexmask.long.byte 0x0d8 16.--23. 1. " VPDA ,Vital Product Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x0d8 8.--15. 1. " NXT_PTR ,Next Pointer to Message Signaled Interrupt"
|
|
hexmask.long.byte 0x0d8 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0dc "P_VPDD,PCI Vital Products Data Register"
|
|
hexmask.long.long 0x0dc 0.--31. 1. " VPD_DATA ,VPD Data"
|
|
line.long 0x0e0 "P_MSIC,PCI Message Signaled Interrupt Control Register"
|
|
bitfld.long 0x0e0 23. " CAP64 ,64-bit Address Capable" "Not capable,Capable"
|
|
hexmask.long.byte 0x0e0 20.--22. 1. " MM_EN ,Multiple Message Enable"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 17.--19. 1. " MM_CAP ,Multiple Message Capable"
|
|
bitfld.long 0x0e0 16. " MSI_EN ,Message Signaled Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0e0 8.--15. 1. " NXT_PTR ,Next Pointer to PCI-X"
|
|
hexmask.long.byte 0x0e0 0.--7. 1. " CAP_ID ,Capability ID"
|
|
line.long 0x0e4 "P_MSIA,PCI Message Signaled Interrupt Address Register"
|
|
hexmask.long.long 0x0e4 2.--31. 1. " MSI_ADDR[31:2] ,Message Signaled Interrupt Address"
|
|
line.long 0x0e8 "P_MSIA_UPPER,PCI Message Signaled Interrupt Address Upper Register"
|
|
hexmask.long.long 0x0e8 0.--31. 1. " MSI_ADDR ,Message Signaled Interrupt Address Upper"
|
|
line.long 0x0ec "P_MSID,PCI Message Signaled Interrupt Data Register"
|
|
hexmask.long.word 0x0ec 2.--15. 1. " MSI_DATA[15:2] ,Message Signaled Interrupt Data"
|
|
line.long 0x0f0 "P_PCI/X_C,PCI-X Capability Register (Transparent Mode)"
|
|
bitfld.long 0x0f0 22.--24. " S_FREQ ,Secondary Clock Frequency" "Conventional,66 Mhz,100 Mhz,133 Mhz,Reserved,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x0f0 21. " S_SRD ,Secondary Split Request Delayed" "No delay,Delay"
|
|
textline " "
|
|
bitfld.long 0x0f0 20. " S_SCO ,Secondary Split Completion Overrun" "Accepted,Not accepted"
|
|
bitfld.long 0x0f0 19. " S_USC ,Secondary Unexpected Split Completion" "Accepted,Not accepted"
|
|
textline " "
|
|
bitfld.long 0x0f0 18. " S_SCD ,Secondary Split Completion Discarded" "Not discarted,Discarted"
|
|
bitfld.long 0x0f0 17. " S_133CAP ,Secondary 133 Mhz Capable" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x0f0 16. " S_D64 ,Secondary 64-bit Device" "Not capable,Capable"
|
|
hexmask.long.byte 0x0f0 8.--15. 1. " NXT_PTR ,Next Pointer"
|
|
textline " "
|
|
hexmask.long.byte 0x0f0 0.--7. 1. " CAP_ID ,Capability ID for PCI-X"
|
|
line.long 0x0f4 "P_PCI/X_S,PCI-X Status Register (Transparent Mode)"
|
|
bitfld.long 0x0f4 21. " P_SRD ,Split Request Delayed" "No delay,Delay"
|
|
bitfld.long 0x0f4 20. " P_SCO ,Split Completion Overrun" "Accepted,Not accepted"
|
|
textline " "
|
|
bitfld.long 0x0f4 19. " S_USC ,Secondary Unexpected Split Completion" "Accepted,Not accepted"
|
|
bitfld.long 0x0f4 18. " S_SCD ,Secondary Split Completion Discarded" "Not discarted,Discarted"
|
|
textline " "
|
|
bitfld.long 0x0f4 17. " S_133CAP ,Secondary 133 Mhz Capable" "Not capable,Capable"
|
|
bitfld.long 0x0f4 16. " S_D64 ,Secondary 64-bit Device" "Not capable,Capable"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 8.--15. 1. " BUS_NUM ,Bus Number"
|
|
hexmask.long.byte 0x0f4 3.--7. 1. " DEV_NUM ,Device Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0f4 0.--2. 1. " FUNC_NUM ,Function Number"
|
|
line.long 0x0f8 "P_PCI/X_UP,PCI-X Upstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0f8 16.--31. 1. " SPLIT_COM_LMT_U[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0f8 0.--15. 1. " SPLIT_TRANS_CAP_U ,Split Transaction Capacity"
|
|
line.long 0x0fc "P_PCI/X_DOWN,PCI-X Downstream Split Transaction Control Register (Transparent Mode)"
|
|
hexmask.long.word 0x0fc 16.--31. 1. " SPLIT_COM_LMT_D[15:0] ,Split Transaction Commitment Limit"
|
|
hexmask.long.word 0x0fc 0.--15. 1. " SPLIT_TRANS_CAP_D ,Split Transaction Capacity"
|
|
tree.end
|
|
tree "Miscellaneous Registers"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x10c "ARB_CTRL,PCI Arbitration Control Register"
|
|
bitfld.long 0x10c 15. " M7_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 14. " M6_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 13. " M5_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 12. " M4_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 11. " M3_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 10. " M2_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 9. " M1_PRI ,Arbitration Level for external Masters on Secondary PCI" "Low priority,High priority"
|
|
bitfld.long 0x10c 8. " FL_PRI ,Arbitration Level for the block on Secondary PCI" "Low priority,High priority"
|
|
textline " "
|
|
bitfld.long 0x10c 6.--7. " TO_CNT ,Time-out Count" "16 CLKs,32 CLKs,64 CLKs,OFF"
|
|
bitfld.long 0x10c 3. " PARK ,Secondary PCI Bus Parking Algorithm" "Last master,Specific master"
|
|
textline " "
|
|
bitfld.long 0x10c 0.--2. " BM_PARK ,Parked Master" "PCI/X Block,M1,M2,M3,M4,M5,M6,M7"
|
|
line.long 0x110 "P_CSR_SHADOW,PCI Control and Status Shadow Register"
|
|
bitfld.long 0x110 31. " D_PE ,Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x110 30. " S_SERR ,Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x110 29. " R_MA ,Received Master Abort" "Not detected,Detected"
|
|
bitfld.long 0x110 28. " R_TA ,Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x110 27. " S_TA ,Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x110 24. " MDP_D ,Master Data Parity Detected" "No parity error,Parity error"
|
|
textline " "
|
|
bitfld.long 0x110 8. " SERR_EN ,SERR# Enable" "Disabled,Enabled"
|
|
bitfld.long 0x110 6. " PERESP ,Parity Error Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x110 2. " BM ,Bus Master" "Disabled,Enabled"
|
|
bitfld.long 0x110 1. " MS ,Memory Space" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x110 0. " IOS ,IO Space" "Disabled,Enabled"
|
|
line.long 0x114 "P_MISC1_SHADOW,Transparent PCI Miscellaneous 1 Shadow Register"
|
|
bitfld.long 0x114 31. " S_D_PE ,Secondary Detected Parity Error" "No parity error,Parity error"
|
|
bitfld.long 0x114 30. " S_S_SERR ,Secondary Signaled SERR#" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x114 29. " S_R_MA ,Secondary Received Master Abort" "Not generated,Generated"
|
|
bitfld.long 0x114 28. " S_R_TA ,Secondary Received Target Abort" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x114 27. " S_S_TA ,Secondary Signaled Target Abort" "Not terminated,Terminated"
|
|
bitfld.long 0x114 24. " S_MDP_D ,Secondary Master Data Parity Detected" "No parity error,Parity error"
|
|
line.long 0x118 "P_MISC2_SHADOW,Transparent PCI Miscellaneous 2 Shadow Register"
|
|
bitfld.long 0x118 27. " DISCARD_SERR ,Discard Timer SERR# Enable" "Not asserted,Asserted"
|
|
bitfld.long 0x118 26. " DISCARD_STAT ,Discard Timeout Status" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x118 25. " DISCARD2 ,Secondary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
bitfld.long 0x118 24. " DISCARD1 ,Primary Discard Timer" "2^15 cycles,2^10 cycles"
|
|
textline " "
|
|
bitfld.long 0x118 22. " S_RESET ,Secondary Bus Reset" "No reset,Reset"
|
|
bitfld.long 0x118 21. " MA_ERR ,Master Abort Error" "All 1's,Target"
|
|
textline " "
|
|
bitfld.long 0x118 17. " SERR_FOR ,Primary SERR# Forward Enable" "Disabled,Enabled"
|
|
bitfld.long 0x118 16. " P_PERESP ,Primary Parity Error Response" "Not assert,Assert"
|
|
line.long 0x11c "SERR_STAT_SHADOW,PCI SERR# Status Shadow Register"
|
|
bitfld.long 0x11c 22. " DR_ND ,Delayed Read No Data from Target" "Clear,Set"
|
|
bitfld.long 0x11c 21. " DW_ND ,Delayed Write Non Delivery" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x11c 20. " PW_MA ,Posted Write Master Abort" "Clear,Set"
|
|
bitfld.long 0x11c 19. " PW_TA ,Posted Write Target Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x11c 18. " PW_RETRY ,Posted Write Max Retry" "Clear,Set"
|
|
bitfld.long 0x11c 17. " PW_DPE ,Posted Write Data Parity Error" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x11c 16. " APE ,Address Parity Error" "Clear,Set"
|
|
line.long 0x120 "P_PCI/X_C_SHADOW,PCI-X Capability Shadow Register"
|
|
bitfld.long 0x120 24. " S_FREQ ,Secondary Clock Frequency" "Low,High"
|
|
bitfld.long 0x120 21. " S_SRD ,Secondary Split Request Delayed" "No delay,Delay"
|
|
textline " "
|
|
bitfld.long 0x120 20. " S_SCO ,Secondary Split Completion Overrun" "Accepted,Terminated"
|
|
bitfld.long 0x120 19. " S_USC ,Secondary Unexpected Split Completion" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x120 18. " S_SCD ,Secondary Split Completion Discarded" "Not Discarted,Discarted"
|
|
line.long 0x124 "P_PCI/X_S_SHADOW,PCI-X Bridge Status Shadow Register"
|
|
bitfld.long 0x124 21. " P_SRD ,Split Request Delayed" "No delay,Delay"
|
|
bitfld.long 0x124 20. " S_SCO ,Split Completion Overrun" "Accepted,Terminated"
|
|
textline " "
|
|
bitfld.long 0x124 19. " S_USC ,Unexpected Split Completion" "Not received,Received"
|
|
bitfld.long 0x124 18. " S_SCD ,Split Completion Discarded" "Not Discarted,Discarted"
|
|
line.long 0x128 "P_LAST_OP_SHADOW,PCI Last Transaction Shadow Register"
|
|
bitfld.long 0x128 12. " L ,Last PCI op address size" "32 bit,64 bit"
|
|
hexmask.long.byte 0x128 8.--11. 1. " CMD ,Last PCI command"
|
|
textline " "
|
|
hexmask.long.byte 0x128 4.--7. 1. " BE[7:4] ,Left-most byte enables with 64 bit PCI bus"
|
|
hexmask.long.byte 0x128 0.--3. 1. " BE[3:0] ,Right-most byte enables with 64 or 32 bit PCI bus"
|
|
line.long 0x12c "P_LAST_ADDR_UPPER_SHADOW,PCI Last Upper Address Shadow Register"
|
|
hexmask.long.long 0x12c 0.--31. 1. " ADDR[63:32] ,Upper part of last PCI transaction address"
|
|
line.long 0x130 "P_LAST_ADDR_LOWER_SHADOW,PCI Last Lower Address Shadow Register"
|
|
hexmask.long.long 0x130 0.--31. 1. " ADDR[31:0] ,Lower part of last PCI transaction address"
|
|
line.long 0x134 "P_LAST_ATTR_SHADOW,PCI Last Attribute Register"
|
|
bitfld.long 0x134 30. " NS ,No Snoop" "Low,High"
|
|
bitfld.long 0x134 29. " RO ,Relaxed ordering" "Low,High"
|
|
textline " "
|
|
hexmask.long.byte 0x134 24.--28. 1. " TAG ,Transaction Tag"
|
|
hexmask.long.byte 0x134 16.--23. 1. " REQ_BUS ,Requester bus number"
|
|
textline " "
|
|
hexmask.long.byte 0x134 11.--15. 1. " REQ_DEV ,Requester device number"
|
|
hexmask.long.byte 0x134 8.--10. 1. " REQ_FUNC ,Requester function number"
|
|
textline " "
|
|
hexmask.long.byte 0x134 0.--7. 1. " BYTE_CNT ,Transaction size"
|
|
line.long 0x180 "IRP_CFG_CTL,Interrupt Control Register"
|
|
bitfld.long 0x180 14.--15. " INTD_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
bitfld.long 0x180 12.--13. " INTC_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
textline " "
|
|
bitfld.long 0x180 10.--11. " INTB_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
bitfld.long 0x180 8.--9. " INTA_TYPE ,Source or Destination of Interrupt" "Unused,Other PCI,To MSI,Controller"
|
|
textline " "
|
|
bitfld.long 0x180 4.--5. " LOC_INT_DEST ,Destination of PCI block internal interrupt" "Controller,INTA Out,MSI Out,Other"
|
|
bitfld.long 0x180 3. " INTD_DIR ,Interrupt Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x180 2. " INTC_DIR ,Interrupt Direction" "Input,Output"
|
|
bitfld.long 0x180 1. " INTB_DIR ,Interrupt Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x180 0. " INTA_DIR ,Interrupt Direction" "Input,Output"
|
|
line.long 0x184 "IRP_STAT,Interrupt Status Register"
|
|
bitfld.long 0x184 30. " DR_ND ,Copy of Delayed Read No Data from Target" "Clear,Set"
|
|
bitfld.long 0x184 29. " DW_ND ,Copy of Delayed Write Non Delivery" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 28. " PW_MA ,Copy of Posted Write Master Abort" "Clear,Set"
|
|
bitfld.long 0x184 27. " PW_TA ,Copy of Posted Write Target Abort" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 26. " PW_RETRY ,Copy of Posted Write Max Retry" "Clear,Set"
|
|
bitfld.long 0x184 25. " PW_DPE ,Copy of Posted Write Data Parity Error" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 24. " APE ,Copy of Address Parity Error" "Clear,Set"
|
|
bitfld.long 0x184 23. " P_CSR ,There is an interrupt in the P_CSR Register" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 22. " P_INT ,There is an interrupt in the P_INTAD Register" "Clear,Set"
|
|
bitfld.long 0x184 20. " HS_CSR ,There is an interrupt in the HS_CSR Register" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 19. " X_CAP ,There is an interrupt in the PCI/X _CAP Register" "Clear,Set"
|
|
bitfld.long 0x184 18. " XBGE ,There is an interrupt in the PCI/X _BRIDGE Register" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x184 17. " FAB ,There is an interrupt in the Fabric Int Register" "Clear,Set"
|
|
line.long 0x188 "IRP_ENABLE,Interrupt Enable Register"
|
|
bitfld.long 0x188 31. " D_TOUT ,Enable Delayed Cycle Time Out interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 30. " DR_ND ,Enable Delayed Read No Data from Target interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 29. " DW_ND ,Enable Delayed Write Non Delivery interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 28. " PW_MA ,Enable Posted Write Master Abort interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 27. " PW_TA ,Enable Posted Write Target Abort interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 26. " PW_RETRY ,Enable Max Retry interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 25. " PW_DPE ,Enable Posted Write Data Parity Error interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 24. " APE ,Enable Address Parity Error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 23. " P_CSR ,Enable P_CSR Register interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 22. " P_INT ,Enable P_INTAD Register interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 20. " HS_CSR ,Enable HS_CSR Register interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 19. " X_CAP ,Enable PCI/X _CAP Register interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x188 18. " XBGE ,Enable PCI/X _BRIDGE Reg interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x188 17. " FAB ,Enable Fabric Int Register interrupt" "Disabled,Enabled"
|
|
line.long 0x18c "IRP_INTAD,Interrupt CSR Register"
|
|
bitfld.long 0x18c 19. " INTD_EN ,Enable INTD interrupt to interrupt processor" "Disabled,Enabled"
|
|
bitfld.long 0x18c 18. " INTC_EN ,Enable INTC interrupt to interrupt processor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18c 17. " INTB_EN ,Enable INTB interrupt to interrupt processor" "Disabled,Enabled"
|
|
bitfld.long 0x18c 16. " INTA_EN ,Enable INTA interrupt to interrupt processor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18c 4. " PME ,Power Transitioning interrupt" "Clear,Set"
|
|
bitfld.long 0x18c 3. " INTD ,INTD pending interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x18c 2. " INTC ,INTC pending interrupt" "Clear,Set"
|
|
bitfld.long 0x18c 1. " INTB ,INTB pending interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x18c 0. " INTA ,INTA pending interrupt" "Clear,Set"
|
|
line.long 0x19c "P_VID_OVERRIDE,Override Register"
|
|
hexmask.long.word 0x19c 16.--31. 1. " DID ,Write to this field updates the read-only value at offset 0x00"
|
|
hexmask.long.word 0x19c 0.--15. 1. " VID ,Write to this field updates the read-only value at offset 0x00"
|
|
line.long 0x1a0 "P_CLASS_OVERRIDE,Override Register"
|
|
hexmask.long.byte 0x1a0 24.--31. 1. " BASE[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
hexmask.long.byte 0x1a0 16.--23. 1. " SUB[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
textline " "
|
|
hexmask.long.byte 0x1a0 8.--15. 1. " PROG[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
hexmask.long.byte 0x1a0 0.--7. 1. " RID[7:0] ,Write to this field updates the read-only value at transparent register offset 0x008 and embedded register offset 0x008"
|
|
line.long 0x1a4 "PE_SID_OVERRIDE,Override Register"
|
|
hexmask.long.word 0x1a4 16.--31. 1. " SID[15:0] ,Write to this field updates the read-only value at embedded register offset 0x02C"
|
|
hexmask.long.word 0x1a4 0.--15. 1. " SVID[15:0] ,Write to this field updates the read-only value at embedded register offset 0x02C"
|
|
line.long 0x1a8 "P_SLOT_ID_OVERRIDE,Override Register"
|
|
hexmask.long.byte 0x1a8 24.--31. 1. " CHASSIS ,Write to this field updates the read-only value at register offset 0x0C8"
|
|
bitfld.long 0x1a8 21. " FIC ,Write to this field updates the read-only value at register offset 0x0C8" "Not a parent,Parent"
|
|
textline " "
|
|
hexmask.long.byte 0x1a8 16.--20. 1. " EXP_SLOT ,Write to this field updates the read-only value at register offset 0x0C8"
|
|
tree.end
|
|
tree "SFN Fabric Registers"
|
|
group asd:(0x1000*2.)++0xfff
|
|
line.long 0x200 "PFAB_CSR,Fabric Command/Status Register"
|
|
bitfld.long 0x200 31. " S2P_BAR ,S2P BAR Response" "Clear,Set"
|
|
bitfld.long 0x200 30. " SYNC_OVERRUN ,Sync Overrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x200 29. " BAD_P2S ,Bad P2S packet" "Clear,Set"
|
|
bitfld.long 0x200 28. " TEA ,Indicates that a timeout error occurred on a fabric packet" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x200 26. " RESP TIMOUT ,This bit is set when a request to the SFN has timed out" "No timeout,Timeout"
|
|
bitfld.long 0x200 24. " INVLD_RESP ,This bit indicates an unexpected response from the SFN" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x200 23. " INT_ENABLE_MASK[7] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 22. " INT_ENABLE_MASK[6] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 21. " INT_ENABLE_MASK[5] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 20. " INT_ENABLE_MASK[4] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 19. " INT_ENABLE_MASK[3] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 18. " INT_ENABLE_MASK[2] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 17. " INT_ENABLE_MASK[1] ,Interrupt enable mask" "Disabled,Enabled"
|
|
bitfld.long 0x200 16. " INT_ENABLE_MASK[0] ,Interrupt enable mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 15. " BAR3[31] ,Bit 31 of S2P BAR3 when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 14. " BAR3[30] ,Bit 30 of S2P BAR3 when in non-comp mode" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x200 13. " BAR3_SIZE ,S2P BAR3 Size when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 12. " BAR3_EN ,S2P BAR3 Enable when in non-comp mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 11. " TIME_EN[1] ,Request timer value bit 1" "Low,High"
|
|
bitfld.long 0x200 10. " SFN_RLX_ORDER ,Allows multiple packets from the same transaction to be requested out of order" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x200 9. " NON-COMP_BAR_MODE ,Non compatible BAR mode" "Clear,Set"
|
|
bitfld.long 0x200 8. " SW_RST ,Software Reset" "Disabled,Reset"
|
|
textline " "
|
|
bitfld.long 0x200 7. " BAR4[31] ,Bit 31 of S2P Bar4 when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 6. " BAR4[30] ,Bit 30 of O2P Bar4 when in non-comp mode" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x200 5. " BAR4_SIZE ,O2P Bar4 Size when in non-comp mode" "Low,High"
|
|
bitfld.long 0x200 4. " BAR4_EN ,O2P Bar4 Enable when in non-comp mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 3. " TIME_EN[0] ,Request timer value bit 0" "Low,High"
|
|
bitfld.long 0x200 2. " RGSWAP ,Byte swap PCI register accesses" "Don't swap,Swap"
|
|
textline " "
|
|
bitfld.long 0x200 1. " WSWAP ,32 bit within 64 bit fabric Word swap enable" "Don't swap,Swap"
|
|
bitfld.long 0x200 0. " BSWAP ,Byte within 64 bit fabric word swap enable" "Don't swap,Swap"
|
|
line.long 0x204 "PFAB_BAR0,Fabric Base Address Register 0"
|
|
hexmask.long.byte 0x204 24.--31. 1. " PFAB_BAR0[31:24] ,PCI Configuration Generation Base Address"
|
|
bitfld.long 0x204 0. " BAR0_EN ,PFAB BAR0 enable" "Disabled,Enabled"
|
|
line.long 0x208 "PFAB_BAR0_UPPER,Fabric Base Address Register 0 Upper"
|
|
hexmask.long.long 0x208 0.--31. 1. " PFAB_BAR0[63:32] ,PCI Configuration Generation Upper Base Address"
|
|
line.long 0x20c "PFAB_IO,IO Space Base Address Register"
|
|
hexmask.long.word 0x20c 16.--31. 1. " BAR[31:16] ,I/O Base Address"
|
|
bitfld.long 0x20c 0. " EN ,I/O Window Enable" "Disabled,Enabled"
|
|
line.long 0x210 "PFAB_IO_UPPER,IO Space Base Address Register Upper"
|
|
hexmask.long.long 0x210 0.--31. 1. " BAR[63:32] ,I/O Upper Base Address"
|
|
line.long 0x214 "PFAB_MEM32,MEM32 Space Base Address Register"
|
|
hexmask.long.byte 0x214 29.--31. 1. " BA[31:29] ,Mem32 Base Address"
|
|
bitfld.long 0x214 17. " SIZE ,Mem32 window size" "512 M,1 G"
|
|
textline " "
|
|
bitfld.long 0x214 16. " EN ,Mem32 window enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x214 0.--11. 1. " BA[43:32] ,Mem32 Base Address"
|
|
line.long 0x218 "PFAB_MEM32_REMAP,MEM32 Space Remap Register"
|
|
hexmask.long.tbyte 0x218 12.--31. 1. " Remap[31:12] ,Mem32 Remap Value"
|
|
line.long 0x21c "PFAB_MEM32_MASK,MEM32 Space Mask Register"
|
|
hexmask.long.tbyte 0x21c 12.--31. 1. " Mask[31:12] ,Mem32 Mask Value"
|
|
line.long 0x220 "PFAB_PFM3,Memory Space Base Address Register"
|
|
hexmask.long.byte 0x220 30.--31. 1. " BA[31:30] ,PFM3 Base Address"
|
|
hexmask.long.word 0x220 18.--29. 1. " BA[59:48] ,PFM3 Base Address"
|
|
textline " "
|
|
bitfld.long 0x220 17. " SIZE ,PFM3 window size" "1 G,2 G"
|
|
bitfld.long 0x220 16. " EN ,PFM3 window enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x220 0.--15. 1. " BA[47:32] ,PFM3 Base Address"
|
|
line.long 0x224 "PFAB_PFM3_REMAP_UPPER,Memory Space Upper Remap Register"
|
|
hexmask.long.tbyte 0x224 12.--31. 1. " REMAP[63:44] ,PFM3 Upper Remap"
|
|
line.long 0x228 "PFAB_PFM3_REMAP_LOWER,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x228 12.--31. 1. " REMAP[31:12] ,PFM3 Lower Remap"
|
|
hexmask.long.word 0x228 0.--11. 1. " REMAP[43:32] ,PFM3 Lower Remap"
|
|
line.long 0x22c "PFAB_PFM3_MASK,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x22c 12.--31. 1. " MASK[31:12] ,PFM3 Mask Value"
|
|
hexmask.long.word 0x22c 0.--11. 1. " MASK[43:32] ,PFM3 Mask Value"
|
|
line.long 0x230 "PFAB_PFM4,Memory Space Base Address Register"
|
|
hexmask.long.byte 0x230 30.--31. 1. " BA[31:30] ,PFM4 Base Address"
|
|
hexmask.long.word 0x230 18.--29. 1. " BA[59:48] ,PFM4 Base Address"
|
|
textline " "
|
|
bitfld.long 0x230 17. " SIZE ,PFM4 window size" "1 G,2 G"
|
|
bitfld.long 0x230 16. " EN ,PFM4 window enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x230 0.--15. 1. " BA[47:32] ,PFM4 Base Address"
|
|
line.long 0x234 "PFAB_PFM4_REMAP_UPPER,Memory Space Upper Remap Register"
|
|
hexmask.long.tbyte 0x234 12.--31. 1. " REMAP[63:44] ,PFM4 Upper Remap"
|
|
line.long 0x238 "PFAB_PFM4_REMAP_LOWER,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x238 12.--31. 1. " REMAP[31:12] ,PFM4 Lower Remap"
|
|
hexmask.long.word 0x238 0.--11. 1. " REMAP[43:32] ,PFM4 Lower Remap"
|
|
line.long 0x23c "PFAB_PFM4_MASK,Memory Space Mask Register"
|
|
hexmask.long.tbyte 0x23c 12.--31. 1. " MASK[31:12] ,PFM4 Mask Value"
|
|
hexmask.long.word 0x23c 0.--11. 1. " MASK[43:32] ,PFM4 Mask Value"
|
|
line.long 0x240 "PFAB_SYNC_BAR,Sync Packet Base Address Register"
|
|
hexmask.long.tbyte 0x240 8.--31. 1. " SYNC_BAR[31:8] ,Sync Base Address Register"
|
|
bitfld.long 0x240 0. " EN ,Enable for sync bar" "Disabled,Enabled"
|
|
line.long 0x244 "PFAB_SYNC_BAR_UPPER,Sync Packet Base Address Register Upper"
|
|
hexmask.long.long 0x244 0.--31. 1. " SYNC_BAR[63:32] ,Sync Base Address Register Upper"
|
|
tree.end
|
|
group asd:(0x1000*2.)++0xfff "Expansion ROM Register"
|
|
line.long 0x2fc "EROM_MAP,Expansion ROM Map Register"
|
|
hexmask.long.byte 0x2fc 25.--31. 1. " MAP[6:0] ,Expansion ROM Base Address"
|
|
hexmask.long.byte 0x2fc 0.--3. 1. " DST[3:0] ,Expansion ROM Port Destination"
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Tables"
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 0"
|
|
group asd:(0x1000*2.+0x008*0.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT0,P2S_FAB_BAR_LUT0 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER0,P2S_FAB BAR_LUT_UPPER0 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 1"
|
|
group asd:(0x1000*2.+0x008*1.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT1,P2S_FAB_BAR_LUT1 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER1,P2S_FAB BAR_LUT_UPPER1 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 2"
|
|
group asd:(0x1000*2.+0x008*2.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT2,P2S_FAB_BAR_LUT2 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER2,P2S_FAB BAR_LUT_UPPER2 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 3"
|
|
group asd:(0x1000*2.+0x008*3.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT3,P2S_FAB_BAR_LUT3 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER3,P2S_FAB BAR_LUT_UPPER3 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 4"
|
|
group asd:(0x1000*2.+0x008*4.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT4,P2S_FAB_BAR_LUT4 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER4,P2S_FAB BAR_LUT_UPPER4 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 5"
|
|
group asd:(0x1000*2.+0x008*5.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT5,P2S_FAB_BAR_LUT5 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER5,P2S_FAB BAR_LUT_UPPER5 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 6"
|
|
group asd:(0x1000*2.+0x008*6.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT6,P2S_FAB_BAR_LUT6 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER6,P2S_FAB BAR_LUT_UPPER6 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 7"
|
|
group asd:(0x1000*2.+0x008*7.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT7,P2S_FAB_BAR_LUT7 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER7,P2S_FAB BAR_LUT_UPPER7 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 8"
|
|
group asd:(0x1000*2.+0x008*8.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT8,P2S_FAB_BAR_LUT8 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER8,P2S_FAB BAR_LUT_UPPER8 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 9"
|
|
group asd:(0x1000*2.+0x008*9.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT9,P2S_FAB_BAR_LUT9 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER9,P2S_FAB BAR_LUT_UPPER9 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 10"
|
|
group asd:(0x1000*2.+0x008*10.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT10,P2S_FAB_BAR_LUT10 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER10,P2S_FAB BAR_LUT_UPPER10 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 11"
|
|
group asd:(0x1000*2.+0x008*11.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT11,P2S_FAB_BAR_LUT11 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER11,P2S_FAB BAR_LUT_UPPER11 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 12"
|
|
group asd:(0x1000*2.+0x008*12.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT12,P2S_FAB_BAR_LUT12 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER12,P2S_FAB BAR_LUT_UPPER12 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 13"
|
|
group asd:(0x1000*2.+0x008*13.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT13,P2S_FAB_BAR_LUT13 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER13,P2S_FAB BAR_LUT_UPPER13 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 14"
|
|
group asd:(0x1000*2.+0x008*14.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT14,P2S_FAB_BAR_LUT14 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER14,P2S_FAB BAR_LUT_UPPER14 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 15"
|
|
group asd:(0x1000*2.+0x008*15.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT15,P2S_FAB_BAR_LUT15 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER15,P2S_FAB BAR_LUT_UPPER15 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 16"
|
|
group asd:(0x1000*2.+0x008*16.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT16,P2S_FAB_BAR_LUT16 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER16,P2S_FAB BAR_LUT_UPPER16 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 17"
|
|
group asd:(0x1000*2.+0x008*17.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT17,P2S_FAB_BAR_LUT17 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER17,P2S_FAB BAR_LUT_UPPER17 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 18"
|
|
group asd:(0x1000*2.+0x008*18.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT18,P2S_FAB_BAR_LUT18 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER18,P2S_FAB BAR_LUT_UPPER18 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 19"
|
|
group asd:(0x1000*2.+0x008*19.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT19,P2S_FAB_BAR_LUT19 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER19,P2S_FAB BAR_LUT_UPPER19 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 20"
|
|
group asd:(0x1000*2.+0x008*20.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT20,P2S_FAB_BAR_LUT20 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER20,P2S_FAB BAR_LUT_UPPER20 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 21"
|
|
group asd:(0x1000*2.+0x008*21.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT21,P2S_FAB_BAR_LUT21 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER21,P2S_FAB BAR_LUT_UPPER21 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 22"
|
|
group asd:(0x1000*2.+0x008*22.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT22,P2S_FAB_BAR_LUT22 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER22,P2S_FAB BAR_LUT_UPPER22 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 23"
|
|
group asd:(0x1000*2.+0x008*23.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT23,P2S_FAB_BAR_LUT23 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER23,P2S_FAB BAR_LUT_UPPER23 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 24"
|
|
group asd:(0x1000*2.+0x008*24.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT24,P2S_FAB_BAR_LUT24 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER24,P2S_FAB BAR_LUT_UPPER24 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 25"
|
|
group asd:(0x1000*2.+0x008*25.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT25,P2S_FAB_BAR_LUT25 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER25,P2S_FAB BAR_LUT_UPPER25 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 26"
|
|
group asd:(0x1000*2.+0x008*26.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT26,P2S_FAB_BAR_LUT26 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER26,P2S_FAB BAR_LUT_UPPER26 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 27"
|
|
group asd:(0x1000*2.+0x008*27.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT27,P2S_FAB_BAR_LUT27 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER27,P2S_FAB BAR_LUT_UPPER27 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 28"
|
|
group asd:(0x1000*2.+0x008*28.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT28,P2S_FAB_BAR_LUT28 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER28,P2S_FAB BAR_LUT_UPPER28 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 29"
|
|
group asd:(0x1000*2.+0x008*29.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT29,P2S_FAB_BAR_LUT29 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER29,P2S_FAB BAR_LUT_UPPER29 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 30"
|
|
group asd:(0x1000*2.+0x008*30.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT30,P2S_FAB_BAR_LUT30 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER30,P2S_FAB BAR_LUT_UPPER30 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree "PCI Transparent Mode Fabric Bar Look-up Table 31"
|
|
group asd:(0x1000*2.+0x008*31.)++0xfff
|
|
line.long 0x300 "P2S_FAB_BAR_LUT31,P2S_FAB_BAR_LUT31 Register"
|
|
hexmask.long.long 0x300 5.--31. 1. " FAB_BAR_PAGE_ADDR[31:5] ,PCI Fabric BAR Translation Page Address"
|
|
hexmask.long.byte 0x300 0.--3. 1. " FAB_BAR_DESTID[3:0] ,PCI Fabric BAR Destination ID"
|
|
line.long 0x304 "P2S_FAB BAR_LUT_UPPER31,P2S_FAB BAR_LUT_UPPER31 Register"
|
|
hexmask.long.long 0x304 0.--31. 1. " FAB_BAR_PAGE_ADDR[63:32] ,PCI Fabric Bar Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Tables"
|
|
tree "PCI BAR2 Look-up Table 0"
|
|
group asd:(0x1000*2.+0x008*0.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT0,P2S_BAR2_LUT0 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER0,P2S_BAR2_LUT_UPPER0 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 1"
|
|
group asd:(0x1000*2.+0x008*1.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT1,P2S_BAR2_LUT1 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER1,P2S_BAR2_LUT_UPPER1 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 2"
|
|
group asd:(0x1000*2.+0x008*2.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT2,P2S_BAR2_LUT2 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER2,P2S_BAR2_LUT_UPPER2 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 3"
|
|
group asd:(0x1000*2.+0x008*3.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT3,P2S_BAR2_LUT3 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER3,P2S_BAR2_LUT_UPPER3 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 4"
|
|
group asd:(0x1000*2.+0x008*4.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT4,P2S_BAR2_LUT4 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER4,P2S_BAR2_LUT_UPPER4 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 5"
|
|
group asd:(0x1000*2.+0x008*5.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT5,P2S_BAR2_LUT5 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER5,P2S_BAR2_LUT_UPPER5 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 6"
|
|
group asd:(0x1000*2.+0x008*6.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT6,P2S_BAR2_LUT6 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER6,P2S_BAR2_LUT_UPPER6 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 7"
|
|
group asd:(0x1000*2.+0x008*7.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT7,P2S_BAR2_LUT7 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER7,P2S_BAR2_LUT_UPPER7 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 8"
|
|
group asd:(0x1000*2.+0x008*8.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT8,P2S_BAR2_LUT8 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER8,P2S_BAR2_LUT_UPPER8 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 9"
|
|
group asd:(0x1000*2.+0x008*9.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT9,P2S_BAR2_LUT9 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER9,P2S_BAR2_LUT_UPPER9 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 10"
|
|
group asd:(0x1000*2.+0x008*10.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT10,P2S_BAR2_LUT10 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER10,P2S_BAR2_LUT_UPPER10 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 11"
|
|
group asd:(0x1000*2.+0x008*11.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT11,P2S_BAR2_LUT11 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER11,P2S_BAR2_LUT_UPPER11 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 12"
|
|
group asd:(0x1000*2.+0x008*12.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT12,P2S_BAR2_LUT12 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER12,P2S_BAR2_LUT_UPPER12 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 13"
|
|
group asd:(0x1000*2.+0x008*13.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT13,P2S_BAR2_LUT13 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER13,P2S_BAR2_LUT_UPPER13 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 14"
|
|
group asd:(0x1000*2.+0x008*14.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT14,P2S_BAR2_LUT14 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER14,P2S_BAR2_LUT_UPPER14 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 15"
|
|
group asd:(0x1000*2.+0x008*15.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT15,P2S_BAR2_LUT15 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER15,P2S_BAR2_LUT_UPPER15 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 16"
|
|
group asd:(0x1000*2.+0x008*16.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT16,P2S_BAR2_LUT16 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER16,P2S_BAR2_LUT_UPPER16 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 17"
|
|
group asd:(0x1000*2.+0x008*17.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT17,P2S_BAR2_LUT17 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER17,P2S_BAR2_LUT_UPPER17 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 18"
|
|
group asd:(0x1000*2.+0x008*18.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT18,P2S_BAR2_LUT18 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER18,P2S_BAR2_LUT_UPPER18 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 19"
|
|
group asd:(0x1000*2.+0x008*19.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT19,P2S_BAR2_LUT19 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER19,P2S_BAR2_LUT_UPPER19 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 20"
|
|
group asd:(0x1000*2.+0x008*20.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT20,P2S_BAR2_LUT20 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER20,P2S_BAR2_LUT_UPPER20 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 21"
|
|
group asd:(0x1000*2.+0x008*21.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT21,P2S_BAR2_LUT21 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER21,P2S_BAR2_LUT_UPPER21 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 22"
|
|
group asd:(0x1000*2.+0x008*22.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT22,P2S_BAR2_LUT22 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER22,P2S_BAR2_LUT_UPPER22 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 23"
|
|
group asd:(0x1000*2.+0x008*23.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT23,P2S_BAR2_LUT23 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER23,P2S_BAR2_LUT_UPPER23 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 24"
|
|
group asd:(0x1000*2.+0x008*24.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT24,P2S_BAR2_LUT24 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER24,P2S_BAR2_LUT_UPPER24 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 25"
|
|
group asd:(0x1000*2.+0x008*25.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT25,P2S_BAR2_LUT25 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER25,P2S_BAR2_LUT_UPPER25 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 26"
|
|
group asd:(0x1000*2.+0x008*26.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT26,P2S_BAR2_LUT26 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER26,P2S_BAR2_LUT_UPPER26 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 27"
|
|
group asd:(0x1000*2.+0x008*27.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT27,P2S_BAR2_LUT27 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER27,P2S_BAR2_LUT_UPPER27 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 28"
|
|
group asd:(0x1000*2.+0x008*28.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT28,P2S_BAR2_LUT28 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER28,P2S_BAR2_LUT_UPPER28 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 29"
|
|
group asd:(0x1000*2.+0x008*29.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT29,P2S_BAR2_LUT29 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER29,P2S_BAR2_LUT_UPPER29 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 30"
|
|
group asd:(0x1000*2.+0x008*30.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT30,P2S_BAR2_LUT30 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER30,P2S_BAR2_LUT_UPPER30 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR2 Look-up Table 31"
|
|
group asd:(0x1000*2.+0x008*31.)++0xfff
|
|
line.long 0x500 "P2S_BAR2_LUT31,P2S_BAR2_LUT31 Register"
|
|
hexmask.long.tbyte 0x500 10.--31. 1. " BAR2_PAGE_ADDR[31:10] ,PCI Bar2 Translation Page Address"
|
|
hexmask.long.byte 0x500 0.--3. 1. " BAR2_DESTID ,PCI Bar2 Destination ID"
|
|
line.long 0x504 "P2S_BAR2_LUT_UPPER31,P2S_BAR2_LUT_UPPER31 Register"
|
|
hexmask.long.long 0x504 0.--31. 1. " BAR2_PAGE_ADDR[63:32] ,PCI Bar2 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Tables"
|
|
tree "PCI BAR3 Look-up Table 0"
|
|
group asd:(0x1000*2.+0x008*0.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT0,P2S_BAR3_LUT0 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER0,P2S_BAR3_LUT_UPPER0 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 1"
|
|
group asd:(0x1000*2.+0x008*1.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT1,P2S_BAR3_LUT1 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER1,P2S_BAR3_LUT_UPPER1 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 2"
|
|
group asd:(0x1000*2.+0x008*2.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT2,P2S_BAR3_LUT2 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER2,P2S_BAR3_LUT_UPPER2 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 3"
|
|
group asd:(0x1000*2.+0x008*3.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT3,P2S_BAR3_LUT3 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER3,P2S_BAR3_LUT_UPPER3 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 4"
|
|
group asd:(0x1000*2.+0x008*4.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT4,P2S_BAR3_LUT4 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER4,P2S_BAR3_LUT_UPPER4 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 5"
|
|
group asd:(0x1000*2.+0x008*5.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT5,P2S_BAR3_LUT5 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER5,P2S_BAR3_LUT_UPPER5 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 6"
|
|
group asd:(0x1000*2.+0x008*6.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT6,P2S_BAR3_LUT6 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER6,P2S_BAR3_LUT_UPPER6 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 7"
|
|
group asd:(0x1000*2.+0x008*7.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT7,P2S_BAR3_LUT7 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER7,P2S_BAR3_LUT_UPPER7 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 8"
|
|
group asd:(0x1000*2.+0x008*8.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT8,P2S_BAR3_LUT8 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER8,P2S_BAR3_LUT_UPPER8 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 9"
|
|
group asd:(0x1000*2.+0x008*9.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT9,P2S_BAR3_LUT9 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER9,P2S_BAR3_LUT_UPPER9 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 10"
|
|
group asd:(0x1000*2.+0x008*10.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT10,P2S_BAR3_LUT10 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER10,P2S_BAR3_LUT_UPPER10 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 11"
|
|
group asd:(0x1000*2.+0x008*11.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT11,P2S_BAR3_LUT11 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER11,P2S_BAR3_LUT_UPPER11 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 12"
|
|
group asd:(0x1000*2.+0x008*12.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT12,P2S_BAR3_LUT12 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER12,P2S_BAR3_LUT_UPPER12 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 13"
|
|
group asd:(0x1000*2.+0x008*13.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT13,P2S_BAR3_LUT13 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER13,P2S_BAR3_LUT_UPPER13 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 14"
|
|
group asd:(0x1000*2.+0x008*14.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT14,P2S_BAR3_LUT14 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER14,P2S_BAR3_LUT_UPPER14 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 15"
|
|
group asd:(0x1000*2.+0x008*15.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT15,P2S_BAR3_LUT15 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER15,P2S_BAR3_LUT_UPPER15 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 16"
|
|
group asd:(0x1000*2.+0x008*16.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT16,P2S_BAR3_LUT16 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER16,P2S_BAR3_LUT_UPPER16 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 17"
|
|
group asd:(0x1000*2.+0x008*17.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT17,P2S_BAR3_LUT17 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER17,P2S_BAR3_LUT_UPPER17 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 18"
|
|
group asd:(0x1000*2.+0x008*18.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT18,P2S_BAR3_LUT18 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER18,P2S_BAR3_LUT_UPPER18 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 19"
|
|
group asd:(0x1000*2.+0x008*19.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT19,P2S_BAR3_LUT19 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER19,P2S_BAR3_LUT_UPPER19 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 20"
|
|
group asd:(0x1000*2.+0x008*20.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT20,P2S_BAR3_LUT20 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER20,P2S_BAR3_LUT_UPPER20 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 21"
|
|
group asd:(0x1000*2.+0x008*21.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT21,P2S_BAR3_LUT21 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER21,P2S_BAR3_LUT_UPPER21 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 22"
|
|
group asd:(0x1000*2.+0x008*22.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT22,P2S_BAR3_LUT22 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER22,P2S_BAR3_LUT_UPPER22 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 23"
|
|
group asd:(0x1000*2.+0x008*23.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT23,P2S_BAR3_LUT23 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER23,P2S_BAR3_LUT_UPPER23 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 24"
|
|
group asd:(0x1000*2.+0x008*24.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT24,P2S_BAR3_LUT24 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER24,P2S_BAR3_LUT_UPPER24 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 25"
|
|
group asd:(0x1000*2.+0x008*25.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT25,P2S_BAR3_LUT25 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER25,P2S_BAR3_LUT_UPPER25 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 26"
|
|
group asd:(0x1000*2.+0x008*26.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT26,P2S_BAR3_LUT26 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER26,P2S_BAR3_LUT_UPPER26 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 27"
|
|
group asd:(0x1000*2.+0x008*27.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT27,P2S_BAR3_LUT27 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER27,P2S_BAR3_LUT_UPPER27 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 28"
|
|
group asd:(0x1000*2.+0x008*28.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT28,P2S_BAR3_LUT28 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER28,P2S_BAR3_LUT_UPPER28 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 29"
|
|
group asd:(0x1000*2.+0x008*29.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT29,P2S_BAR3_LUT29 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER29,P2S_BAR3_LUT_UPPER29 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 30"
|
|
group asd:(0x1000*2.+0x008*30.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT30,P2S_BAR3_LUT30 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER30,P2S_BAR3_LUT_UPPER30 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "PCI BAR3 Look-up Table 31"
|
|
group asd:(0x1000*2.+0x008*31.)++0xfff
|
|
line.long 0x600 "P2S_BAR3_LUT31,P2S_BAR3_LUT31 Register"
|
|
hexmask.long.tbyte 0x600 10.--31. 1. " BAR3_PAGE_ADDR[31:10] ,PCI Bar3 Translation Page Address"
|
|
hexmask.long.byte 0x600 0.--3. 1. " BAR3_DESTID ,PCI Bar3 Destination ID"
|
|
line.long 0x604 "P2S_BAR3_LUT_UPPER31,P2S_BAR3_LUT_UPPER31 Register"
|
|
hexmask.long.long 0x604 0.--31. 1. " BAR3_PAGE_ADDR[63:32] ,PCI Bar3 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "Core Interface Unit (CIU)"
|
|
group asd:0x3000--0x3fff
|
|
line.long 0x000 "CIU_TIMER0,Arbiter timer register for Processor 0"
|
|
hexmask.long.long 0x000 0.--31. 1. " TIME_SLICE ,The number of clock cycles to wait before taking the processor bus from Processor0 and giving it to Processor 1 when the arbiter is enabled"
|
|
line.long 0x004 "CIU_TIMER0_SHADOW,Arbiter shadow timer register for Processor 0"
|
|
hexmask.long.long 0x004 0.--31. 1. " TIME_SLICE_CNT ,This number is originally copied from register CIU_TIMER0 and is decremented every domain 1 clock cycle"
|
|
line.long 0x008 "CIU_TIMER1,Arbiter timer register for Processor 1"
|
|
hexmask.long.long 0x008 0.--31. 1. " TIME_SLICE ,The number of domain 1 clock cycles to wait before taking the processor bus from Processor 1 and giving it to Processor 0"
|
|
line.long 0x00c "CIU_TIMER1_SHADOW,Arbiter shadow timer register for Processor 1"
|
|
hexmask.long.long 0x00c 0.--31. 1. " TIME_SLICE_CNT ,This number is originally copied from register CIU_TIMER1 and is decremented every domain 1 clock cycle"
|
|
line.long 0x010 "CIU_SRAM_BAR SRAM,Base Address Register"
|
|
hexmask.long.word 0x010 20.--31. 1. " BASE_ADDRESS ,Base address for SRAM compare"
|
|
bitfld.long 0x010 0. " EN ,CIU_SRAM_BAR Enable" "Disabled,Enabled"
|
|
line.long 0x014 "CIU_CFG_BAR,Internal Configuration Registers Base Address Register"
|
|
hexmask.long.word 0x014 16.--31. 1. " BASE_ADDRESS ,Base address for Internal Configuration Register Space compare"
|
|
bitfld.long 0x014 0. " EN ,CIU_CFG_BAR Enable" "Disabled,Enabled"
|
|
line.long 0x018 "CIU_SF_BAR1,SFN Switch Fabric Base Address Register #1"
|
|
hexmask.long.word 0x018 16.--31. 1. " BASE_ADDRESS ,Base address for Switch Fabric compare"
|
|
line.long 0x01c "CIU_SF_BAR2,SFN Switch Fabric Base Address Register #2"
|
|
hexmask.long.word 0x01c 16.--31. 1. " BASE_ADDRESS ,Base address for Switch Fabric compare"
|
|
line.long 0x020 "CIU_SF_BAR3,SFN Switch Fabric Base Address Register #3"
|
|
hexmask.long.word 0x020 16.--31. 1. " BASE_ADDRESS ,Base address for Switch Fabric compare"
|
|
line.long 0x024 "CIU_SF_BAR4,SFN Switch Fabric Base Address Register #4"
|
|
hexmask.long.word 0x024 16.--31. 1. " BASE_ADDRESS ,Base address for Switch Fabric compare"
|
|
line.long 0x028 "CIU_SF_SIZES,SFN Switch Fabric Base Address Registers Control Register"
|
|
hexmask.long.byte 0x028 27.--31. 1. " SF_BAR1 ,CIU_SF_BAR1 size"
|
|
bitfld.long 0x028 25. " PASS1 ,The Index Field of the address type" "LUT index,SFN port"
|
|
textline " "
|
|
bitfld.long 0x028 24. " EN1 ,CIU_SF_BAR1 Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x028 19.--23. 1. " SF_BAR2 ,CIU_SF_BAR2 size"
|
|
textline " "
|
|
bitfld.long 0x028 17. " PASS2 ,The Index Field of the address type" "LUT index,SFN port"
|
|
bitfld.long 0x028 16. " EN2 ,CIU_SF_BAR2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x028 11.--15. 1. " SF_BAR3 ,CIU_SF_BAR3 size"
|
|
bitfld.long 0x028 9. " PASS3 ,The Index Field of the address type" "LUT index,SFN port"
|
|
textline " "
|
|
bitfld.long 0x028 8. " EN3 ,CIU_SF_BAR3 Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x028 3.--7. 1. " SF_BAR4 ,CIU_SF_BAR4 size"
|
|
textline " "
|
|
bitfld.long 0x028 1. " PASS4 ,The Index Field of the address type" "LUT index,SFN port"
|
|
bitfld.long 0x028 0. " EN4 ,CIU_SF_BAR1 Enable" "Disabled,Enabled"
|
|
line.long 0x02c "CIU_SFN_ERR_STATUS,Status register for SFN gasket errors"
|
|
hexmask.long 0x02c 0.--31. 1. " SF_ERR_STATUS ,First SFN Packet Error Status Until CIU_ERROR register has been cleared"
|
|
line.long 0x030 "CIU_SRAM_STATUS,Status register for the embedded SRAM"
|
|
hexmask.long.byte 0x030 24.--31. 1. " PARITY_BYTE ,Parity byte from SRAM"
|
|
hexmask.long.tbyte 0x030 4.--24. 1. " ADDRESS[19:0] ,SRAM address [19:0] at memory port"
|
|
textline " "
|
|
bitfld.long 0x030 2.--3. " CMD ,SRAM Request Command" "No request,Write request,Read request,Reserved"
|
|
bitfld.long 0x030 0.--1. " DCNT ,SRAM Request Data Count" "1,2,3,4"
|
|
line.long 0x034 "CIU_RQ_STATUS,Status register for the request queues"
|
|
bitfld.long 0x034 24. " TS1 ,Within Request Queue 1 Time Slice" "Low,High"
|
|
bitfld.long 0x034 23. " Q1_W3 ,Request 3 in Q1" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x034 22. " Q1_W2 ,Request 2 in Q1" "Read,Write"
|
|
bitfld.long 0x034 21. " Q1_W1 ,Request 1 in Q1" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x034 20. " Q1_W0 ,Request 0 in Q1" "Read,Write"
|
|
bitfld.long 0x034 16.--19. " REQ1_CUR_STATE ,Current State of Request Queue 1" "EMPTY,HALF_1,FULL_1,HALF_2,FULL_2,HALF_3,FULL_3,HALF_4,FULL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
textline " "
|
|
bitfld.long 0x034 8. " TS0 ,Within Request Queue 0 Time Slice" "Low,High"
|
|
bitfld.long 0x034 7. " Q0_W3 ,Request 3 in Q0" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x034 6. " Q0_W2 ,Request 2 in Q0" "Read,Write"
|
|
bitfld.long 0x034 5. " Q0_W1 ,Request 1 in Q0" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x034 4. " Q0_W0 ,Request 0 in Q0" "Read,Write"
|
|
bitfld.long 0x034 0.--3. " REQ0_CUR_STATE ,Current State of Request Queue 1" "EMPTY,HALF_1,FULL_1,HALF_2,FULL_2,HALF_3,FULL_3,HALF_4,FULL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
line.long 0x038 "CIU_CFG,CIU configuration register"
|
|
bitfld.long 0x038 8. " PID ,Processor ID" "Processor 0,Processor 1"
|
|
bitfld.long 0x038 6. " GEN_ECC_DIS ,ECC Generation for Read Data Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x038 5. " SW_RST ,During chip reset, this bit is set to the value of the powerup pin, POWERUP_RESET" "No reset,Reset"
|
|
bitfld.long 0x038 4. " PTST_EN ,Parity Test Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x038 3. " WD_EN ,Watch Dog Timer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x038 2. " PAR_EN ,SRAM Parity Check Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x038 1. " ECC_EN ,ECC Enable" "Disabled,Enabled"
|
|
bitfld.long 0x038 0. " ARB_EN ,Arbiter Enable" "Disabled,Enabled"
|
|
line.long 0x03c "CIU_ECC_STATUS,ECC status register"
|
|
hexmask.long.byte 0x03c 24.--31. 1. " CORRECTED_DCB ,The corrected data check byte"
|
|
hexmask.long.byte 0x03c 16.--23. 1. " ORIGINAL_DCB ,The original data check byte"
|
|
textline " "
|
|
hexmask.long.byte 0x03c 8.--15. 1. " ECC_SYNDROME ,The ECC Syndrome"
|
|
bitfld.long 0x03c 1. " CERR ,Correctable Single bit ECC Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x03c 0. " UERR ,Uncorrectable Multiple bit ECC Error" "No error,Error"
|
|
line.long 0x040 "CIU_ECC_ERROR_AD,Address of first ECC error"
|
|
hexmask.long.long 0x040 0.--31. 1. " ADDRESS ,Address of the first Write Request that produced an error"
|
|
line.long 0x044 "CIU_XARB_ERROR,Arbiter status register"
|
|
bitfld.long 0x044 5. " TS1 ,Time slice for Processor 1" "Accept,Ignore"
|
|
bitfld.long 0x044 4. " TS0 ,Time slice for Processor 0" "Accept,Ignore"
|
|
textline " "
|
|
bitfld.long 0x044 3. " P1AH2L ,Processor 1 Hold Acknowledge did not deassert within two processor bus clock cycles" "Clear,Set"
|
|
bitfld.long 0x044 2. " P1AL2H ,Processor 1 Hold Acknowledge did not assert within six processor bus clock cycles" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x044 1. " P0AH2L ,Processor 0 Hold Acknowledge did not deassert within two processor bus clock cycles" "Clear,Set"
|
|
bitfld.long 0x044 0. " P0AL2H ,Processor 0 Hold Acknowledge did not assert within six processor bus clock cycles" "Clear,Set"
|
|
line.long 0x048 "CIU_ERROR,CIU error register (Interrupts are based on this register)"
|
|
bitfld.long 0x048 10. " MECC ,Multiple ECC errors occurred, but only the first is fully logged" "No Error,Error"
|
|
bitfld.long 0x048 9. " SFN_INT ,SFN Gasket Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x048 8. " CECC ,Correctable ECC ERROR" "No error,Error"
|
|
bitfld.long 0x048 7. " UECC ,Uncorrectable ECC Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x048 6. " XARB ,XScale Arbiter Error" "No error,Error"
|
|
bitfld.long 0x048 5. " PARITY ,SRAM Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x048 4. " RQ1 ,Request Queue 1 had an invalid transaction length and was aborted" "Not aborted,Aborted"
|
|
bitfld.long 0x048 3. " RQ0 ,Request Queue 0 had an invalid transaction length and was aborted" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x048 2. " RSP ,SFN Response returned with an error and was aborted" "Not aborted,Aborted"
|
|
bitfld.long 0x048 1. " WD ,Watch Dog Time Out Abort Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x048 0. " ABORT ,Transaction Aborted" "Not aborted,Aborted"
|
|
line.long 0x04c "CIU_WDTIMER,Watch Dog Timer register"
|
|
hexmask.long.long 0x04c 0.--31. 1. " WD_TIME ,Maximum amount of time (CIU bus clocks) to allow a request at the top of the request queue"
|
|
line.long 0x050 "CIU_WDTIMER_SHADOW0,Watch Dog Timer shadow register for Request Queue 0"
|
|
hexmask.long.long 0x050 0.--31. 1. " WD_COUNT ,Count to be compared against the contents of CIU_WDTIMER"
|
|
line.long 0x054 "CIU_WDTIMER_SHADOW1,Watch Dog Timer shadow register for Request Queue 1"
|
|
hexmask.long.long 0x054 0.--31. 1. " WD_COUNT ,Count to be compared against the contents of CIU_WDTIMER"
|
|
line.long 0x058 "CIU_WD_ADDRESS,Address of Watch Dog Timer error"
|
|
hexmask.long.long 0x058 0.--31. 1. " ADDRESS ,Watch dog timer error address"
|
|
line.long 0x05c "CIU_LEN_ERROR_AD0,Address of request with bad length field for Request Queue 0"
|
|
hexmask.long.long 0x05c 0.--31. 1. " ADDRESS ,Address of the request that contained an invalid length"
|
|
line.long 0x060 "CIU_LEN_ERROR_AD1,Address of request with bad length field for Request Queue 1"
|
|
hexmask.long.long 0x060 0.--31. 1. " ADDRESS ,Address of the request that contained an invalid length"
|
|
line.long 0x064 "CIU_ABORT_AD,Address of aborted transaction"
|
|
hexmask.long.long 0x064 0.--31. 1. " ADDRESS ,Address of the aborted transaction"
|
|
line.long 0x068 "CIU_SRAM_BYTE,Parity test byte for embedded SRAM"
|
|
hexmask.long.byte 0x068 0.--7. 1. " PARITY_BYTE ,Parity Byte to be written into the parity rams to force an SRAM parity error"
|
|
line.long 0x200 "CIU_FAB_CSR,SFN gasket Control Status Register"
|
|
bitfld.long 0x200 28. " TEA ,Timeout Error Acknowledge" "No Error,Error"
|
|
bitfld.long 0x200 19. " TEA_EN ,Timeout Error Acknowledge Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 8. " SW_RST ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x200 2. " RGSWAP ,Register Byte and Word Swap Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 1. " WSWAP ,Word Swap Enable" "Disabled,Enabled"
|
|
bitfld.long 0x200 0. " BSWAP ,Byte Swap Enable" "Disabled,Enabled"
|
|
line.long 0x204 "CIU_FAB_SYNC_BAR,SFN gasket Sync generation Base Address Register"
|
|
hexmask.long.tbyte 0x204 8.--31. 1. " SYNC_BAR ,Sync Base Address Register"
|
|
bitfld.long 0x204 0. " EN ,Enable for sync bar" "Disabled,Enabled"
|
|
tree "CIU_SF_BAR1 Look-Up Tables"
|
|
tree "CIU_SF_BAR1 Look-Up Table 0"
|
|
group asd:(0x3200+0x0100*1.+0x0008*0.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT0,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER0,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 1"
|
|
group asd:(0x3200+0x0100*1.+0x0008*1.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT1,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER1,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 2"
|
|
group asd:(0x3200+0x0100*1.+0x0008*2.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT2,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER2,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 3"
|
|
group asd:(0x3200+0x0100*1.+0x0008*3.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT3,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER3,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 4"
|
|
group asd:(0x3200+0x0100*1.+0x0008*4.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT4,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER4,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 5"
|
|
group asd:(0x3200+0x0100*1.+0x0008*5.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT5,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER5,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 6"
|
|
group asd:(0x3200+0x0100*1.+0x0008*6.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT6,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER6,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 7"
|
|
group asd:(0x3200+0x0100*1.+0x0008*7.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT7,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER7,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 8"
|
|
group asd:(0x3200+0x0100*1.+0x0008*8.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT8,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER8,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 9"
|
|
group asd:(0x3200+0x0100*1.+0x0008*9.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT9,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER9,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 10"
|
|
group asd:(0x3200+0x0100*1.+0x0008*10.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT10,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER10,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 11"
|
|
group asd:(0x3200+0x0100*1.+0x0008*11.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT11,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER11,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 12"
|
|
group asd:(0x3200+0x0100*1.+0x0008*12.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT12,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER12,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 13"
|
|
group asd:(0x3200+0x0100*1.+0x0008*13.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT13,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER13,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 14"
|
|
group asd:(0x3200+0x0100*1.+0x0008*14.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT14,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER14,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 15"
|
|
group asd:(0x3200+0x0100*1.+0x0008*15.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT15,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER15,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 16"
|
|
group asd:(0x3200+0x0100*1.+0x0008*16.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT16,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER16,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 17"
|
|
group asd:(0x3200+0x0100*1.+0x0008*17.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT17,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER17,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 18"
|
|
group asd:(0x3200+0x0100*1.+0x0008*18.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT18,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER18,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 19"
|
|
group asd:(0x3200+0x0100*1.+0x0008*19.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT19,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER19,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 20"
|
|
group asd:(0x3200+0x0100*1.+0x0008*20.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT20,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER20,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 21"
|
|
group asd:(0x3200+0x0100*1.+0x0008*21.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT21,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER21,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 22"
|
|
group asd:(0x3200+0x0100*1.+0x0008*22.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT22,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER22,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 23"
|
|
group asd:(0x3200+0x0100*1.+0x0008*23.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT23,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER23,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 24"
|
|
group asd:(0x3200+0x0100*1.+0x0008*24.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT24,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER24,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 25"
|
|
group asd:(0x3200+0x0100*1.+0x0008*25.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT25,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER25,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 26"
|
|
group asd:(0x3200+0x0100*1.+0x0008*26.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT26,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER26,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 27"
|
|
group asd:(0x3200+0x0100*1.+0x0008*27.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT27,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER27,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 28"
|
|
group asd:(0x3200+0x0100*1.+0x0008*28.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT28,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER28,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 29"
|
|
group asd:(0x3200+0x0100*1.+0x0008*29.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT29,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER29,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 30"
|
|
group asd:(0x3200+0x0100*1.+0x0008*30.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT30,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER30,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR1 Look-Up Table 31"
|
|
group asd:(0x3200+0x0100*1.+0x0008*31.)++8
|
|
line.long 0x000 "CIU_SF_BAR1_LUT31,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR1_PAGE_ADDR[31:11] ,Switch Fabric BAR1 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR1_DESTID[3:0] ,Switch Fabric BAR1 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR1_LUT_UPPER31,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR1"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR1_PAGE_ADDR ,Switch Fabric Bar1 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Tables"
|
|
tree "CIU_SF_BAR2 Look-Up Table 0"
|
|
group asd:(0x3200+0x0100*2.+0x0008*0.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT0,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER0,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 1"
|
|
group asd:(0x3200+0x0100*2.+0x0008*1.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT1,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER1,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 2"
|
|
group asd:(0x3200+0x0100*2.+0x0008*2.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT2,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER2,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 3"
|
|
group asd:(0x3200+0x0100*2.+0x0008*3.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT3,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER3,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 4"
|
|
group asd:(0x3200+0x0100*2.+0x0008*4.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT4,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER4,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 5"
|
|
group asd:(0x3200+0x0100*2.+0x0008*5.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT5,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER5,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 6"
|
|
group asd:(0x3200+0x0100*2.+0x0008*6.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT6,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER6,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 7"
|
|
group asd:(0x3200+0x0100*2.+0x0008*7.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT7,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER7,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 8"
|
|
group asd:(0x3200+0x0100*2.+0x0008*8.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT8,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER8,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 9"
|
|
group asd:(0x3200+0x0100*2.+0x0008*9.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT9,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER9,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 10"
|
|
group asd:(0x3200+0x0100*2.+0x0008*10.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT10,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER10,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 11"
|
|
group asd:(0x3200+0x0100*2.+0x0008*11.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT11,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER11,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 12"
|
|
group asd:(0x3200+0x0100*2.+0x0008*12.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT12,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER12,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 13"
|
|
group asd:(0x3200+0x0100*2.+0x0008*13.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT13,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER13,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 14"
|
|
group asd:(0x3200+0x0100*2.+0x0008*14.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT14,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER14,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 15"
|
|
group asd:(0x3200+0x0100*2.+0x0008*15.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT15,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER15,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 16"
|
|
group asd:(0x3200+0x0100*2.+0x0008*16.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT16,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER16,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 17"
|
|
group asd:(0x3200+0x0100*2.+0x0008*17.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT17,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER17,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 18"
|
|
group asd:(0x3200+0x0100*2.+0x0008*18.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT18,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER18,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 19"
|
|
group asd:(0x3200+0x0100*2.+0x0008*19.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT19,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER19,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 20"
|
|
group asd:(0x3200+0x0100*2.+0x0008*20.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT20,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER20,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 21"
|
|
group asd:(0x3200+0x0100*2.+0x0008*21.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT21,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER21,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 22"
|
|
group asd:(0x3200+0x0100*2.+0x0008*22.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT22,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER22,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 23"
|
|
group asd:(0x3200+0x0100*2.+0x0008*23.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT23,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER23,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 24"
|
|
group asd:(0x3200+0x0100*2.+0x0008*24.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT24,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER24,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 25"
|
|
group asd:(0x3200+0x0100*2.+0x0008*25.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT25,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER25,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 26"
|
|
group asd:(0x3200+0x0100*2.+0x0008*26.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT26,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER26,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 27"
|
|
group asd:(0x3200+0x0100*2.+0x0008*27.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT27,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER27,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 28"
|
|
group asd:(0x3200+0x0100*2.+0x0008*28.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT28,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER28,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 29"
|
|
group asd:(0x3200+0x0100*2.+0x0008*29.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT29,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER29,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 30"
|
|
group asd:(0x3200+0x0100*2.+0x0008*30.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT30,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER30,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR2 Look-Up Table 31"
|
|
group asd:(0x3200+0x0100*2.+0x0008*31.)++8
|
|
line.long 0x000 "CIU_SF_BAR2_LUT31,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR2_PAGE_ADDR[31:11] ,Switch Fabric BAR2 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR2_DESTID[3:0] ,Switch Fabric BAR2 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR2_LUT_UPPER31,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR2"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR2_PAGE_ADDR ,Switch Fabric Bar2 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Tables"
|
|
tree "CIU_SF_BAR3 Look-Up Table 0"
|
|
group asd:(0x3200+0x0100*3.+0x0008*0.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT0,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER0,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 1"
|
|
group asd:(0x3200+0x0100*3.+0x0008*1.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT1,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER1,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 2"
|
|
group asd:(0x3200+0x0100*3.+0x0008*2.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT2,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER2,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 3"
|
|
group asd:(0x3200+0x0100*3.+0x0008*3.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT3,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER3,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 4"
|
|
group asd:(0x3200+0x0100*3.+0x0008*4.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT4,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER4,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 5"
|
|
group asd:(0x3200+0x0100*3.+0x0008*5.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT5,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER5,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 6"
|
|
group asd:(0x3200+0x0100*3.+0x0008*6.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT6,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER6,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 7"
|
|
group asd:(0x3200+0x0100*3.+0x0008*7.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT7,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER7,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 8"
|
|
group asd:(0x3200+0x0100*3.+0x0008*8.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT8,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER8,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 9"
|
|
group asd:(0x3200+0x0100*3.+0x0008*9.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT9,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER9,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 10"
|
|
group asd:(0x3200+0x0100*3.+0x0008*10.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT10,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER10,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 11"
|
|
group asd:(0x3200+0x0100*3.+0x0008*11.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT11,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER11,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 12"
|
|
group asd:(0x3200+0x0100*3.+0x0008*12.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT12,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER12,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 13"
|
|
group asd:(0x3200+0x0100*3.+0x0008*13.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT13,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER13,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 14"
|
|
group asd:(0x3200+0x0100*3.+0x0008*14.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT14,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER14,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 15"
|
|
group asd:(0x3200+0x0100*3.+0x0008*15.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT15,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER15,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 16"
|
|
group asd:(0x3200+0x0100*3.+0x0008*16.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT16,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER16,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 17"
|
|
group asd:(0x3200+0x0100*3.+0x0008*17.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT17,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER17,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 18"
|
|
group asd:(0x3200+0x0100*3.+0x0008*18.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT18,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER18,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 19"
|
|
group asd:(0x3200+0x0100*3.+0x0008*19.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT19,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER19,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 20"
|
|
group asd:(0x3200+0x0100*3.+0x0008*20.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT20,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER20,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 21"
|
|
group asd:(0x3200+0x0100*3.+0x0008*21.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT21,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER21,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 22"
|
|
group asd:(0x3200+0x0100*3.+0x0008*22.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT22,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER22,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 23"
|
|
group asd:(0x3200+0x0100*3.+0x0008*23.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT23,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER23,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 24"
|
|
group asd:(0x3200+0x0100*3.+0x0008*24.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT24,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER24,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 25"
|
|
group asd:(0x3200+0x0100*3.+0x0008*25.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT25,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER25,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 26"
|
|
group asd:(0x3200+0x0100*3.+0x0008*26.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT26,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER26,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 27"
|
|
group asd:(0x3200+0x0100*3.+0x0008*27.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT27,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER27,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 28"
|
|
group asd:(0x3200+0x0100*3.+0x0008*28.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT28,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER28,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 29"
|
|
group asd:(0x3200+0x0100*3.+0x0008*29.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT29,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER29,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 30"
|
|
group asd:(0x3200+0x0100*3.+0x0008*30.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT30,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER30,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR3 Look-Up Table 31"
|
|
group asd:(0x3200+0x0100*3.+0x0008*31.)++8
|
|
line.long 0x000 "CIU_SF_BAR3_LUT31,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR3_PAGE_ADDR[31:11] ,Switch Fabric BAR3 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR3_DESTID[3:0] ,Switch Fabric BAR3 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR3_LUT_UPPER31,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR3"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR3_PAGE_ADDR ,Switch Fabric Bar3 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Tables"
|
|
tree "CIU_SF_BAR4 Look-Up Table 0"
|
|
group asd:(0x3200+0x0100*4.+0x0008*0.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT0,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER0,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 1"
|
|
group asd:(0x3200+0x0100*4.+0x0008*1.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT1,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER1,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 2"
|
|
group asd:(0x3200+0x0100*4.+0x0008*2.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT2,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER2,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 3"
|
|
group asd:(0x3200+0x0100*4.+0x0008*3.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT3,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER3,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 4"
|
|
group asd:(0x3200+0x0100*4.+0x0008*4.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT4,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER4,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 5"
|
|
group asd:(0x3200+0x0100*4.+0x0008*5.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT5,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER5,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 6"
|
|
group asd:(0x3200+0x0100*4.+0x0008*6.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT6,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER6,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 7"
|
|
group asd:(0x3200+0x0100*4.+0x0008*7.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT7,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER7,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 8"
|
|
group asd:(0x3200+0x0100*4.+0x0008*8.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT8,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER8,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 9"
|
|
group asd:(0x3200+0x0100*4.+0x0008*9.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT9,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER9,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 10"
|
|
group asd:(0x3200+0x0100*4.+0x0008*10.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT10,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER10,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 11"
|
|
group asd:(0x3200+0x0100*4.+0x0008*11.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT11,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER11,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 12"
|
|
group asd:(0x3200+0x0100*4.+0x0008*12.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT12,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER12,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 13"
|
|
group asd:(0x3200+0x0100*4.+0x0008*13.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT13,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER13,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 14"
|
|
group asd:(0x3200+0x0100*4.+0x0008*14.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT14,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER14,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 15"
|
|
group asd:(0x3200+0x0100*4.+0x0008*15.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT15,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER15,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 16"
|
|
group asd:(0x3200+0x0100*4.+0x0008*16.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT16,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER16,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 17"
|
|
group asd:(0x3200+0x0100*4.+0x0008*17.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT17,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER17,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 18"
|
|
group asd:(0x3200+0x0100*4.+0x0008*18.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT18,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER18,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 19"
|
|
group asd:(0x3200+0x0100*4.+0x0008*19.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT19,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER19,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 20"
|
|
group asd:(0x3200+0x0100*4.+0x0008*20.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT20,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER20,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 21"
|
|
group asd:(0x3200+0x0100*4.+0x0008*21.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT21,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER21,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 22"
|
|
group asd:(0x3200+0x0100*4.+0x0008*22.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT22,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER22,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 23"
|
|
group asd:(0x3200+0x0100*4.+0x0008*23.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT23,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER23,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 24"
|
|
group asd:(0x3200+0x0100*4.+0x0008*24.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT24,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER24,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 25"
|
|
group asd:(0x3200+0x0100*4.+0x0008*25.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT25,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER25,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 26"
|
|
group asd:(0x3200+0x0100*4.+0x0008*26.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT26,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER26,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 27"
|
|
group asd:(0x3200+0x0100*4.+0x0008*27.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT27,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER27,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 28"
|
|
group asd:(0x3200+0x0100*4.+0x0008*28.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT28,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER28,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 29"
|
|
group asd:(0x3200+0x0100*4.+0x0008*29.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT29,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER29,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 30"
|
|
group asd:(0x3200+0x0100*4.+0x0008*30.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT30,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER30,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree "CIU_SF_BAR4 Look-Up Table 31"
|
|
group asd:(0x3200+0x0100*4.+0x0008*31.)++8
|
|
line.long 0x000 "CIU_SF_BAR4_LUT31,Lower 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.tbyte 0x000 11.--31. 1. " SF_BAR4_PAGE_ADDR[31:11] ,Switch Fabric BAR4 Translation Page Address"
|
|
hexmask.long.byte 0x000 0.--3. 1. " SF_BAR4_DESTID[3:0] ,Switch Fabric BAR4 Destination ID"
|
|
line.long 0x004 "CIU_SF_BAR4_LUT_UPPER31,Upper 32 bits of SFN Switch Fabric Look Up Table associated with CIU_SF_BAR4"
|
|
hexmask.long.long 0x004 0.--31. 1. " SF_BAR4_PAGE_ADDR ,Switch Fabric Bar4 Translation Page Address"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "SDRAM Controller Core"
|
|
group asd:0x4000--0x4fff
|
|
line.long 0x000 "SD_REFRESH,SDRAM Refresh Interval Register"
|
|
hexmask.long.word 0x000 0.--15. 1. " T[15:00] ,SDRAM Refresh interval (in units of processor bus clocks)"
|
|
line.long 0x004 "SD_CNTRL,SDRAM Control Register"
|
|
bitfld.long 0x004 31. " ENABLE ,Enables SDRAM access" "Disabled,Enabled"
|
|
bitfld.long 0x004 30. " WAKE ,Enables SDRAM access when the SDRAM is in SELF_REFRESH mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 27.--29. " CL ,CAS Latency" "Reserved,Reserved,2 PB_CLKs (SDR),3 PB_CLKs (SDR),Reserved,1.5 PB_CLKs (DDR),2.5 PB_CLKs (DDR),Reserved"
|
|
bitfld.long 0x004 26. " DD_EN ,Data Rate" "Double,Single"
|
|
textline " "
|
|
bitfld.long 0x004 22. " DQM_EN ,Data Quality Mask enable/ECC Global enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 20.--21. " APB ,The auto-precharge bit selection" "Bit 9,Bit 10,Bit 11,Bit 12"
|
|
textline " "
|
|
bitfld.long 0x004 18.--19. " BL ,The burst length selection" "Reserved,Two cycle,Reserved,Reserved"
|
|
bitfld.long 0x004 15. " DQS_SZ ,Indicates the number of bits a DQS pin represents for data portion of a DIMM" "Nibble,Byte"
|
|
textline " "
|
|
bitfld.long 0x004 14. " ECC_SZ ,Indicates the number of bits a DQS pin represents for ECC portion of a DIMM" "Nibble,Byte"
|
|
bitfld.long 0x004 8.--9. " PORT_ARB ,Determines Port Arbitration" "Port #1 priority,Port #2 priority,Port #1 gains 80%,Burst exchange"
|
|
line.long 0x008 "SD_BANK_CNTRL,SDRAM Memory Bank Control and Status Register"
|
|
bitfld.long 0x008 29. " BUF ,Registered SDRAM DIMM select" "Unbuffered,Buffered"
|
|
bitfld.long 0x008 28. " NBANK[1] ,Number of banks/chip selects" "1 physical,2 physical"
|
|
textline " "
|
|
bitfld.long 0x008 27. " NBANK[0] ,Number of banks/chip selects" "2 logical,4 logical"
|
|
bitfld.long 0x008 24.--26. " A_MODE ,Addressing Mapping Mode" "Mode 0,Mode 1,Mode 2,Mode 3,Mode 4,Mode 5,Mode 6,Reserved"
|
|
textline " "
|
|
bitfld.long 0x008 23. " BMGT[3] ,Bank Management" "Left open,Closed"
|
|
bitfld.long 0x008 22. " BMGT[2] ,Bank Management" "Left open,Closed"
|
|
textline " "
|
|
bitfld.long 0x008 21. " BMGT[1] ,Bank Management" "Left open,Closed"
|
|
bitfld.long 0x008 20. " BMGT[0] ,Bank Management" "Left open,Closed"
|
|
textline " "
|
|
hexmask.long.byte 0x008 16.--19. 1. " T_RAS ,t_RAS SDRAM timing parameter"
|
|
hexmask.long.byte 0x008 12.--14. 1. " T_RCD ,t_RCD SDRAM timing parameter"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--10. 1. " T_RP ,t_RP SDRAM timing parameter"
|
|
hexmask.long.byte 0x008 5.--7. 1. " T_WR ,t_WR SDRAM timing parameter"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--4. 1. " T_RFC ,t_RFC SDRAM timing parameter"
|
|
line.long 0x00c "SD_INT_STATUS,SDRAM Interrupt Status Register"
|
|
bitfld.long 0x00c 2. " ECC_INT ,Indicates there is a pending ECC interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00c 1. " I2C_INT ,Indicates there is a pending I2C interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00c 0. " GSK_INT ,Indicates there is a pending gasket interrupt" "Not pending,Pending"
|
|
line.long 0x010 "SD_B0_ADDR,SDRAM Memory Bank 0 Address Register"
|
|
bitfld.long 0x010 20. " ENABLE ,Bank (DIMM) Enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x010 0.--19. 1. " A ,Base Address of SDRAM DIMM #0"
|
|
line.long 0x014 "SD_B0_MASK,SDRAM Memory Bank x Address Mask Register"
|
|
hexmask.long.tbyte 0x014 0.--19. 1. " M ,Mask to qualify bank address"
|
|
line.long 0x020 "SD_B1_ADDR,SDRAM Memory Bank 1 Address Register"
|
|
bitfld.long 0x020 20. " ENABLE ,Bank (DIMM) Enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x020 0.--19. 1. " A ,Base Address of SDRAM DIMM #1"
|
|
line.long 0x024 "SD_B1_MASK"
|
|
hexmask.long.tbyte 0x024 0.--19. 1. " M ,Mask to qualify bank address"
|
|
line.long 0x030 "SD_B2_ADDR,SDRAM Memory Bank 2 Address Register"
|
|
bitfld.long 0x030 20. " ENABLE ,Bank (DIMM) Enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x030 0.--19. 1. " A ,Base Address of SDRAM DIMM #2"
|
|
line.long 0x034 "SD_B2_MASK"
|
|
hexmask.long.tbyte 0x034 0.--19. 1. " M ,Mask to qualify bank address"
|
|
line.long 0x040 "SD_B3_ADDR,SDRAM Memory Bank 3 Address Register"
|
|
bitfld.long 0x040 20. " ENABLE ,Bank (DIMM) Enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x040 0.--19. 1. " A ,Base Address of SDRAM DIMM #3"
|
|
line.long 0x044 "SD_B3_MASK"
|
|
hexmask.long.tbyte 0x044 0.--19. 1. " M ,Mask to qualify bank address"
|
|
line.long 0x050 "SD_ECC_ADDR1,SDRAM ECC Address of Error Register"
|
|
hexmask.long.long 0x050 3.--31. 1. " EA ,Address of ECC error"
|
|
bitfld.long 0x050 0. " CLEAR ,Register clear" "Disabled,Clear"
|
|
line.long 0x054 "SD_ECC_ADDR2,SDRAM ECC Address of Error Register"
|
|
hexmask.long.byte 0x054 0.--7. 1. " EA ,Address of ECC error"
|
|
line.long 0x058 "SD_ECC_STATUS,SDRAM ECC Status Register"
|
|
bitfld.long 0x058 27. " ECC_EE ,ECC Check Word Error" "No error,Error"
|
|
bitfld.long 0x058 26. " ECC_EN ,ECC Checking and Correction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x058 25. " EG_EN ,Enables the use of ECC_GEN instead of the internally generated ECC word" "Disabled,Enabled"
|
|
bitfld.long 0x058 24. " ECC_UC ,ECC uncorrectable Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x058 23. " ECC_CO[7] ,ECC correctable error occurred flag" "No error,Error"
|
|
bitfld.long 0x058 22. " ECC_CO[6] ,ECC correctable error occurred flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x058 21. " ECC_CO[5] ,ECC correctable error occurred flag" "No error,Error"
|
|
bitfld.long 0x058 20. " ECC_CO[4] ,ECC correctable error occurred flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x058 19. " ECC_CO[3] ,ECC correctable error occurred flag" "No error,Error"
|
|
bitfld.long 0x058 18. " ECC_CO[2] ,ECC correctable error occurred flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x058 17. " ECC_CO[1] ,ECC correctable error occurred flag" "No error,Error"
|
|
bitfld.long 0x058 16. " ECC_CO[0] ,ECC correctable error occurred flag" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x058 8.--15. 1. " ECC_SYND ,The ECC byte read from memory on the last completed read"
|
|
hexmask.long.byte 0x058 0.--7. 1. " ECC_GEN ,ECC word to be written to DRAM in place of the internally generated ECC word"
|
|
line.long 0x060 "SD_GASKET_STATUS,SDRAM Gasket Status Register"
|
|
hexmask.long.byte 0x060 16.--23. 1. " GSKT2_MSG ,Port 2 gasket interrupt message"
|
|
hexmask.long.byte 0x060 8.--15. 1. " GSKT1_MSG ,Port 1 gasket interrupt message"
|
|
textline " "
|
|
bitfld.long 0x060 1. " GSKT2 ,Indicates an interrupt generated by the port 2 gasket" "No interrupt,Interrupt"
|
|
bitfld.long 0x060 0. " GSKT1 ,Indicates an interrupt generated by the port 1 gasket" "No interrupt,Interrupt"
|
|
line.long 0x064 "SD_SECC_ADDR_ERROR1_P1,SRAM Address Error 1, Port 1 Register"
|
|
hexmask.long.long 0x064 0.--31. 1. " AA[31:0] ,Address of the first request outside of the programmed range of SDRAM"
|
|
line.long 0x068 "SD_SECC_ADDR_ERROR2_P1,SDRAM Address Error 2, Port 1 Register"
|
|
hexmask.long.byte 0x068 0.--7. 1. " AA[35:32] ,Address of the first request outside of the programmed range of SDRAM"
|
|
line.long 0x06c "SD_SECC_ADDR_ERROR1_P2,SRAM Address Error 1, Port 2 Register"
|
|
hexmask.long.long 0x06c 0.--31. 1. " AA[31:0] ,Address of the first request outside of the programmed range of SDRAM"
|
|
line.long 0x070 "SD_SECC_ADDR_ERROR2_P2,SDRAM Address Error 2, Port 2 Register"
|
|
hexmask.long.byte 0x070 0.--7. 1. " AA[35:32] ,Address of the first request outside of the programmed range of SDRAM"
|
|
line.long 0x150 "SD_SECC_ADDR1,SDRAM Shadow ECC Address of Error Register"
|
|
hexmask.long.long 0x150 3.--31. 1. " SEA ,Value of EA in the SD_ECC_ADDR1 register at the time of reset"
|
|
line.long 0x154 "SD_SECC_ADDR2,SDRAM Shadow ECC Address of Error Register"
|
|
hexmask.long.long 0x150 3.--31. 1. " SEA ,Value of EA in the SD_ECC_ADDR2 register at the time of reset"
|
|
line.long 0x158 "SD_SECC_STATUS"
|
|
bitfld.long 0x158 27. " SECC_EE ,Value of ECC_EE at the time of reset" "No error,Error"
|
|
bitfld.long 0x158 26. " SECC_EN ,Value of ECC_EN at the time of reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x158 25. " SEG_EN ,Value of EG_EN at the time of reset" "Disabled,Enabled"
|
|
bitfld.long 0x158 24. " SECC_UC ,Value of ECC_UC at the time of reset" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x158 23. " SECC_CO[7] ,Value of ECC_CO[7] at the time of reset" "No error,Error"
|
|
bitfld.long 0x158 22. " SECC_CO[6] ,Value of ECC_CO[6] at the time of reset" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x158 21. " SECC_CO[5] ,Value of ECC_CO[5] at the time of reset" "No error,Error"
|
|
bitfld.long 0x158 20. " SECC_CO[4] ,Value of ECC_CO[4] at the time of reset" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x158 19. " SECC_CO[3] ,Value of ECC_CO[3] at the time of reset" "No error,Error"
|
|
bitfld.long 0x158 18. " SECC_CO[2] ,Value of ECC_CO[2] at the time of reset" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x158 17. " SECC_CO[1] ,Value of ECC_CO[1] at the time of reset" "No error,Error"
|
|
bitfld.long 0x158 16. " SECC_CO[0] ,Value of ECC_CO[0] at the time of reset" "No error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x158 8.--15. 1. " SECC_SYND ,Value of ECC_SYND at the time of reset"
|
|
hexmask.long.byte 0x158 0.--7. 1. " SECC_GEN ,Value of ECC_GEN at the time of reset"
|
|
line.long 0x160 "SD_DLL_ADJ,SDRAM DLL Adjust Register"
|
|
bitfld.long 0x160 7. " AD_SB ,Determines whether the offset is added or subtracted" "Substract,Add"
|
|
hexmask.long.byte 0x160 0.--4. 1. " DLL_OFFSET ,Determines the DLL adjustment"
|
|
line.long 0x400 "SD_I2C_CNTRL1,SDRAM I2C Control Register"
|
|
bitfld.long 0x400 24. " WR_EN ,Direction" "Read,Write"
|
|
hexmask.long.byte 0x400 16.--23. 1. " I2C_ADDR ,I2C Address"
|
|
textline " "
|
|
bitfld.long 0x400 8.--10. " PAGE_SELECT ,Page Select" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x400 0.--3. 1. " DEVCODE ,Device Code"
|
|
line.long 0x404 "SD_I2C_CNTRL2,SDRAM I2C Control Register"
|
|
bitfld.long 0x404 28. " IIB[4] ,Interrupt Identification Byte, I2C Access Complete" "Clear,Set"
|
|
bitfld.long 0x404 27. " IIB[3] ,Interrupt Identification Byte, Initialization-State-Machine Configuration Error" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x404 26. " IIB[2] ,Interrupt Identification Byte, I2C Time Out" "Clear,Set"
|
|
bitfld.long 0x404 25. " IIB[1] ,Interrupt Identification Byte, Write Protect Address Violation" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x404 24. " IIB[0] ,Interrupt Identification Byte, AHB Master transfer error" "Clear,Set"
|
|
bitfld.long 0x404 17. " RD_STATUS ,Read Status Bit" "Done,In progress"
|
|
textline " "
|
|
bitfld.long 0x404 16. " WR_STATUS ,Write Status Bit" "Done,In progress"
|
|
bitfld.long 0x404 8. " Start ,Start Control" "Done,In progress"
|
|
textline " "
|
|
bitfld.long 0x404 2.--3. " LANE ,Data Lane" "00b,01b,10b,11b"
|
|
bitfld.long 0x404 0.--1. " SIZE ,I2C Size specifies number of bytes in an I2C read or write" "1 byte,2 bytes,4 bytes,4 bytes"
|
|
line.long 0x408 "SD_I2C_RD_DATA,SDRAM I2C Read Data Register"
|
|
hexmask.long.byte 0x408 24.--31. 1. " I2C_RD_BYTE3 ,Received I2C data, byte 3"
|
|
hexmask.long.byte 0x408 16.--23. 1. " I2C_RD_BYTE2 ,Received I2C data, byte 2"
|
|
textline " "
|
|
hexmask.long.byte 0x408 8.--15. 1. " I2C_RD_BYTE1 ,Received I2C data, byte 1"
|
|
hexmask.long.byte 0x408 0.--7. 1. " I2C_RD_BYTE0 ,Received I2C data, byte 0"
|
|
line.long 0x40c "SD_I2C_WRT_DATA,SDRAM I2C Write Data Register"
|
|
hexmask.long.byte 0x40c 24.--31. 1. " I2C_WRT_BYTE3 ,I2C transmit data, byte 3"
|
|
hexmask.long.byte 0x40c 16.--23. 1. " I2C_WRT_BYTE2 ,I2C transmit data, byte 2"
|
|
textline " "
|
|
hexmask.long.byte 0x40c 8.--15. 1. " I2C_WRT_BYTE1 ,I2C transmit data, byte 1"
|
|
hexmask.long.byte 0x40c 0.--7. 1. " I2C_WRT_BYTE0 ,I2C transmit data, byte 0"
|
|
tree.end
|
|
tree "DMA/XOR Block"
|
|
tree "Channel 0"
|
|
group asd:(0x5000+(0x100*0.))++0x100
|
|
line.long 0x000 "CH0_SRC_ADDR_M,Channel 0 Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x000 0.--31. 1. " SRC_ADDR_MB ,Most significant word of the 8 byte source address"
|
|
line.long 0x004 "CH0_SRC_ADDR_L,Channel 0 Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x004 0.--31. 1. " SRC_ADDR_LB ,Least significant word of the 8 byte source address"
|
|
line.long 0x008 "CH0_DST_ADDR_M,Channel 0 Destination Address (Most Significant Bits)"
|
|
hexmask.long.long 0x008 0.--31. 1. " DST_ADDR_MB ,Most significant destination address bytes"
|
|
line.long 0x00c "CH0_DST_ADDR_L,Channel 0 Destination Address (Least Significant Bits)"
|
|
hexmask.long.long 0x00c 0.--31. 1. " DST_ADDR_LB ,Least significant destination address bytes"
|
|
line.long 0x010 "CH0_TCR1,Channel 0 Transfer Control Register 1"
|
|
bitfld.long 0x010 31. " XOR_WR_EN ,Enables XOR writing" "Disabled,Enabled"
|
|
bitfld.long 0x010 30. " CRC_EN ,Enables CRC calculating" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x010 24.--29. 1. " CRC_PORT ,Specifies source port for CRC Seed and Result"
|
|
bitfld.long 0x010 23. " CRC_WR_EN ,Enables CRC writing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x010 22. " READ_CRC_SEED ,Enables CRC read seed" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 16.--21. 1. " SRC_PORT ,Specifies ource port for source address"
|
|
textline " "
|
|
bitfld.long 0x010 15. " DIS_DMA_WR ,Disables writing of data in a DMA transfer" "Enabled,Disabled"
|
|
hexmask.long.byte 0x010 8.--13. 1. " DST_PORT ,Specifies destination port for results"
|
|
textline " "
|
|
bitfld.long 0x010 5. " DIRECT_FILL ,Direct fill" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 0.--3. 1. " DATA_BLOCKS ,Specifies the number of Data Blocks use for XOR Parity checking operations"
|
|
line.long 0x014 "CH0_TCR2,Channel 0 Transfer Control Register 2"
|
|
bitfld.long 0x014 31. " CRC_ORIENT ,Enables the 64 bit data stream used to generate the CRC value to be bit swapped, or re-orientated" "Disabled,Enabled"
|
|
bitfld.long 0x014 28.--29. " CRC_SWAP ,Specifies CRC swapping format for the final CRC that will be written to memory" "No swapping,Reserved,Reserved,Byte-word"
|
|
textline " "
|
|
bitfld.long 0x014 26.--27. " BURST_SIZE ,Specifies Burst size in DMA transfer" "8 byte,32 byte,128 byte,256 byte"
|
|
bitfld.long 0x014 24.--25. " SWAP ,Specifies Data swapping format" "No swapping,Byte,Word,Byte-word"
|
|
textline " "
|
|
hexmask.long.tbyte 0x014 0.--23. 1. " BC ,Specifies the Byte Count of an operation"
|
|
line.long 0x018 "CH0_ND_ADDR _M,Channel 0 Next Descriptor Address (Most Significant Bits)"
|
|
hexmask.long.long 0x018 0.--31. 1. " ND_ADDR_MB ,Most significant Next Descriptor Address bytes"
|
|
line.long 0x01c "CH0_ND_ADDR _L,Channel 0 Next Descriptor Address (Least Significant Bits)"
|
|
hexmask.long.long 0x01c 6.--31. 1. " ND_ADDR_LB ,Least significant Next Descriptor Address bits"
|
|
bitfld.long 0x01c 0. " LAST ,Indicates this is the last descriptor in Linked-List operation" "Clear,Set"
|
|
line.long 0x020 "CH0_ND_TCR,Channel 0 Next Descriptor Transfer Control"
|
|
bitfld.long 0x020 30.--31. " ND_SWAP ,Next Descriptor Swapping" "No swapping,Byte,Word,Byte-word"
|
|
hexmask.long.byte 0x020 24.--29. 1. " ND_PORT ,Specifies the SFN port from which the Next Descriptor should be read"
|
|
textline " "
|
|
hexmask.long.byte 0x020 16.--19. 1. " ND_DATA_BLOCKS ,Specifies the number of data blocks for which the Next Descriptor should be read"
|
|
line.long 0x024 "CH0_GCSR,Channel 0 General Control and Status Register"
|
|
bitfld.long 0x024 31. " GO ,Start/Resume operation" "Idle,Start"
|
|
bitfld.long 0x024 30. " CHAIN ,Enable a Linked-list operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 28.--29. " OP_CMD ,Specifies a operation command" "DMA transfer,XOR Operation,Memory Fill,Parity Checking"
|
|
bitfld.long 0x024 26. " STOP_REQ ,Write 1 to stop the current operation" "Idle,Stop"
|
|
textline " "
|
|
bitfld.long 0x024 25. " HALT_REQ ,Write 1 to halt the current linked-list operation" "Idle,Halt"
|
|
bitfld.long 0x024 24. " SOFT_RST ,Resets all state machines within this channel" "Idle,Reset"
|
|
textline " "
|
|
bitfld.long 0x024 23. " DACT ,Channel Status" "Inactive,Active"
|
|
hexmask.long.byte 0x024 12.--15. 1. " ERR_CODE ,Error Code"
|
|
textline " "
|
|
bitfld.long 0x024 11. " RESUME ,Resume chain by re-reading current descriptor" "Disabled,Enabled"
|
|
bitfld.long 0x024 10. " STOP ,Status bit, indicating the current operation has been stopped" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x024 9. " HALT ,Status bit, indicating the current Linked-List operation has been halted" "Not halted,Halted"
|
|
bitfld.long 0x024 8. " DONE ,Status bit, indicating the current Direct mode or Linked-list operation has completed successfully" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x024 7. " EX_PKT_ERR ,Indicates that requests other than sync packets have arrived for this channel and were dropped" "No error,Error"
|
|
bitfld.long 0x024 6. " PERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x024 5. " PAR_EN ,Enables an interrupt when a parity error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 4. " ERR_EN ,Enables an interrupt when a transfer error occurs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 3. " EX_PKT_EN ,Enables an interrupt if an extra packet error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 2. " STOP_EN ,Enables an interrupt when an operation has been stopped by STOP_REQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 1. " HALT_EN ,Enables an interrupt when an operation has been halted by HALT_REQ" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " DONE_EN ,Enables an interrupt when an operation has been completed successfully" "Disabled,Enabled"
|
|
line.long 0x028 "CH0_CRC_ADDR_M,Channel 0 CRC Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x028 0.--31. 1. " CRC_ADDR_MB ,Most significant CRC address bytes"
|
|
line.long 0x02c "CH0_CRC_ADDR_L,Channel 0 CRC Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x02c 0.--31. 1. " CRC_ADDR_LB ,Least significant CRC address bytes"
|
|
line.long 0x030 "CH0_CRC,Channel 0 CRC value"
|
|
hexmask.long.long 0x030 0.--31. 1. " CRC ,Indicates the current result of CRC calculation on DMA transferred data"
|
|
tree "Channel Source 1 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(1.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC1_ADDR_M,Channel 0 Source 1 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 1 address bytes"
|
|
line.long 0x044 "CH0_SRC1_ADDR_L,Channel 0 Source 1 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 1 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 1 address bit"
|
|
tree.end
|
|
tree "Channel Source 2 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(2.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC2_ADDR_M,Channel 0 Source 2 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 2 address bytes"
|
|
line.long 0x044 "CH0_SRC2_ADDR_L,Channel 0 Source 2 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 2 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 2 address bit"
|
|
tree.end
|
|
tree "Channel Source 3 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(3.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC3_ADDR_M,Channel 0 Source 3 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 3 address bytes"
|
|
line.long 0x044 "CH0_SRC3_ADDR_L,Channel 0 Source 3 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 3 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 3 address bit"
|
|
tree.end
|
|
tree "Channel Source 4 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(4.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC4_ADDR_M,Channel 0 Source 4 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 4 address bytes"
|
|
line.long 0x044 "CH0_SRC4_ADDR_L,Channel 0 Source 4 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 4 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 4 address bit"
|
|
tree.end
|
|
tree "Channel Source 5 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(5.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC5_ADDR_M,Channel 0 Source 5 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 5 address bytes"
|
|
line.long 0x044 "CH0_SRC5_ADDR_L,Channel 0 Source 5 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 5 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 5 address bit"
|
|
tree.end
|
|
tree "Channel Source 6 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(6.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC6_ADDR_M,Channel 0 Source 6 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 6 address bytes"
|
|
line.long 0x044 "CH0_SRC6_ADDR_L,Channel 0 Source 6 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 6 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 6 address bit"
|
|
tree.end
|
|
tree "Channel Source 7 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(7.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC7_ADDR_M,Channel 0 Source 7 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 7 address bytes"
|
|
line.long 0x044 "CH0_SRC7_ADDR_L,Channel 0 Source 7 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 7 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 7 address bit"
|
|
tree.end
|
|
tree "Channel Source 8 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(8.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC8_ADDR_M,Channel 0 Source 8 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 8 address bytes"
|
|
line.long 0x044 "CH0_SRC8_ADDR_L,Channel 0 Source 8 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 8 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 8 address bit"
|
|
tree.end
|
|
tree "Channel Source 9 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(9.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC9_ADDR_M,Channel 0 Source 9 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 9 address bytes"
|
|
line.long 0x044 "CH0_SRC9_ADDR_L,Channel 0 Source 9 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 9 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 9 address bit"
|
|
tree.end
|
|
tree "Channel Source 10 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(10.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC10_ADDR_M,Channel 0 Source 10 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 10 address bytes"
|
|
line.long 0x044 "CH0_SRC10_ADDR_L,Channel 0 Source 10 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 10 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 10 address bit"
|
|
tree.end
|
|
tree "Channel Source 11 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(11.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC11_ADDR_M,Channel 0 Source 11 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 11 address bytes"
|
|
line.long 0x044 "CH0_SRC11_ADDR_L,Channel 0 Source 11 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 11 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 11 address bit"
|
|
tree.end
|
|
tree "Channel Source 12 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(12.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC12_ADDR_M,Channel 0 Source 12 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 12 address bytes"
|
|
line.long 0x044 "CH0_SRC12_ADDR_L,Channel 0 Source 12 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 12 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 12 address bit"
|
|
tree.end
|
|
tree "Channel Source 13 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(13.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC13_ADDR_M,Channel 0 Source 13 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 13 address bytes"
|
|
line.long 0x044 "CH0_SRC13_ADDR_L,Channel 0 Source 13 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 13 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 13 address bit"
|
|
tree.end
|
|
tree "Channel Source 14 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(14.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC14_ADDR_M,Channel 0 Source 14 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 14 address bytes"
|
|
line.long 0x044 "CH0_SRC14_ADDR_L,Channel 0 Source 14 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 14 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 14 address bit"
|
|
tree.end
|
|
tree "Channel Source 15 Address Registers"
|
|
group asd:(0x5000+(0x100*0.)+(0x008*(15.-1)))++0x100
|
|
line.long 0x040 "CH0_SRC15_ADDR_M,Channel 0 Source 15 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 15 address bytes"
|
|
line.long 0x044 "CH0_SRC15_ADDR_L,Channel 0 Source 15 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 15 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 15 address bit"
|
|
tree.end
|
|
tree.end
|
|
tree "Channel 1"
|
|
group asd:(0x5000+(0x100*1.))++0x100
|
|
line.long 0x000 "CH1_SRC_ADDR_M,Channel 1 Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x000 0.--31. 1. " SRC_ADDR_MB ,Most significant word of the 8 byte source address"
|
|
line.long 0x004 "CH1_SRC_ADDR_L,Channel 1 Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x004 0.--31. 1. " SRC_ADDR_LB ,Least significant word of the 8 byte source address"
|
|
line.long 0x008 "CH1_DST_ADDR_M,Channel 1 Destination Address (Most Significant Bits)"
|
|
hexmask.long.long 0x008 0.--31. 1. " DST_ADDR_MB ,Most significant destination address bytes"
|
|
line.long 0x00c "CH1_DST_ADDR_L,Channel 1 Destination Address (Least Significant Bits)"
|
|
hexmask.long.long 0x00c 0.--31. 1. " DST_ADDR_LB ,Least significant destination address bytes"
|
|
line.long 0x010 "CH1_TCR1,Channel 1 Transfer Control Register 1"
|
|
bitfld.long 0x010 31. " XOR_WR_EN ,Enables XOR writing" "Disabled,Enabled"
|
|
bitfld.long 0x010 30. " CRC_EN ,Enables CRC calculating" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x010 24.--29. 1. " CRC_PORT ,Specifies source port for CRC Seed and Result"
|
|
bitfld.long 0x010 23. " CRC_WR_EN ,Enables CRC writing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x010 22. " READ_CRC_SEED ,Enables CRC read seed" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 16.--21. 1. " SRC_PORT ,Specifies ource port for source address"
|
|
textline " "
|
|
bitfld.long 0x010 15. " DIS_DMA_WR ,Disables writing of data in a DMA transfer" "Enabled,Disabled"
|
|
hexmask.long.byte 0x010 8.--13. 1. " DST_PORT ,Specifies destination port for results"
|
|
textline " "
|
|
bitfld.long 0x010 5. " DIRECT_FILL ,Direct fill" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 0.--3. 1. " DATA_BLOCKS ,Specifies the number of Data Blocks use for XOR Parity checking operations"
|
|
line.long 0x014 "CH1_TCR2,Channel 1 Transfer Control Register 2"
|
|
bitfld.long 0x014 31. " CRC_ORIENT ,Enables the 64 bit data stream used to generate the CRC value to be bit swapped, or re-orientated" "Disabled,Enabled"
|
|
bitfld.long 0x014 28.--29. " CRC_SWAP ,Specifies CRC swapping format for the final CRC that will be written to memory" "No swapping,Reserved,Reserved,Byte-word"
|
|
textline " "
|
|
bitfld.long 0x014 26.--27. " BURST_SIZE ,Specifies Burst size in DMA transfer" "8 byte,32 byte,128 byte,256 byte"
|
|
bitfld.long 0x014 24.--25. " SWAP ,Specifies Data swapping format" "No swapping,Byte,Word,Byte-word"
|
|
textline " "
|
|
hexmask.long.tbyte 0x014 0.--23. 1. " BC ,Specifies the Byte Count of an operation"
|
|
line.long 0x018 "CH1_ND_ADDR _M,Channel 1 Next Descriptor Address (Most Significant Bits)"
|
|
hexmask.long.long 0x018 0.--31. 1. " ND_ADDR_MB ,Most significant Next Descriptor Address bytes"
|
|
line.long 0x01c "CH1_ND_ADDR _L,Channel 1 Next Descriptor Address (Least Significant Bits)"
|
|
hexmask.long.long 0x01c 6.--31. 1. " ND_ADDR_LB ,Least significant Next Descriptor Address bits"
|
|
bitfld.long 0x01c 0. " LAST ,Indicates this is the last descriptor in Linked-List operation" "Clear,Set"
|
|
line.long 0x020 "CH1_ND_TCR,Channel 1 Next Descriptor Transfer Control"
|
|
bitfld.long 0x020 30.--31. " ND_SWAP ,Next Descriptor Swapping" "No swapping,Byte,Word,Byte-word"
|
|
hexmask.long.byte 0x020 24.--29. 1. " ND_PORT ,Specifies the SFN port from which the Next Descriptor should be read"
|
|
textline " "
|
|
hexmask.long.byte 0x020 16.--19. 1. " ND_DATA_BLOCKS ,Specifies the number of data blocks for which the Next Descriptor should be read"
|
|
line.long 0x024 "CH1_GCSR,Channel 1 General Control and Status Register"
|
|
bitfld.long 0x024 31. " GO ,Start/Resume operation" "Idle,Start"
|
|
bitfld.long 0x024 30. " CHAIN ,Enable a Linked-list operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 28.--29. " OP_CMD ,Specifies a operation command" "DMA transfer,XOR Operation,Memory Fill,Parity Checking"
|
|
bitfld.long 0x024 26. " STOP_REQ ,Write 1 to stop the current operation" "Idle,Stop"
|
|
textline " "
|
|
bitfld.long 0x024 25. " HALT_REQ ,Write 1 to halt the current linked-list operation" "Idle,Halt"
|
|
bitfld.long 0x024 24. " SOFT_RST ,Resets all state machines within this channel" "Idle,Reset"
|
|
textline " "
|
|
bitfld.long 0x024 23. " DACT ,Channel Status" "Inactive,Active"
|
|
hexmask.long.byte 0x024 12.--15. 1. " ERR_CODE ,Error Code"
|
|
textline " "
|
|
bitfld.long 0x024 11. " RESUME ,Resume chain by re-reading current descriptor" "Disabled,Enabled"
|
|
bitfld.long 0x024 10. " STOP ,Status bit, indicating the current operation has been stopped" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x024 9. " HALT ,Status bit, indicating the current Linked-List operation has been halted" "Not halted,Halted"
|
|
bitfld.long 0x024 8. " DONE ,Status bit, indicating the current Direct mode or Linked-list operation has completed successfully" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x024 7. " EX_PKT_ERR ,Indicates that requests other than sync packets have arrived for this channel and were dropped" "No error,Error"
|
|
bitfld.long 0x024 6. " PERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x024 5. " PAR_EN ,Enables an interrupt when a parity error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 4. " ERR_EN ,Enables an interrupt when a transfer error occurs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 3. " EX_PKT_EN ,Enables an interrupt if an extra packet error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 2. " STOP_EN ,Enables an interrupt when an operation has been stopped by STOP_REQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 1. " HALT_EN ,Enables an interrupt when an operation has been halted by HALT_REQ" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " DONE_EN ,Enables an interrupt when an operation has been completed successfully" "Disabled,Enabled"
|
|
line.long 0x028 "CH1_CRC_ADDR_M,Channel 1 CRC Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x028 0.--31. 1. " CRC_ADDR_MB ,Most significant CRC address bytes"
|
|
line.long 0x02c "CH1_CRC_ADDR_L,Channel 1 CRC Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x02c 0.--31. 1. " CRC_ADDR_LB ,Least significant CRC address bytes"
|
|
line.long 0x030 "CH1_CRC,Channel 1 CRC value"
|
|
hexmask.long.long 0x030 0.--31. 1. " CRC ,Indicates the current result of CRC calculation on DMA transferred data"
|
|
tree "Channel Source 1 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(1.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC1_ADDR_M,Channel 1 Source 1 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 1 address bytes"
|
|
line.long 0x044 "CH1_SRC1_ADDR_L,Channel 1 Source 1 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 1 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 1 address bit"
|
|
tree.end
|
|
tree "Channel Source 2 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(2.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC2_ADDR_M,Channel 1 Source 2 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 2 address bytes"
|
|
line.long 0x044 "CH1_SRC2_ADDR_L,Channel 1 Source 2 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 2 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 2 address bit"
|
|
tree.end
|
|
tree "Channel Source 3 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(3.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC3_ADDR_M,Channel 1 Source 3 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 3 address bytes"
|
|
line.long 0x044 "CH1_SRC3_ADDR_L,Channel 1 Source 3 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 3 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 3 address bit"
|
|
tree.end
|
|
tree "Channel Source 4 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(4.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC4_ADDR_M,Channel 1 Source 4 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 4 address bytes"
|
|
line.long 0x044 "CH1_SRC4_ADDR_L,Channel 1 Source 4 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 4 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 4 address bit"
|
|
tree.end
|
|
tree "Channel Source 5 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(5.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC5_ADDR_M,Channel 1 Source 5 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 5 address bytes"
|
|
line.long 0x044 "CH1_SRC5_ADDR_L,Channel 1 Source 5 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 5 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 5 address bit"
|
|
tree.end
|
|
tree "Channel Source 6 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(6.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC6_ADDR_M,Channel 1 Source 6 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 6 address bytes"
|
|
line.long 0x044 "CH1_SRC6_ADDR_L,Channel 1 Source 6 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 6 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 6 address bit"
|
|
tree.end
|
|
tree "Channel Source 7 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(7.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC7_ADDR_M,Channel 1 Source 7 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 7 address bytes"
|
|
line.long 0x044 "CH1_SRC7_ADDR_L,Channel 1 Source 7 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 7 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 7 address bit"
|
|
tree.end
|
|
tree "Channel Source 8 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(8.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC8_ADDR_M,Channel 1 Source 8 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 8 address bytes"
|
|
line.long 0x044 "CH1_SRC8_ADDR_L,Channel 1 Source 8 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 8 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 8 address bit"
|
|
tree.end
|
|
tree "Channel Source 9 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(9.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC9_ADDR_M,Channel 1 Source 9 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 9 address bytes"
|
|
line.long 0x044 "CH1_SRC9_ADDR_L,Channel 1 Source 9 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 9 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 9 address bit"
|
|
tree.end
|
|
tree "Channel Source 10 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(10.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC10_ADDR_M,Channel 1 Source 10 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 10 address bytes"
|
|
line.long 0x044 "CH1_SRC10_ADDR_L,Channel 1 Source 10 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 10 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 10 address bit"
|
|
tree.end
|
|
tree "Channel Source 11 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(11.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC11_ADDR_M,Channel 1 Source 11 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 11 address bytes"
|
|
line.long 0x044 "CH1_SRC11_ADDR_L,Channel 1 Source 11 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 11 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 11 address bit"
|
|
tree.end
|
|
tree "Channel Source 12 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(12.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC12_ADDR_M,Channel 1 Source 12 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 12 address bytes"
|
|
line.long 0x044 "CH1_SRC12_ADDR_L,Channel 1 Source 12 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 12 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 12 address bit"
|
|
tree.end
|
|
tree "Channel Source 13 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(13.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC13_ADDR_M,Channel 1 Source 13 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 13 address bytes"
|
|
line.long 0x044 "CH1_SRC13_ADDR_L,Channel 1 Source 13 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 13 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 13 address bit"
|
|
tree.end
|
|
tree "Channel Source 14 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(14.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC14_ADDR_M,Channel 1 Source 14 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 14 address bytes"
|
|
line.long 0x044 "CH1_SRC14_ADDR_L,Channel 1 Source 14 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 14 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 14 address bit"
|
|
tree.end
|
|
tree "Channel Source 15 Address Registers"
|
|
group asd:(0x5000+(0x100*1.)+(0x008*(15.-1)))++0x100
|
|
line.long 0x040 "CH1_SRC15_ADDR_M,Channel 1 Source 15 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 15 address bytes"
|
|
line.long 0x044 "CH1_SRC15_ADDR_L,Channel 1 Source 15 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 15 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 15 address bit"
|
|
tree.end
|
|
tree.end
|
|
tree "Channel 2"
|
|
group asd:(0x5000+(0x100*2.))++0x100
|
|
line.long 0x000 "CH2_SRC_ADDR_M,Channel 2 Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x000 0.--31. 1. " SRC_ADDR_MB ,Most significant word of the 8 byte source address"
|
|
line.long 0x004 "CH2_SRC_ADDR_L,Channel 2 Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x004 0.--31. 1. " SRC_ADDR_LB ,Least significant word of the 8 byte source address"
|
|
line.long 0x008 "CH2_DST_ADDR_M,Channel 2 Destination Address (Most Significant Bits)"
|
|
hexmask.long.long 0x008 0.--31. 1. " DST_ADDR_MB ,Most significant destination address bytes"
|
|
line.long 0x00c "CH2_DST_ADDR_L,Channel 2 Destination Address (Least Significant Bits)"
|
|
hexmask.long.long 0x00c 0.--31. 1. " DST_ADDR_LB ,Least significant destination address bytes"
|
|
line.long 0x010 "CH2_TCR1,Channel 2 Transfer Control Register 1"
|
|
bitfld.long 0x010 31. " XOR_WR_EN ,Enables XOR writing" "Disabled,Enabled"
|
|
bitfld.long 0x010 30. " CRC_EN ,Enables CRC calculating" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x010 24.--29. 1. " CRC_PORT ,Specifies source port for CRC Seed and Result"
|
|
bitfld.long 0x010 23. " CRC_WR_EN ,Enables CRC writing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x010 22. " READ_CRC_SEED ,Enables CRC read seed" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 16.--21. 1. " SRC_PORT ,Specifies ource port for source address"
|
|
textline " "
|
|
bitfld.long 0x010 15. " DIS_DMA_WR ,Disables writing of data in a DMA transfer" "Enabled,Disabled"
|
|
hexmask.long.byte 0x010 8.--13. 1. " DST_PORT ,Specifies destination port for results"
|
|
textline " "
|
|
bitfld.long 0x010 5. " DIRECT_FILL ,Direct fill" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 0.--3. 1. " DATA_BLOCKS ,Specifies the number of Data Blocks use for XOR Parity checking operations"
|
|
line.long 0x014 "CH2_TCR2,Channel 2 Transfer Control Register 2"
|
|
bitfld.long 0x014 31. " CRC_ORIENT ,Enables the 64 bit data stream used to generate the CRC value to be bit swapped, or re-orientated" "Disabled,Enabled"
|
|
bitfld.long 0x014 28.--29. " CRC_SWAP ,Specifies CRC swapping format for the final CRC that will be written to memory" "No swapping,Reserved,Reserved,Byte-word"
|
|
textline " "
|
|
bitfld.long 0x014 26.--27. " BURST_SIZE ,Specifies Burst size in DMA transfer" "8 byte,32 byte,128 byte,256 byte"
|
|
bitfld.long 0x014 24.--25. " SWAP ,Specifies Data swapping format" "No swapping,Byte,Word,Byte-word"
|
|
textline " "
|
|
hexmask.long.tbyte 0x014 0.--23. 1. " BC ,Specifies the Byte Count of an operation"
|
|
line.long 0x018 "CH2_ND_ADDR _M,Channel 2 Next Descriptor Address (Most Significant Bits)"
|
|
hexmask.long.long 0x018 0.--31. 1. " ND_ADDR_MB ,Most significant Next Descriptor Address bytes"
|
|
line.long 0x01c "CH2_ND_ADDR _L,Channel 2 Next Descriptor Address (Least Significant Bits)"
|
|
hexmask.long.long 0x01c 6.--31. 1. " ND_ADDR_LB ,Least significant Next Descriptor Address bits"
|
|
bitfld.long 0x01c 0. " LAST ,Indicates this is the last descriptor in Linked-List operation" "Clear,Set"
|
|
line.long 0x020 "CH2_ND_TCR,Channel 2 Next Descriptor Transfer Control"
|
|
bitfld.long 0x020 30.--31. " ND_SWAP ,Next Descriptor Swapping" "No swapping,Byte,Word,Byte-word"
|
|
hexmask.long.byte 0x020 24.--29. 1. " ND_PORT ,Specifies the SFN port from which the Next Descriptor should be read"
|
|
textline " "
|
|
hexmask.long.byte 0x020 16.--19. 1. " ND_DATA_BLOCKS ,Specifies the number of data blocks for which the Next Descriptor should be read"
|
|
line.long 0x024 "CH2_GCSR,Channel 2 General Control and Status Register"
|
|
bitfld.long 0x024 31. " GO ,Start/Resume operation" "Idle,Start"
|
|
bitfld.long 0x024 30. " CHAIN ,Enable a Linked-list operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 28.--29. " OP_CMD ,Specifies a operation command" "DMA transfer,XOR Operation,Memory Fill,Parity Checking"
|
|
bitfld.long 0x024 26. " STOP_REQ ,Write 1 to stop the current operation" "Idle,Stop"
|
|
textline " "
|
|
bitfld.long 0x024 25. " HALT_REQ ,Write 1 to halt the current linked-list operation" "Idle,Halt"
|
|
bitfld.long 0x024 24. " SOFT_RST ,Resets all state machines within this channel" "Idle,Reset"
|
|
textline " "
|
|
bitfld.long 0x024 23. " DACT ,Channel Status" "Inactive,Active"
|
|
hexmask.long.byte 0x024 12.--15. 1. " ERR_CODE ,Error Code"
|
|
textline " "
|
|
bitfld.long 0x024 11. " RESUME ,Resume chain by re-reading current descriptor" "Disabled,Enabled"
|
|
bitfld.long 0x024 10. " STOP ,Status bit, indicating the current operation has been stopped" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x024 9. " HALT ,Status bit, indicating the current Linked-List operation has been halted" "Not halted,Halted"
|
|
bitfld.long 0x024 8. " DONE ,Status bit, indicating the current Direct mode or Linked-list operation has completed successfully" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x024 7. " EX_PKT_ERR ,Indicates that requests other than sync packets have arrived for this channel and were dropped" "No error,Error"
|
|
bitfld.long 0x024 6. " PERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x024 5. " PAR_EN ,Enables an interrupt when a parity error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 4. " ERR_EN ,Enables an interrupt when a transfer error occurs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 3. " EX_PKT_EN ,Enables an interrupt if an extra packet error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 2. " STOP_EN ,Enables an interrupt when an operation has been stopped by STOP_REQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 1. " HALT_EN ,Enables an interrupt when an operation has been halted by HALT_REQ" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " DONE_EN ,Enables an interrupt when an operation has been completed successfully" "Disabled,Enabled"
|
|
line.long 0x028 "CH2_CRC_ADDR_M,Channel 2 CRC Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x028 0.--31. 1. " CRC_ADDR_MB ,Most significant CRC address bytes"
|
|
line.long 0x02c "CH2_CRC_ADDR_L,Channel 2 CRC Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x02c 0.--31. 1. " CRC_ADDR_LB ,Least significant CRC address bytes"
|
|
line.long 0x030 "CH2_CRC,Channel 2 CRC value"
|
|
hexmask.long.long 0x030 0.--31. 1. " CRC ,Indicates the current result of CRC calculation on DMA transferred data"
|
|
tree "Channel Source 1 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(1.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC1_ADDR_M,Channel 2 Source 1 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 1 address bytes"
|
|
line.long 0x044 "CH2_SRC1_ADDR_L,Channel 2 Source 1 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 1 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 1 address bit"
|
|
tree.end
|
|
tree "Channel Source 2 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(2.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC2_ADDR_M,Channel 2 Source 2 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 2 address bytes"
|
|
line.long 0x044 "CH2_SRC2_ADDR_L,Channel 2 Source 2 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 2 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 2 address bit"
|
|
tree.end
|
|
tree "Channel Source 3 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(3.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC3_ADDR_M,Channel 2 Source 3 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 3 address bytes"
|
|
line.long 0x044 "CH2_SRC3_ADDR_L,Channel 2 Source 3 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 3 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 3 address bit"
|
|
tree.end
|
|
tree "Channel Source 4 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(4.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC4_ADDR_M,Channel 2 Source 4 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 4 address bytes"
|
|
line.long 0x044 "CH2_SRC4_ADDR_L,Channel 2 Source 4 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 4 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 4 address bit"
|
|
tree.end
|
|
tree "Channel Source 5 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(5.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC5_ADDR_M,Channel 2 Source 5 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 5 address bytes"
|
|
line.long 0x044 "CH2_SRC5_ADDR_L,Channel 2 Source 5 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 5 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 5 address bit"
|
|
tree.end
|
|
tree "Channel Source 6 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(6.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC6_ADDR_M,Channel 2 Source 6 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 6 address bytes"
|
|
line.long 0x044 "CH2_SRC6_ADDR_L,Channel 2 Source 6 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 6 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 6 address bit"
|
|
tree.end
|
|
tree "Channel Source 7 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(7.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC7_ADDR_M,Channel 2 Source 7 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 7 address bytes"
|
|
line.long 0x044 "CH2_SRC7_ADDR_L,Channel 2 Source 7 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 7 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 7 address bit"
|
|
tree.end
|
|
tree "Channel Source 8 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(8.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC8_ADDR_M,Channel 2 Source 8 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 8 address bytes"
|
|
line.long 0x044 "CH2_SRC8_ADDR_L,Channel 2 Source 8 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 8 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 8 address bit"
|
|
tree.end
|
|
tree "Channel Source 9 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(9.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC9_ADDR_M,Channel 2 Source 9 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 9 address bytes"
|
|
line.long 0x044 "CH2_SRC9_ADDR_L,Channel 2 Source 9 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 9 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 9 address bit"
|
|
tree.end
|
|
tree "Channel Source 10 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(10.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC10_ADDR_M,Channel 2 Source 10 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 10 address bytes"
|
|
line.long 0x044 "CH2_SRC10_ADDR_L,Channel 2 Source 10 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 10 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 10 address bit"
|
|
tree.end
|
|
tree "Channel Source 11 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(11.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC11_ADDR_M,Channel 2 Source 11 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 11 address bytes"
|
|
line.long 0x044 "CH2_SRC11_ADDR_L,Channel 2 Source 11 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 11 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 11 address bit"
|
|
tree.end
|
|
tree "Channel Source 12 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(12.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC12_ADDR_M,Channel 2 Source 12 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 12 address bytes"
|
|
line.long 0x044 "CH2_SRC12_ADDR_L,Channel 2 Source 12 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 12 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 12 address bit"
|
|
tree.end
|
|
tree "Channel Source 13 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(13.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC13_ADDR_M,Channel 2 Source 13 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 13 address bytes"
|
|
line.long 0x044 "CH2_SRC13_ADDR_L,Channel 2 Source 13 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 13 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 13 address bit"
|
|
tree.end
|
|
tree "Channel Source 14 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(14.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC14_ADDR_M,Channel 2 Source 14 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 14 address bytes"
|
|
line.long 0x044 "CH2_SRC14_ADDR_L,Channel 2 Source 14 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 14 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 14 address bit"
|
|
tree.end
|
|
tree "Channel Source 15 Address Registers"
|
|
group asd:(0x5000+(0x100*2.)+(0x008*(15.-1)))++0x100
|
|
line.long 0x040 "CH2_SRC15_ADDR_M,Channel 2 Source 15 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 15 address bytes"
|
|
line.long 0x044 "CH2_SRC15_ADDR_L,Channel 2 Source 15 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 15 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 15 address bit"
|
|
tree.end
|
|
tree.end
|
|
tree "Channel 3"
|
|
group asd:(0x5000+(0x100*3.))++0x100
|
|
line.long 0x000 "CH3_SRC_ADDR_M,Channel 3 Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x000 0.--31. 1. " SRC_ADDR_MB ,Most significant word of the 8 byte source address"
|
|
line.long 0x004 "CH3_SRC_ADDR_L,Channel 3 Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x004 0.--31. 1. " SRC_ADDR_LB ,Least significant word of the 8 byte source address"
|
|
line.long 0x008 "CH3_DST_ADDR_M,Channel 3 Destination Address (Most Significant Bits)"
|
|
hexmask.long.long 0x008 0.--31. 1. " DST_ADDR_MB ,Most significant destination address bytes"
|
|
line.long 0x00c "CH3_DST_ADDR_L,Channel 3 Destination Address (Least Significant Bits)"
|
|
hexmask.long.long 0x00c 0.--31. 1. " DST_ADDR_LB ,Least significant destination address bytes"
|
|
line.long 0x010 "CH3_TCR1,Channel 3 Transfer Control Register 1"
|
|
bitfld.long 0x010 31. " XOR_WR_EN ,Enables XOR writing" "Disabled,Enabled"
|
|
bitfld.long 0x010 30. " CRC_EN ,Enables CRC calculating" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x010 24.--29. 1. " CRC_PORT ,Specifies source port for CRC Seed and Result"
|
|
bitfld.long 0x010 23. " CRC_WR_EN ,Enables CRC writing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x010 22. " READ_CRC_SEED ,Enables CRC read seed" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 16.--21. 1. " SRC_PORT ,Specifies ource port for source address"
|
|
textline " "
|
|
bitfld.long 0x010 15. " DIS_DMA_WR ,Disables writing of data in a DMA transfer" "Enabled,Disabled"
|
|
hexmask.long.byte 0x010 8.--13. 1. " DST_PORT ,Specifies destination port for results"
|
|
textline " "
|
|
bitfld.long 0x010 5. " DIRECT_FILL ,Direct fill" "Disabled,Enabled"
|
|
hexmask.long.byte 0x010 0.--3. 1. " DATA_BLOCKS ,Specifies the number of Data Blocks use for XOR Parity checking operations"
|
|
line.long 0x014 "CH3_TCR2,Channel 3 Transfer Control Register 2"
|
|
bitfld.long 0x014 31. " CRC_ORIENT ,Enables the 64 bit data stream used to generate the CRC value to be bit swapped, or re-orientated" "Disabled,Enabled"
|
|
bitfld.long 0x014 28.--29. " CRC_SWAP ,Specifies CRC swapping format for the final CRC that will be written to memory" "No swapping,Reserved,Reserved,Byte-word"
|
|
textline " "
|
|
bitfld.long 0x014 26.--27. " BURST_SIZE ,Specifies Burst size in DMA transfer" "8 byte,32 byte,128 byte,256 byte"
|
|
bitfld.long 0x014 24.--25. " SWAP ,Specifies Data swapping format" "No swapping,Byte,Word,Byte-word"
|
|
textline " "
|
|
hexmask.long.tbyte 0x014 0.--23. 1. " BC ,Specifies the Byte Count of an operation"
|
|
line.long 0x018 "CH3_ND_ADDR _M,Channel 3 Next Descriptor Address (Most Significant Bits)"
|
|
hexmask.long.long 0x018 0.--31. 1. " ND_ADDR_MB ,Most significant Next Descriptor Address bytes"
|
|
line.long 0x01c "CH3_ND_ADDR _L,Channel 3 Next Descriptor Address (Least Significant Bits)"
|
|
hexmask.long.long 0x01c 6.--31. 1. " ND_ADDR_LB ,Least significant Next Descriptor Address bits"
|
|
bitfld.long 0x01c 0. " LAST ,Indicates this is the last descriptor in Linked-List operation" "Clear,Set"
|
|
line.long 0x020 "CH3_ND_TCR,Channel 3 Next Descriptor Transfer Control"
|
|
bitfld.long 0x020 30.--31. " ND_SWAP ,Next Descriptor Swapping" "No swapping,Byte,Word,Byte-word"
|
|
hexmask.long.byte 0x020 24.--29. 1. " ND_PORT ,Specifies the SFN port from which the Next Descriptor should be read"
|
|
textline " "
|
|
hexmask.long.byte 0x020 16.--19. 1. " ND_DATA_BLOCKS ,Specifies the number of data blocks for which the Next Descriptor should be read"
|
|
line.long 0x024 "CH3_GCSR,Channel 3 General Control and Status Register"
|
|
bitfld.long 0x024 31. " GO ,Start/Resume operation" "Idle,Start"
|
|
bitfld.long 0x024 30. " CHAIN ,Enable a Linked-list operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 28.--29. " OP_CMD ,Specifies a operation command" "DMA transfer,XOR Operation,Memory Fill,Parity Checking"
|
|
bitfld.long 0x024 26. " STOP_REQ ,Write 1 to stop the current operation" "Idle,Stop"
|
|
textline " "
|
|
bitfld.long 0x024 25. " HALT_REQ ,Write 1 to halt the current linked-list operation" "Idle,Halt"
|
|
bitfld.long 0x024 24. " SOFT_RST ,Resets all state machines within this channel" "Idle,Reset"
|
|
textline " "
|
|
bitfld.long 0x024 23. " DACT ,Channel Status" "Inactive,Active"
|
|
hexmask.long.byte 0x024 12.--15. 1. " ERR_CODE ,Error Code"
|
|
textline " "
|
|
bitfld.long 0x024 11. " RESUME ,Resume chain by re-reading current descriptor" "Disabled,Enabled"
|
|
bitfld.long 0x024 10. " STOP ,Status bit, indicating the current operation has been stopped" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x024 9. " HALT ,Status bit, indicating the current Linked-List operation has been halted" "Not halted,Halted"
|
|
bitfld.long 0x024 8. " DONE ,Status bit, indicating the current Direct mode or Linked-list operation has completed successfully" "Not done,Done"
|
|
textline " "
|
|
bitfld.long 0x024 7. " EX_PKT_ERR ,Indicates that requests other than sync packets have arrived for this channel and were dropped" "No error,Error"
|
|
bitfld.long 0x024 6. " PERR ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x024 5. " PAR_EN ,Enables an interrupt when a parity error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 4. " ERR_EN ,Enables an interrupt when a transfer error occurs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 3. " EX_PKT_EN ,Enables an interrupt if an extra packet error occurs" "Disabled,Enabled"
|
|
bitfld.long 0x024 2. " STOP_EN ,Enables an interrupt when an operation has been stopped by STOP_REQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 1. " HALT_EN ,Enables an interrupt when an operation has been halted by HALT_REQ" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " DONE_EN ,Enables an interrupt when an operation has been completed successfully" "Disabled,Enabled"
|
|
line.long 0x028 "CH3_CRC_ADDR_M,Channel 3 CRC Source Address (Most Significant Bits)"
|
|
hexmask.long.long 0x028 0.--31. 1. " CRC_ADDR_MB ,Most significant CRC address bytes"
|
|
line.long 0x02c "CH3_CRC_ADDR_L,Channel 3 CRC Source Address (Least Significant Bits)"
|
|
hexmask.long.long 0x02c 0.--31. 1. " CRC_ADDR_LB ,Least significant CRC address bytes"
|
|
line.long 0x030 "CH3_CRC,Channel 3 CRC value"
|
|
hexmask.long.long 0x030 0.--31. 1. " CRC ,Indicates the current result of CRC calculation on DMA transferred data"
|
|
tree "Channel Source 1 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(1.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC1_ADDR_M,Channel 3 Source 1 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 1 address bytes"
|
|
line.long 0x044 "CH3_SRC1_ADDR_L,Channel 3 Source 1 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 1 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 1 address bit"
|
|
tree.end
|
|
tree "Channel Source 2 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(2.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC2_ADDR_M,Channel 3 Source 2 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 2 address bytes"
|
|
line.long 0x044 "CH3_SRC2_ADDR_L,Channel 3 Source 2 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 2 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 2 address bit"
|
|
tree.end
|
|
tree "Channel Source 3 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(3.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC3_ADDR_M,Channel 3 Source 3 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 3 address bytes"
|
|
line.long 0x044 "CH3_SRC3_ADDR_L,Channel 3 Source 3 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 3 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 3 address bit"
|
|
tree.end
|
|
tree "Channel Source 4 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(4.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC4_ADDR_M,Channel 3 Source 4 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 4 address bytes"
|
|
line.long 0x044 "CH3_SRC4_ADDR_L,Channel 3 Source 4 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 4 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 4 address bit"
|
|
tree.end
|
|
tree "Channel Source 5 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(5.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC5_ADDR_M,Channel 3 Source 5 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 5 address bytes"
|
|
line.long 0x044 "CH3_SRC5_ADDR_L,Channel 3 Source 5 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 5 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 5 address bit"
|
|
tree.end
|
|
tree "Channel Source 6 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(6.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC6_ADDR_M,Channel 3 Source 6 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 6 address bytes"
|
|
line.long 0x044 "CH3_SRC6_ADDR_L,Channel 3 Source 6 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 6 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 6 address bit"
|
|
tree.end
|
|
tree "Channel Source 7 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(7.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC7_ADDR_M,Channel 3 Source 7 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 7 address bytes"
|
|
line.long 0x044 "CH3_SRC7_ADDR_L,Channel 3 Source 7 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 7 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 7 address bit"
|
|
tree.end
|
|
tree "Channel Source 8 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(8.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC8_ADDR_M,Channel 3 Source 8 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 8 address bytes"
|
|
line.long 0x044 "CH3_SRC8_ADDR_L,Channel 3 Source 8 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 8 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 8 address bit"
|
|
tree.end
|
|
tree "Channel Source 9 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(9.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC9_ADDR_M,Channel 3 Source 9 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 9 address bytes"
|
|
line.long 0x044 "CH3_SRC9_ADDR_L,Channel 3 Source 9 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 9 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 9 address bit"
|
|
tree.end
|
|
tree "Channel Source 10 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(10.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC10_ADDR_M,Channel 3 Source 10 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 10 address bytes"
|
|
line.long 0x044 "CH3_SRC10_ADDR_L,Channel 3 Source 10 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 10 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 10 address bit"
|
|
tree.end
|
|
tree "Channel Source 11 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(11.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC11_ADDR_M,Channel 3 Source 11 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 11 address bytes"
|
|
line.long 0x044 "CH3_SRC11_ADDR_L,Channel 3 Source 11 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 11 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 11 address bit"
|
|
tree.end
|
|
tree "Channel Source 12 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(12.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC12_ADDR_M,Channel 3 Source 12 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 12 address bytes"
|
|
line.long 0x044 "CH3_SRC12_ADDR_L,Channel 3 Source 12 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 12 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 12 address bit"
|
|
tree.end
|
|
tree "Channel Source 13 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(13.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC13_ADDR_M,Channel 3 Source 13 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 13 address bytes"
|
|
line.long 0x044 "CH3_SRC13_ADDR_L,Channel 3 Source 13 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 13 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 13 address bit"
|
|
tree.end
|
|
tree "Channel Source 14 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(14.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC14_ADDR_M,Channel 3 Source 14 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 14 address bytes"
|
|
line.long 0x044 "CH3_SRC14_ADDR_L,Channel 3 Source 14 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 14 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 14 address bit"
|
|
tree.end
|
|
tree "Channel Source 15 Address Registers"
|
|
group asd:(0x5000+(0x100*3.)+(0x008*(15.-1)))++0x100
|
|
line.long 0x040 "CH3_SRC15_ADDR_M,Channel 3 Source 15 Address (Most Significant Bits)"
|
|
hexmask.long.long 0x040 0.--31. 1. " SRCy_ADDR_MB ,Most significant Source 15 address bytes"
|
|
line.long 0x044 "CH3_SRC15_ADDR_L,Channel 3 Source 15 Address (Least Significant Bits)"
|
|
hexmask.long.long 0x044 3.--31. 1. " SRCy_ADDR_LB ,Least significant Source 15 address bytes"
|
|
hexmask.long.byte 0x044 0.--2. 1. " SRCy_ADDR_LB[2:0] ,Least significant Source 15 address bit"
|
|
tree.end
|
|
tree.end
|
|
group asd:0x5000--0x5fff "SFN Gasket"
|
|
line.long 0x400 "DMA_SFN_SOFT_RST,SFN gasket software reset"
|
|
bitfld.long 0x400 0. " SFN_SOFT_RST ,DMA/XOR SFN Gasket Software Reset" "No Reset,Reset"
|
|
tree.end
|
|
tree "Peripheral Bus Interface"
|
|
group asd:0x0000--0x0fff
|
|
line.long 0x000 "EE_B0_ADDR,ROM Bank 0 Base Address"
|
|
hexmask.long.tbyte 0x000 8.--31. 1. " A[31:12] ,ROM Bank 0 base address"
|
|
line.long 0x010 "EE_B1_ADDR,ROM Bank 1 Base Address"
|
|
hexmask.long.tbyte 0x010 8.--31. 1. " A[31:12] ,ROM Bank 1 base address"
|
|
line.long 0x020 "EE_B2_ADDR,ROM Bank 2 Base Address"
|
|
hexmask.long.tbyte 0x020 8.--31. 1. " A[31:12] ,ROM Bank 2 base address"
|
|
line.long 0x030 "EE_B3_ADDR,ROM Bank 3 Base Address"
|
|
hexmask.long.tbyte 0x030 8.--31. 1. " A[31:12] ,ROM Bank 3 base address"
|
|
line.long 0x004 "EE_B0_MASK,ROM Bank 0 Base Address Compare Mask"
|
|
hexmask.long.tbyte 0x004 8.--31. 1. " M[35:12] ,ROM address mask"
|
|
line.long 0x014 "EE_B1_MASK,ROM Bank 1 Base Address Compare Mask"
|
|
hexmask.long.tbyte 0x014 8.--31. 1. " M[35:12] ,ROM address mask"
|
|
line.long 0x024 "EE_B2_MASK,ROM Bank 2 Base Address Compare Mask"
|
|
hexmask.long.tbyte 0x024 8.--31. 1. " M[35:12] ,ROM address mask"
|
|
line.long 0x034 "EE_B3_MASK,ROM Bank 3 Base Address Compare Mask"
|
|
hexmask.long.tbyte 0x034 8.--31. 1. " M[35:12] ,ROM address mask"
|
|
line.long 0x008 "EE_B0_CTRL0,ROM Bank 0 Timing and Control0"
|
|
bitfld.long 0x008 31. " BM ,Burst Mode" "Disabled,Enabled"
|
|
bitfld.long 0x008 30. " FWE ,Flash Write Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x008 24.--29. 1. " WAIT ,Wait time"
|
|
bitfld.long 0x008 22.--23. " CSON ,Chip select ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
textline " "
|
|
bitfld.long 0x008 20.--21. " OEON ,Output Enable ON Timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x008 18.--19. " WEON ,Write Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
hexmask.long.byte 0x008 12.--15. 1. " THRD ,Transfer hold on reads"
|
|
hexmask.long.byte 0x008 8.--11. 1. " THWR ,Transfer hold on writes"
|
|
textline " "
|
|
hexmask.long.byte 0x008 2.--7. 1. " FWT ,First Wait"
|
|
bitfld.long 0x008 0.--1. " WIDTH ,Bank width" "8 bit,16 bit,32 bit,Reserved"
|
|
line.long 0x018 "EE_B1_CTRL0,ROM Bank 1 Timing and Control0"
|
|
bitfld.long 0x018 31. " BM ,Burst Mode" "Disabled,Enabled"
|
|
bitfld.long 0x018 30. " FWE ,Flash Write Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x018 24.--29. 1. " WAIT ,Wait time"
|
|
bitfld.long 0x018 22.--23. " CSON ,Chip select ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
textline " "
|
|
bitfld.long 0x018 20.--21. " OEON ,Output Enable ON Timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x018 18.--19. " WEON ,Write Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
hexmask.long.byte 0x018 12.--15. 1. " THRD ,Transfer hold on reads"
|
|
hexmask.long.byte 0x018 8.--11. 1. " THWR ,Transfer hold on writes"
|
|
textline " "
|
|
hexmask.long.byte 0x018 2.--7. 1. " FWT ,First Wait"
|
|
bitfld.long 0x018 0.--1. " WIDTH ,Bank width" "8 bit,16 bit,32 bit,Reserved"
|
|
line.long 0x028 "EE_B2_CTRL0,ROM Bank 2 Timing and Control0"
|
|
bitfld.long 0x028 31. " BM ,Burst Mode" "Disabled,Enabled"
|
|
bitfld.long 0x028 30. " FWE ,Flash Write Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x028 24.--29. 1. " WAIT ,Wait time"
|
|
bitfld.long 0x028 22.--23. " CSON ,Chip select ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
textline " "
|
|
bitfld.long 0x028 20.--21. " OEON ,Output Enable ON Timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x028 18.--19. " WEON ,Write Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
hexmask.long.byte 0x028 12.--15. 1. " THRD ,Transfer hold on reads"
|
|
hexmask.long.byte 0x028 8.--11. 1. " THWR ,Transfer hold on writes"
|
|
textline " "
|
|
hexmask.long.byte 0x028 2.--7. 1. " FWT ,First Wait"
|
|
bitfld.long 0x028 0.--1. " WIDTH ,Bank width" "8 bit,16 bit,32 bit,Reserved"
|
|
line.long 0x038 "EE_B3_CTRL0,ROM Bank 3 Timing and Control0"
|
|
bitfld.long 0x038 31. " BM ,Burst Mode" "Disabled,Enabled"
|
|
bitfld.long 0x038 30. " FWE ,Flash Write Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x038 24.--29. 1. " WAIT ,Wait time"
|
|
bitfld.long 0x038 22.--23. " CSON ,Chip select ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
textline " "
|
|
bitfld.long 0x038 20.--21. " OEON ,Output Enable ON Timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x038 18.--19. " WEON ,Write Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
hexmask.long.byte 0x038 12.--15. 1. " THRD ,Transfer hold on reads"
|
|
hexmask.long.byte 0x038 8.--11. 1. " THWR ,Transfer hold on writes"
|
|
textline " "
|
|
hexmask.long.byte 0x038 2.--7. 1. " FWT ,First Wait"
|
|
bitfld.long 0x038 0.--1. " WIDTH ,Bank width" "8 bit,16 bit,32 bit,Reserved"
|
|
line.long 0x00c "EE_B0_CTRL1,ROM Bank 0 Timing and Control1"
|
|
bitfld.long 0x00c 31. " MODE ,Mode of operation" "Latch,Non-latch"
|
|
bitfld.long 0x00c 30. " ENABLE ,Bank Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00c 28.--29. " LE ,Latch Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x00c 26.--27. " LEHD ,Address Hold timing" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00c 25. " RE ,Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00c 24. " ARE ,Asynchronous Ready" "Synchronous,Asynchronous"
|
|
hexmask.long.byte 0x00c 16.--19. 1. " WEOFF ,Write Enable de-asserted x clock cycles prior to CS de-assertion"
|
|
bitfld.long 0x00c 13.--15. " PAGE ,Flash page size used for burst reads" "Reserved,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes"
|
|
line.long 0x01c "EE_B1_CTRL1,ROM Bank 1 Timing and Control1"
|
|
bitfld.long 0x01c 31. " MODE ,Mode of operation" "Latch,Non-latch"
|
|
bitfld.long 0x01c 30. " ENABLE ,Bank Enable" "Disabled,Enabled"
|
|
bitfld.long 0x01c 28.--29. " LE ,Latch Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x01c 26.--27. " LEHD ,Address Hold timing" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x01c 25. " RE ,Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x01c 24. " ARE ,Asynchronous Ready" "Synchronous,Asynchronous"
|
|
hexmask.long.byte 0x01c 16.--19. 1. " WEOFF ,Write Enable de-asserted x clock cycles prior to CS de-assertion"
|
|
bitfld.long 0x01c 13.--15. " PAGE ,Flash page size used for burst reads" "Reserved,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes"
|
|
line.long 0x02c "EE_B2_CTRL1,ROM Bank 2 Timing and Control1"
|
|
bitfld.long 0x02c 31. " MODE ,Mode of operation" "Latch,Non-latch"
|
|
bitfld.long 0x02c 30. " ENABLE ,Bank Enable" "Disabled,Enabled"
|
|
bitfld.long 0x02c 28.--29. " LE ,Latch Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x02c 26.--27. " LEHD ,Address Hold timing" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x02c 25. " RE ,Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x02c 24. " ARE ,Asynchronous Ready" "Synchronous,Asynchronous"
|
|
hexmask.long.byte 0x02c 16.--19. 1. " WEOFF ,Write Enable de-asserted x clock cycles prior to CS de-assertion"
|
|
bitfld.long 0x02c 13.--15. " PAGE ,Flash page size used for burst reads" "Reserved,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes"
|
|
line.long 0x03c "EE_B3_CTRL1,ROM Bank 3 Timing and Control1"
|
|
bitfld.long 0x03c 31. " MODE ,Mode of operation" "Latch,Non-latch"
|
|
bitfld.long 0x03c 30. " ENABLE ,Bank Enable" "Disabled,Enabled"
|
|
bitfld.long 0x03c 28.--29. " LE ,Latch Enable ON timing" "0 clocks,1 clock,2 clocks,3 clocks"
|
|
bitfld.long 0x03c 26.--27. " LEHD ,Address Hold timing" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x03c 25. " RE ,Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x03c 24. " ARE ,Asynchronous Ready" "Synchronous,Asynchronous"
|
|
hexmask.long.byte 0x03c 16.--19. 1. " WEOFF ,Write Enable de-asserted x clock cycles prior to CS de-assertion"
|
|
bitfld.long 0x03c 13.--15. " PAGE ,Flash page size used for burst reads" "Reserved,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes"
|
|
line.long 0x040 "PBI_SWAP_CTRL,PBI data swap control"
|
|
bitfld.long 0x040 0.--1. " DATA_SWAP ,PBI Data Swap Control Bits" "No Swapping,Byte,Word,Byte-Word"
|
|
line.long 0x044 "PBI_ERROR,PBI error status"
|
|
hexmask.long.byte 0x044 8.--15. 1. " ERR_MSG[7:0] ,PBI Error Message"
|
|
bitfld.long 0x044 1. " INT_EN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x044 0. " TEA ,PBI Error Status Bit" "No error,Error"
|
|
tree.end
|
|
tree "Gigabit Ethernet Controller"
|
|
tree "GIGE Conroller 0"
|
|
tree "PE-MCXMAC Registers"
|
|
group asd:(0x6000+(0x400*0.))++0x100
|
|
line.long 0x000 "MAC Configuration #1,MAC Configuration #1 Register"
|
|
bitfld.long 0x000 31. " SOFT RESET ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x000 30. " SIMULATION RESET ,Simulation Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x000 19. " RESET RX MAC CONTROL ,PERMC Receive MAC Control Block Reset" "No reset,Reset"
|
|
bitfld.long 0x000 18. " RESET TX MAC CONTROL ,PETMC Transmit MAC Control Block Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x000 17. " RESET RX FUNCTION ,PERFN Receive Function Block Reset" "No reset,Reset"
|
|
bitfld.long 0x000 16. " RESET TX FUNCTION ,PETFN Transmit Function Block Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x000 8. " LOOP BACK ,Loop back" "Disabled,Enabled"
|
|
bitfld.long 0x000 5. " RECEIVE FLOW CONTROL ENABLE ,Receive Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 4. " TRANSMIT FLOW CONTROL ENABLE ,Transmit Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 3. " SYNCHRONIZED RECEIVE ENABLE ,Synchronized Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 2. " RECEIVE ENABLE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 1. " SYNCHRONIZED TRANSMIT ,Transmit Enable synchronized to the transmit stream" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 0. " TRANSMIT ENABLE ,Transmit Enable" "Disabled,Enabled"
|
|
line.long 0x004 "MAC Configuration #2,MAC Configuration #2 Register"
|
|
hexmask.long.byte 0x004 12.--15. 1. " PREAMBLE LENGTH ,Preamble Length"
|
|
bitfld.long 0x004 8.--9. " INTERFACE MODE ,Interface Mode" "Reserved,Nibble Mode,Byte Mode,Reserved"
|
|
textline " "
|
|
bitfld.long 0x004 5. " HUGE FRAME ENABLE ,Huge Frame Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 4. " LENGTH FIELD CHECKING ,Length Field Checking Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 2. " PAD / CRC ENABLE ,PAD / CRC Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 1. " CRC ENABLE ,CRC Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 0. " FULL-DUPLEX ,Full Duplex Enable" "Half-duplex,Full-duplex"
|
|
line.long 0x008 "IPG / IFG,IPG / IFG Register"
|
|
hexmask.long.byte 0x008 24.--30. 1. " NON-BACK-TO-BACK INTER-PACKET-GAP PART 1 ,Non-Back-to-Back Inter-Packet-Gap Part 1"
|
|
textline " "
|
|
hexmask.long.byte 0x008 16.--22. 1. " NON-BACK-TO-BACK INTER-PACKET-GAP PART 2 ,Non-Back-to-Back Inter-Packet-Gap Part 2"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--15. 1. " MINIMUM IFG ENFORCEMENT ,Minimum IFG Enforcement"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--6. 1. " BACK-TO-BACK INTER-PACKET-GAP ,Back-to-Back Inter-Packet-Gap"
|
|
line.long 0x00c "Half-Duplex,Half-Duplex Configuration Register"
|
|
hexmask.long.byte 0x00c 20.--23. 1. " ALTERNATE BINARY EXPONENTIAL BACKOFF TRUNCATION ,Alternate Binary Exponential Backoff Truncation"
|
|
textline " "
|
|
bitfld.long 0x00c 19. " ALTERNATE BINARY EXPONENTIAL BACKOFF ENABLE ,Alternate Binary Exponential Backoff Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 18. " BACK PRESSURE NO BACKOFF ,Back Pressure No Backoff Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 17. " NO BACKOFF ,No Backoff" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 16. " EXCESSIVE DEFER ,Excessive Defer" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 12.--15. 1. " RETRANSMISSION MAXIMUM ,Number of retransmission attempts following a collision before aborting the packet"
|
|
textline " "
|
|
hexmask.long.word 0x00c 0.--9. 1. " COLLISION WINDOW ,Collision Window"
|
|
line.long 0x010 "Maximum Frame,Maximum Frame Length Register"
|
|
hexmask.long.word 0x010 0.--15. 1. " MAXIMUM FRAME LENGTH ,Maximum Frame Length"
|
|
line.long 0x01c "Test Register,Test Register"
|
|
bitfld.long 0x01c 3. " MAXIMUM BACKOFF ,Maximum Backoff Enable" "Disabled,Enabled"
|
|
bitfld.long 0x01c 2. " REGISTERED TRANSMIT FLOW ENABLE ,Register Transmit Half-Duplex Flow Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x01c 1. " TEST PAUSE ,Test Pause" "No Pause,Pause"
|
|
bitfld.long 0x01c 0. " SHORTCUT SLOT TIME ,Shortcut Slot Time" "Disabled,Enabled"
|
|
line.long 0x020 "MII Configuration,MII Management: Configuration"
|
|
bitfld.long 0x020 31. " RESET MII MGMT ,Reset MII MGMT" "No Reset,Reset"
|
|
bitfld.long 0x020 5. " SCAN INCREMENT ,Scan Increment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x020 4. " PREAMBLE SUPPRESSION ,Preamble Suppression" "Disabled,Enabled"
|
|
bitfld.long 0x020 0.--2. " MGMT CLOCK SELECT ,MGMT Clock Select" "Clock/4,Clock/4,Clock/6,Clock/8,Clock/10,Clock/14,Clock/20,Clock/28"
|
|
line.long 0x024 "MII Command,MII Management: Command"
|
|
bitfld.long 0x024 1. " SCAN CYCLE ,Scan Cycle" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " READ CYCLE ,Read Cycle" "Disabled,Enabled"
|
|
line.long 0x028 "MII Address,MII Management: Address"
|
|
hexmask.long.byte 0x028 8.--12. 1. " PHY ADDRESS ,PHY Address"
|
|
hexmask.long.byte 0x028 0.--4. 1. " REGISTER ADDRESS ,Register Address"
|
|
line.long 0x02c "MII Control,MII Management: Control"
|
|
hexmask.long.word 0x02c 0.--15. 1. " PHY CONTROL ,PHY Control"
|
|
line.long 0x030 "MII Status,MII Management: Status"
|
|
hexmask.long.word 0x030 0.--15. 1. " PHY CONTROL ,PHY Control"
|
|
line.long 0x034 "MII Indicators,MII Management: Indicators"
|
|
bitfld.long 0x034 2. " NOT VALID ,Read cycle has not completed yet" "Completed,Not completed"
|
|
bitfld.long 0x034 1. " SCANNING ,Scan operation in progress" "Idle,In progress"
|
|
textline " "
|
|
bitfld.long 0x034 0. " BUSY ,MII Management block Busy Status" "Idle,Busy"
|
|
line.long 0x038 "Unused,Unused Register"
|
|
line.long 0x03c "PHY Status,Interface PHY Support Status"
|
|
bitfld.long 0x03c 9. " EXCESS DEFER ,Excess Defer" "Clear,Set"
|
|
bitfld.long 0x03c 3. " LINK FAIL ,Link Fail" "Not Fail,Fail"
|
|
line.long 0x040 "Station Address #1,Station Address, Part 1"
|
|
hexmask.long.byte 0x040 24.--31. 1. " STATION ADDRESS 1st octet ,First octet of the station address"
|
|
hexmask.long.byte 0x040 16.--23. 1. " STATION ADDRESS 2nd octet ,Second octet of the station address"
|
|
textline " "
|
|
hexmask.long.byte 0x040 8.--15. 1. " STATION ADDRESS 3rd octet ,Third octet of the station address"
|
|
hexmask.long.byte 0x040 0.--7. 1. " STATION ADDRESS 4th octet ,Fourth octet of the station address"
|
|
line.long 0x044 "Station Address #2,Station Address, Part 2"
|
|
hexmask.long.byte 0x044 24.--31. 1. " STATION ADDRESS 5th octet ,Fifth octet of the station address"
|
|
hexmask.long.byte 0x044 16.--23. 1. " STATION ADDRESS 6th octet ,Sixth octet of the station address"
|
|
tree.end
|
|
tree "PE-MSTAT Registers"
|
|
group asd:(0x6000+(0x400*0.))++0x200
|
|
line.long 0x050 "TR64,Transmit and Receive 64 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x050 0.--17. 1. " TR64 ,Transmit and Receive 64 Byte Frame Counter"
|
|
line.long 0x054 "TR127,Transmit and Receive 65 to 127 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x054 0.--17. 1. " TR127 ,Transmit and Receive 65 to 127 Byte Frame Counter"
|
|
line.long 0x058 "TR255,Transmit and Receive 128 to 255 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x058 0.--17. 1. " TR255 ,Transmit and Receive 128 to 255 Byte Frame Counter"
|
|
line.long 0x05c "TR511,Transmit and Receive 256 to 511 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x05c 0.--17. 1. " TR511 ,Transmit and Receive 256 to 511 Byte Frame Counter"
|
|
line.long 0x060 "TR1K,Transmit and Receive 512 to 1023 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x060 0.--17. 1. " TR1K ,Transmit and Receive 512 to 1023 Byte Frame Counter"
|
|
line.long 0x064 "TRMAX,Transmit and Receive 1024 to 1518 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x064 0.--17. 1. " TRMAX ,Transmit and Receive 1024 to 1518 Byte Frame Counter"
|
|
line.long 0x068 "TRMGV,Transmit and Receive 1519 to 1522 Byte Good VLAN Frame Counter"
|
|
hexmask.long.tbyte 0x068 0.--17. 1. " TRMGV ,Transmit and Receive 1519 to 1522 Byte Good VLAN Frame Counter"
|
|
line.long 0x06c "RBYT,Receive Byte Counter"
|
|
hexmask.long.tbyte 0x06c 0.--23. 1. " RBYT ,Receive Byte Counter"
|
|
line.long 0x070 "RPKT,Receive Packet Counter"
|
|
hexmask.long.tbyte 0x070 0.--17. 1. " RPKT ,Receive Packet Counter"
|
|
line.long 0x074 "RFCS,Receive FCS Error Counter"
|
|
hexmask.long.tbyte 0x074 0.--11. 1. " RFCS ,Receive FCS Error Counter"
|
|
line.long 0x078 "RMCA,Receive Multicast Packet Counter"
|
|
hexmask.long.tbyte 0x078 0.--17. 1. " RMCA ,Receive Multicast Packet Counter"
|
|
line.long 0x07c "RBCA,Receive Broadcast Packet Counter"
|
|
hexmask.long.tbyte 0x07c 0.--17. 1. " RBCA ,Receive Broadcast Packet Counter"
|
|
line.long 0x080 "RXCF,Receive Control Frame Packet Counter"
|
|
hexmask.long.tbyte 0x080 0.--11. 1. " RXCF ,Receive Control Frame Packet Counter"
|
|
line.long 0x084 "RXPF,Receive PAUSE Frame Packet Counter"
|
|
hexmask.long.tbyte 0x084 0.--11. 1. " RXPF ,Receive PAUSE Frame Packet Counter"
|
|
line.long 0x088 "RXUO,Receive Unknown OP Code Counter"
|
|
hexmask.long.tbyte 0x088 0.--11. 1. " RXUO ,Receive Unknown OP Code Counter"
|
|
line.long 0x08c "RALN,Receive Alignment Error Counter"
|
|
hexmask.long.tbyte 0x08c 0.--11. 1. " RALN ,Receive Alignment Error Counter"
|
|
line.long 0x090 "RFLR,Receive Frame Length Error Counter"
|
|
hexmask.long.tbyte 0x090 0.--11. 1. " RFLR ,Receive Frame Length Error Counter"
|
|
line.long 0x094 "RCDE,Receive Code Error Counter"
|
|
hexmask.long.tbyte 0x094 0.--11. 1. " RCDE ,Receive Code Error Counter"
|
|
line.long 0x098 "RCSE,Receive Carrier Sense Error Counter"
|
|
hexmask.long.tbyte 0x098 0.--11. 1. " RCSE ,Receive Carrier Sense Error Counter"
|
|
line.long 0x09c "RUND,Receive Undersize Packet Counter"
|
|
hexmask.long.tbyte 0x09c 0.--11. 1. " RUND ,Receive Undersize Packet Counter"
|
|
line.long 0x0a0 "ROVR,Receive Oversize Packet Counter"
|
|
hexmask.long.tbyte 0x0a0 0.--11. 1. " ROVR ,Receive Oversize Packet Counter"
|
|
line.long 0x0a4 "RFRG,Receive Fragments Counter"
|
|
hexmask.long.tbyte 0x0a4 0.--11. 1. " RFRG ,Receive Fragments Counter"
|
|
line.long 0x0a8 "RJBR,Receive Jabber Counter"
|
|
hexmask.long.tbyte 0x0a8 0.--11. 1. " RJBR ,Receive Jabber Counter"
|
|
line.long 0x0ac "RDRP,Receive Drop"
|
|
hexmask.long.tbyte 0x0ac 0.--11. 1. " RDRP ,Receive Drop"
|
|
line.long 0x0b0 "TBYT,Transmit Byte Counter"
|
|
hexmask.long.tbyte 0x0b0 0.--23. 1. " TBYT ,Transmit Byte Counter"
|
|
line.long 0x0b4 "TPKT,Transmit Packet Counter"
|
|
hexmask.long.tbyte 0x0b4 0.--17. 1. " TPKT ,Transmit Packet Counter"
|
|
line.long 0x0b8 "TMCA,Transmit Multicast Packet Counter"
|
|
hexmask.long.tbyte 0x0b8 0.--17. 1. " TMCA ,Transmit Multicast Packet Counter"
|
|
line.long 0x0bc "TBCA,Transmit Broadcast Packet Counter"
|
|
hexmask.long.tbyte 0x0bc 0.--17. 1. " TBCA ,Transmit Broadcast Packet Counter"
|
|
line.long 0x0c0 "TXPF,Transmit PAUSE Control Frame Counter"
|
|
hexmask.long.tbyte 0x0c0 0.--11. 1. " TXPF ,Transmit PAUSE Control Frame Counter"
|
|
line.long 0x0c4 "TDFR,Transmit Deferral Packet Counter"
|
|
hexmask.long.tbyte 0x0c4 0.--11. 1. " TDFR ,Transmit Deferral Packet Counter"
|
|
line.long 0x0c8 "TEDF,Transmit Excessive Deferral Packet Counter"
|
|
hexmask.long.tbyte 0x0c8 0.--11. 1. " TEDF ,Transmit Excessive Deferral Packet Counter"
|
|
line.long 0x0cc "TSCL,Transmit Single Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0cc 0.--11. 1. " TSCL ,Transmit Single Collision Packet Counter"
|
|
line.long 0x0d0 "TMCL,Transmit Multiple Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0d0 0.--11. 1. " TMCL ,Transmit Multiple Collision Packet Counter"
|
|
line.long 0x0d4 "TLCL,Transmit Late Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0d4 0.--11. 1. " TLCL ,Transmit Late Collision Packet Counter"
|
|
line.long 0x0d8 "TXCL,Transmit Excessive Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0d8 0.--11. 1. " TXCL ,Transmit Excessive Collision Packet Counter"
|
|
line.long 0x0dc "TNCL,Transmit Total Collision Counter"
|
|
hexmask.long.tbyte 0x0dc 0.--12. 1. " TNCL ,Transmit Total Collision Counter"
|
|
line.long 0x0e0 "TPFH,Transmit PAUSE Frames Honored Counter"
|
|
hexmask.long.tbyte 0x0e0 0.--11. 1. " TPFH ,Transmit PAUSE Frames Honored Counter"
|
|
line.long 0x0e4 "TDRP,Transmit Drop Frame Counter"
|
|
hexmask.long.tbyte 0x0e4 0.--11. 1. " TDRP ,Transmit Drop Frame Counter"
|
|
line.long 0x0e8 "TJBR,Transmit Jabber Frame Counter"
|
|
hexmask.long.tbyte 0x0e8 0.--11. 1. " TJBR ,Transmit Jabber Frame Counter"
|
|
line.long 0x0ec "TFCS,Transmit FCS Error Counter"
|
|
hexmask.long.tbyte 0x0ec 0.--11. 1. " TFCS ,Transmit FCS Error Counter"
|
|
line.long 0x0f0 "TXCF,Transmit Control Frame Counter"
|
|
hexmask.long.tbyte 0x0f0 0.--11. 1. " TXCF ,Transmit Control Frame Counter"
|
|
line.long 0x0f4 "TOVR,Transmit Oversize Frame Counter"
|
|
hexmask.long.tbyte 0x0f4 0.--11. 1. " TOVR ,Transmit Oversize Frame Counter"
|
|
line.long 0x0f8 "TUND,Transmit Undersize Frame Counter"
|
|
hexmask.long.tbyte 0x0f8 0.--11. 1. " TUND ,Transmit Undersize Frame Counter"
|
|
line.long 0x0fc "TFRG,Transmit Fragments Frame Counter"
|
|
hexmask.long.tbyte 0x0fc 0.--11. 1. " TFRG ,Transmit Fragments Frame Counter"
|
|
line.long 0x100 "CAR1,Carry Register One Register"
|
|
bitfld.long 0x100 31. " TR64 ,Carry register 1 TR64 Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 30. " TR127 ,Carry register 1 TR127 Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 29. " TR255 ,Carry register 1 TR255 Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 28. " TR511 ,Carry register 1 TR511 Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 27. " TR1K ,Carry register 1 TR1K Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 26. " TRMAX ,Carry register 1 TRMAX Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 25. " TRMGV ,Carry register 1 TRMGV Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 16. " RBYT ,Carry register 1 RBYT Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 15. " RPKT ,Carry register 1 RPKT Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 14. " RFCS ,Carry register 1 RFCS Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 13. " RMCA ,Carry register 1 RMCA Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 12. " RBCA ,Carry register 1 RBCA Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 11. " RXCF ,Carry register 1 RXCF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 10. " RXPF ,Carry register 1 RXPF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 9. " RXUO ,Carry register 1 RXUO Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 8. " RALN ,Carry register 1 RALN Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 7. " RFLR ,Carry register 1 RFLR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 6. " RCDE ,Carry register 1 RCDE Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 5. " RCSE ,Carry register 1 RCSE Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 4. " RUND ,Carry register 1 RUND Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 3. " ROVR ,Carry register 1 ROVR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 2. " RFRG ,Carry register 1 RFRG Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 1. " RJBR ,Carry register 1 RJBR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 0. " RDRP ,Carry register 1 RDRP Counter Carry bit" "Clear,Set"
|
|
line.long 0x104 "CAR2,Carry Register Two Register"
|
|
bitfld.long 0x104 19. " TJBR ,Carry register 2 TJBR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 18. " TFCS ,Carry register 2 TFCS Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 17. " TXCF ,Carry register 2 TXCF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 16. " TOVR ,Carry register 2 TOVR Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 15. " TUND ,Carry register 2 TUND Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 14. " TFRG ,Carry register 2 TFRG Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 13. " TBYT ,Carry register 2 TBYT Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 12. " TPKT ,Carry register 2 TPKT Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 11. " TMCA ,Carry register 2 TMCA Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 10. " TBCA ,Carry register 2 TBCA Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 9. " TXPF ,Carry register 2 TXPF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 8. " TDFR ,Carry register 2 TDFR Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 7. " TEDF ,Carry register 2 TEDF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 6. " TSCL ,Carry register 2 TSCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 5. " TMCL ,Carry register 2 TMCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 4. " TLCL ,Carry register 2 TLCL Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 3. " TXCL ,Carry register 2 TXCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 2. " TNCL ,Carry register 2 TNCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 1. " TPFH ,Carry register 2 TPFH Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 0. " TDRP ,Carry register 2 TDRP Counter Carry bit" "Clear,Set"
|
|
line.long 0x108 "CAM1,Carry Register One Mask Register"
|
|
bitfld.long 0x108 31. " TR64 ,Mask register 1 TR64 Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 30. " TR127 ,Mask register 1 TR127 Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 29. " TR255 ,Mask register 1 TR255 Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 28. " TR511 ,Mask register 1 TR511 Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 27. " TR1K ,Mask register 1 TR1K Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 26. " TRMAX ,Mask register 1 TRMAX Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 25. " TRMGV ,Mask register 1 TRMGV Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 16. " RBYT ,Mask register 1 RBYT Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 15. " RPKT ,Mask register 1 RPKT Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 14. " RFCS ,Mask register 1 RFCS Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 13. " RMCA ,Mask register 1 RMCA Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 12. " RBCA ,Mask register 1 RBCA Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 11. " RXCF ,Mask register 1 RXCF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 10. " RXPF ,Mask register 1 RXPF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 9. " RXUO ,Mask register 1 RXUO Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 8. " RALN ,Mask register 1 RALN Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 7. " RFLR ,Mask register 1 RFLR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 6. " RCDE ,Mask register 1 RCDE Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 5. " RCSE ,Mask register 1 RCSE Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 4. " RUND ,Mask register 1 RUND Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 3. " ROVR ,Mask register 1 ROVR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 2. " RFRG ,Mask register 1 RFRG Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 1. " RJBR ,Mask register 1 RJBR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 0. " RDRP ,Mask register 1 RDRP Counter Carry bit Mask" "Clear,Set"
|
|
line.long 0x10c "CAM2,Carry Register Two Mask Register"
|
|
bitfld.long 0x10c 19. " TJBR ,Mask register 2 TJBR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 18. " TFCS ,Mask register 2 TFCS Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 17. " TXCF ,Mask register 2 TXCF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 16. " TOVR ,Mask register 2 TOVR Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 15. " TUND ,Mask register 2 TUND Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 14. " TFRG ,Mask register 2 TFRG Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 13. " TBYT ,Mask register 2 TBYT Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 12. " TPKT ,Mask register 2 TPKT Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 11. " TMCA ,Mask register 2 TMCA Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 10. " TBCA ,Mask register 2 TBCA Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 9. " TXPF ,Mask register 2 TXPF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 8. " TDFR ,Mask register 2 TDFR Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 7. " TEDF ,Mask register 2 TEDF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 6. " TSCL ,Mask register 2 TSCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 5. " TMCL ,Mask register 2 TMCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 4. " TLCL ,Mask register 2 TLCL Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 3. " TXCL ,Mask register 2 TXCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 2. " TNCL ,Mask register 2 TNCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 1. " TPFH ,Mask register 2 TPFH Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 0. " TDRP ,Mask register 2 TDRP Counter Carry bit Mask" "Clear,Set"
|
|
tree.end
|
|
tree "Ethernet Control Registers"
|
|
group asd:(0x6000+(0x400*0.))++0x400
|
|
line.long 0x200 "Port Control,Port Control Register"
|
|
bitfld.long 0x200 31. " SRT ,Status Reset" "No reset,Reset"
|
|
bitfld.long 0x200 30. " CLR ,Clear Statistics" "Idle,Clear"
|
|
textline " "
|
|
bitfld.long 0x200 29. " ZOR ,Zero On Read" "Not Cleared,Cleared"
|
|
bitfld.long 0x200 28. " STE ,Statistics Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 23. " TBI ,Ten Bit interface select" "Disabled,Enabled"
|
|
bitfld.long 0x200 22. " DIS ,Disable TX Code Group Outputs" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x200 21. " PRB ,PRBS Enable" "Disabled,Enabled"
|
|
bitfld.long 0x200 19. " RBC ,RBC Mode" "Half rate,Full rate"
|
|
textline " "
|
|
bitfld.long 0x200 18. " SPD ,Speed" "1000Mbit,10/100Mbit"
|
|
bitfld.long 0x200 16. " BPT ,Back Pressure Type" "Full duplex,Half duplex"
|
|
textline " "
|
|
bitfld.long 0x200 0. " PRI ,Port Priority" "Lowest,Highest"
|
|
line.long 0x204 "Port Int Status,Port Interrupt Status Register"
|
|
bitfld.long 0x204 31. " PIS ,Port Interrupt Status" "Clear,Set"
|
|
bitfld.long 0x204 30. " SFNEI ,SFN Error Interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 29. " RX_IDLE ,RX Idle (IDLE) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 28. " RX_ABT ,RX Abort (ABT) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 27. " RX_ERR ,RX Error (ERR) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 26. " RX_OVR ,RX Overrun (OVR) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 25. " RX_THR ,RX Threshold (THR) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 24. " RX_WAIT ,RX Wait (WAIT) interrupt (resource interrupt)" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 19. " RX_QUEUE[3] ,RX Queue interrupt" "Clear,Set"
|
|
bitfld.long 0x204 18. " RX_QUEUE[2] ,RX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 17. " RX_QUEUE[1] ,RX Queue interrupt" "Clear,Set"
|
|
bitfld.long 0x204 16. " RX_QUEUE[0] ,RX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 15. " STC ,Statistics Carry (STC) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 13. " TX_IDL ,TX Idle (IDL) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 12. " TX_ABT ,TX Abort (ABT) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 11. " TX_ERR ,TX Error (ERR) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 10. " TX_UNR ,TX Underrun (UNR) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 9. " TX_THR ,TX Threshold (THR) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 8. " TX_WAI ,TX Wait (WAI) interrupt (resource interrupt)" "Clear,Set"
|
|
bitfld.long 0x204 3. " TX_QUEUE[3] ,TX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 2. " TX_QUEUE[2] ,TX Queue interrupt" "Clear,Set"
|
|
bitfld.long 0x204 1. " TX_QUEUE[1] ,TX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 0. " TX_QUEUE[0] ,TX Queue interrupt" "Clear,Set"
|
|
line.long 0x208 "Port Interrupt Mask,Port Interrupt Mask Register"
|
|
bitfld.long 0x208 30. " SFN ,SFN Error interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 29. " RX_IDLE ,RX Idle (IDLE) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 28. " RX_ABT ,RX Abort (ABT) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 27. " RX_ERR ,RX Error (ERR) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 26. " RX_OVR ,RX Overrun (OVR) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 25. " RX_THR ,RX Threshold (THR) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 24. " RX_WAIT ,RX Wait (WAIT) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 19. " RX_QUEUE[3] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 18. " RX_QUEUE[2] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 17. " RX_QUEUE[1] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 16. " RX_QUEUE[0] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 15. " STC ,Statistics Carry (STC) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 13. " TX_IDL ,TX Idle (IDL) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 12. " TX_ABT ,TX Abort (ABT) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 11. " TX_ERR ,TX Error (ERR) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 10. " TX_UNR ,TX Underrun (UNR) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 9. " TX_THR ,TX Threshold (THR) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 8. " TX_WAI ,TX Wait (WAI) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 3. " TX_QUEUE[3] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 2. " TX_QUEUE[2] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 1. " TX_QUEUE[1] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 0. " TX_QUEUE[0] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
line.long 0x20c "SFN Status,SFN Status Register"
|
|
hexmask.long.byte 0x20c 24.--31. 1. " SFN ERROR COUNT ,SFN error count"
|
|
hexmask.long.tbyte 0x20c 0.--23. 1. " SFN RESPONSE HEADER ,SFN response header"
|
|
line.long 0x220 "TX Configuration,TX Configuration Register"
|
|
bitfld.long 0x220 31. " RST ,Reset" "No reset,Reset"
|
|
bitfld.long 0x220 23. " CHP ,Change Priority" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x220 22. " EHP ,Enable Higher Priority" "Disabled,Enabled"
|
|
bitfld.long 0x220 0.--1. " START_Q# ,Start Queue Number" "0,1,2,3"
|
|
line.long 0x224 "TX Control,TX Control Register"
|
|
bitfld.long 0x224 31. " EII ,Enable Idle Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x224 30. " ABT ,Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x224 29. " EAI ,Enable Abort Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x224 24. " MP ,Manual Pause" "Not paused,Paused"
|
|
textline " "
|
|
bitfld.long 0x224 15. " GO ,Frame Transmissions Enable" "Disabled,Enabled"
|
|
bitfld.long 0x224 3. " QUEUE[3] ,Queue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x224 2. " QUEUE[2] ,Queue Enable" "Disabled,Enabled"
|
|
bitfld.long 0x224 1. " QUEUE[1] ,Queue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x224 0. " QUEUE[0] ,Queue Enable" "Disabled,Enabled"
|
|
line.long 0x228 "TX Status,TX Status Register"
|
|
bitfld.long 0x228 27. " EOQ PENDING[3] ,End of Queue Pending" "Not terminated,Terminated"
|
|
bitfld.long 0x228 26. " EOQ PENDING[2] ,End of Queue Pending" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.long 0x228 25. " EOQ PENDING[1] ,End of Queue Pending" "Not terminated,Terminated"
|
|
bitfld.long 0x228 24. " EOQ PENDING[0] ,End of Queue Pending" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.long 0x228 19. " QUEUE IDLE[3] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x228 18. " QUEUE IDLE[2] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x228 17. " QUEUE IDLE[1] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x228 16. " QUEUE IDLE[0] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x228 15. " ACT ,Active" "Idle,Active"
|
|
bitfld.long 0x228 8.--9. " CUR_Q# ,Current Queue Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x228 3. " QUEUE USABLE[3] ,Queue Usable" "Disabled,Enabled"
|
|
bitfld.long 0x228 2. " QUEUE USABLE[2] ,Queue Usable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x228 1. " QUEUE USABLE[1] ,Queue Usable" "Disabled,Enabled"
|
|
bitfld.long 0x228 0. " QUEUE USABLE[0] ,Queue Usable" "Disabled,Enabled"
|
|
line.long 0x22c "TX Extended Status,TX Extended Status Register"
|
|
bitfld.long 0x22c 27. " ERROR FLAG[3] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x22c 26. " ERROR FLAG[2] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x22c 25. " ERROR FLAG[1] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x22c 24. " ERROR FLAG[0] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x22c 19. " DESC INT[3] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 18. " DESC INT[2] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 17. " DESC INT[1] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 16. " DESC INT[0] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 11. " END_OF_FRAME[3] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 10. " END_OF_FRAME[2] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 9. " END_OF_FRAME[1] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 8. " END_OF_FRAME[0] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 3. " END_OF_QUEUE[3] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 2. " END_OF_QUEUE[2] ,End of Queue Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 1. " END_OF_QUEUE[1] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 0. " END_OF_QUEUE[0] ,End of Queue Condition" "Not completed,Completed"
|
|
line.long 0x230 "TX Thresholds,TX Thresholds Register"
|
|
hexmask.long.byte 0x230 16.--23. 1. " STOP FILLING THRESHOLD ,Stop Filling Threshold"
|
|
hexmask.long.byte 0x230 0.--7. 1. " START SENDING THRESHOLD ,Start Sending Threshold"
|
|
line.long 0x234 "TX Priority Thresholds,TX Priority Thresholds Register"
|
|
hexmask.long.byte 0x234 0.--7. 1. " UNDERRUN PRIORITY THRESHOLD ,Underrun Priority Threshold"
|
|
line.long 0x240 "TX Queue Priority Map,TX Queue Priority Map Register"
|
|
hexmask.long.byte 0x240 28.--31. 1. " FRAME LIMIT QUEUE 3 ,Frame Limit Queue 3"
|
|
bitfld.long 0x240 27. " REVERT AFTER #3 ,Revert after # 3" "Q field,TX config"
|
|
textline " "
|
|
bitfld.long 0x240 24.--25. " NEXT QUEUE AFTER #3 ,Next Queue after #3" "0,1,2,3"
|
|
hexmask.long.byte 0x240 20.--23. 1. " FRAME LIMIT QUEUE 2 ,Frame Limit Queue 2"
|
|
textline " "
|
|
bitfld.long 0x240 19. " REVERT AFTER #2 ,Revert after # 2" "Q field,TX config"
|
|
bitfld.long 0x240 16.--17. " NEXT QUEUE AFTER #2 ,Next Queue after #2" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x240 12.--15. 1. " FRAME LIMIT QUEUE 1 ,Frame Limit Queue 1"
|
|
bitfld.long 0x240 11. " REVERT AFTER #1 ,Revert after # 1" "Q field,TX config"
|
|
textline " "
|
|
bitfld.long 0x240 8.--9. " NEXT QUEUE AFTER #1 ,Next Queue after #1" "0,1,2,3"
|
|
hexmask.long.byte 0x240 4.--7. 1. " FRAME LIMIT QUEUE 0 ,Frame Limit Queue 0"
|
|
textline " "
|
|
bitfld.long 0x240 3. " REVERT AFTER #0 ,Revert after # 0" "Q field,TX config"
|
|
bitfld.long 0x240 0.--1. " NEXT QUEUE AFTER #0 ,Next Queue after #0" "0,1,2,3"
|
|
line.long 0x248 "TX Pending Completion,TX Pending Completion Register"
|
|
hexmask.long.byte 0x248 24.--29. 1. " PENDING QUEUE 3 ,Pending Queue 3"
|
|
hexmask.long.byte 0x248 16.--21. 1. " PENDING QUEUE 2 ,Pending Queue 2"
|
|
textline " "
|
|
hexmask.long.byte 0x248 8.--13. 1. " PENDING QUEUE 1 ,Pending Queue 1"
|
|
hexmask.long.byte 0x248 0.--5. 1. " PENDING QUEUE 0 ,Pending Queue 0"
|
|
line.long 0x250 "TX Pause Count,TX Pause Count Register"
|
|
hexmask.long.word 0x250 0.--15. 1. " PAUSE COUNT ,Pause Count"
|
|
line.long 0x254 "TX Global VLAN Tag,TX Global VLAN Tag Register"
|
|
hexmask.long.long 0x254 0.--31. 1. " GLOBAL VAN TAG ,Global VAN Tag"
|
|
line.long 0x270 "TX Diagn Indirect Adr,TX Diagnostic Indirect Address Register"
|
|
bitfld.long 0x270 31. " AI ,Auto-increment Enable" "Disabled,Enabled"
|
|
bitfld.long 0x270 30. " DFR ,Do First Read" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x270 0.--6. 1. " INDEX ,Index"
|
|
line.long 0x274 "TX Diagn Indirect Data,TX Diagnostic Indirect Data Register"
|
|
hexmask.long.long 0x274 0.--31. 1. " DIAGNOSTIC DATA ,Diagnostic Data"
|
|
line.long 0x278 "TX Error Status,TX Error Status Register"
|
|
bitfld.long 0x278 31. " DER[3] ,Descriptor Error on Queue 3" "No error,Error"
|
|
bitfld.long 0x278 30. " TER[3] ,Read Timeout on Queue 3" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x278 29. " RER[3] ,Read Error on Queue 3" "No Error,Error"
|
|
bitfld.long 0x278 28. " TEA[3] ,Transaction Error Acknowledge in Queue 3" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x278 24.--27. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
bitfld.long 0x278 23. " DER[2] ,Descriptor Error on Queue 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 22. " TER[2] ,Read Timeout on Queue 2" "No timeout,Timeout"
|
|
bitfld.long 0x278 21. " RER[2] ,Read Error on Queue 2" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 20. " TEA[2] ,Transaction Error Acknowledge in Queue 2" "No Error,Error"
|
|
hexmask.long.byte 0x278 16.--19. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
textline " "
|
|
bitfld.long 0x278 15. " DER[1] ,Descriptor Error on Queue 1" "No error,Error"
|
|
bitfld.long 0x278 14. " TER[1] ,Read Timeout on Queue 1" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x278 13. " RER[1] ,Read Error on Queue 1" "No Error,Error"
|
|
bitfld.long 0x278 12. " TEA[1] ,Transaction Error Acknowledge in Queue 1" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x278 8.--11. 1. " TARGET ERROR[1] ,Target error response for Queue 1"
|
|
bitfld.long 0x278 7. " DER[0] ,Descriptor Error on Queue 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 6. " TER[0] ,Read Timeout on Queue 0" "No timeout,Timeout"
|
|
bitfld.long 0x278 5. " RER[0] ,Read Error on Queue 0" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 4. " TEA[0] ,Transaction Error Acknowledge in Queue 0" "No Error,Error"
|
|
hexmask.long.byte 0x278 0.--3. 1. " TARGET ERROR[0] ,Target error response for Queue 0"
|
|
line.long 0x280 "TX Queue 0 Configuration,TX Queue 0 Configuration Register"
|
|
bitfld.long 0x280 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x280 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x280 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x280 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x280 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x280 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x280 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x280 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x284 "TX Queue 0 Buffer Config,TX Queue 0 Buffer Configuration Register"
|
|
bitfld.long 0x284 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x284 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x284 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x284 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x288 "TX Queue 0 Pointer Low,TX Queue 0 Pointer Low Register"
|
|
hexmask.long.long 0x288 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x28c "TX Queue 0 Pointer High,TX Queue 0 Pointer High Register"
|
|
bitfld.long 0x28c 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x28c 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x290 "TX Queue 1 Configuration,TX Queue 1 Configuration Register"
|
|
bitfld.long 0x290 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x290 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x290 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x290 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x290 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x290 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x290 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x290 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x294 "TX Queue 1 Buffer Config,TX Queue 1 Buffer Configuration Register"
|
|
bitfld.long 0x294 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x294 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x294 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x294 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x298 "TX Queue 1 Pointer Low,TX Queue 1 Pointer Low Register"
|
|
hexmask.long.long 0x298 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x29c "TX Queue 1 Pointer High,TX Queue 1 Pointer High Register"
|
|
bitfld.long 0x29c 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x29c 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x2a0 "TX Queue 2 Configuration,TX Queue 2 Configuration Register"
|
|
bitfld.long 0x2a0 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x2a0 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a0 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x2a0 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a0 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x2a0 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a0 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x2a0 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2a4 "TX Queue 2 Buffer Config,TX Queue 2 Buffer Configuration Register"
|
|
bitfld.long 0x2a4 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x2a4 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a4 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x2a4 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2a8 "TX Queue 2 Pointer Low,TX Queue 2 Pointer Low Register"
|
|
hexmask.long.long 0x2a8 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x2ac "TX Queue 2 Pointer High,TX Queue 2 Pointer High Register"
|
|
bitfld.long 0x2ac 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x2ac 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x2b0 "TX Queue 3 Configuration,TX Queue 3 Configuration Register"
|
|
bitfld.long 0x2b0 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x2b0 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b0 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x2b0 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b0 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x2b0 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b0 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x2b0 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2b4 "TX Queue 3 Buffer Config,TX Queue 3 Buffer Configuration Register"
|
|
bitfld.long 0x2b4 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x2b4 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b4 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x2b4 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2b8 "TX Queue 3 Pointer Low,TX Queue 3 Pointer Low Register"
|
|
hexmask.long.long 0x2b8 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x2bc "TX Queue 3 Pointer High,TX Queue 3 Pointer High Register"
|
|
bitfld.long 0x2bc 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x2bc 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x320 "RX Configuration,RX Configuration Register"
|
|
bitfld.long 0x320 31. " RST ,Reset" "No reset,Reset"
|
|
bitfld.long 0x320 23. " CHP ,Change Priority" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x320 22. " APE ,Auto Pause Enable" "Disabled,Enabled"
|
|
bitfld.long 0x320 21. " ABF ,Allow Bad Frames" "Deny,Allow"
|
|
textline " "
|
|
bitfld.long 0x320 13. " SE ,Station Enable" "Disabled,Enabled"
|
|
bitfld.long 0x320 12. " UFE ,Station Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x320 11. " MFE ,Multicast Frame Enable" "Disabled,Enabled"
|
|
bitfld.long 0x320 10. " BFE ,Broadcast Frame Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x320 9. " EUF ,Enable Unicast Hash Filter" "Disabled,Enabled"
|
|
bitfld.long 0x320 8. " EMF ,Enable Multicast Hash Filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x320 0.--1. " DEF_Q# ,Default Queue Number" "0,1,2,3"
|
|
line.long 0x324 "RX Control,RX Control Register"
|
|
bitfld.long 0x324 31. " EII ,Enable Idle Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x324 30. " ABT ,Abort" "No abort,Abort"
|
|
textline " "
|
|
bitfld.long 0x324 29. " EAI ,Enable Abort Interrupt" "Disabled,Enabed"
|
|
bitfld.long 0x324 15. " GO ,Frame Receptions Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x324 3. " QUEUE[3] ,Queue Enable" "Disabled,Enabled"
|
|
bitfld.long 0x324 2. " QUEUE[2] ,Queue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x324 1. " QUEUE[1] ,Queue Enable" "Disabled,Enabled"
|
|
bitfld.long 0x324 0. " QUEUE[0] ,Queue Enable" "Disabled,Enabled"
|
|
line.long 0x328 "RX Status,RX Status Register"
|
|
bitfld.long 0x328 19. " QUEUE IDLE[3] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x328 18. " QUEUE IDLE[2] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x328 17. " QUEUE IDLE[1] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x328 16. " QUEUE IDLE[0] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x328 15. " ACT ,Active" "Idle,Active"
|
|
bitfld.long 0x328 14. " PRB ,Pseudo Random Bit Stream" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x328 8.--9. " CUR_Q# ,Current Queue Number" "0,1,2,3"
|
|
bitfld.long 0x328 3. " QUEUE USABLE[3] ,Queue Usable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x328 2. " QUEUE USABLE[2] ,Queue Usable" "Disabled,Enabled"
|
|
bitfld.long 0x328 1. " QUEUE USABLE[1] ,Queue Usable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x328 0. " QUEUE USABLE[0] ,Queue Usable" "Disabled,Enabled"
|
|
line.long 0x32c "RX Extended Status,RX Extended Status Register"
|
|
bitfld.long 0x32c 27. " ERROR FLAG[3] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x32c 26. " ERROR FLAG[2] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x32c 25. " ERROR FLAG[1] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x32c 24. " ERROR FLAG[0] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x32c 19. " DESC INT[3] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 18. " DESC INT[2] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 17. " DESC INT[1] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 16. " DESC INT[0] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 11. " END_OF_FRAME[3] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 10. " END_OF_FRAME[2] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 9. " END_OF_FRAME[1] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 8. " END_OF_FRAME[0] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 3. " END_OF_QUEUE[3] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 2. " END_OF_QUEUE[2] ,End of Queue Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 1. " END_OF_QUEUE[1] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 0. " END_OF_QUEUE[0] ,End of Queue Condition" "Not completed,Completed"
|
|
line.long 0x330 "RX Pause Thresholds,RX Pause Thresholds Register"
|
|
hexmask.long.word 0x330 16.--24. 1. " PAUSE THRESHOLD ,Pause Threshold"
|
|
hexmask.long.word 0x330 0.--8. 1. " UNPAUSE THRESHOLD ,Unpause Threshold"
|
|
line.long 0x334 "RX Thresholds,RX Thresholds Register"
|
|
hexmask.long.word 0x334 0.--8. 1. " OVERRUN WARNING THRESHOLD ,Overrun Warning Threshold"
|
|
line.long 0x340 "RX VLAN Tag Map,RX VLAN Tag Map Register"
|
|
bitfld.long 0x340 28.--29. " QUEUE#_TAG7 ,Queue # for Tag 7" "0,1,2,3"
|
|
bitfld.long 0x340 24.--25. " QUEUE#_TAG6 ,Queue # for Tag 6" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x340 20.--21. " QUEUE#_TAG5 ,Queue # for Tag 5" "0,1,2,3"
|
|
bitfld.long 0x340 16.--17. " QUEUE#_TAG4 ,Queue # for Tag 4" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x340 12.--13. " QUEUE#_TAG3 ,Queue # for Tag 3" "0,1,2,3"
|
|
bitfld.long 0x340 8.--9. " QUEUE#_TAG2 ,Queue # for Tag 2" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x340 4.--5. " QUEUE#_TAG1 ,Queue # for Tag 1" "0,1,2,3"
|
|
bitfld.long 0x340 0.--1. " QUEUE#_TAG0 ,Queue # for Tag 0" "0,1,2,3"
|
|
line.long 0x360 "RX Hash Table Indirect Ad,RX Hash Table Indirect Address Register"
|
|
bitfld.long 0x360 31. " AI ,Auto-increment Enable" "Disabled,Enabled"
|
|
bitfld.long 0x360 30. " DFR ,Do First Read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x360 4. " MCAD ,Mcad" "Unicast,Multicast"
|
|
hexmask.long.byte 0x360 0.--3. 1. " INDEX ,Index"
|
|
line.long 0x364 "RX Hash Table Indirect Da,RX Hash Table Indirect Data Register"
|
|
hexmask.long.long 0x364 0.--31. 1. " HASH TABLE DATA ,Hash Table Data"
|
|
line.long 0x370 "RX Diagn Indirect Adr,RX Diagnostic Indirect Address Register"
|
|
bitfld.long 0x370 31. " AI ,Auto-increment Enable" "Disabled,Enabled"
|
|
bitfld.long 0x370 30. " DFR ,Do First Read" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x370 0.--4. 1. " INDEX ,Index"
|
|
line.long 0x374 "RX Diagn Indirect Data,RX Diagnostic Indirect Data Register"
|
|
hexmask.long.long 0x374 0.--31. 1. " DIAGNOSTIC DATA ,Diagnostic data"
|
|
line.long 0x378 "RX Error Status,RX Error Status Register"
|
|
bitfld.long 0x378 31. " DER[3] ,Descriptor Error on Queue 3" "No error,Error"
|
|
bitfld.long 0x378 30. " TER[3] ,Read Timeout on Queue 3" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x378 29. " RER[3] ,Read Error on Queue 3" "No Error,Error"
|
|
bitfld.long 0x378 28. " TEA[3] ,Transaction Error Acknowledge in Queue 3" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x378 24.--27. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
bitfld.long 0x378 23. " DER[2] ,Descriptor Error on Queue 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 22. " TER[2] ,Read Timeout on Queue 2" "No timeout,Timeout"
|
|
bitfld.long 0x378 21. " RER[2] ,Read Error on Queue 2" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 20. " TEA[2] ,Transaction Error Acknowledge in Queue 2" "No Error,Error"
|
|
hexmask.long.byte 0x378 16.--19. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
textline " "
|
|
bitfld.long 0x378 15. " DER[1] ,Descriptor Error on Queue 1" "No error,Error"
|
|
bitfld.long 0x378 14. " TER[1] ,Read Timeout on Queue 1" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x378 13. " RER[1] ,Read Error on Queue 1" "No Error,Error"
|
|
bitfld.long 0x378 12. " TEA[1] ,Transaction Error Acknowledge in Queue 1" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x378 8.--11. 1. " TARGET ERROR[1] ,Target error response for Queue 1"
|
|
bitfld.long 0x378 7. " DER[0] ,Descriptor Error on Queue 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 6. " TER[0] ,Read Timeout on Queue 0" "No timeout,Timeout"
|
|
bitfld.long 0x378 5. " RER[0] ,Read Error on Queue 0" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 4. " TEA[0] ,Transaction Error Acknowledge in Queue 0" "No Error,Error"
|
|
hexmask.long.byte 0x378 0.--3. 1. " TARGET ERROR[0] ,Target error response for Queue 0"
|
|
line.long 0x380 "RX Queue 0 Configuration,rX Queue 0 Configuration Register"
|
|
bitfld.long 0x380 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x380 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x380 18. " ENI ,Enable EOQ Interrupt on a Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x380 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x380 16. " EEI ,Enable Interrupt on End Of Frame" "Disabled,Enabled"
|
|
bitfld.long 0x380 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
textline " "
|
|
hexmask.long.byte 0x380 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x384 "RX Queue 0 Buffer Config,RX Queue 0 Buffer Configuration Register"
|
|
bitfld.long 0x384 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x384 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x384 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x384 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x388 "RX Queue 0 Pointer Low,RX Queue 0 Pointer Low Register"
|
|
hexmask.long.long 0x388 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x38c "RX Queue 0 Pointer High,RX Queue 0 Pointer High Register"
|
|
bitfld.long 0x38c 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x38c 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
tree.end
|
|
tree.end
|
|
tree "GIGE Conroller 1"
|
|
tree "PE-MCXMAC Registers"
|
|
group asd:(0x6000+(0x400*1.))++0x100
|
|
line.long 0x000 "MAC Configuration #1,MAC Configuration #1 Register"
|
|
bitfld.long 0x000 31. " SOFT RESET ,Software Reset" "No reset,Reset"
|
|
bitfld.long 0x000 30. " SIMULATION RESET ,Simulation Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x000 19. " RESET RX MAC CONTROL ,PERMC Receive MAC Control Block Reset" "No reset,Reset"
|
|
bitfld.long 0x000 18. " RESET TX MAC CONTROL ,PETMC Transmit MAC Control Block Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x000 17. " RESET RX FUNCTION ,PERFN Receive Function Block Reset" "No reset,Reset"
|
|
bitfld.long 0x000 16. " RESET TX FUNCTION ,PETFN Transmit Function Block Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x000 8. " LOOP BACK ,Loop back" "Disabled,Enabled"
|
|
bitfld.long 0x000 5. " RECEIVE FLOW CONTROL ENABLE ,Receive Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 4. " TRANSMIT FLOW CONTROL ENABLE ,Transmit Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 3. " SYNCHRONIZED RECEIVE ENABLE ,Synchronized Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 2. " RECEIVE ENABLE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 1. " SYNCHRONIZED TRANSMIT ,Transmit Enable synchronized to the transmit stream" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 0. " TRANSMIT ENABLE ,Transmit Enable" "Disabled,Enabled"
|
|
line.long 0x004 "MAC Configuration #2,MAC Configuration #2 Register"
|
|
hexmask.long.byte 0x004 12.--15. 1. " PREAMBLE LENGTH ,Preamble Length"
|
|
bitfld.long 0x004 8.--9. " INTERFACE MODE ,Interface Mode" "Reserved,Nibble Mode,Byte Mode,Reserved"
|
|
textline " "
|
|
bitfld.long 0x004 5. " HUGE FRAME ENABLE ,Huge Frame Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 4. " LENGTH FIELD CHECKING ,Length Field Checking Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 2. " PAD / CRC ENABLE ,PAD / CRC Enable" "Disabled,Enabled"
|
|
bitfld.long 0x004 1. " CRC ENABLE ,CRC Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 0. " FULL-DUPLEX ,Full Duplex Enable" "Half-duplex,Full-duplex"
|
|
line.long 0x008 "IPG / IFG,IPG / IFG Register"
|
|
hexmask.long.byte 0x008 24.--30. 1. " NON-BACK-TO-BACK INTER-PACKET-GAP PART 1 ,Non-Back-to-Back Inter-Packet-Gap Part 1"
|
|
textline " "
|
|
hexmask.long.byte 0x008 16.--22. 1. " NON-BACK-TO-BACK INTER-PACKET-GAP PART 2 ,Non-Back-to-Back Inter-Packet-Gap Part 2"
|
|
textline " "
|
|
hexmask.long.byte 0x008 8.--15. 1. " MINIMUM IFG ENFORCEMENT ,Minimum IFG Enforcement"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--6. 1. " BACK-TO-BACK INTER-PACKET-GAP ,Back-to-Back Inter-Packet-Gap"
|
|
line.long 0x00c "Half-Duplex,Half-Duplex Configuration Register"
|
|
hexmask.long.byte 0x00c 20.--23. 1. " ALTERNATE BINARY EXPONENTIAL BACKOFF TRUNCATION ,Alternate Binary Exponential Backoff Truncation"
|
|
textline " "
|
|
bitfld.long 0x00c 19. " ALTERNATE BINARY EXPONENTIAL BACKOFF ENABLE ,Alternate Binary Exponential Backoff Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 18. " BACK PRESSURE NO BACKOFF ,Back Pressure No Backoff Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 17. " NO BACKOFF ,No Backoff" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 16. " EXCESSIVE DEFER ,Excessive Defer" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 12.--15. 1. " RETRANSMISSION MAXIMUM ,Number of retransmission attempts following a collision before aborting the packet"
|
|
textline " "
|
|
hexmask.long.word 0x00c 0.--9. 1. " COLLISION WINDOW ,Collision Window"
|
|
line.long 0x010 "Maximum Frame,Maximum Frame Length Register"
|
|
hexmask.long.word 0x010 0.--15. 1. " MAXIMUM FRAME LENGTH ,Maximum Frame Length"
|
|
line.long 0x01c "Test Register,Test Register"
|
|
bitfld.long 0x01c 3. " MAXIMUM BACKOFF ,Maximum Backoff Enable" "Disabled,Enabled"
|
|
bitfld.long 0x01c 2. " REGISTERED TRANSMIT FLOW ENABLE ,Register Transmit Half-Duplex Flow Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x01c 1. " TEST PAUSE ,Test Pause" "No Pause,Pause"
|
|
bitfld.long 0x01c 0. " SHORTCUT SLOT TIME ,Shortcut Slot Time" "Disabled,Enabled"
|
|
line.long 0x020 "MII Configuration,MII Management: Configuration"
|
|
bitfld.long 0x020 31. " RESET MII MGMT ,Reset MII MGMT" "No Reset,Reset"
|
|
bitfld.long 0x020 5. " SCAN INCREMENT ,Scan Increment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x020 4. " PREAMBLE SUPPRESSION ,Preamble Suppression" "Disabled,Enabled"
|
|
bitfld.long 0x020 0.--2. " MGMT CLOCK SELECT ,MGMT Clock Select" "Clock/4,Clock/4,Clock/6,Clock/8,Clock/10,Clock/14,Clock/20,Clock/28"
|
|
line.long 0x024 "MII Command,MII Management: Command"
|
|
bitfld.long 0x024 1. " SCAN CYCLE ,Scan Cycle" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " READ CYCLE ,Read Cycle" "Disabled,Enabled"
|
|
line.long 0x028 "MII Address,MII Management: Address"
|
|
hexmask.long.byte 0x028 8.--12. 1. " PHY ADDRESS ,PHY Address"
|
|
hexmask.long.byte 0x028 0.--4. 1. " REGISTER ADDRESS ,Register Address"
|
|
line.long 0x02c "MII Control,MII Management: Control"
|
|
hexmask.long.word 0x02c 0.--15. 1. " PHY CONTROL ,PHY Control"
|
|
line.long 0x030 "MII Status,MII Management: Status"
|
|
hexmask.long.word 0x030 0.--15. 1. " PHY CONTROL ,PHY Control"
|
|
line.long 0x034 "MII Indicators,MII Management: Indicators"
|
|
bitfld.long 0x034 2. " NOT VALID ,Read cycle has not completed yet" "Completed,Not completed"
|
|
bitfld.long 0x034 1. " SCANNING ,Scan operation in progress" "Idle,In progress"
|
|
textline " "
|
|
bitfld.long 0x034 0. " BUSY ,MII Management block Busy Status" "Idle,Busy"
|
|
line.long 0x038 "Unused,Unused Register"
|
|
line.long 0x03c "PHY Status,Interface PHY Support Status"
|
|
bitfld.long 0x03c 9. " EXCESS DEFER ,Excess Defer" "Clear,Set"
|
|
bitfld.long 0x03c 3. " LINK FAIL ,Link Fail" "Not Fail,Fail"
|
|
line.long 0x040 "Station Address #1,Station Address, Part 1"
|
|
hexmask.long.byte 0x040 24.--31. 1. " STATION ADDRESS 1st octet ,First octet of the station address"
|
|
hexmask.long.byte 0x040 16.--23. 1. " STATION ADDRESS 2nd octet ,Second octet of the station address"
|
|
textline " "
|
|
hexmask.long.byte 0x040 8.--15. 1. " STATION ADDRESS 3rd octet ,Third octet of the station address"
|
|
hexmask.long.byte 0x040 0.--7. 1. " STATION ADDRESS 4th octet ,Fourth octet of the station address"
|
|
line.long 0x044 "Station Address #2,Station Address, Part 2"
|
|
hexmask.long.byte 0x044 24.--31. 1. " STATION ADDRESS 5th octet ,Fifth octet of the station address"
|
|
hexmask.long.byte 0x044 16.--23. 1. " STATION ADDRESS 6th octet ,Sixth octet of the station address"
|
|
tree.end
|
|
tree "PE-MSTAT Registers"
|
|
group asd:(0x6000+(0x400*1.))++0x200
|
|
line.long 0x050 "TR64,Transmit and Receive 64 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x050 0.--17. 1. " TR64 ,Transmit and Receive 64 Byte Frame Counter"
|
|
line.long 0x054 "TR127,Transmit and Receive 65 to 127 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x054 0.--17. 1. " TR127 ,Transmit and Receive 65 to 127 Byte Frame Counter"
|
|
line.long 0x058 "TR255,Transmit and Receive 128 to 255 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x058 0.--17. 1. " TR255 ,Transmit and Receive 128 to 255 Byte Frame Counter"
|
|
line.long 0x05c "TR511,Transmit and Receive 256 to 511 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x05c 0.--17. 1. " TR511 ,Transmit and Receive 256 to 511 Byte Frame Counter"
|
|
line.long 0x060 "TR1K,Transmit and Receive 512 to 1023 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x060 0.--17. 1. " TR1K ,Transmit and Receive 512 to 1023 Byte Frame Counter"
|
|
line.long 0x064 "TRMAX,Transmit and Receive 1024 to 1518 Byte Frame Counter"
|
|
hexmask.long.tbyte 0x064 0.--17. 1. " TRMAX ,Transmit and Receive 1024 to 1518 Byte Frame Counter"
|
|
line.long 0x068 "TRMGV,Transmit and Receive 1519 to 1522 Byte Good VLAN Frame Counter"
|
|
hexmask.long.tbyte 0x068 0.--17. 1. " TRMGV ,Transmit and Receive 1519 to 1522 Byte Good VLAN Frame Counter"
|
|
line.long 0x06c "RBYT,Receive Byte Counter"
|
|
hexmask.long.tbyte 0x06c 0.--23. 1. " RBYT ,Receive Byte Counter"
|
|
line.long 0x070 "RPKT,Receive Packet Counter"
|
|
hexmask.long.tbyte 0x070 0.--17. 1. " RPKT ,Receive Packet Counter"
|
|
line.long 0x074 "RFCS,Receive FCS Error Counter"
|
|
hexmask.long.tbyte 0x074 0.--11. 1. " RFCS ,Receive FCS Error Counter"
|
|
line.long 0x078 "RMCA,Receive Multicast Packet Counter"
|
|
hexmask.long.tbyte 0x078 0.--17. 1. " RMCA ,Receive Multicast Packet Counter"
|
|
line.long 0x07c "RBCA,Receive Broadcast Packet Counter"
|
|
hexmask.long.tbyte 0x07c 0.--17. 1. " RBCA ,Receive Broadcast Packet Counter"
|
|
line.long 0x080 "RXCF,Receive Control Frame Packet Counter"
|
|
hexmask.long.tbyte 0x080 0.--11. 1. " RXCF ,Receive Control Frame Packet Counter"
|
|
line.long 0x084 "RXPF,Receive PAUSE Frame Packet Counter"
|
|
hexmask.long.tbyte 0x084 0.--11. 1. " RXPF ,Receive PAUSE Frame Packet Counter"
|
|
line.long 0x088 "RXUO,Receive Unknown OP Code Counter"
|
|
hexmask.long.tbyte 0x088 0.--11. 1. " RXUO ,Receive Unknown OP Code Counter"
|
|
line.long 0x08c "RALN,Receive Alignment Error Counter"
|
|
hexmask.long.tbyte 0x08c 0.--11. 1. " RALN ,Receive Alignment Error Counter"
|
|
line.long 0x090 "RFLR,Receive Frame Length Error Counter"
|
|
hexmask.long.tbyte 0x090 0.--11. 1. " RFLR ,Receive Frame Length Error Counter"
|
|
line.long 0x094 "RCDE,Receive Code Error Counter"
|
|
hexmask.long.tbyte 0x094 0.--11. 1. " RCDE ,Receive Code Error Counter"
|
|
line.long 0x098 "RCSE,Receive Carrier Sense Error Counter"
|
|
hexmask.long.tbyte 0x098 0.--11. 1. " RCSE ,Receive Carrier Sense Error Counter"
|
|
line.long 0x09c "RUND,Receive Undersize Packet Counter"
|
|
hexmask.long.tbyte 0x09c 0.--11. 1. " RUND ,Receive Undersize Packet Counter"
|
|
line.long 0x0a0 "ROVR,Receive Oversize Packet Counter"
|
|
hexmask.long.tbyte 0x0a0 0.--11. 1. " ROVR ,Receive Oversize Packet Counter"
|
|
line.long 0x0a4 "RFRG,Receive Fragments Counter"
|
|
hexmask.long.tbyte 0x0a4 0.--11. 1. " RFRG ,Receive Fragments Counter"
|
|
line.long 0x0a8 "RJBR,Receive Jabber Counter"
|
|
hexmask.long.tbyte 0x0a8 0.--11. 1. " RJBR ,Receive Jabber Counter"
|
|
line.long 0x0ac "RDRP,Receive Drop"
|
|
hexmask.long.tbyte 0x0ac 0.--11. 1. " RDRP ,Receive Drop"
|
|
line.long 0x0b0 "TBYT,Transmit Byte Counter"
|
|
hexmask.long.tbyte 0x0b0 0.--23. 1. " TBYT ,Transmit Byte Counter"
|
|
line.long 0x0b4 "TPKT,Transmit Packet Counter"
|
|
hexmask.long.tbyte 0x0b4 0.--17. 1. " TPKT ,Transmit Packet Counter"
|
|
line.long 0x0b8 "TMCA,Transmit Multicast Packet Counter"
|
|
hexmask.long.tbyte 0x0b8 0.--17. 1. " TMCA ,Transmit Multicast Packet Counter"
|
|
line.long 0x0bc "TBCA,Transmit Broadcast Packet Counter"
|
|
hexmask.long.tbyte 0x0bc 0.--17. 1. " TBCA ,Transmit Broadcast Packet Counter"
|
|
line.long 0x0c0 "TXPF,Transmit PAUSE Control Frame Counter"
|
|
hexmask.long.tbyte 0x0c0 0.--11. 1. " TXPF ,Transmit PAUSE Control Frame Counter"
|
|
line.long 0x0c4 "TDFR,Transmit Deferral Packet Counter"
|
|
hexmask.long.tbyte 0x0c4 0.--11. 1. " TDFR ,Transmit Deferral Packet Counter"
|
|
line.long 0x0c8 "TEDF,Transmit Excessive Deferral Packet Counter"
|
|
hexmask.long.tbyte 0x0c8 0.--11. 1. " TEDF ,Transmit Excessive Deferral Packet Counter"
|
|
line.long 0x0cc "TSCL,Transmit Single Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0cc 0.--11. 1. " TSCL ,Transmit Single Collision Packet Counter"
|
|
line.long 0x0d0 "TMCL,Transmit Multiple Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0d0 0.--11. 1. " TMCL ,Transmit Multiple Collision Packet Counter"
|
|
line.long 0x0d4 "TLCL,Transmit Late Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0d4 0.--11. 1. " TLCL ,Transmit Late Collision Packet Counter"
|
|
line.long 0x0d8 "TXCL,Transmit Excessive Collision Packet Counter"
|
|
hexmask.long.tbyte 0x0d8 0.--11. 1. " TXCL ,Transmit Excessive Collision Packet Counter"
|
|
line.long 0x0dc "TNCL,Transmit Total Collision Counter"
|
|
hexmask.long.tbyte 0x0dc 0.--12. 1. " TNCL ,Transmit Total Collision Counter"
|
|
line.long 0x0e0 "TPFH,Transmit PAUSE Frames Honored Counter"
|
|
hexmask.long.tbyte 0x0e0 0.--11. 1. " TPFH ,Transmit PAUSE Frames Honored Counter"
|
|
line.long 0x0e4 "TDRP,Transmit Drop Frame Counter"
|
|
hexmask.long.tbyte 0x0e4 0.--11. 1. " TDRP ,Transmit Drop Frame Counter"
|
|
line.long 0x0e8 "TJBR,Transmit Jabber Frame Counter"
|
|
hexmask.long.tbyte 0x0e8 0.--11. 1. " TJBR ,Transmit Jabber Frame Counter"
|
|
line.long 0x0ec "TFCS,Transmit FCS Error Counter"
|
|
hexmask.long.tbyte 0x0ec 0.--11. 1. " TFCS ,Transmit FCS Error Counter"
|
|
line.long 0x0f0 "TXCF,Transmit Control Frame Counter"
|
|
hexmask.long.tbyte 0x0f0 0.--11. 1. " TXCF ,Transmit Control Frame Counter"
|
|
line.long 0x0f4 "TOVR,Transmit Oversize Frame Counter"
|
|
hexmask.long.tbyte 0x0f4 0.--11. 1. " TOVR ,Transmit Oversize Frame Counter"
|
|
line.long 0x0f8 "TUND,Transmit Undersize Frame Counter"
|
|
hexmask.long.tbyte 0x0f8 0.--11. 1. " TUND ,Transmit Undersize Frame Counter"
|
|
line.long 0x0fc "TFRG,Transmit Fragments Frame Counter"
|
|
hexmask.long.tbyte 0x0fc 0.--11. 1. " TFRG ,Transmit Fragments Frame Counter"
|
|
line.long 0x100 "CAR1,Carry Register One Register"
|
|
bitfld.long 0x100 31. " TR64 ,Carry register 1 TR64 Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 30. " TR127 ,Carry register 1 TR127 Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 29. " TR255 ,Carry register 1 TR255 Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 28. " TR511 ,Carry register 1 TR511 Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 27. " TR1K ,Carry register 1 TR1K Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 26. " TRMAX ,Carry register 1 TRMAX Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 25. " TRMGV ,Carry register 1 TRMGV Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 16. " RBYT ,Carry register 1 RBYT Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 15. " RPKT ,Carry register 1 RPKT Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 14. " RFCS ,Carry register 1 RFCS Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 13. " RMCA ,Carry register 1 RMCA Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 12. " RBCA ,Carry register 1 RBCA Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 11. " RXCF ,Carry register 1 RXCF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 10. " RXPF ,Carry register 1 RXPF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 9. " RXUO ,Carry register 1 RXUO Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 8. " RALN ,Carry register 1 RALN Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 7. " RFLR ,Carry register 1 RFLR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 6. " RCDE ,Carry register 1 RCDE Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 5. " RCSE ,Carry register 1 RCSE Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 4. " RUND ,Carry register 1 RUND Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x100 3. " ROVR ,Carry register 1 ROVR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 2. " RFRG ,Carry register 1 RFRG Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 1. " RJBR ,Carry register 1 RJBR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x100 0. " RDRP ,Carry register 1 RDRP Counter Carry bit" "Clear,Set"
|
|
line.long 0x104 "CAR2,Carry Register Two Register"
|
|
bitfld.long 0x104 19. " TJBR ,Carry register 2 TJBR Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 18. " TFCS ,Carry register 2 TFCS Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 17. " TXCF ,Carry register 2 TXCF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 16. " TOVR ,Carry register 2 TOVR Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 15. " TUND ,Carry register 2 TUND Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 14. " TFRG ,Carry register 2 TFRG Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 13. " TBYT ,Carry register 2 TBYT Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 12. " TPKT ,Carry register 2 TPKT Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 11. " TMCA ,Carry register 2 TMCA Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 10. " TBCA ,Carry register 2 TBCA Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 9. " TXPF ,Carry register 2 TXPF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 8. " TDFR ,Carry register 2 TDFR Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 7. " TEDF ,Carry register 2 TEDF Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 6. " TSCL ,Carry register 2 TSCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 5. " TMCL ,Carry register 2 TMCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 4. " TLCL ,Carry register 2 TLCL Counter Carry bit" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x104 3. " TXCL ,Carry register 2 TXCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 2. " TNCL ,Carry register 2 TNCL Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 1. " TPFH ,Carry register 2 TPFH Counter Carry bit" "Clear,Set"
|
|
bitfld.long 0x104 0. " TDRP ,Carry register 2 TDRP Counter Carry bit" "Clear,Set"
|
|
line.long 0x108 "CAM1,Carry Register One Mask Register"
|
|
bitfld.long 0x108 31. " TR64 ,Mask register 1 TR64 Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 30. " TR127 ,Mask register 1 TR127 Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 29. " TR255 ,Mask register 1 TR255 Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 28. " TR511 ,Mask register 1 TR511 Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 27. " TR1K ,Mask register 1 TR1K Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 26. " TRMAX ,Mask register 1 TRMAX Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 25. " TRMGV ,Mask register 1 TRMGV Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 16. " RBYT ,Mask register 1 RBYT Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 15. " RPKT ,Mask register 1 RPKT Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 14. " RFCS ,Mask register 1 RFCS Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 13. " RMCA ,Mask register 1 RMCA Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 12. " RBCA ,Mask register 1 RBCA Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 11. " RXCF ,Mask register 1 RXCF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 10. " RXPF ,Mask register 1 RXPF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 9. " RXUO ,Mask register 1 RXUO Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 8. " RALN ,Mask register 1 RALN Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 7. " RFLR ,Mask register 1 RFLR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 6. " RCDE ,Mask register 1 RCDE Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 5. " RCSE ,Mask register 1 RCSE Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 4. " RUND ,Mask register 1 RUND Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x108 3. " ROVR ,Mask register 1 ROVR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 2. " RFRG ,Mask register 1 RFRG Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 1. " RJBR ,Mask register 1 RJBR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x108 0. " RDRP ,Mask register 1 RDRP Counter Carry bit Mask" "Clear,Set"
|
|
line.long 0x10c "CAM2,Carry Register Two Mask Register"
|
|
bitfld.long 0x10c 19. " TJBR ,Mask register 2 TJBR Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 18. " TFCS ,Mask register 2 TFCS Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 17. " TXCF ,Mask register 2 TXCF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 16. " TOVR ,Mask register 2 TOVR Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 15. " TUND ,Mask register 2 TUND Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 14. " TFRG ,Mask register 2 TFRG Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 13. " TBYT ,Mask register 2 TBYT Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 12. " TPKT ,Mask register 2 TPKT Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 11. " TMCA ,Mask register 2 TMCA Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 10. " TBCA ,Mask register 2 TBCA Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 9. " TXPF ,Mask register 2 TXPF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 8. " TDFR ,Mask register 2 TDFR Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 7. " TEDF ,Mask register 2 TEDF Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 6. " TSCL ,Mask register 2 TSCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 5. " TMCL ,Mask register 2 TMCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 4. " TLCL ,Mask register 2 TLCL Counter Carry bit Mask" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x10c 3. " TXCL ,Mask register 2 TXCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 2. " TNCL ,Mask register 2 TNCL Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 1. " TPFH ,Mask register 2 TPFH Counter Carry bit Mask" "Clear,Set"
|
|
bitfld.long 0x10c 0. " TDRP ,Mask register 2 TDRP Counter Carry bit Mask" "Clear,Set"
|
|
tree.end
|
|
tree "Ethernet Control Registers"
|
|
group asd:(0x6000+(0x400*1.))++0x400
|
|
line.long 0x200 "Port Control,Port Control Register"
|
|
bitfld.long 0x200 31. " SRT ,Status Reset" "No reset,Reset"
|
|
bitfld.long 0x200 30. " CLR ,Clear Statistics" "Idle,Clear"
|
|
textline " "
|
|
bitfld.long 0x200 29. " ZOR ,Zero On Read" "Not Cleared,Cleared"
|
|
bitfld.long 0x200 28. " STE ,Statistics Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 23. " TBI ,Ten Bit interface select" "Disabled,Enabled"
|
|
bitfld.long 0x200 22. " DIS ,Disable TX Code Group Outputs" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x200 21. " PRB ,PRBS Enable" "Disabled,Enabled"
|
|
bitfld.long 0x200 19. " RBC ,RBC Mode" "Half rate,Full rate"
|
|
textline " "
|
|
bitfld.long 0x200 18. " SPD ,Speed" "1000Mbit,10/100Mbit"
|
|
bitfld.long 0x200 16. " BPT ,Back Pressure Type" "Full duplex,Half duplex"
|
|
textline " "
|
|
bitfld.long 0x200 0. " PRI ,Port Priority" "Lowest,Highest"
|
|
line.long 0x204 "Port Int Status,Port Interrupt Status Register"
|
|
bitfld.long 0x204 31. " PIS ,Port Interrupt Status" "Clear,Set"
|
|
bitfld.long 0x204 30. " SFNEI ,SFN Error Interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 29. " RX_IDLE ,RX Idle (IDLE) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 28. " RX_ABT ,RX Abort (ABT) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 27. " RX_ERR ,RX Error (ERR) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 26. " RX_OVR ,RX Overrun (OVR) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 25. " RX_THR ,RX Threshold (THR) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 24. " RX_WAIT ,RX Wait (WAIT) interrupt (resource interrupt)" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 19. " RX_QUEUE[3] ,RX Queue interrupt" "Clear,Set"
|
|
bitfld.long 0x204 18. " RX_QUEUE[2] ,RX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 17. " RX_QUEUE[1] ,RX Queue interrupt" "Clear,Set"
|
|
bitfld.long 0x204 16. " RX_QUEUE[0] ,RX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 15. " STC ,Statistics Carry (STC) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 13. " TX_IDL ,TX Idle (IDL) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 12. " TX_ABT ,TX Abort (ABT) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 11. " TX_ERR ,TX Error (ERR) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 10. " TX_UNR ,TX Underrun (UNR) interrupt" "Clear,Set"
|
|
bitfld.long 0x204 9. " TX_THR ,TX Threshold (THR) interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 8. " TX_WAI ,TX Wait (WAI) interrupt (resource interrupt)" "Clear,Set"
|
|
bitfld.long 0x204 3. " TX_QUEUE[3] ,TX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 2. " TX_QUEUE[2] ,TX Queue interrupt" "Clear,Set"
|
|
bitfld.long 0x204 1. " TX_QUEUE[1] ,TX Queue interrupt" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x204 0. " TX_QUEUE[0] ,TX Queue interrupt" "Clear,Set"
|
|
line.long 0x208 "Port Interrupt Mask,Port Interrupt Mask Register"
|
|
bitfld.long 0x208 30. " SFN ,SFN Error interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 29. " RX_IDLE ,RX Idle (IDLE) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 28. " RX_ABT ,RX Abort (ABT) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 27. " RX_ERR ,RX Error (ERR) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 26. " RX_OVR ,RX Overrun (OVR) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 25. " RX_THR ,RX Threshold (THR) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 24. " RX_WAIT ,RX Wait (WAIT) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 19. " RX_QUEUE[3] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 18. " RX_QUEUE[2] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 17. " RX_QUEUE[1] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 16. " RX_QUEUE[0] ,RX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 15. " STC ,Statistics Carry (STC) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 13. " TX_IDL ,TX Idle (IDL) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 12. " TX_ABT ,TX Abort (ABT) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 11. " TX_ERR ,TX Error (ERR) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 10. " TX_UNR ,TX Underrun (UNR) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 9. " TX_THR ,TX Threshold (THR) interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 8. " TX_WAI ,TX Wait (WAI) interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 3. " TX_QUEUE[3] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 2. " TX_QUEUE[2] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x208 1. " TX_QUEUE[1] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x208 0. " TX_QUEUE[0] ,TX Queue interrupt mask" "Not masked,Masked"
|
|
line.long 0x20c "SFN Status,SFN Status Register"
|
|
hexmask.long.byte 0x20c 24.--31. 1. " SFN ERROR COUNT ,SFN error count"
|
|
hexmask.long.tbyte 0x20c 0.--23. 1. " SFN RESPONSE HEADER ,SFN response header"
|
|
line.long 0x220 "TX Configuration,TX Configuration Register"
|
|
bitfld.long 0x220 31. " RST ,Reset" "No reset,Reset"
|
|
bitfld.long 0x220 23. " CHP ,Change Priority" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x220 22. " EHP ,Enable Higher Priority" "Disabled,Enabled"
|
|
bitfld.long 0x220 0.--1. " START_Q# ,Start Queue Number" "0,1,2,3"
|
|
line.long 0x224 "TX Control,TX Control Register"
|
|
bitfld.long 0x224 31. " EII ,Enable Idle Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x224 30. " ABT ,Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x224 29. " EAI ,Enable Abort Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x224 24. " MP ,Manual Pause" "Not paused,Paused"
|
|
textline " "
|
|
bitfld.long 0x224 15. " GO ,Frame Transmissions Enable" "Disabled,Enabled"
|
|
bitfld.long 0x224 3. " QUEUE[3] ,Queue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x224 2. " QUEUE[2] ,Queue Enable" "Disabled,Enabled"
|
|
bitfld.long 0x224 1. " QUEUE[1] ,Queue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x224 0. " QUEUE[0] ,Queue Enable" "Disabled,Enabled"
|
|
line.long 0x228 "TX Status,TX Status Register"
|
|
bitfld.long 0x228 27. " EOQ PENDING[3] ,End of Queue Pending" "Not terminated,Terminated"
|
|
bitfld.long 0x228 26. " EOQ PENDING[2] ,End of Queue Pending" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.long 0x228 25. " EOQ PENDING[1] ,End of Queue Pending" "Not terminated,Terminated"
|
|
bitfld.long 0x228 24. " EOQ PENDING[0] ,End of Queue Pending" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.long 0x228 19. " QUEUE IDLE[3] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x228 18. " QUEUE IDLE[2] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x228 17. " QUEUE IDLE[1] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x228 16. " QUEUE IDLE[0] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x228 15. " ACT ,Active" "Idle,Active"
|
|
bitfld.long 0x228 8.--9. " CUR_Q# ,Current Queue Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x228 3. " QUEUE USABLE[3] ,Queue Usable" "Disabled,Enabled"
|
|
bitfld.long 0x228 2. " QUEUE USABLE[2] ,Queue Usable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x228 1. " QUEUE USABLE[1] ,Queue Usable" "Disabled,Enabled"
|
|
bitfld.long 0x228 0. " QUEUE USABLE[0] ,Queue Usable" "Disabled,Enabled"
|
|
line.long 0x22c "TX Extended Status,TX Extended Status Register"
|
|
bitfld.long 0x22c 27. " ERROR FLAG[3] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x22c 26. " ERROR FLAG[2] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x22c 25. " ERROR FLAG[1] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x22c 24. " ERROR FLAG[0] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x22c 19. " DESC INT[3] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 18. " DESC INT[2] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 17. " DESC INT[1] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 16. " DESC INT[0] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 11. " END_OF_FRAME[3] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 10. " END_OF_FRAME[2] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 9. " END_OF_FRAME[1] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 8. " END_OF_FRAME[0] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 3. " END_OF_QUEUE[3] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 2. " END_OF_QUEUE[2] ,End of Queue Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x22c 1. " END_OF_QUEUE[1] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x22c 0. " END_OF_QUEUE[0] ,End of Queue Condition" "Not completed,Completed"
|
|
line.long 0x230 "TX Thresholds,TX Thresholds Register"
|
|
hexmask.long.byte 0x230 16.--23. 1. " STOP FILLING THRESHOLD ,Stop Filling Threshold"
|
|
hexmask.long.byte 0x230 0.--7. 1. " START SENDING THRESHOLD ,Start Sending Threshold"
|
|
line.long 0x234 "TX Priority Thresholds,TX Priority Thresholds Register"
|
|
hexmask.long.byte 0x234 0.--7. 1. " UNDERRUN PRIORITY THRESHOLD ,Underrun Priority Threshold"
|
|
line.long 0x240 "TX Queue Priority Map,TX Queue Priority Map Register"
|
|
hexmask.long.byte 0x240 28.--31. 1. " FRAME LIMIT QUEUE 3 ,Frame Limit Queue 3"
|
|
bitfld.long 0x240 27. " REVERT AFTER #3 ,Revert after # 3" "Q field,TX config"
|
|
textline " "
|
|
bitfld.long 0x240 24.--25. " NEXT QUEUE AFTER #3 ,Next Queue after #3" "0,1,2,3"
|
|
hexmask.long.byte 0x240 20.--23. 1. " FRAME LIMIT QUEUE 2 ,Frame Limit Queue 2"
|
|
textline " "
|
|
bitfld.long 0x240 19. " REVERT AFTER #2 ,Revert after # 2" "Q field,TX config"
|
|
bitfld.long 0x240 16.--17. " NEXT QUEUE AFTER #2 ,Next Queue after #2" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x240 12.--15. 1. " FRAME LIMIT QUEUE 1 ,Frame Limit Queue 1"
|
|
bitfld.long 0x240 11. " REVERT AFTER #1 ,Revert after # 1" "Q field,TX config"
|
|
textline " "
|
|
bitfld.long 0x240 8.--9. " NEXT QUEUE AFTER #1 ,Next Queue after #1" "0,1,2,3"
|
|
hexmask.long.byte 0x240 4.--7. 1. " FRAME LIMIT QUEUE 0 ,Frame Limit Queue 0"
|
|
textline " "
|
|
bitfld.long 0x240 3. " REVERT AFTER #0 ,Revert after # 0" "Q field,TX config"
|
|
bitfld.long 0x240 0.--1. " NEXT QUEUE AFTER #0 ,Next Queue after #0" "0,1,2,3"
|
|
line.long 0x248 "TX Pending Completion,TX Pending Completion Register"
|
|
hexmask.long.byte 0x248 24.--29. 1. " PENDING QUEUE 3 ,Pending Queue 3"
|
|
hexmask.long.byte 0x248 16.--21. 1. " PENDING QUEUE 2 ,Pending Queue 2"
|
|
textline " "
|
|
hexmask.long.byte 0x248 8.--13. 1. " PENDING QUEUE 1 ,Pending Queue 1"
|
|
hexmask.long.byte 0x248 0.--5. 1. " PENDING QUEUE 0 ,Pending Queue 0"
|
|
line.long 0x250 "TX Pause Count,TX Pause Count Register"
|
|
hexmask.long.word 0x250 0.--15. 1. " PAUSE COUNT ,Pause Count"
|
|
line.long 0x254 "TX Global VLAN Tag,TX Global VLAN Tag Register"
|
|
hexmask.long.long 0x254 0.--31. 1. " GLOBAL VAN TAG ,Global VAN Tag"
|
|
line.long 0x270 "TX Diagn Indirect Adr,TX Diagnostic Indirect Address Register"
|
|
bitfld.long 0x270 31. " AI ,Auto-increment Enable" "Disabled,Enabled"
|
|
bitfld.long 0x270 30. " DFR ,Do First Read" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x270 0.--6. 1. " INDEX ,Index"
|
|
line.long 0x274 "TX Diagn Indirect Data,TX Diagnostic Indirect Data Register"
|
|
hexmask.long.long 0x274 0.--31. 1. " DIAGNOSTIC DATA ,Diagnostic Data"
|
|
line.long 0x278 "TX Error Status,TX Error Status Register"
|
|
bitfld.long 0x278 31. " DER[3] ,Descriptor Error on Queue 3" "No error,Error"
|
|
bitfld.long 0x278 30. " TER[3] ,Read Timeout on Queue 3" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x278 29. " RER[3] ,Read Error on Queue 3" "No Error,Error"
|
|
bitfld.long 0x278 28. " TEA[3] ,Transaction Error Acknowledge in Queue 3" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x278 24.--27. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
bitfld.long 0x278 23. " DER[2] ,Descriptor Error on Queue 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 22. " TER[2] ,Read Timeout on Queue 2" "No timeout,Timeout"
|
|
bitfld.long 0x278 21. " RER[2] ,Read Error on Queue 2" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 20. " TEA[2] ,Transaction Error Acknowledge in Queue 2" "No Error,Error"
|
|
hexmask.long.byte 0x278 16.--19. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
textline " "
|
|
bitfld.long 0x278 15. " DER[1] ,Descriptor Error on Queue 1" "No error,Error"
|
|
bitfld.long 0x278 14. " TER[1] ,Read Timeout on Queue 1" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x278 13. " RER[1] ,Read Error on Queue 1" "No Error,Error"
|
|
bitfld.long 0x278 12. " TEA[1] ,Transaction Error Acknowledge in Queue 1" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x278 8.--11. 1. " TARGET ERROR[1] ,Target error response for Queue 1"
|
|
bitfld.long 0x278 7. " DER[0] ,Descriptor Error on Queue 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 6. " TER[0] ,Read Timeout on Queue 0" "No timeout,Timeout"
|
|
bitfld.long 0x278 5. " RER[0] ,Read Error on Queue 0" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x278 4. " TEA[0] ,Transaction Error Acknowledge in Queue 0" "No Error,Error"
|
|
hexmask.long.byte 0x278 0.--3. 1. " TARGET ERROR[0] ,Target error response for Queue 0"
|
|
line.long 0x280 "TX Queue 0 Configuration,TX Queue 0 Configuration Register"
|
|
bitfld.long 0x280 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x280 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x280 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x280 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x280 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x280 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x280 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x280 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x284 "TX Queue 0 Buffer Config,TX Queue 0 Buffer Configuration Register"
|
|
bitfld.long 0x284 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x284 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x284 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x284 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x288 "TX Queue 0 Pointer Low,TX Queue 0 Pointer Low Register"
|
|
hexmask.long.long 0x288 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x28c "TX Queue 0 Pointer High,TX Queue 0 Pointer High Register"
|
|
bitfld.long 0x28c 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x28c 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x290 "TX Queue 1 Configuration,TX Queue 1 Configuration Register"
|
|
bitfld.long 0x290 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x290 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x290 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x290 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x290 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x290 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x290 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x290 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x294 "TX Queue 1 Buffer Config,TX Queue 1 Buffer Configuration Register"
|
|
bitfld.long 0x294 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x294 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x294 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x294 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x298 "TX Queue 1 Pointer Low,TX Queue 1 Pointer Low Register"
|
|
hexmask.long.long 0x298 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x29c "TX Queue 1 Pointer High,TX Queue 1 Pointer High Register"
|
|
bitfld.long 0x29c 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x29c 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x2a0 "TX Queue 2 Configuration,TX Queue 2 Configuration Register"
|
|
bitfld.long 0x2a0 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x2a0 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a0 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x2a0 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a0 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x2a0 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a0 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x2a0 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2a4 "TX Queue 2 Buffer Config,TX Queue 2 Buffer Configuration Register"
|
|
bitfld.long 0x2a4 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x2a4 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2a4 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x2a4 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2a8 "TX Queue 2 Pointer Low,TX Queue 2 Pointer Low Register"
|
|
hexmask.long.long 0x2a8 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x2ac "TX Queue 2 Pointer High,TX Queue 2 Pointer High Register"
|
|
bitfld.long 0x2ac 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x2ac 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x2b0 "TX Queue 3 Configuration,TX Queue 3 Configuration Register"
|
|
bitfld.long 0x2b0 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x2b0 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b0 18. " ENI ,Enable EOQ Interrupt on Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x2b0 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b0 16. " EEI ,Enable Interrupt on EOF" "Disabled,Enabled"
|
|
bitfld.long 0x2b0 15. " GVI ,GLOBAL VLAN Insert" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b0 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
hexmask.long.byte 0x2b0 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2b4 "TX Queue 3 Buffer Config,TX Queue 3 Buffer Configuration Register"
|
|
bitfld.long 0x2b4 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x2b4 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2b4 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x2b4 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x2b8 "TX Queue 3 Pointer Low,TX Queue 3 Pointer Low Register"
|
|
hexmask.long.long 0x2b8 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x2bc "TX Queue 3 Pointer High,TX Queue 3 Pointer High Register"
|
|
bitfld.long 0x2bc 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x2bc 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
line.long 0x320 "RX Configuration,RX Configuration Register"
|
|
bitfld.long 0x320 31. " RST ,Reset" "No reset,Reset"
|
|
bitfld.long 0x320 23. " CHP ,Change Priority" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x320 22. " APE ,Auto Pause Enable" "Disabled,Enabled"
|
|
bitfld.long 0x320 21. " ABF ,Allow Bad Frames" "Deny,Allow"
|
|
textline " "
|
|
bitfld.long 0x320 13. " SE ,Station Enable" "Disabled,Enabled"
|
|
bitfld.long 0x320 12. " UFE ,Station Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x320 11. " MFE ,Multicast Frame Enable" "Disabled,Enabled"
|
|
bitfld.long 0x320 10. " BFE ,Broadcast Frame Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x320 9. " EUF ,Enable Unicast Hash Filter" "Disabled,Enabled"
|
|
bitfld.long 0x320 8. " EMF ,Enable Multicast Hash Filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x320 0.--1. " DEF_Q# ,Default Queue Number" "0,1,2,3"
|
|
line.long 0x324 "RX Control,RX Control Register"
|
|
bitfld.long 0x324 31. " EII ,Enable Idle Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x324 30. " ABT ,Abort" "No abort,Abort"
|
|
textline " "
|
|
bitfld.long 0x324 29. " EAI ,Enable Abort Interrupt" "Disabled,Enabed"
|
|
bitfld.long 0x324 15. " GO ,Frame Receptions Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x324 3. " QUEUE[3] ,Queue Enable" "Disabled,Enabled"
|
|
bitfld.long 0x324 2. " QUEUE[2] ,Queue Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x324 1. " QUEUE[1] ,Queue Enable" "Disabled,Enabled"
|
|
bitfld.long 0x324 0. " QUEUE[0] ,Queue Enable" "Disabled,Enabled"
|
|
line.long 0x328 "RX Status,RX Status Register"
|
|
bitfld.long 0x328 19. " QUEUE IDLE[3] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x328 18. " QUEUE IDLE[2] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x328 17. " QUEUE IDLE[1] ,Queue Idle" "Not Idle,Idle"
|
|
bitfld.long 0x328 16. " QUEUE IDLE[0] ,Queue Idle" "Not Idle,Idle"
|
|
textline " "
|
|
bitfld.long 0x328 15. " ACT ,Active" "Idle,Active"
|
|
bitfld.long 0x328 14. " PRB ,Pseudo Random Bit Stream" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x328 8.--9. " CUR_Q# ,Current Queue Number" "0,1,2,3"
|
|
bitfld.long 0x328 3. " QUEUE USABLE[3] ,Queue Usable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x328 2. " QUEUE USABLE[2] ,Queue Usable" "Disabled,Enabled"
|
|
bitfld.long 0x328 1. " QUEUE USABLE[1] ,Queue Usable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x328 0. " QUEUE USABLE[0] ,Queue Usable" "Disabled,Enabled"
|
|
line.long 0x32c "RX Extended Status,RX Extended Status Register"
|
|
bitfld.long 0x32c 27. " ERROR FLAG[3] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x32c 26. " ERROR FLAG[2] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x32c 25. " ERROR FLAG[1] ,Error Flag" "No error,Error"
|
|
bitfld.long 0x32c 24. " ERROR FLAG[0] ,Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x32c 19. " DESC INT[3] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 18. " DESC INT[2] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 17. " DESC INT[1] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 16. " DESC INT[0] ,Descriptor Interrupt Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 11. " END_OF_FRAME[3] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 10. " END_OF_FRAME[2] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 9. " END_OF_FRAME[1] ,End of Frame Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 8. " END_OF_FRAME[0] ,End of Frame Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 3. " END_OF_QUEUE[3] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 2. " END_OF_QUEUE[2] ,End of Queue Condition" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x32c 1. " END_OF_QUEUE[1] ,End of Queue Condition" "Not completed,Completed"
|
|
bitfld.long 0x32c 0. " END_OF_QUEUE[0] ,End of Queue Condition" "Not completed,Completed"
|
|
line.long 0x330 "RX Pause Thresholds,RX Pause Thresholds Register"
|
|
hexmask.long.word 0x330 16.--24. 1. " PAUSE THRESHOLD ,Pause Threshold"
|
|
hexmask.long.word 0x330 0.--8. 1. " UNPAUSE THRESHOLD ,Unpause Threshold"
|
|
line.long 0x334 "RX Thresholds,RX Thresholds Register"
|
|
hexmask.long.word 0x334 0.--8. 1. " OVERRUN WARNING THRESHOLD ,Overrun Warning Threshold"
|
|
line.long 0x340 "RX VLAN Tag Map,RX VLAN Tag Map Register"
|
|
bitfld.long 0x340 28.--29. " QUEUE#_TAG7 ,Queue # for Tag 7" "0,1,2,3"
|
|
bitfld.long 0x340 24.--25. " QUEUE#_TAG6 ,Queue # for Tag 6" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x340 20.--21. " QUEUE#_TAG5 ,Queue # for Tag 5" "0,1,2,3"
|
|
bitfld.long 0x340 16.--17. " QUEUE#_TAG4 ,Queue # for Tag 4" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x340 12.--13. " QUEUE#_TAG3 ,Queue # for Tag 3" "0,1,2,3"
|
|
bitfld.long 0x340 8.--9. " QUEUE#_TAG2 ,Queue # for Tag 2" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x340 4.--5. " QUEUE#_TAG1 ,Queue # for Tag 1" "0,1,2,3"
|
|
bitfld.long 0x340 0.--1. " QUEUE#_TAG0 ,Queue # for Tag 0" "0,1,2,3"
|
|
line.long 0x360 "RX Hash Table Indirect Ad,RX Hash Table Indirect Address Register"
|
|
bitfld.long 0x360 31. " AI ,Auto-increment Enable" "Disabled,Enabled"
|
|
bitfld.long 0x360 30. " DFR ,Do First Read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x360 4. " MCAD ,Mcad" "Unicast,Multicast"
|
|
hexmask.long.byte 0x360 0.--3. 1. " INDEX ,Index"
|
|
line.long 0x364 "RX Hash Table Indirect Da,RX Hash Table Indirect Data Register"
|
|
hexmask.long.long 0x364 0.--31. 1. " HASH TABLE DATA ,Hash Table Data"
|
|
line.long 0x370 "RX Diagn Indirect Adr,RX Diagnostic Indirect Address Register"
|
|
bitfld.long 0x370 31. " AI ,Auto-increment Enable" "Disabled,Enabled"
|
|
bitfld.long 0x370 30. " DFR ,Do First Read" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x370 0.--4. 1. " INDEX ,Index"
|
|
line.long 0x374 "RX Diagn Indirect Data,RX Diagnostic Indirect Data Register"
|
|
hexmask.long.long 0x374 0.--31. 1. " DIAGNOSTIC DATA ,Diagnostic data"
|
|
line.long 0x378 "RX Error Status,RX Error Status Register"
|
|
bitfld.long 0x378 31. " DER[3] ,Descriptor Error on Queue 3" "No error,Error"
|
|
bitfld.long 0x378 30. " TER[3] ,Read Timeout on Queue 3" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x378 29. " RER[3] ,Read Error on Queue 3" "No Error,Error"
|
|
bitfld.long 0x378 28. " TEA[3] ,Transaction Error Acknowledge in Queue 3" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x378 24.--27. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
bitfld.long 0x378 23. " DER[2] ,Descriptor Error on Queue 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 22. " TER[2] ,Read Timeout on Queue 2" "No timeout,Timeout"
|
|
bitfld.long 0x378 21. " RER[2] ,Read Error on Queue 2" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 20. " TEA[2] ,Transaction Error Acknowledge in Queue 2" "No Error,Error"
|
|
hexmask.long.byte 0x378 16.--19. 1. " TARGET ERROR[3] ,Target error response for Queue 3"
|
|
textline " "
|
|
bitfld.long 0x378 15. " DER[1] ,Descriptor Error on Queue 1" "No error,Error"
|
|
bitfld.long 0x378 14. " TER[1] ,Read Timeout on Queue 1" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x378 13. " RER[1] ,Read Error on Queue 1" "No Error,Error"
|
|
bitfld.long 0x378 12. " TEA[1] ,Transaction Error Acknowledge in Queue 1" "No Error,Error"
|
|
textline " "
|
|
hexmask.long.byte 0x378 8.--11. 1. " TARGET ERROR[1] ,Target error response for Queue 1"
|
|
bitfld.long 0x378 7. " DER[0] ,Descriptor Error on Queue 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 6. " TER[0] ,Read Timeout on Queue 0" "No timeout,Timeout"
|
|
bitfld.long 0x378 5. " RER[0] ,Read Error on Queue 0" "No Error,Error"
|
|
textline " "
|
|
bitfld.long 0x378 4. " TEA[0] ,Transaction Error Acknowledge in Queue 0" "No Error,Error"
|
|
hexmask.long.byte 0x378 0.--3. 1. " TARGET ERROR[0] ,Target error response for Queue 0"
|
|
line.long 0x380 "RX Queue 0 Configuration,rX Queue 0 Configuration Register"
|
|
bitfld.long 0x380 20. " EDI ,Enable Descriptor Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x380 19. " ESI ,Enable EOQ Interrupt on Owner = System" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x380 18. " ENI ,Enable EOQ Interrupt on a Null Pointer" "Disabled,Enabled"
|
|
bitfld.long 0x380 17. " ELI ,Enable EOQ Interrupt on Last Bit Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x380 16. " EEI ,Enable Interrupt on End Of Frame" "Disabled,Enabled"
|
|
bitfld.long 0x380 14. " AM ,Auto Mode" "Disabled,Auto"
|
|
textline " "
|
|
hexmask.long.byte 0x380 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x384 "RX Queue 0 Buffer Config,RX Queue 0 Buffer Configuration Register"
|
|
bitfld.long 0x384 11. " WSWP ,Word Swap" "Disabled,Enabled"
|
|
bitfld.long 0x384 10. " SSWP ,Byte Swap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x384 8.--9. " BURST SIZE ,Burst Size" "8 bytes,32 bytes,128 bytes,256 bytes"
|
|
hexmask.long.byte 0x384 0.--5. 1. " SFN PORT ,SFN Port"
|
|
line.long 0x388 "RX Queue 0 Pointer Low,RX Queue 0 Pointer Low Register"
|
|
hexmask.long.long 0x388 0.--31. 1. " DESCRIPTOR ADDRESS[31:0] ,Descriptor Address [31:0]"
|
|
line.long 0x38c "RX Queue 0 Pointer High,RX Queue 0 Pointer High Register"
|
|
bitfld.long 0x38c 31. " VAL ,Valid" "Not valid,Valid"
|
|
hexmask.long.word 0x38c 0.--11. 1. " DESCRIPTOR ADDRESS[43:32] ,Descriptor Address [43:32]"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "I2C Controller"
|
|
group asd:0x7000--0x7fff
|
|
line.long 0x400 "I2C_CNTRL1,I2C Control Register 1"
|
|
bitfld.long 0x400 24. " WR_EN ,Direction" "Read,Write"
|
|
hexmask.long.byte 0x400 16.--23. 1. " I2C_ADDR ,I2C Address"
|
|
textline " "
|
|
bitfld.long 0x400 8.--10. " PAGE_SELECT ,Page Select" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x400 0.--3. 1. " DEVCODE ,Device Code"
|
|
line.long 0x404 "I2C_CNTRL2,I2C Control Register 2"
|
|
bitfld.long 0x404 28. " IIB[4] ,Interrupt Identification Byte, I2C Access Complete" "Clear,Set"
|
|
bitfld.long 0x404 27. " IIB[3] ,Interrupt Identification Byte, Initialization-State-Machine Configuration Error" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x404 26. " IIB[2] ,Interrupt Identification Byte, I2C Time Out" "Clear,Set"
|
|
bitfld.long 0x404 25. " IIB[1] ,Interrupt Identification Byte, Write Protect Address Violation" "Clear,Set"
|
|
textline " "
|
|
bitfld.long 0x404 24. " IIB[0] ,Interrupt Identification Byte, AHB Master transfer error" "Clear,Set"
|
|
bitfld.long 0x404 17. " RD_STATUS ,Read Status Bit" "Done,In progress"
|
|
textline " "
|
|
bitfld.long 0x404 16. " WR_STATUS ,Write Status Bit" "Done,In progress"
|
|
bitfld.long 0x404 8. " Start ,Start Control" "Done,In progress"
|
|
textline " "
|
|
bitfld.long 0x404 2.--3. " LANE ,Data Lane" "00b,01b,10b,11b"
|
|
bitfld.long 0x404 0.--1. " SIZE ,I2C Size specifies number of bytes in an I2C read or write" "1 byte,2 bytes,4 bytes,4 bytes"
|
|
line.long 0x408 "I2C_RD_DATA,I2C Read Data Register"
|
|
hexmask.long.byte 0x408 24.--31. 1. " RBYTE3 ,Received I2C data, byte 3"
|
|
hexmask.long.byte 0x408 16.--23. 1. " RBYTE2 ,Received I2C data, byte 2"
|
|
textline " "
|
|
hexmask.long.byte 0x408 8.--15. 1. " RBYTE1 ,Received I2C data, byte 1"
|
|
hexmask.long.byte 0x408 0.--7. 1. " RBYTE0 ,Received I2C data, byte 0"
|
|
line.long 0x40c "I2C_TX_DATA,I2C Write Data Register"
|
|
hexmask.long.byte 0x40c 24.--31. 1. " TBYTE3 ,I2C transmit data, byte 3"
|
|
hexmask.long.byte 0x40c 16.--23. 1. " TBYTE2 ,I2C transmit data, byte 2"
|
|
textline " "
|
|
hexmask.long.byte 0x40c 8.--15. 1. " TBYTE1 ,I2C transmit data, byte 1"
|
|
hexmask.long.byte 0x40c 0.--7. 1. " TBYTE0 ,I2C transmit data, byte 0"
|
|
tree.end
|
|
tree "UART"
|
|
tree "UART 1"
|
|
if (data.long(asd:(0x7400+(0x400*1.)))&0x80000000)==0x80000000
|
|
group asd:(0x7400+(0x400*1.))--0x7fff
|
|
line.long 0x000 "UART1_LOWER,UART1_LOWER Register"
|
|
bitfld.long 0x000 31. " LCR[7] ,Divisor Latch Access Bit (DLAB)" "Disabled,Enabled"
|
|
bitfld.long 0x000 30. " LCR[6] ,Break Control Bit" "Resume,Break"
|
|
textline " "
|
|
bitfld.long 0x000 29. " LCR[5] ,Sticky Parity Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 28. " LCR[4] ,Even Parity Select Bit" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x000 27. " LCR[3] ,Parity Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 26. " LCR[2] ,Number of Stop Bits Generated" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.long 0x000 24.--25. " LCR[1:0] ,Serial Character Word Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x000 23. " IIR[7] ,Set when FCR[0] = 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x000 22. " IIR[6] ,Set when FCR[0] = 1" "Low,High"
|
|
bitfld.long 0x000 17.--19. " IIR[1:3] ,Interrupt Identification" "Modem Status Change,TX Register Empty,Received Data Available,Receiver Error,Reserved,Reserved,Character Timeout,Reserved"
|
|
textline " "
|
|
bitfld.long 0x000 16. " IIR[0] ,Interrupt Pending Status" "Not pending,Pending"
|
|
bitfld.long 0x000 11. " IER[3] ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 10. " IER[2] ,Receiver Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 9. " IER[1] ,Transmitter Holding Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 8. " IER[0] ,Received Data Available Interrupt and Character Timeout Interrupt Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x000 8.--15. 1. " DLM ,Divisor Latch (DLM)"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " DLL ,Divisor Latch (DLL)"
|
|
else
|
|
group asd:(0x7400+(0x400*1.))--0x7fff
|
|
line.long 0x000 "UART1_LOWER,UART1_LOWER Register"
|
|
bitfld.long 0x000 31. " LCR[7] ,Divisor Latch Access Bit (DLAB)" "Disabled,Enabled"
|
|
bitfld.long 0x000 30. " LCR[6] ,Break Control Bit" "Resume,Break"
|
|
textline " "
|
|
bitfld.long 0x000 29. " LCR[5] ,Sticky Parity Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 28. " LCR[4] ,Even Parity Select Bit" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x000 27. " LCR[3] ,Parity Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 26. " LCR[2] ,Number of Stop Bits Generated" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.long 0x000 24.--25. " LCR[1:0] ,Serial Character Word Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x000 23. " IIR[7] ,Set when FCR[0] = 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x000 22. " IIR[6] ,Set when FCR[0] = 1" "Low,High"
|
|
bitfld.long 0x000 17.--19. " IIR[1:3] ,Interrupt Identification" "Modem Status Change,TX Register Empty,Received Data Available,Receiver Error,Reserved,Reserved,Character Timeout,Reserved"
|
|
textline " "
|
|
bitfld.long 0x000 16. " IIR[0] ,Interrupt Pending Status" "Not pending,Pending"
|
|
bitfld.long 0x000 11. " IER[3] ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 10. " IER[2] ,Receiver Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 9. " IER[1] ,Transmitter Holding Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 8. " IER[0] ,Received Data Available Interrupt and Character Timeout Interrupt Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x000 0.--7. 1. " RBR ,Receiver Buffer Register (RBR)"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " THR ,Transmitter Holding Register (THR)"
|
|
endif
|
|
wgroup asd:(0x7400+(0x400*1.))--0x7fff
|
|
line.long 0x000 "UART1_LOWER,UART1_LOWER Register"
|
|
bitfld.long 0x000 22.--23. " FCR[6:7] ,Trigger Level of the FIFO Interrupt" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x000 18. " FCR[2] ,Clear Transmit FIFO" "Disabled,Clear"
|
|
textline " "
|
|
bitfld.long 0x000 17. " FCR[1] ,Clear Receive FIFO" "Disabled,Clear"
|
|
bitfld.long 0x000 16. " FCR[0] ,FIFO Enable" "Disabled,Enabled"
|
|
group asd:(0x7400+(0x400*1.))--0x7fff
|
|
line.long 0x004 "UART1_UPPER,UART1_UPPER Register"
|
|
hexmask.long.byte 0x004 24.--31. 1. " SCR ,Scratch Register"
|
|
bitfld.long 0x004 23. " MSR[7] ,Data Carrier Detect (DCD)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x004 22. " MSR[6] ,Ring Indicator (RI)" "Low,High"
|
|
bitfld.long 0x004 21. " MSR[5] ,Data Set Ready (DSR)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x004 20. " MSR[4] ,Clear to Send (CTS)" "Low,High"
|
|
bitfld.long 0x004 19. " MSR[3] ,Data Carrier Detect indicator (DDCD)" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x004 18. " MSR[2] ,Trailing Edge Ring indicator (TERI)" "Not changed,Changed"
|
|
bitfld.long 0x004 17. " MSR[1] ,Data Set Ready indicator (DDSR)" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x004 16. " MSR[0] ,Clear to Send indicator (DCST)" "Not changed,Changed"
|
|
bitfld.long 0x004 15. " LSR[7] ,Error in Receiver FIFO indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x004 14. " LSR[6] ,Transmitter Empty (TEMT) indicator" "Not empty,Empty"
|
|
bitfld.long 0x004 13. " LSR[5] ,Transmitter Holding Register Empty (THRE) indicator" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x004 12. " LSR[4] ,Break Interrupt (BI) indicator" "No Break,Break"
|
|
bitfld.long 0x004 11. " LSR[3] ,Framing Error (FE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x004 10. " LSR[2] ,Parity Error (PE) indicator" "No error,Error"
|
|
bitfld.long 0x004 9. " LSR[1] ,Overrun Error (OE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x004 8. " LSR[0] ,Receiver Data Ready (DR) indicator" "Not received,Received"
|
|
bitfld.long 0x004 4. " MCR[4] ,Loopback Test Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " MCR[1] ,Request to Sent output" "Low,High"
|
|
bitfld.long 0x004 0. " MCR[0] ,Data Terminal Ready output" "Low,High"
|
|
tree.end
|
|
tree "UART 2"
|
|
if (data.long(asd:(0x7400+(0x400*2.)))&0x80000000)==0x80000000
|
|
group asd:(0x7400+(0x400*2.))--0x7fff
|
|
line.long 0x000 "UART2_LOWER,UART2_LOWER Register"
|
|
bitfld.long 0x000 31. " LCR[7] ,Divisor Latch Access Bit (DLAB)" "Disabled,Enabled"
|
|
bitfld.long 0x000 30. " LCR[6] ,Break Control Bit" "Resume,Break"
|
|
textline " "
|
|
bitfld.long 0x000 29. " LCR[5] ,Sticky Parity Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 28. " LCR[4] ,Even Parity Select Bit" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x000 27. " LCR[3] ,Parity Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 26. " LCR[2] ,Number of Stop Bits Generated" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.long 0x000 24.--25. " LCR[1:0] ,Serial Character Word Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x000 23. " IIR[7] ,Set when FCR[0] = 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x000 22. " IIR[6] ,Set when FCR[0] = 1" "Low,High"
|
|
bitfld.long 0x000 17.--19. " IIR[1:3] ,Interrupt Identification" "Modem Status Change,TX Register Empty,Received Data Available,Receiver Error,Reserved,Reserved,Character Timeout,Reserved"
|
|
textline " "
|
|
bitfld.long 0x000 16. " IIR[0] ,Interrupt Pending Status" "Not pending,Pending"
|
|
bitfld.long 0x000 11. " IER[3] ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 10. " IER[2] ,Receiver Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 9. " IER[1] ,Transmitter Holding Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 8. " IER[0] ,Received Data Available Interrupt and Character Timeout Interrupt Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x000 8.--15. 1. " DLM ,Divisor Latch (DLM)"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " DLL ,Divisor Latch (DLL)"
|
|
else
|
|
group asd:(0x7400+(0x400*2.))--0x7fff
|
|
line.long 0x000 "UART2_LOWER,UART2_LOWER Register"
|
|
bitfld.long 0x000 31. " LCR[7] ,Divisor Latch Access Bit (DLAB)" "Disabled,Enabled"
|
|
bitfld.long 0x000 30. " LCR[6] ,Break Control Bit" "Resume,Break"
|
|
textline " "
|
|
bitfld.long 0x000 29. " LCR[5] ,Sticky Parity Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 28. " LCR[4] ,Even Parity Select Bit" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x000 27. " LCR[3] ,Parity Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x000 26. " LCR[2] ,Number of Stop Bits Generated" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.long 0x000 24.--25. " LCR[1:0] ,Serial Character Word Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x000 23. " IIR[7] ,Set when FCR[0] = 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x000 22. " IIR[6] ,Set when FCR[0] = 1" "Low,High"
|
|
bitfld.long 0x000 17.--19. " IIR[1:3] ,Interrupt Identification" "Modem Status Change,TX Register Empty,Received Data Available,Receiver Error,Reserved,Reserved,Character Timeout,Reserved"
|
|
textline " "
|
|
bitfld.long 0x000 16. " IIR[0] ,Interrupt Pending Status" "Not pending,Pending"
|
|
bitfld.long 0x000 11. " IER[3] ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 10. " IER[2] ,Receiver Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x000 9. " IER[1] ,Transmitter Holding Register Empty Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x000 8. " IER[0] ,Received Data Available Interrupt and Character Timeout Interrupt Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x000 0.--7. 1. " RBR ,Receiver Buffer Register (RBR)"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " THR ,Transmitter Holding Register (THR)"
|
|
endif
|
|
wgroup asd:(0x7400+(0x400*2.))--0x7fff
|
|
line.long 0x000 "UART2_LOWER,UART2_LOWER Register"
|
|
bitfld.long 0x000 22.--23. " FCR[6:7] ,Trigger Level of the FIFO Interrupt" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x000 18. " FCR[2] ,Clear Transmit FIFO" "Disabled,Clear"
|
|
textline " "
|
|
bitfld.long 0x000 17. " FCR[1] ,Clear Receive FIFO" "Disabled,Clear"
|
|
bitfld.long 0x000 16. " FCR[0] ,FIFO Enable" "Disabled,Enabled"
|
|
group asd:(0x7400+(0x400*2.))--0x7fff
|
|
line.long 0x004 "UART2_UPPER,UART2_UPPER Register"
|
|
hexmask.long.byte 0x004 24.--31. 1. " SCR ,Scratch Register"
|
|
bitfld.long 0x004 23. " MSR[7] ,Data Carrier Detect (DCD)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x004 22. " MSR[6] ,Ring Indicator (RI)" "Low,High"
|
|
bitfld.long 0x004 21. " MSR[5] ,Data Set Ready (DSR)" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x004 20. " MSR[4] ,Clear to Send (CTS)" "Low,High"
|
|
bitfld.long 0x004 19. " MSR[3] ,Data Carrier Detect indicator (DDCD)" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x004 18. " MSR[2] ,Trailing Edge Ring indicator (TERI)" "Not changed,Changed"
|
|
bitfld.long 0x004 17. " MSR[1] ,Data Set Ready indicator (DDSR)" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x004 16. " MSR[0] ,Clear to Send indicator (DCST)" "Not changed,Changed"
|
|
bitfld.long 0x004 15. " LSR[7] ,Error in Receiver FIFO indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x004 14. " LSR[6] ,Transmitter Empty (TEMT) indicator" "Not empty,Empty"
|
|
bitfld.long 0x004 13. " LSR[5] ,Transmitter Holding Register Empty (THRE) indicator" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x004 12. " LSR[4] ,Break Interrupt (BI) indicator" "No Break,Break"
|
|
bitfld.long 0x004 11. " LSR[3] ,Framing Error (FE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x004 10. " LSR[2] ,Parity Error (PE) indicator" "No error,Error"
|
|
bitfld.long 0x004 9. " LSR[1] ,Overrun Error (OE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x004 8. " LSR[0] ,Receiver Data Ready (DR) indicator" "Not received,Received"
|
|
bitfld.long 0x004 4. " MCR[4] ,Loopback Test Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " MCR[1] ,Request to Sent output" "Low,High"
|
|
bitfld.long 0x004 0. " MCR[0] ,Data Terminal Ready output" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
tree "General Purpose Input/Output"
|
|
group asd:0x7a00--0x7fff
|
|
line.long 0x5a0 "GPIO_DATA,GPIO Data Register"
|
|
bitfld.long 0x5a0 31. " GPIO_DATA_IN[7] ,Input Value" "Low,High"
|
|
bitfld.long 0x5a0 30. " GPIO_DATA_IN[6] ,Input Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 29. " GPIO_DATA_IN[5] ,Input Value" "Low,High"
|
|
bitfld.long 0x5a0 28. " GPIO_DATA_IN[4] ,Input Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 27. " GPIO_DATA_IN[3] ,Input Value" "Low,High"
|
|
bitfld.long 0x5a0 26. " GPIO_DATA_IN[2] ,Input Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 25. " GPIO_DATA_IN[1] ,Input Value" "Low,High"
|
|
bitfld.long 0x5a0 24. " GPIO_DATA_IN[0] ,Input Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 15. " GPIO_DATA_OUT[7] ,Output Value" "Low,High"
|
|
bitfld.long 0x5a0 14. " GPIO_DATA_OUT[6] ,Output Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 13. " GPIO_DATA_OUT[5] ,Output Value" "Low,High"
|
|
bitfld.long 0x5a0 12. " GPIO_DATA_OUT[4] ,Output Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 11. " GPIO_DATA_OUT[3] ,Output Value" "Low,High"
|
|
bitfld.long 0x5a0 10. " GPIO_DATA_OUT[2] ,Output Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x5a0 9. " GPIO_DATA_OUT[1] ,Output Value" "Low,High"
|
|
bitfld.long 0x5a0 8. " GPIO_DATA_OUT[0] ,Output Value" "Low,High"
|
|
line.long 0x5a4 "GPIO_CNTRL,GPIO Control"
|
|
bitfld.long 0x5a4 31. " DPIO_DIR[7] ,Pin Direction" "Input/open drain,Output"
|
|
bitfld.long 0x5a4 30. " DPIO_DIR[6] ,Pin Direction" "Input/open drain,Output"
|
|
textline " "
|
|
bitfld.long 0x5a4 29. " DPIO_DIR[5] ,Pin Direction" "Input/open drain,Output"
|
|
bitfld.long 0x5a4 28. " DPIO_DIR[4] ,Pin Direction" "Input/open drain,Output"
|
|
textline " "
|
|
bitfld.long 0x5a4 27. " DPIO_DIR[3] ,Pin Direction" "Input/open drain,Output"
|
|
bitfld.long 0x5a4 26. " DPIO_DIR[2] ,Pin Direction" "Input/open drain,Output"
|
|
textline " "
|
|
bitfld.long 0x5a4 25. " DPIO_DIR[1] ,Pin Direction" "Input/open drain,Output"
|
|
bitfld.long 0x5a4 24. " DPIO_DIR[0] ,Pin Direction" "Input/open drain,Output"
|
|
textline " "
|
|
bitfld.long 0x5a4 0. " EN ,GPIO Port Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Multi-Processor Interrupt Controller"
|
|
tree "Global Registers"
|
|
group asd:0x7400--0x77ff
|
|
line.long 0x000 "FRR,Feature reporting register"
|
|
hexmask.long.byte 0x000 29.--31. 1. " NIDOOR [2:0] ,Number of internal doorbell registers used"
|
|
hexmask.long.word 0x000 16.--26. 1. " NIRQ[10:0] ,Number of input interrupts bit field"
|
|
textline " "
|
|
hexmask.long.byte 0x000 13.--15. 1. " NITM[2:0] ,Number of internal timers initialized"
|
|
hexmask.long.byte 0x000 8.--12. 1. " NCPU[4:0] ,Number of external CPUs that are supported"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VID[7:0] ,MPIC interrupt controller version"
|
|
line.long 0x004 "GCR,Global configuration register"
|
|
bitfld.long 0x004 31. " R ,Reset interrupt controllers logic" "No reset,Reset"
|
|
line.long 0x008 "MICR,MPIC interrupt configuration register"
|
|
hexmask.long.byte 0x008 0.--3. 1. " CR ,Clock Ratio"
|
|
line.long 0x00c "SVR,Spurious vector register"
|
|
hexmask.long.byte 0x00c 16.--23. 1. " STEP ,Stepping"
|
|
hexmask.long.byte 0x00c 8.--15. 1. " DID ,Device ID"
|
|
textline " "
|
|
hexmask.long.byte 0x00c 0.--7. 1. " VID ,Vendor ID"
|
|
line.long 0x010 "SVR,Spurious vector register"
|
|
hexmask.long.byte 0x010 0.--7. 1. " VECTOR ,Spurious interrupt vector"
|
|
line.long 0x014 "TFRR,Timer frequency reporting register"
|
|
hexmask.long.long 0x014 0.--31. 1. " TIME_FREQ ,Timer Frequency"
|
|
tree.end
|
|
tree "Software Registers"
|
|
group asd:0x7400--0x77ff
|
|
line.long 0x020 "INT_SOFT_SET,Interrupt software override set"
|
|
bitfld.long 0x020 23. " S[23] ,Override value" "Low,High"
|
|
bitfld.long 0x020 22. " S[22] ,Override value" "Low,High"
|
|
bitfld.long 0x020 21. " S[21] ,Override value" "Low,High"
|
|
bitfld.long 0x020 20. " S[20] ,Override value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x020 19. " S[19] ,Override value" "Low,High"
|
|
bitfld.long 0x020 18. " S[18] ,Override value" "Low,High"
|
|
bitfld.long 0x020 17. " S[17] ,Override value" "Low,High"
|
|
bitfld.long 0x020 16. " S[16] ,Override value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x020 15. " S[15] ,Override value" "Low,High"
|
|
bitfld.long 0x020 14. " S[14] ,Override value" "Low,High"
|
|
bitfld.long 0x020 13. " S[13] ,Override value" "Low,High"
|
|
bitfld.long 0x020 12. " S[12] ,Override value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x020 11. " S[11] ,Override value" "Low,High"
|
|
bitfld.long 0x020 10. " S[10] ,Override value" "Low,High"
|
|
bitfld.long 0x020 9. " S[9] ,Override value" "Low,High"
|
|
bitfld.long 0x020 8. " S[8] ,Override value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x020 7. " S[7] ,Override value" "Low,High"
|
|
bitfld.long 0x020 6. " S[6] ,Override value" "Low,High"
|
|
bitfld.long 0x020 5. " S[5] ,Override value" "Low,High"
|
|
bitfld.long 0x020 4. " S[4] ,Override value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x020 3. " S[3] ,Override value" "Low,High"
|
|
bitfld.long 0x020 2. " S[2] ,Override value" "Low,High"
|
|
bitfld.long 0x020 1. " S[1] ,Override value" "Low,High"
|
|
bitfld.long 0x020 0. " S[0] ,Override value" "Low,High"
|
|
line.long 0x024 "INT_SOFT_ENABLE,Interrupt software override ENABLE"
|
|
bitfld.long 0x024 23. " EN[23] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 22. " EN[22] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 21. " EN[21] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 20. " EN[20] ,Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 19. " EN[19] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 18. " EN[18] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 17. " EN[17] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 16. " EN[16] ,Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 15. " EN[15] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 14. " EN[14] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 13. " EN[13] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 12. " EN[12] ,Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 11. " EN[11] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 10. " EN[10] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 9. " EN[9] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 8. " EN[8] ,Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 7. " EN[7] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 6. " EN[6] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 5. " EN[5] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 4. " EN[4] ,Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x024 3. " EN[3] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 2. " EN[2] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 1. " EN[1] ,Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x024 0. " EN[0] ,Override Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Timer Registers"
|
|
tree "Timer 0 Registers"
|
|
group asd:(0x7430+(0x010*0.))++0x0f
|
|
line.long 0x000 "GTCCR0,Global timer 0 current count register"
|
|
bitfld.long 0x000 31. " T ,Toggle Bit" "Low,High"
|
|
hexmask.long.long 0x000 0.--30. 1. " COUNT ,Current Time Count"
|
|
line.long 0x004 "GTBCR0,Global timer 0 base count register"
|
|
bitfld.long 0x004 31. " CI ,Count Inhibit" "Enabled,Inhibited"
|
|
hexmask.long.long 0x004 0.--30. 1. " B_COUNT ,Base count"
|
|
line.long 0x008 "GTVPR0,Global timer 0 vector/priority register"
|
|
bitfld.long 0x008 31. " M ,Masks an interrupt from this timer" "Enabled,Masked"
|
|
bitfld.long 0x008 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x008 20.--23. 1. " PRESCALE ,Prescale value"
|
|
hexmask.long.byte 0x008 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x00c "GTDR0,Global timer 0 destination register"
|
|
bitfld.long 0x00c 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Timer 1 Registers"
|
|
group asd:(0x7430+(0x010*1.))++0x0f
|
|
line.long 0x000 "GTCCR1,Global timer 1 current count register"
|
|
bitfld.long 0x000 31. " T ,Toggle Bit" "Low,High"
|
|
hexmask.long.long 0x000 0.--30. 1. " COUNT ,Current Time Count"
|
|
line.long 0x004 "GTBCR1,Global timer 1 base count register"
|
|
bitfld.long 0x004 31. " CI ,Count Inhibit" "Enabled,Inhibited"
|
|
hexmask.long.long 0x004 0.--30. 1. " B_COUNT ,Base count"
|
|
line.long 0x008 "GTVPR1,Global timer 1 vector/priority register"
|
|
bitfld.long 0x008 31. " M ,Masks an interrupt from this timer" "Enabled,Masked"
|
|
bitfld.long 0x008 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x008 20.--23. 1. " PRESCALE ,Prescale value"
|
|
hexmask.long.byte 0x008 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x00c "GTDR1,Global timer 1 destination register"
|
|
bitfld.long 0x00c 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Timer 2 Registers"
|
|
group asd:(0x7430+(0x010*2.))++0x0f
|
|
line.long 0x000 "GTCCR2,Global timer 2 current count register"
|
|
bitfld.long 0x000 31. " T ,Toggle Bit" "Low,High"
|
|
hexmask.long.long 0x000 0.--30. 1. " COUNT ,Current Time Count"
|
|
line.long 0x004 "GTBCR2,Global timer 2 base count register"
|
|
bitfld.long 0x004 31. " CI ,Count Inhibit" "Enabled,Inhibited"
|
|
hexmask.long.long 0x004 0.--30. 1. " B_COUNT ,Base count"
|
|
line.long 0x008 "GTVPR2,Global timer 2 vector/priority register"
|
|
bitfld.long 0x008 31. " M ,Masks an interrupt from this timer" "Enabled,Masked"
|
|
bitfld.long 0x008 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x008 20.--23. 1. " PRESCALE ,Prescale value"
|
|
hexmask.long.byte 0x008 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x00c "GTDR2,Global timer 2 destination register"
|
|
bitfld.long 0x00c 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Timer 3 Registers"
|
|
group asd:(0x7430+(0x010*3.))++0x0f
|
|
line.long 0x000 "GTCCR3,Global timer 3 current count register"
|
|
bitfld.long 0x000 31. " T ,Toggle Bit" "Low,High"
|
|
hexmask.long.long 0x000 0.--30. 1. " COUNT ,Current Time Count"
|
|
line.long 0x004 "GTBCR3,Global timer 3 base count register"
|
|
bitfld.long 0x004 31. " CI ,Count Inhibit" "Enabled,Inhibited"
|
|
hexmask.long.long 0x004 0.--30. 1. " B_COUNT ,Base count"
|
|
line.long 0x008 "GTVPR3,Global timer 3 vector/priority register"
|
|
bitfld.long 0x008 31. " M ,Masks an interrupt from this timer" "Enabled,Masked"
|
|
bitfld.long 0x008 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x008 20.--23. 1. " PRESCALE ,Prescale value"
|
|
hexmask.long.byte 0x008 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x008 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x00c "GTDR3,Global timer 3 destination register"
|
|
bitfld.long 0x00c 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00c 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x00c 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "Local Registers per Input Pin (Source Registers)"
|
|
tree "IRQ0 Registers"
|
|
group asd:(0x7500+(0x008*0.))++7
|
|
line.long 0x000 "IVPR0,IRQ0 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR0,IRQ0 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ1 Registers"
|
|
group asd:(0x7500+(0x008*1.))++7
|
|
line.long 0x000 "IVPR1,IRQ1 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR1,IRQ1 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ2 Registers"
|
|
group asd:(0x7500+(0x008*2.))++7
|
|
line.long 0x000 "IVPR2,IRQ2 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR2,IRQ2 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ3 Registers"
|
|
group asd:(0x7500+(0x008*3.))++7
|
|
line.long 0x000 "IVPR3,IRQ3 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR3,IRQ3 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ4 Registers"
|
|
group asd:(0x7500+(0x008*4.))++7
|
|
line.long 0x000 "IVPR4,IRQ4 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR4,IRQ4 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ5 Registers"
|
|
group asd:(0x7500+(0x008*5.))++7
|
|
line.long 0x000 "IVPR5,IRQ5 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR5,IRQ5 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ6 Registers"
|
|
group asd:(0x7500+(0x008*6.))++7
|
|
line.long 0x000 "IVPR6,IRQ6 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR6,IRQ6 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ7 Registers"
|
|
group asd:(0x7500+(0x008*7.))++7
|
|
line.long 0x000 "IVPR7,IRQ7 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR7,IRQ7 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ8 Registers"
|
|
group asd:(0x7500+(0x008*8.))++7
|
|
line.long 0x000 "IVPR8,IRQ8 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR8,IRQ8 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ9 Registers"
|
|
group asd:(0x7500+(0x008*9.))++7
|
|
line.long 0x000 "IVPR9,IRQ9 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR9,IRQ9 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ10 Registers"
|
|
group asd:(0x7500+(0x008*10.))++7
|
|
line.long 0x000 "IVPR10,IRQ10 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR10,IRQ10 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ11 Registers"
|
|
group asd:(0x7500+(0x008*11.))++7
|
|
line.long 0x000 "IVPR11,IRQ11 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR11,IRQ11 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ12 Registers"
|
|
group asd:(0x7500+(0x008*12.))++7
|
|
line.long 0x000 "IVPR12,IRQ12 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR12,IRQ12 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ13 Registers"
|
|
group asd:(0x7500+(0x008*13.))++7
|
|
line.long 0x000 "IVPR13,IRQ13 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR13,IRQ13 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ14 Registers"
|
|
group asd:(0x7500+(0x008*14.))++7
|
|
line.long 0x000 "IVPR14,IRQ14 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR14,IRQ14 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ15 Registers"
|
|
group asd:(0x7500+(0x008*15.))++7
|
|
line.long 0x000 "IVPR15,IRQ15 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR15,IRQ15 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ16 Registers"
|
|
group asd:(0x7500+(0x008*16.))++7
|
|
line.long 0x000 "IVPR16,IRQ16 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR16,IRQ16 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ17 Registers"
|
|
group asd:(0x7500+(0x008*17.))++7
|
|
line.long 0x000 "IVPR17,IRQ17 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR17,IRQ17 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ18 Registers"
|
|
group asd:(0x7500+(0x008*18.))++7
|
|
line.long 0x000 "IVPR18,IRQ18 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR18,IRQ18 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ19 Registers"
|
|
group asd:(0x7500+(0x008*19.))++7
|
|
line.long 0x000 "IVPR19,IRQ19 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR19,IRQ19 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ20 Registers"
|
|
group asd:(0x7500+(0x008*20.))++7
|
|
line.long 0x000 "IVPR20,IRQ20 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR20,IRQ20 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ21 Registers"
|
|
group asd:(0x7500+(0x008*21.))++7
|
|
line.long 0x000 "IVPR21,IRQ21 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR21,IRQ21 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ22 Registers"
|
|
group asd:(0x7500+(0x008*22.))++7
|
|
line.long 0x000 "IVPR22,IRQ22 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR22,IRQ22 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree "IRQ23 Registers"
|
|
group asd:(0x7500+(0x008*23.))++7
|
|
line.long 0x000 "IVPR23,IRQ23 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from this input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
bitfld.long 0x000 29. " MODE ,Delivery Mode" "Directed,Distributed"
|
|
bitfld.long 0x000 25. " S ,Sense input bit" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x000 24. " P ,Polarity of the input" "Low,High"
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
textline " "
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "IDR23,IRQ23 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[IRQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[IRQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[FIQ1] ,IRQ Destination" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[FIQ0] ,IRQ Destination" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "Doorbell Registers"
|
|
group asd:0x7400--0x77ff
|
|
line.long 0x200 "DAR,Doorbell Activate Register"
|
|
bitfld.long 0x200 3. " A[3] ,Doorbell input interrupts activation" "Disabled,Enabled"
|
|
bitfld.long 0x200 2. " A[2] ,Doorbell input interrupts activation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x200 1. " A[1] ,Doorbell input interrupts activation" "Disabled,Enabled"
|
|
bitfld.long 0x200 0. " A[0] ,Doorbell input interrupts activation" "Disabled,Enabled"
|
|
tree "Doorbell 0 Registers"
|
|
group asd:(0x7604+(0x0c*0.))++0x0f
|
|
line.long 0x000 "DVPR0,Doorbell0 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "DDR0,Doorbell0 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
line.long 0x004 "DMR0,Doorbell0 messaging register"
|
|
hexmask.long.long 0x004 0.--31. 1. " M ,Messaging bit field"
|
|
tree.end
|
|
tree "Doorbell 1 Registers"
|
|
group asd:(0x7604+(0x0c*1.))++0x0f
|
|
line.long 0x000 "DVPR1,Doorbell1 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "DDR1,Doorbell1 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
line.long 0x004 "DMR1,Doorbell1 messaging register"
|
|
hexmask.long.long 0x004 0.--31. 1. " M ,Messaging bit field"
|
|
tree.end
|
|
tree "Doorbell 2 Registers"
|
|
group asd:(0x7604+(0x0c*2.))++0x0f
|
|
line.long 0x000 "DVPR2,Doorbell2 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "DDR2,Doorbell2 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
line.long 0x004 "DMR2,Doorbell2 messaging register"
|
|
hexmask.long.long 0x004 0.--31. 1. " M ,Messaging bit field"
|
|
tree.end
|
|
tree "Doorbell 3 Registers"
|
|
group asd:(0x7604+(0x0c*3.))++0x0f
|
|
line.long 0x000 "DVPR3,Doorbell3 vector/priority register"
|
|
bitfld.long 0x000 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x000 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x000 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x000 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x004 "DDR3,Doorbell3 destination register"
|
|
bitfld.long 0x004 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x004 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x004 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
line.long 0x004 "DMR3,Doorbell3 messaging register"
|
|
hexmask.long.long 0x004 0.--31. 1. " M ,Messaging bit field"
|
|
tree.end
|
|
tree.end
|
|
tree "Mailbox Registers"
|
|
tree "Mailbox0 Registers"
|
|
group asd:(0x7680+(0x010*0.))++0x0f
|
|
line.long 0x000 "MBR0,Mailbox0 register"
|
|
hexmask.long.long 0x000 0.--31. 1. " M ,Messaging bit field"
|
|
line.long 0x004 "MBVPR0,Mailbox0 vector/priority register"
|
|
bitfld.long 0x004 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x004 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x004 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x008 "MBDR0,Mailbox0 destination register"
|
|
bitfld.long 0x008 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x008 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Mailbox1 Registers"
|
|
group asd:(0x7680+(0x010*1.))++0x0f
|
|
line.long 0x000 "MBR1,Mailbox1 register"
|
|
hexmask.long.long 0x000 0.--31. 1. " M ,Messaging bit field"
|
|
line.long 0x004 "MBVPR1,Mailbox1 vector/priority register"
|
|
bitfld.long 0x004 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x004 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x004 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x008 "MBDR1,Mailbox1 destination register"
|
|
bitfld.long 0x008 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x008 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Mailbox2 Registers"
|
|
group asd:(0x7680+(0x010*2.))++0x0f
|
|
line.long 0x000 "MBR2,Mailbox2 register"
|
|
hexmask.long.long 0x000 0.--31. 1. " M ,Messaging bit field"
|
|
line.long 0x004 "MBVPR2,Mailbox2 vector/priority register"
|
|
bitfld.long 0x004 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x004 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x004 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x008 "MBDR2,Mailbox2 destination register"
|
|
bitfld.long 0x008 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x008 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Mailbox3 Registers"
|
|
group asd:(0x7680+(0x010*3.))++0x0f
|
|
line.long 0x000 "MBR3,Mailbox3 register"
|
|
hexmask.long.long 0x000 0.--31. 1. " M ,Messaging bit field"
|
|
line.long 0x004 "MBVPR3,Mailbox3 vector/priority register"
|
|
bitfld.long 0x004 31. " M ,Masks an interrupt from input pin" "Enabled,Masked"
|
|
bitfld.long 0x004 30. " A ,Activity bit indicates that an interrupt has been requested or that it is currently in service" "No activity,Pending"
|
|
textline " "
|
|
hexmask.long.byte 0x004 16.--19. 1. " PRIORITY ,Interrupt priority"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Vector value"
|
|
line.long 0x008 "MBDR3,Mailbox3 destination register"
|
|
bitfld.long 0x008 3. " SEL_OUT[3] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 2. " SEL_OUT[2] ,Destination target" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x008 1. " SEL_OUT[1] ,Destination target" "Disabled,Enabled"
|
|
bitfld.long 0x008 0. " SEL_OUT[0] ,Destination target" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "Local Registers per Output Pin (CPU[3:0])"
|
|
tree "CPU 0 Registers"
|
|
group asd:(0x7700+(0x040*0.))++0x0f
|
|
line.long 0x000 "TASKP0,CPU 0 current task priority register"
|
|
hexmask.long.byte 0x000 0.--3. 1. " TASK ,Task priority"
|
|
line.long 0x004 "VECTOR0,CPU 0 interrupt acknowledge register"
|
|
hexmask.long.byte 0x004 24.--31. 1. " LS_VECTOR ,vector missed after a level sensitive interrupt"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Interrupt vector"
|
|
line.long 0x008 "EOI0,CPU 0 end of interrupt"
|
|
hexmask.long.byte 0x008 0.--7. 1. " EOI ,End of Interrupt"
|
|
line.long 0x00c "CSR0,CPU 0 Sensitivity Register"
|
|
bitfld.long 0x00c 1. " S ,Sense Output" "Edge,Level"
|
|
bitfld.long 0x00c 0. " P ,Polarity" "Low,High"
|
|
tree.end
|
|
tree "CPU 1 Registers"
|
|
group asd:(0x7700+(0x040*1.))++0x0f
|
|
line.long 0x000 "TASKP1,CPU 1 current task priority register"
|
|
hexmask.long.byte 0x000 0.--3. 1. " TASK ,Task priority"
|
|
line.long 0x004 "VECTOR1,CPU 1 interrupt acknowledge register"
|
|
hexmask.long.byte 0x004 24.--31. 1. " LS_VECTOR ,vector missed after a level sensitive interrupt"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Interrupt vector"
|
|
line.long 0x008 "EOI1,CPU 1 end of interrupt"
|
|
hexmask.long.byte 0x008 0.--7. 1. " EOI ,End of Interrupt"
|
|
line.long 0x00c "CSR1,CPU 1 Sensitivity Register"
|
|
bitfld.long 0x00c 1. " S ,Sense Output" "Edge,Level"
|
|
bitfld.long 0x00c 0. " P ,Polarity" "Low,High"
|
|
tree.end
|
|
tree "CPU 2 Registers"
|
|
group asd:(0x7700+(0x040*2.))++0x0f
|
|
line.long 0x000 "TASKP2,CPU 2 current task priority register"
|
|
hexmask.long.byte 0x000 0.--3. 1. " TASK ,Task priority"
|
|
line.long 0x004 "VECTOR2,CPU 2 interrupt acknowledge register"
|
|
hexmask.long.byte 0x004 24.--31. 1. " LS_VECTOR ,vector missed after a level sensitive interrupt"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Interrupt vector"
|
|
line.long 0x008 "EOI2,CPU 2 end of interrupt"
|
|
hexmask.long.byte 0x008 0.--7. 1. " EOI ,End of Interrupt"
|
|
line.long 0x00c "CSR2,CPU 2 Sensitivity Register"
|
|
bitfld.long 0x00c 1. " S ,Sense Output" "Edge,Level"
|
|
bitfld.long 0x00c 0. " P ,Polarity" "Low,High"
|
|
tree.end
|
|
tree "CPU 3 Registers"
|
|
group asd:(0x7700+(0x040*3.))++0x0f
|
|
line.long 0x000 "TASKP3,CPU 3 current task priority register"
|
|
hexmask.long.byte 0x000 0.--3. 1. " TASK ,Task priority"
|
|
line.long 0x004 "VECTOR3,CPU 3 interrupt acknowledge register"
|
|
hexmask.long.byte 0x004 24.--31. 1. " LS_VECTOR ,vector missed after a level sensitive interrupt"
|
|
hexmask.long.byte 0x004 0.--7. 1. " VECTOR ,Interrupt vector"
|
|
line.long 0x008 "EOI3,CPU 3 end of interrupt"
|
|
hexmask.long.byte 0x008 0.--7. 1. " EOI ,End of Interrupt"
|
|
line.long 0x00c "CSR3,CPU 3 Sensitivity Register"
|
|
bitfld.long 0x00c 1. " S ,Sense Output" "Edge,Level"
|
|
bitfld.long 0x00c 0. " P ,Polarity" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|