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Gen4_R-Car_Trace32/2_Trunk/per40800.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: At91M*, AT91R*, AT91F* on chip peripherals (09/16/2002)
; @Props:
; @Description:
; AT91M* include:
; At91M40800, AT91M40807
; AT91R* include:
; AT91R40807, AT91R40008
; AT91F* include:
; AT91F40816, AT91FR4081, AT91FR4042
; @Author: -
; @Changelog:
; @Manufacturer:
; @Doc:
; @Core:
; @Chiplist: AT91F40816, AT91FR4081, AT91M40807, AT91R40807
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: per40800.per 15982 2023-04-17 09:23:50Z bschroefel $
config 16. 8.
width 10.
base ad:0x0
;begin include file atmel/aic_v2.ph
;parameters:
tree "Advanced Interrupt Controller (AIC)"
group ad:0xfffff000++3
line.long 0x0 "SMR0,Source Mode Register 0"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff004++3
line.long 0x0 "SMR1,Source Mode Register 1"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff008++3
line.long 0x0 "SMR2,Source Mode Register 2"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff00c++3
line.long 0x0 "SMR3,Source Mode Register 3"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff010++3
line.long 0x0 "SMR4,Source Mode Register 4"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff014++3
line.long 0x0 "SMR5,Source Mode Register 5"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff018++3
line.long 0x0 "SMR6,Source Mode Register 6"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff01c++3
line.long 0x0 "SMR7,Source Mode Register 7"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff020++3
line.long 0x0 "SMR8,Source Mode Register 8"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff024++3
line.long 0x0 "SMR9,Source Mode Register 9"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff028++3
line.long 0x0 "SMR10,Source Mode Register 10"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff02c++3
line.long 0x0 "SMR11,Source Mode Register 11"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff030++3
line.long 0x0 "SMR12,Source Mode Register 12"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff034++3
line.long 0x0 "SMR13,Source Mode Register 13"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff038++3
line.long 0x0 "SMR14,Source Mode Register 14"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff03c++3
line.long 0x0 "SMR15,Source Mode Register 15"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff040++3
line.long 0x0 "SMR16,Source Mode Register 16"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff044++3
line.long 0x0 "SMR17,Source Mode Register 17"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff048++3
line.long 0x0 "SMR18,Source Mode Register 18"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff04c++3
line.long 0x0 "SMR19,Source Mode Register 19"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff050++3
line.long 0x0 "SMR20,Source Mode Register 20"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff054++3
line.long 0x0 "SMR21,Source Mode Register 21"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff058++3
line.long 0x0 "SMR22,Source Mode Register 22"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff05c++3
line.long 0x0 "SMR23,Source Mode Register 23"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff060++3
line.long 0x0 "SMR24,Source Mode Register 24"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff064++3
line.long 0x0 "SMR25,Source Mode Register 25"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff068++3
line.long 0x0 "SMR26,Source Mode Register 26"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff06c++3
line.long 0x0 "SMR27,Source Mode Register 27"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff070++3
line.long 0x0 "SMR28,Source Mode Register 28"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff074++3
line.long 0x0 "SMR29,Source Mode Register 29"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff078++3
line.long 0x0 "SMR30,Source Mode Register 30"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff07c++3
line.long 0x0 "SMR31,Source Mode Register 31"
bitfld.long 0x0 5.--6. "SRCTYPE ,Interrupt Source Type" "low lev sen,neg edge trig,high lev sen,pos edge trig"
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
group ad:0xfffff080++3
line.long 0x0 "SVR0,AIC Source Vector Register 0"
group ad:0xfffff084++3
line.long 0x0 "SVR1,AIC Source Vector Register 1"
group ad:0xfffff088++3
line.long 0x0 "SVR2,AIC Source Vector Register 2"
group ad:0xfffff08c++3
line.long 0x0 "SVR3,AIC Source Vector Register 3"
group ad:0xfffff090++3
line.long 0x0 "SVR4,AIC Source Vector Register 4"
group ad:0xfffff094++3
line.long 0x0 "SVR5,AIC Source Vector Register 5"
group ad:0xfffff098++3
line.long 0x0 "SVR6,AIC Source Vector Register 6"
group ad:0xfffff09c++3
line.long 0x0 "SVR7,AIC Source Vector Register 7"
group ad:0xfffff0a0++3
line.long 0x0 "SVR8,AIC Source Vector Register 8"
group ad:0xfffff0a4++3
line.long 0x0 "SVR9,AIC Source Vector Register 9"
group ad:0xfffff0a8++3
line.long 0x0 "SVR10,AIC Source Vector Register 10"
group ad:0xfffff0ac++3
line.long 0x0 "SVR11,AIC Source Vector Register 11"
group ad:0xfffff0b0++3
line.long 0x0 "SVR12,AIC Source Vector Register 12"
group ad:0xfffff0b4++3
line.long 0x0 "SVR13,AIC Source Vector Register 13"
group ad:0xfffff0b8++3
line.long 0x0 "SVR14,AIC Source Vector Register 14"
group ad:0xfffff0bc++3
line.long 0x0 "SVR15,AIC Source Vector Register 15"
group ad:0xfffff0c0++3
line.long 0x0 "SVR16,AIC Source Vector Register 16"
group ad:0xfffff0c4++3
line.long 0x0 "SVR17,AIC Source Vector Register 17"
group ad:0xfffff0c8++3
line.long 0x0 "SVR18,AIC Source Vector Register 18"
group ad:0xfffff0cc++3
line.long 0x0 "SVR19,AIC Source Vector Register 19"
group ad:0xfffff0d0++3
line.long 0x0 "SVR20,AIC Source Vector Register 20"
group ad:0xfffff0d4++3
line.long 0x0 "SVR21,AIC Source Vector Register 21"
group ad:0xfffff0d8++3
line.long 0x0 "SVR22,AIC Source Vector Register 22"
group ad:0xfffff0dc++3
line.long 0x0 "SVR23,AIC Source Vector Register 23"
group ad:0xfffff0e0++3
line.long 0x0 "SVR24,AIC Source Vector Register 24"
group ad:0xfffff0e4++3
line.long 0x0 "SVR25,AIC Source Vector Register 25"
group ad:0xfffff0e8++3
line.long 0x0 "SVR26,AIC Source Vector Register 26"
group ad:0xfffff0ec++3
line.long 0x0 "SVR27,AIC Source Vector Register 27"
group ad:0xfffff0f0++3
line.long 0x0 "SVR28,AIC Source Vector Register 28"
group ad:0xfffff0f4++3
line.long 0x0 "SVR29,AIC Source Vector Register 29"
group ad:0xfffff0f8++3
line.long 0x0 "SVR30,AIC Source Vector Register 30"
group ad:0xfffff0fc++3
line.long 0x0 "SVR31,AIC Source Vector Register 31"
group ad:0xfffff100++3
line.long 0x0 "IVR,AIC Interrupt Vector Register"
group ad:0xfffff104++3
line.long 0x0 "FVR,AIC FIQ Vector Register"
group ad:0xfffff108++3
line.long 0x0 "ISR,AIC Interrupt Status Register"
bitfld.long 0x0 0.--4. "IRQID ,Current IRQ Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group ad:0xfffff10c++0x1c
line.long 0x0 "IPR,AIC Interrupt Pending Register"
setclrfld.long 0x0 18. 0x20 18. 0x1c 18. "IRQ2 ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 17. 0x20 17. 0x1c 17. " IRQ1 ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 16. 0x20 16. 0x1c 16. " IRQ0 ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 8. 0x20 8. 0x1c 8. " PIOIRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 7. 0x20 7. 0x1c 7. " WDIRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 6. 0x20 6. 0x1c 6. " TC2IRQ ,Interrupt Pending" "inact,pend"
textline " "
setclrfld.long 0x0 5. 0x20 5. 0x1c 5. " TC1IRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 4. 0x20 4. 0x1c 4. " TC0IRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 3. 0x20 3. 0x1c 3. " US1IRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 2. 0x20 2. 0x1c 2. " US0IRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 1. 0x20 1. 0x1c 1. " SWIRQ ,Interrupt Pending" "inact,pend"
setclrfld.long 0x0 0. 0x20 0. 0x1c 0. " FIQ ,Interrupt Pending" "inact,pend"
line.long 0x4 "IMR,AIC Interrupt Mask Register"
setclrfld.long 0x4 18. 0x14 18. 0x18 18. "IRQ2 ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 17. 0x14 17. 0x18 17. " IRQ1 ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 16. 0x14 16. 0x18 16. " IRQ0 ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 8. 0x14 8. 0x18 8. " PIOIRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 7. 0x14 7. 0x18 7. " WDIRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 6. 0x14 6. 0x18 6. " TC2IRQ ,Interrupt Mask" "dis,ena"
textline " "
setclrfld.long 0x4 5. 0x14 5. 0x18 5. " TC1IRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 4. 0x14 4. 0x18 4. " TC0IRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 3. 0x14 3. 0x18 3. " US1IRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 2. 0x14 2. 0x18 2. " US0IRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 1. 0x14 1. 0x18 1. " SWIRQ ,Interrupt Mask" "dis,ena"
setclrfld.long 0x4 0. 0x14 0. 0x18 0. " FIQ ,Interrupt Mask" "dis,ena"
line.long 0x8 "CISR,AIC Core Interrupt Status Register"
bitfld.long 0x8 1. "NFIQ ,NFIQ Status" "inact,act"
bitfld.long 0x8 0. " NIRQ ,NIRQ Status" "inact,act"
group ad:0xfffff130++3
line.long 0x0 "EOICR,AIC End of Interrupt Command Register"
group ad:0xfffff134++3
line.long 0x0 "SPU,AIC Spurious Vector Register"
tree.end
;end include file atmel/aic_v2.ph
;begin include file atmel/ebi.ph
;parameters:
tree "External Bus Interface (EBI)"
group ad:0xffe00000++3
line.long 0x0 "CSR0,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe00004++3
line.long 0x0 "CSR1,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe00008++3
line.long 0x0 "CSR2,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe0000c++3
line.long 0x0 "CSR3,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe00010++3
line.long 0x0 "CSR4,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe00014++3
line.long 0x0 "CSR5,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe00018++3
line.long 0x0 "CSR6,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe0001c++3
line.long 0x0 "CSR7,EBI Chip Select Register"
hexmask.long 0x0 20.--31. 0x100000 "BA ,Base Address"
bitfld.long 0x0 13. " CSEN ,Chip Select Enable" "dis,ena"
bitfld.long 0x0 12. " BAT ,Byte Access Type" "write,select"
bitfld.long 0x0 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
bitfld.long 0x0 5. " WSE ,Wait State Enable" "dis,ena"
bitfld.long 0x0 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
bitfld.long 0x0 0.--1. " DBW ,Data Bus Width" "res,16-bit,8-bit,res"
group ad:0xffe00020++3
line.long 0x0 "RCR,EBI Remap Control Register"
bitfld.long 0x0 0. "RCB ,Remap Command Bit" "no,yes"
group ad:0xffe00024++3
line.long 0x0 "MCR,EBI Memory Control Register"
bitfld.long 0x0 4. "DRP ,Data Read Protocol" "stand,early"
tree.end
;end include file atmel/ebi.ph
;begin include file atmel/pio_v2.ph
;parameters:
tree "Parallel I/O Controller (PIO)"
group ad:0xFFFF0000++0x4f
line.long 0x8 "PSR,PIO Status Register"
setclrfld.long 0x8 31. 0x0 31. 0x4 31. "P31 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 30. 0x0 30. 0x4 30. " P30 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 29. 0x0 29. 0x4 29. " P29 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 28. 0x0 28. 0x4 28. " P28 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 27. 0x0 27. 0x4 27. " P27 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 26. 0x0 26. 0x4 26. " P26 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 25. 0x0 25. 0x4 25. " P25 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 24. 0x0 24. 0x4 24. " P24 ,Which Pins are Enable for PIO Control" "act,inact"
textline " "
setclrfld.long 0x8 23. 0x0 23. 0x4 23. " P23 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 22. 0x0 22. 0x4 22. " P22 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 21. 0x0 21. 0x4 21. " P21 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 20. 0x0 20. 0x4 20. " P20 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 19. 0x0 19. 0x4 19. " P19 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 18. 0x0 18. 0x4 18. " P18 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 17. 0x0 17. 0x4 17. " P17 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 16. 0x0 16. 0x4 16. " P16 ,Which Pins are Enable for PIO Control" "act,inact"
textline " "
setclrfld.long 0x8 15. 0x0 15. 0x4 15. " P15 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 14. 0x0 14. 0x4 14. " P14 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 13. 0x0 13. 0x4 13. " P13 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 12. 0x0 12. 0x4 12. " P12 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 11. 0x0 11. 0x4 11. " P11 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 10. 0x0 10. 0x4 10. " P10 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 9. 0x0 9. 0x4 9. " P9 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 8. 0x0 8. 0x4 8. " P8 ,Which Pins are Enable for PIO Control" "act,inact"
textline " "
setclrfld.long 0x8 7. 0x0 7. 0x4 7. " P7 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " P6 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " P5 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " P4 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " P3 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " P2 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " P1 ,Which Pins are Enable for PIO Control" "act,inact"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " P0 ,Which Pins are Enable for PIO Control" "act,inact"
line.long 0x18 "OSR,PIO Output Status Register"
setclrfld.long 0x18 31. 0x10 31. 0x14 31. "P31 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 30. 0x10 30. 0x14 30. " P30 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 29. 0x10 29. 0x14 29. " P29 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 28. 0x10 28. 0x14 28. " P28 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 27. 0x10 27. 0x14 27. " P27 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 26. 0x10 26. 0x14 26. " P26 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 25. 0x10 25. 0x14 25. " P25 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 24. 0x10 24. 0x14 24. " P24 ,Which Pins are Enable for PIO Control Output" "act,inact"
textline " "
setclrfld.long 0x18 23. 0x10 23. 0x14 23. " P23 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 22. 0x10 22. 0x14 22. " P22 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 21. 0x10 21. 0x14 21. " P21 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 20. 0x10 20. 0x14 20. " P20 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 19. 0x10 19. 0x14 19. " P19 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 18. 0x10 18. 0x14 18. " P18 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 17. 0x10 17. 0x14 17. " P17 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 16. 0x10 16. 0x14 16. " P16 ,Which Pins are Enable for PIO Control Output" "act,inact"
textline " "
setclrfld.long 0x18 15. 0x10 15. 0x14 15. " P15 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 14. 0x10 14. 0x14 14. " P14 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 13. 0x10 13. 0x14 13. " P13 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 12. 0x10 12. 0x14 12. " P12 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 11. 0x10 11. 0x14 11. " P11 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 10. 0x10 10. 0x14 10. " P10 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 9. 0x10 9. 0x14 9. " P9 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 8. 0x10 8. 0x14 8. " P8 ,Which Pins are Enable for PIO Control Output" "act,inact"
textline " "
setclrfld.long 0x18 7. 0x10 7. 0x14 7. " P7 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 6. 0x10 6. 0x14 6. " P6 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 5. 0x10 5. 0x14 5. " P5 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 4. 0x10 4. 0x14 4. " P4 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 3. 0x10 3. 0x14 3. " P3 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 2. 0x10 2. 0x14 2. " P2 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 1. 0x10 1. 0x14 1. " P1 ,Which Pins are Enable for PIO Control Output" "act,inact"
setclrfld.long 0x18 0. 0x10 0. 0x14 0. " P0 ,Which Pins are Enable for PIO Control Output" "act,inact"
line.long 0x28 "IFSR,PIO Input Filter Status Register"
setclrfld.long 0x28 31. 0x20 31. 0x24 31. "P31 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 30. 0x20 30. 0x24 30. " P30 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 29. 0x20 29. 0x24 29. " P29 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 28. 0x20 28. 0x24 28. " P28 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 27. 0x20 27. 0x24 27. " P27 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 26. 0x20 26. 0x24 26. " P26 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 25. 0x20 25. 0x24 25. " P25 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 24. 0x20 24. 0x24 24. " P24 ,Which Pins have Glitch Filter Selected" "inact,act"
textline " "
setclrfld.long 0x28 23. 0x20 23. 0x24 23. " P23 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 22. 0x20 22. 0x24 22. " P22 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 21. 0x20 21. 0x24 21. " P21 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 20. 0x20 20. 0x24 20. " P20 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 19. 0x20 19. 0x24 19. " P19 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 18. 0x20 18. 0x24 18. " P18 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 17. 0x20 17. 0x24 17. " P17 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 16. 0x20 16. 0x24 16. " P16 ,Which Pins have Glitch Filter Selected" "inact,act"
textline " "
setclrfld.long 0x28 15. 0x20 15. 0x24 15. " P15 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 14. 0x20 14. 0x24 14. " P14 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 13. 0x20 13. 0x24 13. " P13 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 12. 0x20 12. 0x24 12. " P12 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 11. 0x20 11. 0x24 11. " P11 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 10. 0x20 10. 0x24 10. " P10 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 9. 0x20 9. 0x24 9. " P9 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 8. 0x20 8. 0x24 8. " P8 ,Which Pins have Glitch Filter Selected" "inact,act"
textline " "
setclrfld.long 0x28 7. 0x20 7. 0x24 7. " P7 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 6. 0x20 6. 0x24 6. " P6 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 5. 0x20 5. 0x24 5. " P5 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 4. 0x20 4. 0x24 4. " P4 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 3. 0x20 3. 0x24 3. " P3 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 2. 0x20 2. 0x24 2. " P2 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 1. 0x20 1. 0x24 1. " P1 ,Which Pins have Glitch Filter Selected" "inact,act"
setclrfld.long 0x28 0. 0x20 0. 0x24 0. " P0 ,Which Pins have Glitch Filter Selected" "inact,act"
line.long 0x38 "ODSR,PIO Output Data Status Register"
setclrfld.long 0x38 31. 0x30 31. 0x34 31. "P31 ,Output Data Status" "0,1"
setclrfld.long 0x38 30. 0x30 30. 0x34 30. " P30 ,Output Data Status" "0,1"
setclrfld.long 0x38 29. 0x30 29. 0x34 29. " P29 ,Output Data Status" "0,1"
setclrfld.long 0x38 28. 0x30 28. 0x34 28. " P28 ,Output Data Status" "0,1"
setclrfld.long 0x38 27. 0x30 27. 0x34 27. " P27 ,Output Data Status" "0,1"
setclrfld.long 0x38 26. 0x30 26. 0x34 26. " P26 ,Output Data Status" "0,1"
setclrfld.long 0x38 25. 0x30 25. 0x34 25. " P25 ,Output Data Status" "0,1"
setclrfld.long 0x38 24. 0x30 24. 0x34 24. " P24 ,Output Data Status" "0,1"
textline " "
setclrfld.long 0x38 23. 0x30 23. 0x34 23. " P23 ,Output Data Status" "0,1"
setclrfld.long 0x38 22. 0x30 22. 0x34 22. " P22 ,Output Data Status" "0,1"
setclrfld.long 0x38 21. 0x30 21. 0x34 21. " P21 ,Output Data Status" "0,1"
setclrfld.long 0x38 20. 0x30 20. 0x34 20. " P20 ,Output Data Status" "0,1"
setclrfld.long 0x38 19. 0x30 19. 0x34 19. " P19 ,Output Data Status" "0,1"
setclrfld.long 0x38 18. 0x30 18. 0x34 18. " P18 ,Output Data Status" "0,1"
setclrfld.long 0x38 17. 0x30 17. 0x34 17. " P17 ,Output Data Status" "0,1"
setclrfld.long 0x38 16. 0x30 16. 0x34 16. " P16 ,Output Data Status" "0,1"
textline " "
setclrfld.long 0x38 15. 0x30 15. 0x34 15. " P15 ,Output Data Status" "0,1"
setclrfld.long 0x38 14. 0x30 14. 0x34 14. " P18 ,Output Data Status" "0,1"
setclrfld.long 0x38 13. 0x30 13. 0x34 13. " P14 ,Output Data Status" "0,1"
setclrfld.long 0x38 12. 0x30 12. 0x34 12. " P12 ,Output Data Status" "0,1"
setclrfld.long 0x38 11. 0x30 11. 0x34 11. " P11 ,Output Data Status" "0,1"
setclrfld.long 0x38 10. 0x30 10. 0x34 10. " P10 ,Output Data Status" "0,1"
setclrfld.long 0x38 9. 0x30 9. 0x34 9. " P9 ,Output Data Status" "0,1"
setclrfld.long 0x38 8. 0x30 8. 0x34 8. " P8 ,Output Data Status" "0,1"
textline " "
setclrfld.long 0x38 7. 0x30 7. 0x34 7. " P7 ,Output Data Status" "0,1"
setclrfld.long 0x38 6. 0x30 6. 0x34 6. " P6 ,Output Data Status" "0,1"
setclrfld.long 0x38 5. 0x30 5. 0x34 5. " P5 ,Output Data Status" "0,1"
setclrfld.long 0x38 4. 0x30 4. 0x34 4. " P4 ,Output Data Status" "0,1"
setclrfld.long 0x38 3. 0x30 3. 0x34 3. " P3 ,Output Data Status" "0,1"
setclrfld.long 0x38 2. 0x30 2. 0x34 2. " P2 ,Output Data Status" "0,1"
setclrfld.long 0x38 1. 0x30 1. 0x34 1. " P1 ,Output Data Status" "0,1"
setclrfld.long 0x38 0. 0x30 0. 0x34 0. " P0 ,Output Data Status" "0,1"
line.long 0x3c "PDSR,PIO Pin Data Status Register"
bitfld.long 0x3c 31. "P31 ,Pin Data Status" "0,1"
bitfld.long 0x3c 30. " P30 ,Pin Data Status" "0,1"
bitfld.long 0x3c 29. " P29 ,Pin Data Status" "0,1"
bitfld.long 0x3c 28. " P28 ,Pin Data Status" "0,1"
bitfld.long 0x3c 27. " P27 ,Pin Data Status" "0,1"
bitfld.long 0x3c 26. " P26 ,Pin Data Status" "0,1"
bitfld.long 0x3c 25. " P25 ,Pin Data Status" "0,1"
bitfld.long 0x3c 24. " P24 ,Pin Data Status" "0,1"
textline " "
bitfld.long 0x3c 23. " P23 ,Pin Data Status" "0,1"
bitfld.long 0x3c 22. " P22 ,Pin Data Status" "0,1"
bitfld.long 0x3c 21. " P21 ,Pin Data Status" "0,1"
bitfld.long 0x3c 20. " P20 ,Pin Data Status" "0,1"
bitfld.long 0x3c 19. " P19 ,Pin Data Status" "0,1"
bitfld.long 0x3c 18. " P18 ,Pin Data Status" "0,1"
bitfld.long 0x3c 17. " P17 ,Pin Data Status" "0,1"
bitfld.long 0x3c 16. " P16 ,Pin Data Status" "0,1"
textline " "
bitfld.long 0x3c 15. " P15 ,Pin Data Status" "0,1"
bitfld.long 0x3c 14. " P14 ,Pin Data Status" "0,1"
bitfld.long 0x3c 13. " P13 ,Pin Data Status" "0,1"
bitfld.long 0x3c 12. " P12 ,Pin Data Status" "0,1"
bitfld.long 0x3c 11. " P11 ,Pin Data Status" "0,1"
bitfld.long 0x3c 10. " P10 ,Pin Data Status" "0,1"
bitfld.long 0x3c 9. " P9 ,Pin Data Status" "0,1"
bitfld.long 0x3c 8. " P8 ,Pin Data Status" "0,1"
textline " "
bitfld.long 0x3c 7. " P7 ,Pin Data Status" "0,1"
bitfld.long 0x3c 6. " P6 ,Pin Data Status" "0,1"
bitfld.long 0x3c 5. " P5 ,Pin Data Status" "0,1"
bitfld.long 0x3c 4. " P4 ,Pin Data Status" "0,1"
bitfld.long 0x3c 3. " P3 ,Pin Data Status" "0,1"
bitfld.long 0x3c 2. " P2 ,Pin Data Status" "0,1"
bitfld.long 0x3c 1. " P1 ,Pin Data Status" "0,1"
bitfld.long 0x3c 0. " P0 ,Pin Data Status" "0,1"
line.long 0x48 "IMR,PIO Interrupt Mask Register"
setclrfld.long 0x48 31. 0x40 31. 0x44 31. "P31 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 30. 0x40 30. 0x44 30. " P30 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 29. 0x40 29. 0x44 29. " P29 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 28. 0x40 28. 0x44 28. " P28 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 27. 0x40 27. 0x44 27. " P27 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 26. 0x40 26. 0x44 26. " P26 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 25. 0x40 25. 0x44 25. " P25 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 24. 0x40 24. 0x44 24. " P24 ,Interrupt is Enable" "dis,ena"
textline " "
setclrfld.long 0x48 23. 0x40 23. 0x44 23. " P23 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 22. 0x40 22. 0x44 22. " P22 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 21. 0x40 21. 0x44 21. " P21 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 20. 0x40 20. 0x44 20. " P20 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 19. 0x40 19. 0x44 19. " P19 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 18. 0x40 18. 0x44 18. " P18 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 17. 0x40 17. 0x44 17. " P17 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 16. 0x40 16. 0x44 16. " P16 ,Interrupt is Enable" "dis,ena"
textline " "
setclrfld.long 0x48 15. 0x40 15. 0x44 15. " P15 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 14. 0x40 14. 0x44 14. " P14 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 13. 0x40 13. 0x44 13. " P13 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 12. 0x40 12. 0x44 12. " P12 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 11. 0x40 11. 0x44 11. " P11 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 10. 0x40 10. 0x44 10. " P10 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 9. 0x40 9. 0x44 9. " P9 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 8. 0x40 8. 0x44 8. " P8 ,Interrupt is Enable" "dis,ena"
textline " "
setclrfld.long 0x48 7. 0x40 7. 0x44 7. " P7 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 6. 0x40 6. 0x44 6. " P6 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 5. 0x40 5. 0x44 5. " P5 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 4. 0x40 4. 0x44 4. " P4 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 3. 0x40 3. 0x44 3. " P3 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 2. 0x40 2. 0x44 2. " P2 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 1. 0x40 1. 0x44 1. " P1 ,Interrupt is Enable" "dis,ena"
setclrfld.long 0x48 0. 0x40 0. 0x44 0. " P0 ,Interrupt is Enable" "dis,ena"
line.long 0x4c "ISR,PIO Interrupt Status Register"
bitfld.long 0x4c 31. "P31 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 30. " P30 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 29. " P29 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 28. " P28 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 27. " P27 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 26. " P26 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 25. " P25 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 24. " P24 ,Interrupt Status" "no,yes"
textline " "
bitfld.long 0x4c 23. " P23 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 22. " P22 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 21. " P21 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 20. " P20 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 19. " P19 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 18. " P18 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 17. " P17 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 16. " P16 ,Interrupt Status" "no,yes"
textline " "
bitfld.long 0x4c 15. " P15 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 14. " P14 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 13. " P13 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 12. " P12 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 11. " P11 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 10. " P10 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 9. " P9 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 8. " P8 ,Interrupt Status" "no,yes"
textline " "
bitfld.long 0x4c 7. " P7 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 6. " P6 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 5. " P5 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 4. " P4 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 3. " P3 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 2. " P2 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 1. " P1 ,Interrupt Status" "no,yes"
bitfld.long 0x4c 0. " P0 ,Interrupt Status" "no,yes"
tree.end
;end include file atmel/pio_v2.ph
;begin include file atmel/sf_v2.ph
;parameters:
tree "Special Function Register (SF)"
group ad:0xFFF00000++3
line.long 0x0 "CIDR,Chip ID Register"
bitfld.long 0x0 31. "EXT ,Extension Flag" "no,yes"
bitfld.long 0x0 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "res,M/F,res,res,R SERIES,res,res,res"
hexmask.long.byte 0x0 20.--27. 0x1 " ARCH ,Chip Architecture"
bitfld.long 0x0 16.--19. " VDSIZ ,Volatile Data Memory Size" "none,1KB,2KB,res,4KB,res,res,res,8KB,res,res,res,res,res,res,res"
textline " "
bitfld.long 0x0 12.--15. " NVDSIZ ,Nonvolatile Data Memory Size" "none,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res"
bitfld.long 0x0 8.--11. " NVPSIZ ,Nonvolatile Program Memory Size" "none,res,res,32KB,res,64KB,res,128KB,res,256KB,res,res,res,res,res,res"
hexmask.long.byte 0x0 0.--4. 0x1 " VERSION ,Version of the chip"
group ad:0xFFF00004++3
line.long 0x0 "EXID,Chip ID Extension Register"
group ad:0xFFF00008++3
line.long 0x0 "RSR,Reset Status Register"
hexmask.long.byte 0x0 0.--7. 0x1 "RESET ,Reset Status Information"
group ad:0xFFF0000c++3
line.long 0x0 "MMR,SF Memory Mode Register"
bitfld.long 0x0 0. "RAMWU ,Internal Extended RAM Write Detection" "no,yes"
group ad:0xFFF00018++3
line.long 0x0 "PMR,SF Protect Mode Register"
hexmask.long.word 0x0 16.--31. 0x1 "PMRKEY ,Protect Mode Register Key"
bitfld.long 0x0 5. " AIC ,AIC Protect Mode Enable" "norm,protect"
tree.end
;end include file atmel/sf_v2.ph
;begin include file atmel/ps.ph
;parameters:
tree "Power-saving (PS)"
group ad:0xFFFF4000++3
line.long 0x0 "CON,PS Control Register"
bitfld.long 0x0 0. "CPU ,CPU Clock Disable" "-,dis"
group ad:0xFFFF4004++0xb
line.long 0x8 "PSR,PIO Status Register"
setclrfld.long 0x8 8. 0x0 8. 0x4 8. "PIO ,Parallel IO Clock Status" "dis,ena"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " TC2 ,Timer Counter 2 Clock Status" "dis,ena"
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " TC1 ,Timer Counter 1 Clock Status" "dis,ena"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " TC0 ,Timer Counter 0 Clock Status" "dis,ena"
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " US1 ,USART 1 Clock Status" "dis,ena"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " US0 ,USART 0 Clock Status" "dis,ena"
tree.end
;end include file atmel/ps.ph
;begin include file atmel/tc.ph
;parameters:
tree "Timer Counter (TC)"
group ad:0xFFFE00C0++3
line.long 0x0 "BCR,TC Block Control Register"
bitfld.long 0x0 0. "SYNC ,Synchro Command" "-,assert"
group ad:0xFFFE00C4++3
line.long 0x0 "BMR,TC Block Mode Register"
bitfld.long 0x0 4.--5. "TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,None,TIOA0,TIOA1"
bitfld.long 0x0 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,None,TIOA0,TIOA2"
bitfld.long 0x0 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,None,TIOA1,TIOA2"
group ad:0xFFFE0000++3 "Channel 0"
line.long 0x0 "CCR,TC Channel Control Register"
bitfld.long 0x0 2. "SWTRG ,Software Trigger Command" "-,yes"
bitfld.long 0x0 1. " CLKDIS ,Counter Clock Disable Command" "-,dis"
bitfld.long 0x0 0. " CLKEN ,Counter Clock Enable Command" "-,ena"
group ad:0xFFFE0004++3
line.long 0x0 "CMR,TC Channel Mode Register Capture Mode"
bitfld.long 0x0 18.--19. "LDRB ,RB Loading Selection" "no,rise,fall,each"
bitfld.long 0x0 16.--17. " LDRA ,RA Loading Selection" "no,rise,fall,each"
bitfld.long 0x0 15. " WAVE ,WAVE = 0" "ena,dis"
bitfld.long 0x0 14. " CPCTRG ,RC Compare Trigger Enable" "dis,ena"
bitfld.long 0x0 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
bitfld.long 0x0 8.--9. " ETRGEDG ,External Trigger Edge Selection" "no,rise,fall,each"
textline " "
bitfld.long 0x0 7. " LDBDIS ,Counter Clock Disable with RB Loading" "no,dis"
bitfld.long 0x0 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "no,yes"
bitfld.long 0x0 4.--5. " BURST ,Burst Signal Selection" "no,XC0,XC1,XC2"
bitfld.long 0x0 3. " CLKI ,Clock Invert" "rise,fall"
bitfld.long 0x0 0.--2. " TCCLKS ,Clock Selection" "2,8,32,128,1024,XC0,XC1,XC2"
group ad:0xFFFE0010++3
line.long 0x0 "CVR,TC Counter Value Register"
hexmask.long.word 0x0 0.--15. 0x1 "CV ,Counter Value"
group ad:0xFFFE0014++3
line.long 0x0 "RA,TC Register A"
hexmask.long.word 0x0 0.--15. 0x1 "RA ,Register A"
group ad:0xFFFE0018++3
line.long 0x0 "RB,TC Register B"
hexmask.long.word 0x0 0.--15. 0x1 "RB ,Register B"
group ad:0xFFFE001c++3
line.long 0x0 "RC,TC Register C"
hexmask.long.word 0x0 0.--15. 0x1 "RC ,Register C"
group ad:0xFFFE0020++3
line.long 0x0 "SR,TC Status Register"
bitfld.long 0x0 18. "MTIOB ,TIOB Mirror" "low,high"
bitfld.long 0x0 17. " MTIOA ,TIOA Mirror" "low,high"
bitfld.long 0x0 16. " CLKSTA ,Clock Enabling Status" "no,yes"
bitfld.long 0x0 7. " ETRGS ,External Trigger Status" "no,yes"
bitfld.long 0x0 6. " LDRBS ,RB Loading Status" "no,yes"
bitfld.long 0x0 5. " LDRAS ,RA Loading Status" "no,yes"
textline " "
bitfld.long 0x0 4. " CPCS ,RC Compare Status" "no,yes"
bitfld.long 0x0 3. " CPBS ,RB Compare Status" "no,yes"
bitfld.long 0x0 2. " CPAS ,RA Compare Status" "no,yes"
bitfld.long 0x0 1. " LOVRS ,Load Overrun Status" "no,yes"
bitfld.long 0x0 0. " COVFS ,Counter Overflow Status" "no,yes"
group ad:0xFFFE0024++0xb
line.long 0x8 "IMR,TC Interrupt Mask Register"
setclrfld.long 0x8 7. 0x0 7. 0x4 7. "ETRGS ,External Trigger" "dis,ena"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " LDRBS ,RB Loading" "dis,ena"
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " LDRAS ,RA Loading" "dis,ena"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " CPCS ,RC Compare" "dis,ena"
textline " "
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " CPBS ,RB Compare" "dis,ena"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " CPAS ,RA Compare" "dis,ena"
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " LOVRS ,Load Overrun" "dis,ena"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " COVFS ,Counter Overflow" "dis,ena"
group ad:0xFFFE0040++3 "Channel 1"
line.long 0x0 "CCR,TC Channel Control Register"
bitfld.long 0x0 2. "SWTRG ,Software Trigger Command" "-,yes"
bitfld.long 0x0 1. " CLKDIS ,Counter Clock Disable Command" "-,dis"
bitfld.long 0x0 0. " CLKEN ,Counter Clock Enable Command" "-,ena"
group ad:0xFFFE0044++3
line.long 0x0 "CMR,TC Channel Mode Register Capture Mode"
bitfld.long 0x0 18.--19. "LDRB ,RB Loading Selection" "no,rise,fall,each"
bitfld.long 0x0 16.--17. " LDRA ,RA Loading Selection" "no,rise,fall,each"
bitfld.long 0x0 15. " WAVE ,WAVE = 0" "ena,dis"
bitfld.long 0x0 14. " CPCTRG ,RC Compare Trigger Enable" "dis,ena"
bitfld.long 0x0 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
bitfld.long 0x0 8.--9. " ETRGEDG ,External Trigger Edge Selection" "no,rise,fall,each"
textline " "
bitfld.long 0x0 7. " LDBDIS ,Counter Clock Disable with RB Loading" "no,dis"
bitfld.long 0x0 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "no,yes"
bitfld.long 0x0 4.--5. " BURST ,Burst Signal Selection" "no,XC0,XC1,XC2"
bitfld.long 0x0 3. " CLKI ,Clock Invert" "rise,fall"
bitfld.long 0x0 0.--2. " TCCLKS ,Clock Selection" "2,8,32,128,1024,XC0,XC1,XC2"
group ad:0xFFFE0050++3
line.long 0x0 "CVR,TC Counter Value Register"
hexmask.long.word 0x0 0.--15. 0x1 "CV ,Counter Value"
group ad:0xFFFE0054++3
line.long 0x0 "RA,TC Register A"
hexmask.long.word 0x0 0.--15. 0x1 "RA ,Register A"
group ad:0xFFFE0058++3
line.long 0x0 "RB,TC Register B"
hexmask.long.word 0x0 0.--15. 0x1 "RB ,Register B"
group ad:0xFFFE005c++3
line.long 0x0 "RC,TC Register C"
hexmask.long.word 0x0 0.--15. 0x1 "RC ,Register C"
group ad:0xFFFE0060++3
line.long 0x0 "SR,TC Status Register"
bitfld.long 0x0 18. "MTIOB ,TIOB Mirror" "low,high"
bitfld.long 0x0 17. " MTIOA ,TIOA Mirror" "low,high"
bitfld.long 0x0 16. " CLKSTA ,Clock Enabling Status" "no,yes"
bitfld.long 0x0 7. " ETRGS ,External Trigger Status" "no,yes"
bitfld.long 0x0 6. " LDRBS ,RB Loading Status" "no,yes"
bitfld.long 0x0 5. " LDRAS ,RA Loading Status" "no,yes"
textline " "
bitfld.long 0x0 4. " CPCS ,RC Compare Status" "no,yes"
bitfld.long 0x0 3. " CPBS ,RB Compare Status" "no,yes"
bitfld.long 0x0 2. " CPAS ,RA Compare Status" "no,yes"
bitfld.long 0x0 1. " LOVRS ,Load Overrun Status" "no,yes"
bitfld.long 0x0 0. " COVFS ,Counter Overflow Status" "no,yes"
group ad:0xFFFE0064++0xb
line.long 0x8 "IMR,TC Interrupt Mask Register"
setclrfld.long 0x8 7. 0x0 7. 0x4 7. "ETRGS ,External Trigger" "dis,ena"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " LDRBS ,RB Loading" "dis,ena"
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " LDRAS ,RA Loading" "dis,ena"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " CPCS ,RC Compare" "dis,ena"
textline " "
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " CPBS ,RB Compare" "dis,ena"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " CPAS ,RA Compare" "dis,ena"
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " LOVRS ,Load Overrun" "dis,ena"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " COVFS ,Counter Overflow" "dis,ena"
group ad:0xFFFE0080++3 "Channel 2"
line.long 0x0 "CCR,TC Channel Control Register"
bitfld.long 0x0 2. "SWTRG ,Software Trigger Command" "-,yes"
bitfld.long 0x0 1. " CLKDIS ,Counter Clock Disable Command" "-,dis"
bitfld.long 0x0 0. " CLKEN ,Counter Clock Enable Command" "-,ena"
group ad:0xFFFE0084++3
line.long 0x0 "CMR,TC Channel Mode Register Capture Mode"
bitfld.long 0x0 18.--19. "LDRB ,RB Loading Selection" "no,rise,fall,each"
bitfld.long 0x0 16.--17. " LDRA ,RA Loading Selection" "no,rise,fall,each"
bitfld.long 0x0 15. " WAVE ,WAVE = 0" "ena,dis"
bitfld.long 0x0 14. " CPCTRG ,RC Compare Trigger Enable" "dis,ena"
bitfld.long 0x0 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
bitfld.long 0x0 8.--9. " ETRGEDG ,External Trigger Edge Selection" "no,rise,fall,each"
textline " "
bitfld.long 0x0 7. " LDBDIS ,Counter Clock Disable with RB Loading" "no,dis"
bitfld.long 0x0 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "no,yes"
bitfld.long 0x0 4.--5. " BURST ,Burst Signal Selection" "no,XC0,XC1,XC2"
bitfld.long 0x0 3. " CLKI ,Clock Invert" "rise,fall"
bitfld.long 0x0 0.--2. " TCCLKS ,Clock Selection" "2,8,32,128,1024,XC0,XC1,XC2"
group ad:0xFFFE0090++3
line.long 0x0 "CVR,TC Counter Value Register"
hexmask.long.word 0x0 0.--15. 0x1 "CV ,Counter Value"
group ad:0xFFFE0094++3
line.long 0x0 "RA,TC Register A"
hexmask.long.word 0x0 0.--15. 0x1 "RA ,Register A"
group ad:0xFFFE0098++3
line.long 0x0 "RB,TC Register B"
hexmask.long.word 0x0 0.--15. 0x1 "RB ,Register B"
group ad:0xFFFE009c++3
line.long 0x0 "RC,TC Register C"
hexmask.long.word 0x0 0.--15. 0x1 "RC ,Register C"
group ad:0xFFFE00a0++3
line.long 0x0 "SR,TC Status Register"
bitfld.long 0x0 18. "MTIOB ,TIOB Mirror" "low,high"
bitfld.long 0x0 17. " MTIOA ,TIOA Mirror" "low,high"
bitfld.long 0x0 16. " CLKSTA ,Clock Enabling Status" "no,yes"
bitfld.long 0x0 7. " ETRGS ,External Trigger Status" "no,yes"
bitfld.long 0x0 6. " LDRBS ,RB Loading Status" "no,yes"
bitfld.long 0x0 5. " LDRAS ,RA Loading Status" "no,yes"
textline " "
bitfld.long 0x0 4. " CPCS ,RC Compare Status" "no,yes"
bitfld.long 0x0 3. " CPBS ,RB Compare Status" "no,yes"
bitfld.long 0x0 2. " CPAS ,RA Compare Status" "no,yes"
bitfld.long 0x0 1. " LOVRS ,Load Overrun Status" "no,yes"
bitfld.long 0x0 0. " COVFS ,Counter Overflow Status" "no,yes"
group ad:0xFFFE00a4++0xb
line.long 0x8 "IMR,TC Interrupt Mask Register"
setclrfld.long 0x8 7. 0x0 7. 0x4 7. "ETRGS ,External Trigger" "dis,ena"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " LDRBS ,RB Loading" "dis,ena"
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " LDRAS ,RA Loading" "dis,ena"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " CPCS ,RC Compare" "dis,ena"
textline " "
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " CPBS ,RB Compare" "dis,ena"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " CPAS ,RA Compare" "dis,ena"
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " LOVRS ,Load Overrun" "dis,ena"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " COVFS ,Counter Overflow" "dis,ena"
tree.end
;end include file atmel/tc.ph
;begin include file atmel/usart_v2.ph
;parameters:
tree "Universal Synchronous/Asynchronous Receiver/Transmitter (USART)"
group ad:0xFFFD0000++0x3f "USART 0"
line.long 0x0 "CR,USART Control Register"
bitfld.long 0x0 12. "SENDA ,Send Address" "-,yes"
bitfld.long 0x0 11. " STTTO ,Start Time-out" "-,yes"
bitfld.long 0x0 10. " STPBRK ,Stop Break" "-,yes"
bitfld.long 0x0 9. " STTBRK ,Start Break" "-,yes"
bitfld.long 0x0 8. " RSTSTA ,Reset Status Bits" "-,yes"
bitfld.long 0x0 7. " TXDIS ,Transmitter Disable" "-,dis"
textline " "
bitfld.long 0x0 6. " TXEN ,Transmitter Enable" "-,ena"
bitfld.long 0x0 5. " RXDIS ,Receiver Disable" "-,dis"
bitfld.long 0x0 4. " RXEN ,Receiver Enable" "-,ena"
bitfld.long 0x0 3. " RSTTX ,Reset Transmitter" "-,yes"
bitfld.long 0x0 2. " RSTRX ,Reset Receiver" "-,yes"
line.long 0x4 "MR,USART Mode Register"
bitfld.long 0x4 18. "CKLO ,Clock Output Select" "no,yes"
bitfld.long 0x4 17. " MODE9 ,9-Bit Character Length" "CHRL,9-bit"
bitfld.long 0x4 14.--15. " CHMODE ,Channel Mode" "norm,auto,local,remote"
bitfld.long 0x4 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,res"
textline " "
bitfld.long 0x4 9.--11. " PAR ,Parity Type" "even,odd,space,mark,no,no,multi,multi"
bitfld.long 0x4 8. " SYNC ,Synchronous Mode Select" "asyn,syn"
bitfld.long 0x4 6.--7. " CHRL ,Character Length" "5,6,7,8"
bitfld.long 0x4 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,extern,extern"
line.long 0x10 "IR,USART Interrupt Register"
setclrfld.long 0x10 9. 0x8 9. 0xc 9. "TXEMPTY ,Disable TXEMPTY Interrupt" "dis,ena"
setclrfld.long 0x10 8. 0x8 8. 0xc 8. " TIMEOUT ,Time-out Interrupt Mask" "dis,ena"
setclrfld.long 0x10 7. 0x8 7. 0xc 7. " PARE ,Parity Error Interrupt Mask" "dis,ena"
setclrfld.long 0x10 6. 0x8 6. 0xc 6. " FRAME ,Framing Error Interrupt Mask" "dis,ena"
setclrfld.long 0x10 5. 0x8 5. 0xc 5. " OVRE ,Overrun Error Interrupt Mask" "dis,ena"
textline " "
setclrfld.long 0x10 4. 0x8 4. 0xc 4. " ENDTX ,End of Transmit Transfer Interrupt Mask" "dis,ena"
setclrfld.long 0x10 3. 0x8 3. 0xc 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "dis,ena"
setclrfld.long 0x10 2. 0x8 2. 0xc 2. " RXBRK ,Receiver Break Interrupt Mask" "dis,ena"
setclrfld.long 0x10 1. 0x8 1. 0xc 1. " TXRDY ,TXRDY Interrupt Mask" "dis,ena"
setclrfld.long 0x10 0. 0x8 0. 0xc 0. " RXRDY ,RXRDY Interrupt Mask" "dis,ena"
line.long 0x14 "CSR,USART Channel Status Register"
bitfld.long 0x14 9. "TXEMPTY ,TXEMPTY Transmitter Empty" "no,yes"
bitfld.long 0x14 8. " TIMEOUT ,Time-out Receiver Time-out" "no,yes"
bitfld.long 0x14 7. " PARE ,Parity Error" "no,yes"
bitfld.long 0x14 6. " FRAME ,Framing Error " "no,yes"
bitfld.long 0x14 5. " OVRE ,Overrun Error k" "no,yes"
textline " "
bitfld.long 0x14 4. " ENDTX ,End of Transmit Transfer " "no,yes"
bitfld.long 0x14 3. " ENDRX ,End of Receive Transfer" "no,yes"
bitfld.long 0x14 2. " RXBRK ,Receiver Break" "no,yes"
bitfld.long 0x14 1. " TXRDY ,TXRDY Transmitter Ready " "no,yes"
bitfld.long 0x14 0. " RXRDY ,RXRDY Receiver Ready" "no,yes"
line.long 0x18 "RHR,USART Receiver Holding Register"
hexmask.long.word 0x18 0.--8. 0x1 "RXCHR ,Received Character"
line.long 0x1c "THR,USART Transmitter Holding Register"
hexmask.long.word 0x1c 0.--8. 0x1 "TXCHR ,Transmitted Character"
line.long 0x20 "BRGR,USART Baud Rate Generator Register"
hexmask.long.word 0x20 0.--15. 0x1 "CD ,Clock Divisor"
line.long 0x24 "RTOR,USART Receiver Time-out Register"
hexmask.long.byte 0x24 0.--7. 0x1 "TO ,Time-out Value"
line.long 0x28 "TTGR,USART Transmitter Time-guard Register"
hexmask.long.byte 0x28 0.--7. 0x1 "TG ,Time-guard Value"
line.long 0x30 "RPR,USART Receive Pointer Register"
line.long 0x34 "RCR,USART Receive Counter Register"
hexmask.long.word 0x34 0.--15. 0x1 "RXCTR ,Receive Counter"
line.long 0x38 "TPR,USART Transmit Pointer Register"
line.long 0x3c "TCR,USART Transmit Counter Register"
hexmask.long.word 0x3c 0.--15. 0x1 "TXCTR ,Transmit Counter"
group ad:0xFFFCC000++0x3f "USART 1"
copy
tree.end
;end include file atmel/usart_v2.ph
;begin include file atmel/wd.ph
;parameters:
tree "Watchdog Timer (WD)"
group ad:0xFFFF8000++3
line.long 0x0 "OMR,WD Overflow Mode Register"
hexmask.long.word 0x0 4.--15. 0x1 "OKEY ,Overflow Access Key"
bitfld.long 0x0 3. " EXTEN ,External Signal Enable" "dis,ena"
bitfld.long 0x0 2. " IRQEN ,Interrupt Enable" "dis,ena"
bitfld.long 0x0 1. " RSTEN ,Reset Enable" "dis,ena"
bitfld.long 0x0 0. " WDEN ,Watchdog Enable" "dis,ena"
group ad:0xFFFF8004++3
line.long 0x0 "CMR,WD Clock Mode Register"
hexmask.long.word 0x0 7.--15. 0x1 "OKEY ,Overflow Access Key"
bitfld.long 0x0 2.--5. " HPCV ,High Pre-load Counter Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--1. " WDCLKS ,Clock Selection" "MCK/32,MCK/128,MCK/1024,MCK/4096"
group ad:0xFFFF8008++3
line.long 0x0 "CR,WD Control Register"
hexmask.long.word 0x0 0.--15. 0x1 "RSTKEY ,Restart Key"
group ad:0xFFFF800c++3
line.long 0x0 "SR,WD Status Register"
bitfld.long 0x0 0. "WDOVF ,Watchdog Overflow" "0,1"
tree.end
;end include file atmel/wd.ph
;begin include file arm/icebreaker.ph
;parameters:
tree "ICEBreaker"
group ice:0x8--0x8 "Watchpoint 0"
line.long 0x0 "AV,Address Value"
group ice:0x9--0x9
line.long 0x0 "AM,Address Mask"
group ice:0x0a--0x0a
line.long 0x0 "DV,Data Value"
group ice:0x0b--0x0b
line.long 0x0 "DM,Data Mask"
group ice:0x0c--0x0c
line.long 0x0 "CV,Control Value"
bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W"
group ice:0x0d--0x0d
line.long 0x0 "CM,Control Mask"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x10 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
group ice:0x11--0x11
line.long 0x0 "AM,Address Mask"
group ice:0x12--0x12
line.long 0x0 "DV,Data Value"
group ice:0x13--0x13
line.long 0x0 "DM,Data Mask"
group ice:0x14--0x14
line.long 0x0 "CV,Control Value"
bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W"
group ice:0x15--0x15
line.long 0x0 "CM,Control Mask"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
;end include file arm/icebreaker.ph
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