635 lines
26 KiB
Plaintext
635 lines
26 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: TXZ4 Specific Menu
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; @Props: Released
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; @Author: KWI, PIW
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; @Changelog: 2020-03-06 KWI
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; 2022-01-29 PIW
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; @Manufacturer: TOSHIBA - Toshiba
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; @Core: Cortex-M4F
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; @Chip: TMPM4G*, TMPM4K*, TMPM4L*
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mentxz4.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
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(
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menuitem "DMACA" "per , ""DMACA (DMA Controller),DMACA"""
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menuitem "DMACB" "per , ""DMACB (DMA Controller),DMACB"""
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menuitem "SMI" "per , ""SMI,SMI"""
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)
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menuitem "IA" "per , ""IA (Interrupt control A Register),IA"""
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menuitem "RLM" "per , ""RLM (Reset Low power Managiment Register),RLM"""
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menuitem "LVD" "per , ""LVD (LVD0),LVD"""
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menuitem "TSEL" "per , ""TSEL (TRGSEL),TSEL"""
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
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(
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menuitem "LTT" "per , ""LTT (Long Term Timer(LTTMR)),LTT"""
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*"))
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(
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popup "TSPI (Serial Interface (TSPI))"
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(
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
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(
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menuitem "TSPI0" "per , ""TSPI (Serial Interface (TSPI)),TSPI0"""
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)
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
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(
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menuitem "TSPI1" "per , ""TSPI (Serial Interface (TSPI)),TSPI1"""
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)
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
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(
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menuitem "TSPI2" "per , ""TSPI (Serial Interface (TSPI)),TSPI2"""
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)
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K4A*"))
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(
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menuitem "TSPI3" "per , ""TSPI (Serial Interface (TSPI)),TSPI3"""
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)
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
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(
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menuitem "TSPI4" "per , ""TSPI (Serial Interface (TSPI)),TSPI4"""
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)
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
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(
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menuitem "TSPI5" "per , ""TSPI (Serial Interface (TSPI)),TSPI5"""
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menuitem "TSPI6" "per , ""TSPI (Serial Interface (TSPI)),TSPI6"""
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)
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menuitem "TSPI7" "per , ""TSPI (Serial Interface (TSPI)),TSPI7"""
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menuitem "TSPI8" "per , ""TSPI (Serial Interface (TSPI)),TSPI8"""
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)
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
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(
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menuitem "EXB" "per , ""EXB (External Bus Interface(EXB)),EXB"""
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)
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menuitem "CG" "per , ""CG (Clock Generator (CG)),CG"""
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menuitem "IB" "per , ""IB (Interrupt Control B Register),IB"""
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menuitem "IMN" "per , ""IMN (Interrupt Monitor Register),IMN"""
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
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(
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menuitem "DNFA" "per , ""DNFA (DNF),DNFA"""
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menuitem "DNFB" "per , ""DNFB (DNF),DNFB"""
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)
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menuitem "SIWD" "per , ""SIWD (Watchdog Timer (WD)),SIWD"""
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K4A*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
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(
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menuitem "NBD" "per , ""NBD,NBD"""
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
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(
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menuitem "MDMA" "per , ""MDMA (Malti Porpose Direct Memory Accsess(MDMA)),MDMA"""
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*"))
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(
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popup "FURT (ARM Prime Cell PL011)"
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(
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menuitem "FURT0" "per , ""FURT (ARM Prime Cell PL011),FURT0"""
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menuitem "FURT1" "per , ""FURT (ARM Prime Cell PL011),FURT1"""
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)
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
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(
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menuitem "AD" "per , ""AD (ADC),AD"""
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
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(
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popup "DA (Digital analog converter (DAC))"
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(
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menuitem "DA0" "per , ""DA (Digital analog converter (DAC)),DA0"""
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menuitem "DA1" "per , ""DA (Digital analog converter (DAC)),DA1"""
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)
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popup "T32A (32-bit Timer Event Counter (T32A))"
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(
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
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(
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menuitem "T32A0" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A0"""
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menuitem "T32A1" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A1"""
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menuitem "T32A2" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A2"""
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menuitem "T32A3" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A3"""
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)
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if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
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(
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menuitem "T32A4" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A4"""
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menuitem "T32A5" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A5"""
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)
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menuitem "T32A6" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A6"""
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menuitem "T32A7" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A7"""
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menuitem "T32A8" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A8"""
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menuitem "T32A9" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A9"""
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menuitem "T32A10" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A10"""
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menuitem "T32A11" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A11"""
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menuitem "T32A12" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A12"""
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menuitem "T32A13" "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A13"""
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)
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)
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if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*"))
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(
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popup "UART (Universal Asynchronous Receiver/Transmitter)"
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(
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "UART0" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART0"""
|
|
)
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "UART1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
|
|
)
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "UART2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART2"""
|
|
)
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K4A*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "UART3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
|
|
)
|
|
menuitem "UART4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
|
|
menuitem "UART5" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART5"""
|
|
)
|
|
popup "I2C (Inter-Integrated Circuit)"
|
|
(
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
|
|
menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
|
|
)
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
|
|
(
|
|
menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit),I2C2"""
|
|
)
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
|
|
(
|
|
menuitem "I2C3" "per , ""I2C (Inter-Integrated Circuit),I2C3"""
|
|
)
|
|
menuitem "I2C4" "per , ""I2C (Inter-Integrated Circuit),I2C4"""
|
|
)
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PA" "per , ""PA (Port A),PA"""
|
|
menuitem "PB" "per , ""PB (Port B),PB"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PC" "per , ""PC (Port C),PC"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PD" "per , ""PD (Port D),PD"""
|
|
)
|
|
menuitem "PE" "per , ""PE (Port E),PE"""
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PF" "per , ""PF (Port F),PF"""
|
|
)
|
|
menuitem "PG" "per , ""PG (Port G),PG"""
|
|
menuitem "PH" "per , ""PH (Port H),PH"""
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PJ" "per , ""PJ (Port J),PJ"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PK" "per , ""PK (Port K),PK"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PL" "per , ""PL (Port L),PL"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PM" "per , ""PM (Port M),PM"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PN" "per , ""PN (Port N),PN"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PP" "per , ""PP (Port P),PP"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PR" "per , ""PR (Port R),PR"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PT" "per , ""PT (Port T),PT"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PU" "per , ""PU (Port U),PU"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PV" "per , ""PV (Port V),PV"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "PW" "per , ""PW (Port W),PW"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
|
|
(
|
|
menuitem "PY" "per , ""PY (Port Y),PY"""
|
|
menuitem "TRMOSC" "per , ""TRMOSC (Internal High-speed Oscillation Adjustment),TRMOSC"""
|
|
)
|
|
menuitem "OFD" "per , ""OFD (Oscillation Frequency Detector (OFD)),OFD"""
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
|
|
(
|
|
menuitem "RTC" "per , ""RTC (Real-time Counter),RTC"""
|
|
menuitem "CEC" "per , ""CEC (Consumer Electronics Control (CEC)),CEC"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*"))
|
|
(
|
|
popup "RMC (Remote Control Signal Preprocessor (RMC))"
|
|
(
|
|
menuitem "RMC0" "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC0"""
|
|
menuitem "RMC1" "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC1"""
|
|
)
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "PMD" "per , ""PMD,PMD"""
|
|
)
|
|
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
|
|
(
|
|
menuitem "SDA" "per , ""SDA (SD),SDA"""
|
|
menuitem "SDB" "per , ""SDB (SD),SDB"""
|
|
menuitem "SDC" "per , ""SDC (SD),SDC"""
|
|
)
|
|
menuitem "FC" "per , ""FC,FC"""
|
|
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*"))
|
|
(
|
|
menuitem "FURT" "per , ""FURT (ARM Prime Cell PL011),FURT"""
|
|
)
|
|
if (cpuis("TMPM4G8*"))
|
|
(
|
|
menuitem "RMC" "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "DMA" "per , ""DMA (DMA Controller),DMA"""
|
|
)
|
|
if (cpuis("TMPM4K0A*"))
|
|
(
|
|
menuitem "TSPI" "per , ""TSPI (Serial Interface (TSPI)),TSPI"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*"))
|
|
(
|
|
menuitem "SH" "per , ""SH (Sampl-and-hold circuit),SH"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "DNF" "per , ""DNF,DNF"""
|
|
menuitem "RPAR" "per , ""RPAR (RAM Parity),RPAR"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "CRC" "per , ""CRC,CRC"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
menuitem "AMP" "per , ""AMP,AMP"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "TRM" "per , ""TRM (TRIM),TRM"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
popup "PMD (A-PMD)"
|
|
(
|
|
menuitem "PMD0" "per , ""PMD (A-PMD),PMD0"""
|
|
menuitem "PMD1" "per , ""PMD (A-PMD),PMD1"""
|
|
)
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "EN" "per , ""EN (Encoder Input (ENC)),EN"""
|
|
)
|
|
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
|
|
(
|
|
menuitem "VE" "per , ""VE,VE"""
|
|
)
|
|
if (cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*"))
|
|
(
|
|
menuitem "I2C" "per , ""I2C (Inter-Integrated Circuit),I2C"""
|
|
)
|
|
if (cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
popup "CANMB (CAN Controller Mailbox RAM (CANMB))"
|
|
(
|
|
menuitem "CANMB0" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB0"""
|
|
menuitem "CANMB1" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB1"""
|
|
menuitem "CANMB2" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB2"""
|
|
menuitem "CANMB3" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB3"""
|
|
menuitem "CANMB4" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB4"""
|
|
menuitem "CANMB5" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB5"""
|
|
menuitem "CANMB6" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB6"""
|
|
menuitem "CANMB7" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB7"""
|
|
menuitem "CANMB8" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB8"""
|
|
menuitem "CANMB9" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB9"""
|
|
menuitem "CANMB10" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB10"""
|
|
menuitem "CANMB11" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB11"""
|
|
menuitem "CANMB12" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB12"""
|
|
menuitem "CANMB13" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB13"""
|
|
menuitem "CANMB14" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB14"""
|
|
menuitem "CANMB15" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB15"""
|
|
menuitem "CANMB16" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB16"""
|
|
menuitem "CANMB17" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB17"""
|
|
menuitem "CANMB18" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB18"""
|
|
menuitem "CANMB19" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB19"""
|
|
menuitem "CANMB20" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB20"""
|
|
menuitem "CANMB21" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB21"""
|
|
menuitem "CANMB22" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB22"""
|
|
menuitem "CANMB23" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB23"""
|
|
menuitem "CANMB24" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB24"""
|
|
menuitem "CANMB25" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB25"""
|
|
menuitem "CANMB26" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB26"""
|
|
menuitem "CANMB27" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB27"""
|
|
menuitem "CANMB28" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB28"""
|
|
menuitem "CANMB29" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB29"""
|
|
menuitem "CANMB30" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB30"""
|
|
menuitem "CANMB31" "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB31"""
|
|
)
|
|
menuitem "CAN" "per , ""CAN (CAN Controller (CAN)),CAN"""
|
|
popup "RPAR (RAM Parity (RAMP))"
|
|
(
|
|
menuitem "RPAR0" "per , ""RPAR (RAM Parity (RAMP)),RPAR0"""
|
|
menuitem "RPAR1" "per , ""RPAR (RAM Parity (RAMP)),RPAR1"""
|
|
)
|
|
menuitem "DNFC" "per , ""DNFC (Digital Noise Filter (DNF)),DNFC"""
|
|
menuitem "ADA" "per , ""ADA (12-bit Analog to Digital Converter(ADC)),ADA"""
|
|
menuitem "ADB" "per , ""ADB (12-bit Analog to Digital Converter(ADC)),ADB"""
|
|
menuitem "ADC" "per , ""ADC (12-bit Analog to Digital Converter(ADC)),ADC"""
|
|
menuitem "PMD2" "per , ""PMD2 (Advanced Progammable Motor Control Circuit (A-PMD)),PMD2"""
|
|
)
|
|
if (cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
|
|
(
|
|
popup "EN (Advanced Encoder Input (A-ENC32))"
|
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(
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menuitem "EN0" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN0"""
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menuitem "EN1" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN1"""
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menuitem "EN2" "per , ""EN (Advanced Encoder Input (A-ENC32)),EN2"""
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)
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)
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if (cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
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(
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menuitem "GP" "per , ""GP (General Purpose Register),GP"""
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)
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)
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)
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