398 lines
18 KiB
Plaintext
398 lines
18 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: TMS320DM335 Specific Menu
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; @Props: Released
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; @Author: ADI, FIL
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; @Changelog: 2009-09-08
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; @Manufacturer: TI - Texas Instruments
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; @Core: ARM926EJ-S
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; @Chip: TMS320DM335
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mentms320dm335.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "ARM926"
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(
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menuitem "[:chip]ID Registers" "per , ""ID Registers"""
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menuitem "[:chip]MMU Control and Configuration" "per , ""MMU Control and Configuration"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Cache Control and Configuration"""
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menuitem "[:chip]TCM Control and Configuration" "per , ""TCM Control and Configuration"""
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menuitem "[:chip]Test and Debug" "per , ""Test and Debug"""
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menuitem "[:chip]ICEbreaker" "per , ""ICEbreaker"""
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)
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separator
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menuitem "EMIF (Asynchronous External Memory Interface)" "per , ""EMIF (Asynchronous External Memory Interface),EMIF Control"""
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popup "ASP (Audio Serial Port)"
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(
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menuitem "ASP 0" "per , ""ASP (Audio Serial Port),ASP 0"""
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menuitem "ASP 1" "per , ""ASP (Audio Serial Port),ASP 1"""
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)
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menuitem "DDR2/mDDR Memory Controller Registers" "per , ""DDR2/mDDR Memory Controller Registers"""
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popup "EDMA3 (Enhanced Direct Memory Access Controller)"
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(
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menuitem "Parameter RAM" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),Parameter RAM"""
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popup "EDMA3 Channel Controller Registers"
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(
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menuitem "Global Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Global Registers"""
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menuitem "Error Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Error Registers"""
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menuitem "Region Access Enable Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Region Access Enable Registers"""
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menuitem "Status/Debug Visibility Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Status/Debug Visibility Registers"""
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popup "Global Channel Registers"
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(
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menuitem "DMA Channel Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Global Channel Registers,DMA Channel Registers"""
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menuitem "Interrupt Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Global Channel Registers,Interrupt Registers"""
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menuitem "QDMA Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Global Channel Registers,QDMA Registers"""
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)
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popup "Shadow Region 0 Channel Registers"
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(
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menuitem "DMA Channel Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 0 Channel Registers,DMA Channel Registers"""
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menuitem "Interrupt Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 0 Channel Registers,Interrupt Registers"""
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menuitem "QDMA Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 0 Channel Registers,QDMA Registers"""
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)
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popup "Shadow Region 1 Channel Registers"
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(
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menuitem "DMA Channel Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 1 Channel Registers,DMA Channel Registers"""
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menuitem "Interrupt Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 1 Channel Registers,Interrupt Registers"""
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menuitem "QDMA Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 1 Channel Registers,QDMA Registers"""
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)
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popup "Shadow Region 2 Channel Registers"
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(
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menuitem "DMA Channel Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 2 Channel Registers,DMA Channel Registers"""
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menuitem "Interrupt Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 2 Channel Registers,Interrupt Registers"""
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menuitem "QDMA Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 2 Channel Registers,QDMA Registers"""
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)
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popup "Shadow Region 3 Channel Registers"
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(
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menuitem "DMA Channel Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 3 Channel Registers,DMA Channel Registers"""
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menuitem "Interrupt Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 3 Channel Registers,Interrupt Registers"""
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menuitem "QDMA Registers" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Channel Controller Registers,Shadow Region 3 Channel Registers,QDMA Registers"""
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)
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)
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popup "EDMA3 Transfer Controller Registers"
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(
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menuitem "TC 0" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Transfer Controller Registers,TC 0"""
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menuitem "TC 1" "per , ""EDMA3 (Enhanced Direct Memory Access Controller),EDMA3 Transfer Controller Registers,TC 1"""
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)
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)
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menuitem "GPIO (General-Purpose Input/Output)" "per , ""GPIO (General-Purpose Input/Output)"""
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menuitem "I2C (Inter-Integrated Circuit)" "per , ""I2C (Inter-Integrated Circuit)"""
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popup "MMC/SD (Multimedia Card/Secure Digital Card Controller)"
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(
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menuitem "MMC/SD 0" "per , ""MMC/SD (Multimedia Card/Secure Digital Card Controller),MMC/SD 0"""
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menuitem "MMC/SD 1" "per , ""MMC/SD (Multimedia Card/Secure Digital Card Controller),MMC/SD 1"""
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)
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popup "PWM (Pulse-Width Modulator)"
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(
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menuitem "PWM 0" "per , ""PWM (Pulse-Width Modulator),PWM 0"""
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menuitem "PWM 1" "per , ""PWM (Pulse-Width Modulator),PWM 1"""
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menuitem "PWM 2" "per , ""PWM (Pulse-Width Modulator),PWM 2"""
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menuitem "PWM 3" "per , ""PWM (Pulse-Width Modulator),PWM 3"""
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)
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popup "SPI (Serial Port Interface)"
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(
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menuitem "SPI 0" "per , ""SPI (Serial Port Interface),SPI 0"""
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menuitem "SPI 1" "per , ""SPI (Serial Port Interface),SPI 1"""
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menuitem "SPI 2" "per , ""SPI (Serial Port Interface),SPI 2"""
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)
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popup "64-Bit Timer"
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(
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menuitem "Timer 0/1" "per , ""64-Bit Timer,Timer 0/1"""
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menuitem "Timer 2/3" "per , ""64-Bit Timer,Timer 2/3"""
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menuitem "Timer 4/5" "per , ""64-Bit Timer,Timer 4/5"""
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menuitem "WatchDog Timer" "per , ""64-Bit Timer,WatchDog Timer"""
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)
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popup "UART (Universal Asynchronous Receiver/Transmitter)"
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(
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menuitem "UART 0" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 0"""
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menuitem "UART 1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 1"""
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menuitem "UART 2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 2"""
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)
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popup "USB (Universal Serial Bus)"
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(
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menuitem "Transmit/Receive CPPI Channel 0 State Block" "per , ""USB (Universal Serial Bus),Transmit/Receive CPPI Channel 0 State Block"""
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menuitem "Transmit/Receive CPPI Channel 1 State Block" "per , ""USB (Universal Serial Bus),Transmit/Receive CPPI Channel 1 State Block"""
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menuitem "Transmit/Receive CPPI Channel 2 State Block" "per , ""USB (Universal Serial Bus),Transmit/Receive CPPI Channel 2 State Block"""
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menuitem "Transmit/Receive CPPI Channel 3 State Block" "per , ""USB (Universal Serial Bus),Transmit/Receive CPPI Channel 3 State Block"""
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menuitem "Common USB Registers" "per , ""USB (Universal Serial Bus),Common USB Registers"""
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menuitem "Indexed Registers" "per , ""USB (Universal Serial Bus),Indexed Registers"""
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menuitem "FIFOx" "per , ""USB (Universal Serial Bus),FIFOx"""
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menuitem "Target Endpoint 0 Control Registers" "per , ""USB (Universal Serial Bus),Target Endpoint 0 Control Registers"""
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menuitem "Target Endpoint 1 Control Registers" "per , ""USB (Universal Serial Bus),Target Endpoint 1 Control Registers"""
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menuitem "Target Endpoint 2 Control Registers" "per , ""USB (Universal Serial Bus),Target Endpoint 2 Control Registers"""
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menuitem "Target Endpoint 3 Control Registers" "per , ""USB (Universal Serial Bus),Target Endpoint 3 Control Registers"""
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menuitem "Target Endpoint 4 Control Registers" "per , ""USB (Universal Serial Bus),Target Endpoint 4 Control Registers"""
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menuitem "Control and Status Registers for Endpoint 0" "per , ""USB (Universal Serial Bus),Control and Status Registers for Endpoint 0"""
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menuitem "Control and Status Registers for Endpoint 1" "per , ""USB (Universal Serial Bus),Control and Status Registers for Endpoint 1"""
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menuitem "Control and Status Registers for Endpoint 2" "per , ""USB (Universal Serial Bus),Control and Status Registers for Endpoint 2"""
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menuitem "Control and Status Registers for Endpoint 3" "per , ""USB (Universal Serial Bus),Control and Status Registers for Endpoint 3"""
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menuitem "Control and Status Registers for Endpoint 4" "per , ""USB (Universal Serial Bus),Control and Status Registers for Endpoint 4"""
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)
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popup "VPSS (Video Processing Subsystem)"
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(
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menuitem "VPSSCLK (VPSS Clock Control)" "per , ""VPSS (Video Processing Subsystem),VPSSCLK (VPSS Clock Control)"""
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popup "VPBE (Video Processing Back End)"
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(
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menuitem "OSD (VPBE - On Screen Display)" "per , ""VPSS (Video Processing Subsystem),VPBE (Video Processing Back End),OSD (VPBE - On Screen Display)"""
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menuitem "VENC (VPBE - Video Encoder / Digital LCD Controller)" "per , ""VPSS (Video Processing Subsystem),VPBE (Video Processing Back End),VENC (VPBE - Video Encoder / Digital LCD Controller)"""
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menuitem "VPSSBL (VPSS Buffer Logic)" "per , ""VPSS (Video Processing Subsystem),VPBE (Video Processing Back End),VPSSBL (VPSS Buffer Logic)"""
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)
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popup "VPFE (Video Processing Front End)"
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(
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menuitem "CCDC (VPFE - CCD Controller)" "per , ""VPSS (Video Processing Subsystem),VPFE (Video Processing Front End),CCDC (VPFE - CCD Controller)"""
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menuitem "IPIPEIF (VPFE - Image Pipe IF)" "per , ""VPSS (Video Processing Subsystem),VPFE (Video Processing Front End),IPIPEIF (VPFE - Image Pipe IF)"""
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menuitem "IPIPE (VPFE - Image Pipe)" "per , ""VPSS (Video Processing Subsystem),VPFE (Video Processing Front End),IPIPE (VPFE - Image Pipe)"""
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menuitem "H3A (VPFE - Hardware 3A)" "per , ""VPSS (Video Processing Subsystem),VPFE (Video Processing Front End),H3A (VPFE - Hardware 3A)"""
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menuitem "VPSSBL (VPSS Buffer Logic)" "per , ""VPSS (Video Processing Subsystem),VPFE (Video Processing Front End),VPSSBL (VPSS Buffer Logic)"""
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)
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)
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menuitem "RTO (Real Time Out Controller)" "per , ""RTO (Real Time Out Controller)"""
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popup "PLL"
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(
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menuitem "PLL Controller 0" "per , ""PLL,PLL Controller 0"""
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menuitem "PLL Controller 1" "per , ""PLL,PLL Controller 1"""
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)
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menuitem "PSC (Power and Sleep Controller)" "per , ""PSC (Power and Sleep Controller)"""
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menuitem "INTC (Interrupt Controller)" "per , ""INTC (Interrupt Controller)"""
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menuitem "SCR (System Control Registers)" "per , ""SCR (System Control Registers)"""
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)
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)
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