487 lines
23 KiB
Plaintext
487 lines
23 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: STM32x Specific Menu
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; @Props: Released
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; @Author: ADI, BIC, CNA, DAN, PAC, ZUB
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; @Changelog:
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; 2007-11-09
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; 2008-11-15
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; 2009-03-30
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; 2010-05-28
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; 2012-06-19
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; @Manufacturer: STM - ST Microelectronics N.V.
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; @Core: Cortex-M3
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menstm32f10x.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M3)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M3),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "Flash" "per , ""Flash Memory Interface"""
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menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check)"""
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menuitem "PWR_CR" "per , ""PWR_CR (Power Control Register)"""
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menuitem "BKP" "per , ""BKP (Backup)"""
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menuitem "RCC" "per , ""RCC (Reset and Clock Control)"""
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popup "GPIO/AFIO"
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(
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popup "GPIO"
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(
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menuitem "GPIO A" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO A"""
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menuitem "GPIO B" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO B"""
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if (cpu()!="STM32F103T8"&&cpu()!="STM32F103T6"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103TB"&&cpu()!="STM32F101T8"&&cpu()!="STM32F101T6"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101TB")
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(
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menuitem "GPIO C" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO C"""
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)
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menuitem "GPIO D" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO D"""
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if (cpuis("STM32F103Z*")||cpuis("STM32F103V*")||cpuis("STM32F101Z*")||cpuis("STM32F101V*")||cpuis("STM32F100V*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105V*")||cpuis("STM32F107V*")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
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(
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menuitem "GPIO E" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO E"""
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)
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if (cpuis("STM32F103Z*")||cpuis("STM32F101Z*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
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(
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menuitem "GPIO F" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO F"""
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menuitem "GPIO G" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO G"""
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)
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)
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menuitem "AFIO" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),AFIO,AFIO"""
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)
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menuitem "EXTI" "per , ""EXTI (External Interrupt/Event Controller)"""
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if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
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(
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popup "DMA Controller"
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(
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menuitem "DMA 1" "per , ""DMA Controller,DMA 1"""
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menuitem "DMA 2" "per , ""DMA Controller,DMA 2"""
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)
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)
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else
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(
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menuitem "DMA" "per , ""DMA"""
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)
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if (cpuis("STM32F103*")||cpu()=="STM32F103"||cpuis("STM32F105*")||cpuis("STM32F107*"))
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(
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popup "ADC"
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(
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menuitem "ADC 1" "per , ""ADC (Analog/Digital Converter),ADC 1"""
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menuitem "ADC 2" "per , ""ADC (Analog/Digital Converter),ADC 2"""
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if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103")
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(
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menuitem "ADC 3" "per , ""ADC (Analog/Digital Converter),ADC 3"""
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)
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)
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)
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else
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(
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menuitem "ADC" "per , ""ADC (Analog/Digital Converter)"""
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)
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if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpuis("STM32F100*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*"))
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(
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menuitem "DAC" "per , ""DAC (Digital-to-Analog Converter)"""
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)
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if (cpuis("STM32F100*")||cpuis("STM32F103*")||cpu()=="STM32F103"||cpuis("STM32F105*")||cpuis("STM32F107*"))
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(
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popup "Advanced Control Timer"
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(
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menuitem "TIM 1" "per , ""Advanced Control Timer,TIM 1"""
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if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103")
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(
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menuitem "TIM 8" "per , ""Advanced Control Timer,TIM 8"""
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)
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)
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)
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popup "General Purpose Timer"
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(
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menuitem "TIM 2" "per , ""General Purpose Timer,TIM 2"""
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menuitem "TIM 3" "per , ""General Purpose Timer,TIM 3"""
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if (cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F103C4"&&cpu()!="STM32F103R4"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103C6"&&cpu()!="STM32F103R6"&&cpu()!="STM32F103T6"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F101C4"&&cpu()!="STM32F101R4"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101C6"&&cpu()!="STM32F101R6"&&cpu()!="STM32F101T6"&&cpu()!="STM32F100C4"&&cpu()!="STM32F100C6"&&cpu()!="STM32F100R4"&&cpu()!="STM32F100R6")
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(
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menuitem "TIM 4" "per , ""General Purpose Timer,TIM 4"""
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)
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if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*G")||cpuis("STM32F101*F")||cpuis("STM32F101*E")||cpuis("STM32F101*D")||cpuis("STM32F101*C")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
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(
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menuitem "TIM 5" "per , ""General Purpose Timer,TIM 5"""
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)
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if (cpuis("STM32F101*G")||cpuis("STM32F101*F")||cpuis("STM32F103*F")||cpuis("STM32F103*G"))
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(
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menuitem "TIM 9" "per , ""General Purpose Timer,TIM 9"""
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menuitem "TIM 10" "per , ""General Purpose Timer,TIM 10"""
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menuitem "TIM 11" "per , ""General Purpose Timer,TIM 11"""
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)
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if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*G")||cpuis("STM32F101*F")||cpuis("STM32F101*E")||cpuis("STM32F101*D")||cpuis("STM32F101*C")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
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(
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menuitem "TIM 12" "per , ""General Purpose Timer,TIM 12"""
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menuitem "TIM 13" "per , ""General Purpose Timer,TIM 13"""
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menuitem "TIM 14" "per , ""General Purpose Timer,TIM 14"""
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)
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if (cpuis("STM32F100*"))
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(
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menuitem "TIM 15" "per , ""General Purpose Timer,TIM 15"""
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menuitem "TIM 16" "per , ""General Purpose Timer,TIM 16"""
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menuitem "TIM 17" "per , ""General Purpose Timer,TIM 17"""
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)
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)
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if (cpuis("STM32F103*C")||cpuis("STM32F103*D")||cpuis("STM32F103*E")||cpuis("STM32F103*F")||cpuis("STM32F103*G")||cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpuis("STM32F100C*")||cpuis("STM32F100R*")||cpuis("STM32F100V*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*"))
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(
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if (!cpuis("STM32F100RC")&&!cpuis("STM32F100RD")&&!cpuis("STM32F100RE")&&!cpuis("STM32F100VC")&&!cpuis("STM32F100VD")&&!cpuis("STM32F100VE")&&!cpuis("STM32F100ZC")&&!cpuis("STM32F100ZD")&&!cpuis("STM32F100ZE"))
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(
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popup "Basic Timer"
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(
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menuitem "TIM 6" "per , ""Basic Timer,TIM 6"""
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menuitem "TIM 7" "per , ""Basic Timer,TIM 7"""
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)
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)
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)
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menuitem "RTC" "per , ""RTC (Real-Time Clock)"""
|
|
menuitem "IWDG" "per , ""IWDG (Independent Watchdog)"""
|
|
menuitem "WWDG" "per , ""WWDG (Window Watchdog)"""
|
|
if (cpuis("STM32F103Z*")||cpu()=="STM32F103VG"||cpu()=="STM32F103VF"||cpu()=="STM32F103VE"||cpu()=="STM32F103VD"||cpu()=="STM32F103VC"||cpuis("STM32F101Z*")||cpu()=="STM32F101VG"||cpu()=="STM32F101VF"||cpu()=="STM32F101VE"||cpu()=="STM32F101VD"||cpu()=="STM32F101VC"||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
|
|
(
|
|
menuitem "FSMC" "per , ""FSMC (Flexible Static Memory Controller)"""
|
|
)
|
|
if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103")
|
|
(
|
|
menuitem "SDIO" "per , ""SDIO (SDIO Interface)"""
|
|
)
|
|
if (cpuis("STM32F103*")||cpuis("STM32F102*"))
|
|
(
|
|
menuitem "USB" "per , ""SB (USB Full Speed Device)"""
|
|
)
|
|
if (cpuis("STM32F103*"))
|
|
(
|
|
menuitem "CAN" "per , ""CAN (Controller Area Network)"""
|
|
)
|
|
if (cpuis("STM32F105*")||cpuis("STM32F107*"))
|
|
(
|
|
popup "CAN"
|
|
(
|
|
menuitem "CAN 1" "per , ""CAN (Controller Area Network),CAN 1"""
|
|
menuitem "CAN 2" "per , ""CAN (Controller Area Network),CAN 2"""
|
|
)
|
|
)
|
|
popup "SPI"
|
|
(
|
|
if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103"||cpuis("STM32F105*")||cpuis("STM32F107*"))
|
|
(
|
|
menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1"""
|
|
menuitem "SPI 2/I2S2" "per , ""SPI (Serial Peripheral Interface),SPI 2/I2S2"""
|
|
menuitem "SPI 3/I2S3" "per , ""SPI (Serial Peripheral Interface),SPI 3/I2S3"""
|
|
)
|
|
if (cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpu()=="STM32F101"||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
|
|
(
|
|
menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1"""
|
|
menuitem "SPI 2" "per , ""SPI (Serial Peripheral Interface),SPI 2"""
|
|
menuitem "SPI 3" "per , ""SPI (Serial Peripheral Interface),SPI 3"""
|
|
)
|
|
if (cpu()=="STM32F103T8"||cpu()=="STM32F103TB"||cpuis("STM32F103*4")||cpuis("STM32F103*6")||cpuis("STM32F102*4")||cpuis("STM32F102*6")||cpuis("STM32F101T*")||cpuis("STM32F101*4")||cpuis("STM32F101*6")||cpu()=="STM32F100C4"||cpu()=="STM32F100C6"||cpu()=="STM32F100R4"||cpu()=="STM32F100R6")
|
|
(
|
|
menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1"""
|
|
)
|
|
if (cpuis("STM32F100V*")||cpu()=="STM32F100RB"||cpu()=="STM32F100R8"||cpu()=="STM32F100CB"||cpu()=="STM32F100C8"||cpuis("STM32F102*8")||cpuis("STM32F102*B")||cpu()=="STM32F101C8"||cpu()=="STM32F101R8"||cpu()=="STM32F101V8"||cpuis("STM32F101*B")||cpuis("STM32F103*B")||cpu()=="STM32F103C8"||cpu()=="STM32F103R8"||cpu()=="STM32F103V8")
|
|
(
|
|
if ((!cpuis("STM32F100VC"))&&(!cpuis("STM32F100VD"))&&(!cpuis("STM32F100VE")))
|
|
(
|
|
menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1"""
|
|
menuitem "SPI 2" "per , ""SPI (Serial Peripheral Interface),SPI 2"""
|
|
)
|
|
)
|
|
)
|
|
popup "I2C"
|
|
(
|
|
menuitem "I2C 1" "per , ""I2C (Inter-Integrated Circuit),I2C 1"""
|
|
if (cpu()!="STM32F103T8"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F103C4"&&cpu()!="STM32F103R4"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103C6"&&cpu()!="STM32F103R6"&&cpu()!="STM32F103T6"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F101T8"&&cpu()!="STM32F101C4"&&cpu()!="STM32F101R4"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101C6"&&cpu()!="STM32F101R6"&&cpu()!="STM32F101T6"&&(!(cpuis("STM32F100*4")))&&(!(cpuis("STM32F100*6")))&&!cpuis("STM32F101TB")&&!cpuis("STM32F103TB"))
|
|
(
|
|
menuitem "I2C 2" "per , ""I2C (Inter-Integrated Circuit),I2C 2"""
|
|
)
|
|
)
|
|
popup "USART"
|
|
(
|
|
menuitem "USART 1" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 1"""
|
|
menuitem "USART 2" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 2"""
|
|
if (cpu()!="STM32F103T8"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F103C4"&&cpu()!="STM32F103R4"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103C6"&&cpu()!="STM32F103R6"&&cpu()!="STM32F103T6"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F101T8"&&cpu()!="STM32F101C4"&&cpu()!="STM32F101R4"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101C6"&&cpu()!="STM32F101R6"&&cpu()!="STM32F101T6"&&cpu()!="STM32F100C4"&&cpu()!="STM32F100C6"&&cpu()!="STM32F100R4"&&cpu()!="STM32F100R6"&&!cpuis("STM32F101TB")&&!cpuis("STM32F103TB"))
|
|
(
|
|
menuitem "USART 3" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 3"""
|
|
)
|
|
if (cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F103*F")||cpuis("STM32F103*G")||cpuis("STM32F101*E")||cpuis("STM32F101*D")||cpuis("STM32F101*C")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE"))
|
|
(
|
|
menuitem "UART 4" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),UART 4"""
|
|
menuitem "UART 5" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),UART 5"""
|
|
)
|
|
)
|
|
if (cpuis("STM32F100*"))
|
|
(
|
|
menuitem "HDMI-CEC" "per , ""HDMI-CEC (Consumer Electronics Control)"""
|
|
)
|
|
if (cpuis("STM32F105*")||cpuis("STM32F107*"))
|
|
(
|
|
popup "USB_OTG_FS"
|
|
(
|
|
menuitem "OTG_FS Global Registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),OTG_FS Global Registers"""
|
|
menuitem "Host mode registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),Host mode registers"""
|
|
menuitem "Device mode registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),Device mode registers"""
|
|
menuitem "Power and clock gating control and status registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),Power and clock gating control and status registers"""
|
|
)
|
|
)
|
|
if (cpuis("STM32F107*"))
|
|
(
|
|
popup "Ethernet"
|
|
(
|
|
menuitem "MAC registers" "per , ""Ethernet,MAC registers"""
|
|
menuitem "MMC registers" "per , ""Ethernet,MMC registers"""
|
|
menuitem "IEEE 1588 time stamp registers" "per , ""Ethernet,IEEE 1588 time stamp registers"""
|
|
menuitem "DMA registers" "per , ""Ethernet,DMA registers"""
|
|
)
|
|
)
|
|
menuitem "Device Electronic Signature" "per , ""Device Electronic Signature"""
|
|
)
|
|
)
|