367 lines
14 KiB
Plaintext
367 lines
14 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: SSE-300 (AN552) Specific Menu
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; @Props: Released
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; @Author: KRZ
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; @Changelog: 2022-08-16 KRZ
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; @Manufacturer: ARM - ARM Ltd.
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; @Core: Cortex-M55
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mensse300an552.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M55)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M55),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M55),Memory Protection Unit"""
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menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M55),Security Attribution Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M55),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M55),Floating-point Unit (FPU)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M55),Debug,Core Debug"""
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menuitem "[:chip]BPU;BreakPoint Unit" "per , ""Core Registers (Cortex-M55),Debug,BreakPoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M55),Debug,Data Watchpoint and Trace Unit (DWT)"""
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menuitem "[:chip]PMU;Performance Monitoring Unit Extension" "per , ""Core Registers (Cortex-M55),Debug,Performance Monitoring Unit Extension (PMU)"""
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)
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)
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separator
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menuitem "AUDIOI2S" "per , ""AUDIOI2S"""
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menuitem "ETHERNET" "per , ""ETHERNET"""
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menuitem "FPGAIO;FPGA System Control I/O" "per , ""FPGAIO (FPGA System Control I/O)"""
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menuitem "FPGAIO_SECURE;FPGA System Control I/O (Secure)" "per , ""FPGAIO_SECURE (FPGA System Control I/O (Secure))"""
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popup "GPIO;General Purpose I/O Ports And Peripheral I/O Lines"
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(
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menuitem "GPIO0" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO0"""
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menuitem "GPIO1" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO1"""
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menuitem "GPIO2" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO2"""
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menuitem "GPIO3" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO3"""
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)
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popup "GPIO_SECURE;General Purpose I/O Ports And Peripheral I/O Lines(Secure)"
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(
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menuitem "GPIO0_SECURE" "per , ""GPIO_SECURE (General Purpose I/O Ports And Peripheral I/O Lines (Secure)),GPIO0_SECURE"""
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menuitem "GPIO1_SECURE" "per , ""GPIO_SECURE (General Purpose I/O Ports And Peripheral I/O Lines (Secure)),GPIO1_SECURE"""
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menuitem "GPIO2_SECURE" "per , ""GPIO_SECURE (General Purpose I/O Ports And Peripheral I/O Lines (Secure)),GPIO2_SECURE"""
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menuitem "GPIO3_SECURE" "per , ""GPIO_SECURE (General Purpose I/O Ports And Peripheral I/O Lines (Secure)),GPIO3_SECURE"""
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)
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popup "I2C;Inter-Integrated Circuit"
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(
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menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
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menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
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)
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popup "I2C_SECURE;Inter-Integrated Circuit (Secure)"
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(
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menuitem "I2C0_SECURE" "per , ""I2C_SECURE (Inter-Integrated Circuit (Secure)),I2C0_SECURE"""
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menuitem "I2C1_SECURE" "per , ""I2C_SECURE (Inter-Integrated Circuit (Secure)),I2C1_SECURE"""
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)
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popup "ISRAM_MPC;ISRAM Memory Protection Controller"
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(
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menuitem "ISRAM0MPC" "per , ""ISRAM_MPC (ISRAM Memory Protection Controller),ISRAM0MPC"""
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menuitem "ISRAM1MPC" "per , ""ISRAM_MPC (ISRAM Memory Protection Controller),ISRAM1MPC"""
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)
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menuitem "NSACRB;Non-secure Access Configuration Register Block" "per , ""NSACRB (Non-secure Access Configuration Register Block)"""
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menuitem "SACRB;Secure Access Configuration Register Block" "per , ""SACRB (Secure Access Configuration Register Block)"""
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menuitem "SAU;Security Attribution Unit" "per , ""SAU (Security Attribution Unit)"""
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menuitem "SCC;Serial Communication Controller" "per , ""SCC (Serial Communication Controller)"""
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menuitem "SCC_SECURE;Serial Communication Controller (Secure)" "per , ""SCC_SECURE (Serial Communication Controller (Secure))"""
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popup "SPI;SPI"
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(
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menuitem "SSP0" "per , ""SPI (SPI),SSP0"""
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menuitem "SSP1" "per , ""SPI (SPI),SSP1"""
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menuitem "SSP2" "per , ""SPI (SPI),SSP2"""
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)
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popup "SPI_SECURE;SPI (Secure)"
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(
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menuitem "SSP0_SECURE" "per , ""SPI_SECURE (SPI (Secure)),SSP0_SECURE"""
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menuitem "SSP1_SECURE" "per , ""SPI_SECURE (SPI (Secure)),SSP1_SECURE"""
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menuitem "SSP2_SECURE" "per , ""SPI_SECURE (SPI (Secure)),SSP2_SECURE"""
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)
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menuitem "SYSCOUNTER_CNTRL;System Counter Control" "per , ""SYSCOUNTER_CNTRL (System Counter Control)"""
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menuitem "SYSCOUNTER_READ;System Counter Read" "per , ""SYSCOUNTER_READ (System Counter Read)"""
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menuitem "SYSCOUNTER_READ_SECURE;System Counter Read (Secure)" "per , ""SYSCOUNTER_READ_SECURE (System Counter Read (Secure))"""
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menuitem "SYSCONTROL;System Control" "per , ""SYSCTRL (System Control)"""
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menuitem "SYSINFO;System Information" "per , ""SYSINFO (System Information)"""
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menuitem "SYSINFO_SECURE;System Information (Secure)" "per , ""SYSINFO_SECURE (System Information (Secure))"""
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popup "TIMER;Timer/Counter"
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(
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menuitem "SLOWCLK" "per , ""TIMER (Timer/Counter),SLOWCLK"""
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menuitem "TIMER0" "per , ""TIMER (Timer/Counter),TIMER0"""
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menuitem "TIMER1" "per , ""TIMER (Timer/Counter),TIMER1"""
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menuitem "TIMER2" "per , ""TIMER (Timer/Counter),TIMER2"""
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menuitem "TIMER3" "per , ""TIMER (Timer/Counter),TIMER3"""
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)
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popup "TIMER_SECURE;Timer/Counter (Secure)"
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(
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menuitem "SLOWCLK_SECURE" "per , ""TIMER_SECURE (Timer/Counter (Secure)),SLOWCLK_SECURE"""
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menuitem "TIMER0_SECURE" "per , ""TIMER_SECURE (Timer/Counter (Secure)),TIMER0_SECURE"""
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menuitem "TIMER1_SECURE" "per , ""TIMER_SECURE (Timer/Counter (Secure)),TIMER1_SECURE"""
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menuitem "TIMER2_SECURE" "per , ""TIMER_SECURE (Timer/Counter (Secure)),TIMER2_SECURE"""
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menuitem "TIMER3_SECURE" "per , ""TIMER_SECURE (Timer/Counter (Secure)),TIMER3_SECURE"""
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)
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popup "UART;Universal Asynchronous Receiver/Transmitter"
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(
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menuitem "UART0" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART0"""
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menuitem "UART1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
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menuitem "UART2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART2"""
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menuitem "UART3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
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menuitem "UART4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
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menuitem "UART5" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART5"""
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)
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popup "UART_SECURE;Universal Asynchronous Receiver/Transmitter (Secure)"
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(
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menuitem "UART0_SECURE" "per , ""UART_SECURE (Universal Asynchronous Receiver/Transmitter (Secure)),UART0_SECURE"""
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menuitem "UART1_SECURE" "per , ""UART_SECURE (Universal Asynchronous Receiver/Transmitter (Secure)),UART1_SECURE"""
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menuitem "UART2_SECURE" "per , ""UART_SECURE (Universal Asynchronous Receiver/Transmitter (Secure)),UART2_SECURE"""
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menuitem "UART3_SECURE" "per , ""UART_SECURE (Universal Asynchronous Receiver/Transmitter (Secure)),UART3_SECURE"""
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menuitem "UART4_SECURE" "per , ""UART_SECURE (Universal Asynchronous Receiver/Transmitter (Secure)),UART4_SECURE"""
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menuitem "UART5_SECURE" "per , ""UART_SECURE (Universal Asynchronous Receiver/Transmitter (Secure)),UART5_SECURE"""
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)
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menuitem "USB;Universal Serial Bus" "per , ""USB (Universal Serial Bus)"""
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menuitem "WATCHDOG;Watchdog Timer" "per , ""WATCHDOG (Watchdog Timer)"""
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popup "WATCHDOG_SECURE;Watchdog Timer (Secure)"
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(
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menuitem "SLOWCLKWATCHDOG" "per , ""WATCHDOG_SECURE (Watchdog Timer (Secure)),SLOWCLKWATCHDOG"""
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menuitem "WATCHDOG_SECURE" "per , ""WATCHDOG_SECURE (Watchdog Timer (Secure)),WATCHDOG_SECURE"""
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)
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)
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)
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