Files
Gen4_R-Car_Trace32/2_Trunk/menrzg1.men
2025-10-14 09:52:32 +09:00

669 lines
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Plaintext

; --------------------------------------------------------------------------------
; @Title: RZG1 Specific Menu
; @Props: Released
; @Author: MRD, PCC
; @Changelog: 2018-10-05 PCC
; @Manufacturer: RENESAS - Renesas Technology, Corp.
; @Core: Cortex-A7 MPCore, Cortex-A15 MPCore
; @Chip: R8A77420, R8A77430, R8A77440, R8A77450
; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menrzg1.men 16339 2023-07-03 13:30:14Z pegold $
add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if CPU()=="R8A77420"
(
popup "[:chip]Core Registers (Cortex-A15/A7)"
(
menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A15/A7),ID Registers"""
menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A15/A7),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A15/A7),Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A15/A7),Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A15/A7),Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A15/A7),System Performance Monitor"""
menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A15/A7),System Timer Register"""
separator
menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A15/A7),Debug Registers"""
menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A15/A7),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A15/A7),Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A15/A7),Interrupt Controller"""
)
)
else if CORENAME()=="CORTEXA7MPCORE"
(
popup "[:chip]Core Registers (Cortex-A7MPCore)"
(
menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A7MPCore),ID Registers"""
menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A7MPCore),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A7MPCore),Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A7MPCore),Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A7MPCore),Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A7MPCore),System Performance Monitor"""
menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A7MPCore),System Timer Register"""
separator
menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A7MPCore),Debug Registers"""
menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A7MPCore),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A7MPCore),Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A7MPCore),Interrupt Controller"""
)
)
else if CORENAME()=="CORTEXA15MPCORE"
(
popup "[:chip]Core Registers (Cortex-A15MPCore)"
(
menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A15MPCore),ID Registers"""
menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A15MPCore),Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A15MPCore),Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A15MPCore),System Performance Monitor"""
menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A15MPCore),System Timer Register"""
separator
menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A15MPCore),Debug Registers"""
menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A15MPCore),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A15MPCore),Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A15MPCore),Interrupt Controller"""
)
)
separator
menuitem "PFC" " per , ""PFC (Pin Function Controller)"""
popup "GPIO"
(
menuitem "GPIO 0" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 0"""
menuitem "GPIO 1" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 1"""
menuitem "GPIO 2" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 2"""
menuitem "GPIO 3" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 3"""
menuitem "GPIO 4" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 4"""
menuitem "GPIO 5" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 5"""
if cpu()=="R8A77430"
(
menuitem "GPIO 6" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 6"""
menuitem "GPIO 7" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 7"""
)
if cpu()=="R8A77450"
(
menuitem "GPIO 6" " per , ""GPIO (General-Purpose Input/Output Ports),GPIO 6"""
)
)
menuitem "CPG" " per , ""CPG (Clock Pulse Generator)"""
menuitem "MSSR" " per , ""MSSR (Module Standby and Software)"""
popup "APMU"
(
if cpu()=="R8A77420"
(
menuitem "Cortex-A7" " per , ""APMU (Advanced Power Management Unit for AP-System Core)"""
menuitem "Cortex-A15" " per , ""APMU (Advanced Power Management Unit for AP-System Core)"""
)
if cpu()=="R8A77450"
(
menuitem "Cortex-A7" " per , ""APMU (Advanced Power Management Unit for AP-System Core)"""
)
if (cpu()=="R8A77430")||(cpu()=="R8A77440")
(
menuitem "Cortex-A15" " per , ""APMU (Advanced Power Management Unit for AP-System Core)"""
)
)
menuitem "RST" " per , ""RST (Reset)"""
menuitem "INTC_SYS" " per , ""INTC_SYS (Interrupt Controller for AP-System Core)"""
menuitem "AXI" " per , ""AXI (AXI-BUS)"""
popup "IPMMU"
(
menuitem "IPMMU-SY0" " per , ""IPMMU,IPMMU-SY0"""
menuitem "IPMMU-SY1" " per , ""IPMMU,IPMMU-SY1"""
menuitem "IPMMU-DS" " per , ""IPMMU,IPMMU-DS"""
menuitem "IPMMU-MP" " per , ""IPMMU,IPMMU-MP"""
menuitem "IPMMU-MX" " per , ""IPMMU,IPMMU-MX"""
if cpu()!="R8A77420"
(
menuitem "IPMMU-GP" " per , ""IPMMU,IPMMU-GP"""
)
)
menuitem "LSCB" " per , ""LSCB (LBSC within Bus Bridge)"""
popup "DBSC3"
(
menuitem "DBSC3 0" " per , ""DBSC3 (External Bus Controller for DDR3-SDRAM),DBSC3 0"""
if (cpu()=="R8A77420")||(cpu()=="R8A77430")
(
menuitem "DBSC3 1" " per , ""DBSC3 (External Bus Controller for DDR3-SDRAM),DBSC3 1"""
)
)
menuitem "S3CTRL" " per , ""S3CTRL (S3 Controller)"""
popup "SYS-DMAC"
(
menuitem "Lower channels" " per , ""SYS-DMAC (System Direct Memory Access Controller),Lower channels"""
menuitem "Upper channels" " per , ""SYS-DMAC (System Direct Memory Access Controller),Upper channels"""
)
popup "LBSC-DMAC"
(
menuitem "LBSC Common" " per , ""LBSC-DMAC,LBSC Common"""
menuitem "Channel 0" " per , ""LBSC-DMAC,Channel 0"""
menuitem "Channel 1" " per , ""LBSC-DMAC,Channel 1"""
menuitem "Channel 2" " per , ""LBSC-DMAC,Channel 2"""
)
if cpu()=="R8A77420"
(
menuitem "R-GP2D" " per , ""R-GP2D"""
)
popup "DU"
(
menuitem "DU 0" " per , ""DU (Display Unit),DU 0"""
menuitem "DU 1" " per , ""DU (Display Unit),DU 1"""
if cpu()=="R8A77420"
(
menuitem "DU 2" " per , ""DU (Display Unit),DU 2"""
)
)
if cpu()!="R8A77450"
(
popup "LVDS"
(
menuitem "LVDS0" " per , ""LVDS (LVDS Output Interface),LVDS0"""
if cpu()=="R8A77420"
(
menuitem "LVDS1" " per , ""LVDS (LVDS Output Interface),LVDS1"""
)
)
)
popup "VIN"
(
menuitem "Channel 0" " per , ""VIN (Video Input Module),Channel 0"""
menuitem "Channel 1" " per , ""VIN (Video Input Module),Channel 1"""
if (cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440")
(
menuitem "Channel 2" " per , ""VIN (Video Input Module),Channel 2"""
)
if cpu()=="R8A77420"
(
menuitem "Channel 3" " per , ""VIN (Video Input Module),Channel 3"""
)
)
popup "VPC"
(
menuitem "Channel 0" " per , ""VPC (Video Processing Unit Cache),Channel 0"""
if cpu()=="R8A77420"
(
menuitem "Channel 1" " per , ""VPC (Video Processing Unit Cache),Channel 1"""
)
)
popup "FDP1"
(
menuitem "FDP1 ch0" " per , ""FDP1 (Fine Display Processor),FDP1 ch0"""
if (cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440")
(
menuitem "FDP1 ch1" " per , ""FDP1 (Fine Display Processor),FDP1 ch1"""
)
if cpu()=="R8A77420"
(
menuitem "FDP1 ch2" " per , ""FDP1 (Fine Display Processor),FDP1 ch2"""
)
)
popup "VSP1"
(
if cpu()=="R8A77420"
(
menuitem "VSPR" " per , ""VSP1,VSPR"""
)
menuitem "VSPS" " per , ""VSP1,VSPS"""
menuitem "VSPD0" " per , ""VSP1,VSPD0"""
if (cpu()=="R8A77450")||(cpu()=="R8A77420")||(cpu()=="R8A77440")
(
menuitem "VSPD1" " per , ""VSP1,VSPD1"""
)
)
popup "2D-DMAC"
(
menuitem "2D-DMAC 0" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 0"""
menuitem "2D-DMAC 1" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 1"""
menuitem "2D-DMAC 2" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 2"""
menuitem "2D-DMAC 3" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 3"""
menuitem "2D-DMAC 4" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 4"""
menuitem "2D-DMAC 5" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 5"""
menuitem "2D-DMAC 6" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 6"""
menuitem "2D-DMAC 7" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 7"""
menuitem "2D-DMAC Interrupt Clear Register" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC Interrupt Clear Register"""
)
if cpu()=="R8A77430"
(
menuitem "TSIF" " per , ""TSIF (TS Interface)"""
)
popup "SSIU"
(
menuitem "SSIU BUSIF 0" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 0"""
menuitem "SSIU BUSIF 1" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 1"""
menuitem "SSIU BUSIF 2" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 2"""
menuitem "SSIU BUSIF 3" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 3"""
menuitem "SSIU BUSIF 4" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 4"""
menuitem "SSIU BUSIF 5" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 5"""
menuitem "SSIU BUSIF 6" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 6"""
menuitem "SSIU BUSIF 7" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 7"""
menuitem "SSIU BUSIF 8" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 8"""
menuitem "SSIU BUSIF 9" " per , ""SSIU (Serial Sound Interface Unit),SSIU BUSIF 9"""
menuitem "SSIU" " per , ""SSIU (Serial Sound Interface Unit),SSIU"""
)
popup "SSI"
(
menuitem "Module 0" " per , ""SSI (Serial Sound Interface),Module 0"""
menuitem "Module 1" " per , ""SSI (Serial Sound Interface),Module 1"""
menuitem "Module 2" " per , ""SSI (Serial Sound Interface),Module 2"""
menuitem "Module 3" " per , ""SSI (Serial Sound Interface),Module 3"""
menuitem "Module 4" " per , ""SSI (Serial Sound Interface),Module 4"""
menuitem "Module 5" " per , ""SSI (Serial Sound Interface),Module 5"""
menuitem "Module 6" " per , ""SSI (Serial Sound Interface),Module 6"""
menuitem "Module 7" " per , ""SSI (Serial Sound Interface),Module 7"""
menuitem "Module 8" " per , ""SSI (Serial Sound Interface),Module 8"""
menuitem "Module 9" " per , ""SSI (Serial Sound Interface),Module 9"""
)
menuitem "ADG" " per , ""ADG (Audio Clock Generator)"""
menuitem "SCU" " per , ""SCU (Sampling Rate Converter Unit)"""
menuitem "Audio-DMAC" " per , ""Audio-DMAC (Audio-Direct Memory Access Controller)"""
menuitem "Audio-DMAC-P-P" " per , ""Audio-DMAC-P-P (Audio-DMAC-Peripheral-Peripheral)"""
menuitem "Ether" " per , ""Ether (Ethernet MAC Controller)"""
menuitem "EthernetAVB" " per , ""EthernetAVB"""
popup "CAN"
(
menuitem "Channel 0" " per , ""CAN (Controller Area Network),Channel 0"""
menuitem "Channel 1" " per , ""CAN (Controller Area Network),Channel 1"""
)
if (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")
(
menuitem "PCIEC" " per , ""PCIEC (PCI Express Controls)"""
)
popup "SCIF"
(
menuitem "SCIF-0" " per , ""SCIF (Serial Communications Interface with FIFO),SCIF-0"""
menuitem "SCIF-1" " per , ""SCIF (Serial Communications Interface with FIFO),SCIF-1"""
menuitem "SCIF-2" " per , ""SCIF (Serial Communications Interface with FIFO),SCIF-2"""
if cpu()!="R8A77420"
(
menuitem "SCIF-3" " per , ""SCIF (Serial Communications Interface with FIFO),SCIF-0"""
menuitem "SCIF-4" " per , ""SCIF (Serial Communications Interface with FIFO),SCIF-1"""
menuitem "SCIF-5" " per , ""SCIF (Serial Communications Interface with FIFO),SCIF-2"""
)
)
popup "SCIFA"
(
menuitem "SCIFA-0" " per , ""SCIFA (Serial Communications Interface with FIFO A),SCIFA-0"""
menuitem "SCIFA-1" " per , ""SCIFA (Serial Communications Interface with FIFO A),SCIFA-1"""
menuitem "SCIFA-2" " per , ""SCIFA (Serial Communications Interface with FIFO A),SCIFA-2"""
if cpu()!="R8A77420"
(
menuitem "SCIFA-3" " per , ""SCIFA (Serial Communications Interface with FIFO A),SCIFA-0"""
menuitem "SCIFA-4" " per , ""SCIFA (Serial Communications Interface with FIFO A),SCIFA-1"""
menuitem "SCIFA-5" " per , ""SCIFA (Serial Communications Interface with FIFO A),SCIFA-2"""
)
)
popup "SCIFB"
(
menuitem "SCIFB-0" " per , ""SCIFB (Serial Communications Interface with FIFO B),SCIFB-0"""
menuitem "SCIFB-1" " per , ""SCIFB (Serial Communications Interface with FIFO B),SCIFB-1"""
menuitem "SCIFB-2" " per , ""SCIFB (Serial Communications Interface with FIFO B),SCIFB-2"""
)
popup "HSCIF"
(
menuitem "Channel 0" " per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 0"""
menuitem "Channel 1" " per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 1"""
if cpu()!="R8A77420"
(
menuitem "Channel 2" " per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 2"""
)
)
popup "I2C"
(
menuitem "I2C_0" " per , ""I2C (Bus Interface),I2C_0"""
menuitem "I2C_1" " per , ""I2C (Bus Interface),I2C_1"""
menuitem "I2C_2" " per , ""I2C (Bus Interface),I2C_2"""
menuitem "I2C_3" " per , ""I2C (Bus Interface),I2C_3"""
if cpu()!="R8A77420"
(
menuitem "I2C_4" " per , ""I2C (Bus Interface),I2C_4"""
menuitem "I2C_5" " per , ""I2C (Bus Interface),I2C_5"""
)
)
popup "IIC"
(
menuitem "IIC 0" " per , ""IIC (IIC Bus Interface),IIC 0"""
menuitem "IIC 1" " per , ""IIC (IIC Bus Interface),IIC 1"""
if cpu()=="R8A77420"
(
menuitem "IIC 2" " per , ""IIC (IIC Bus Interface),IIC 2"""
)
if cpu()!="R8A77450"
(
menuitem "IIC 3 (DVFS)" " per , ""IIC (IIC Bus Interface),IIC 3 (DVFS)"""
)
)
popup "MSIOF"
(
menuitem "MSIOF 0 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 0 (CPU)"""
menuitem "MSIOF 1 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 1 (CPU)"""
menuitem "MSIOF 2 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 2 (CPU)"""
if cpu()=="R8A77420"
(
menuitem "MSIOF 3 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 3 (CPU)"""
)
)
popup "QSPI"
(
menuitem "QSPI 0" " per , ""QSPI (Quad Serial Peripheral Interface),QSPI 0"""
)
popup "MMC"
(
menuitem "Channel 0" " per , ""MMC (Multi Media Card interface),Channel 0"""
if cpu()=="R8A77420"
(
menuitem "Channel 1" " per , ""MMC (Multi Media Card interface),Channel 1"""
)
)
if (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")
(
popup "SATA"
(
menuitem "SATA 0" " per , ""SATA (Serial-ATA),SATA 0"""
menuitem "SATA 1" " per , ""SATA (Serial-ATA),SATA 1"""
)
)
popup "USB 2.0"
(
menuitem "Channel 0" " per , ""USB 2.0,Channel 0"""
menuitem "Channel 1" " per , ""USB 2.0,Channel 1"""
if (cpu()=="R8A77420")
(
menuitem "Channel 2" " per , ""USB 2.0,Channel 2"""
)
)
popup "HS-USB"
(
menuitem "Channel 0" " per , ""HS-USB (High Speed USB),Channel 0"""
)
popup "USBDMAC"
(
menuitem "USBDMAC 0" " per , ""USBDMAC (USB High-Speed DMAC),USBDMAC 0"""
menuitem "USBDMAC 1" " per , ""USBDMAC (USB High-Speed DMAC),USBDMAC 1"""
menuitem "DDM (Descriptor DMAC)" " per , ""USBDMAC (USB High-Speed DMAC),DDM (Descriptor DMAC)"""
)
if (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")
(
menuitem "USB3.0" " per , ""USB3.0 (USB3.0 Host Controller)"""
)
menuitem "RWDT" " per , ""RWDT (RCLK Watchdog Timer)"""
popup "TPU"
(
menuitem "TPU-CPU" " per , ""TPU (16-Bit Timer Pulse Unit),TPU-CPU"""
if (cpu()=="R8A77430")||(cpu()=="R8A77450")
(
menuitem "TPU-DMAC" " per , ""USB3.0 (USB3.0 Host Controller),TPU-DMAC"""
)
)
popup "CMT"
(
menuitem "CMT 0" " per , ""CMT (Compare Match Timer),CMT 0"""
menuitem "CMT 1" " per , ""CMT (Compare Match Timer),CMT 0"""
)
popup "TMU"
(
menuitem "Timer 0" " per , ""TMU (Timer Unit),Timer 0"""
menuitem "Timer 1" " per , ""TMU (Timer Unit),Timer 1"""
menuitem "Timer 2" " per , ""TMU (Timer Unit),Timer 2"""
menuitem "Timer 3" " per , ""TMU (Timer Unit),Timer 3"""
)
popup "PWM Timer"
(
menuitem "Channel 0" " per , ""PWM Timer,Channel 0"""
menuitem "Channel 1" " per , ""PWM Timer,Channel 1"""
menuitem "Channel 2" " per , ""PWM Timer,Channel 2"""
menuitem "Channel 3" " per , ""PWM Timer,Channel 3"""
menuitem "Channel 4" " per , ""PWM Timer,Channel 4"""
menuitem "Channel 5" " per , ""PWM Timer,Channel 5"""
menuitem "Channel 6" " per , ""PWM Timer,Channel 6"""
)
if (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")
(
menuitem "THS/TSC" " per , ""THS/TSC (Thermal Sensor)"""
)
menuitem "SYSC" " per , ""SYSC (System Controller)"""
menuitem "PRR" " per , ""PRR (Product Register)"""
)
)