344 lines
12 KiB
Plaintext
344 lines
12 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: RSL10 Specific Menu
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; @Props: Released
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; @Author: DOR, DAS, CEZ
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; @Changelog: 2019-11-12 DOR
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; @Manufacturer: ON - ON Semiconductor
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; @Core: Cortex-M3
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; @Chip: RSL10
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; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menrsl10.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M3)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M3),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "SOCI;SoC Identification" "per , ""SOCI (SoC Identification)"""
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popup "CM3;ARM CM3 Processor"
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(
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menuitem "LC;Loop Cache" "per , ""CM3 (ARM CM3 Processor),LC (Loop Cache)"""
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menuitem "IPP;IP Protection" "per , ""CM3 (ARM CM3 Processor),IPP (IP Protection)"""
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menuitem "ACC;Activity Counters" "per , ""CM3 (ARM CM3 Processor),ACC (Activity Counters)"""
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)
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menuitem "LPDSP32;LPDSP32 Processor" "per , ""LPDSP32 (LPDSP32 Processor)"""
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popup "PWR;Power"
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(
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menuitem "IPSV;Internal Power Supply Voltages" "per , ""PWR (Power),IPSV (Internal Power Supply Voltages)"""
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menuitem "PM;Power Modes" "per , ""PWR (Power),PM (Power Modes)"""
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menuitem "RST;Resets" "per , ""PWR (Power),RST (Resets)"""
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menuitem "ATS;Analog Test Signals" "per , ""PWR (Power),ATS (Analog Test Signals)"""
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)
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popup "CLK;Clocking"
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(
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menuitem "CGEN;CLock Generation" "per , ""CLK (Clocking),CGEN (Clock Generation)"""
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menuitem "CDIS;Clock Distribution" "per , ""CLK (Clocking),CDIS (Clock Distribution)"""
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menuitem "CDET;Clock Detection" "per , ""CLK (Clocking),CDET (Clock Detection)"""
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)
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popup "MEM;Memory"
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(
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menuitem "MEMR;Memory Registers" "per , ""MEM (Memory),MEMR (Memory Registers)"""
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menuitem "FMR;Flash Memory Registers" "per , ""MEM (Memory),FMR (Flash Memory Registers)"""
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)
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popup "RFFE;RF Front-End"
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(
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menuitem "RFOVR;RF Front-End Overview" "per , ""RFFE (RF Front-End),RFOVR (RF Front-End Overview)"""
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menuitem "RFFER;RF Front-End Registers" "per , ""RFFE (RF Front-End),RFFER (RF Front-End Registers)"""
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)
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menuitem "BLE-BB;Bluetooth Low Energy Baseband" "per , ""BLE-BB (Bluetooth Low Energy Baseband)"""
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menuitem "DIO;Digital Input/Output" "per , ""DIO (Digital Input/Output)"""
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popup "EDI;External Digital Interfaces"
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(
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menuitem "ADC;Analog-To-Digital Converter" "per , ""EDI (External Digital Interfaces),ADC (Analog-To-Digital Converter)"""
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menuitem "I2C;Inter-Integrated Circuit" "per , ""EDI (External Digital Interfaces),I2C (Inter-Integrated Circuit)"""
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menuitem "PCM;Pulse Code Modulation" "per , ""EDI (External Digital Interfaces),PCM (Pulse Code Modulation)"""
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menuitem "PWM;Pulse Width Modulation" "per , ""EDI (External Digital Interfaces),PWM (Pulse Width Modulation)"""
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popup "SPI;Serial Peripheral Interfaces"
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(
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menuitem "SPI0" "per , ""EDI (External Digital Interfaces),SPI (Serial Peripheral Interfaces),SPI0"""
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menuitem "SPI1" "per , ""EDI (External Digital Interfaces),SPI (Serial Peripheral Interfaces),SPI1"""
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)
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menuitem "UART;Universal Asynchronous Receiver-Transmitter Interfaces" "per , ""EDI (External Digital Interfaces),UART (Universal Asynchronous Receiver-Transmitter Interfaces)"""
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)
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popup "PERIPH;Peripherals"
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(
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menuitem "CRC;Cyclic Redundancy Check Generator" "per , ""PERIPH (Peripherals),CRC (Cyclic Redundancy Check Generator)"""
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popup "DMA;Direct Memory Access"
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(
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menuitem "Channel 0" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 0"""
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menuitem "Channel 1" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 1"""
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menuitem "Channel 2" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 2"""
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menuitem "Channel 3" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 3"""
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menuitem "Channel 4" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 4"""
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menuitem "Channel 5" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 5"""
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menuitem "Channel 6" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 6"""
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menuitem "Channel 7" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 7"""
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)
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popup "Timers"
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(
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menuitem "Timer 0" "per , ""PERIPH (Peripherals),Timers,Timer 0"""
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menuitem "Timer 1" "per , ""PERIPH (Peripherals),Timers,Timer 1"""
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menuitem "Timer 2" "per , ""PERIPH (Peripherals),Timers,Timer 2"""
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menuitem "Timer 3" "per , ""PERIPH (Peripherals),Timers,Timer 3"""
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)
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menuitem "WDT;Watchdog Timer" "per , ""PERIPH (Peripherals),WDT (Watchdog Timer)"""
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)
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popup "AUD;Audio"
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(
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menuitem "DMIC;Digital Microphone Inputs" "per , ""AUD (Audio),DMIC (Digital Microphone Inputs)"""
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menuitem "OD;Output Drivers" "per , ""AUD (Audio),OD (Output Drivers)"""
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menuitem "ASCC;Audio Sink Clock Counters" "per , ""AUD (Audio),ASCC (Audio Sink Clock Counters)"""
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menuitem "ASRC;Asynchronous Sample Rate Converter" "per , ""AUD (Audio),ASRC (Asynchronous Sample Rate Converter)"""
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)
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)
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)
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