331 lines
8.7 KiB
Plaintext
331 lines
8.7 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: RIN32M4CL2 Specific Menu
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; @Props: Released
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; @Author: PIW
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; @Changelog: 2022-03-07 PIW
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; @Manufacturer: RENESAS - Renesas Technology Corp.
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; @Core: Cortex-M4F
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; @Chip: R9J03G019GBG
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menrin32m4cl2.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "ADC" "per , ""ADC (A/D Converter)"""
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popup "CAN"
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(
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menuitem "CAN0" "per , ""CAN,CAN0"""
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menuitem "CAN1" "per , ""CAN,CAN1"""
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)
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menuitem "CC_LINK" "per , ""CC_LINK (CC-Link)"""
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menuitem "CC_LINK_BR" "per , ""CC_LINK_BR (CC-Link BUS Control)"""
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menuitem "CC_LINK_IEF_BR" "per , ""CC_LINK_IEF_BR (CC-Link IE Field BUS Control)"""
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menuitem "CC_LINK_RMT" "per , ""CC_LINK_RMT (CC-Link Remote Device Station)"""
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popup "CSI"
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(
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menuitem "CSI0" "per , ""CSI,CSI0"""
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menuitem "CSI1" "per , ""CSI,CSI1"""
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)
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popup "DMAC (DMA controller)"
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(
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menuitem "DMAC0" "per , ""DMAC (DMA controller),DMAC0"""
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menuitem "DMAC1" "per , ""DMAC (DMA controller),DMAC1"""
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menuitem "DMAC2" "per , ""DMAC (DMA controller),DMAC2"""
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menuitem "DMAC3" "per , ""DMAC (DMA controller),DMAC3"""
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menuitem "RTDMAC" "per , ""DMAC (DMA controller),RTDMAC"""
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)
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popup "DMACCTL (DMA control)"
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(
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menuitem "DCTL" "per , ""DMACCTL (DMA control),DCTL"""
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menuitem "RTDCTL" "per , ""DMACCTL (DMA control),RTDCTL"""
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)
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popup "DMACSS (DMAC space source size)"
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(
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menuitem "DSS0" "per , ""DMACSS (DMAC space source size),DSS0"""
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menuitem "DSS1" "per , ""DMACSS (DMAC space source size),DSS1"""
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menuitem "DSS2" "per , ""DMACSS (DMAC space source size),DSS2"""
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menuitem "DSS3" "per , ""DMACSS (DMAC space source size),DSS3"""
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menuitem "RTDSS" "per , ""DMACSS (DMAC space source size),RTDSS"""
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)
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menuitem "ETH" "per , ""ETH (Ethernet MAC)"""
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menuitem "ETHSW" "per , ""ETHSW (Ethernet Switch)"""
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menuitem "EXTPORT" "per , ""EXTPORT (Port (EXTPORT))"""
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menuitem "GPIO" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"""
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menuitem "HWOS" "per , ""HWOS (Hardware Real Time OS)"""
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popup "IIC"
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(
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menuitem "IIC0" "per , ""IIC,IIC0"""
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menuitem "IIC1" "per , ""IIC,IIC1"""
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)
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menuitem "MEMC" "per , ""MEMC (Memory controller (ROM/SRAM))"""
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menuitem "PIC" "per , ""PIC (Peripheral Inter Connection)"""
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menuitem "QINT_BUFID" "per , ""QINT_BUFID (Receive Buffer Information)"""
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menuitem "RTPORT" "per , ""RTPORT (Port (RTPORT))"""
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menuitem "SMC" "per , ""SMC (Burst memory controller)"""
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menuitem "SROM" "per , ""SROM (Serial flash ROM memory controller)"""
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menuitem "SYS" "per , ""SYS (System)"""
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menuitem "TAPA" "per , ""TAPA (Motor control unit)"""
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menuitem "TAUD" "per , ""TAUD (Timer Array Unit D)"""
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menuitem "TAUJ2" "per , ""TIMER0 (Timer array unit(TAUJ2))"""
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popup "UART (Universal Asynchronous Receiver/Transmitter)"
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(
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menuitem "UART0" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART0"""
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menuitem "UART1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
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)
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menuitem "WDT" "per , ""WDT (Watchdog Timer Unit)"""
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)
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)
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