350 lines
10 KiB
Plaintext
350 lines
10 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: R7FS1JA Specific Menu
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; @Props: Released
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; @Author: KWI, ADR
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; @Changelog: 2021-06-29 KWI
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; 2022-01-28 ADR
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; @Manufacturer: RENESAS - Renesas Technology, Corp.
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; @Core: Cortex-M23
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; @Chip: R7FS1JA782A01CBT, R7FS1JA783A01CFJ, R7FS1JA783A01CFM, R7FS1JA783A01CNE,
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; R7FS1JA783A01CNF
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menr7fs1ja.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M23)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M23),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M23),Memory Protection Unit (MPU)"""
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menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M23),Security Attribution Unit (SAU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M23),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M23),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M23),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M23),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "ACMPHS0" "per , ""ACMPHS0 (High-Speed Analog Comparator 0)"""
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menuitem "ACMPLP" "per , ""ACMPLP (Low-Power Analog Comparator)"""
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menuitem "ADC160" "per , ""ADC160 (16-bit A/D Converter)"""
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popup "AGT (Asynchronous General purpose Timer 0)"
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(
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menuitem "AGT0" "per , ""AGT (Asynchronous General purpose Timer 0),AGT0"""
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menuitem "AGT1" "per , ""AGT (Asynchronous General purpose Timer 0),AGT1"""
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)
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menuitem "BUS" "per , ""BUS (BUS Control)"""
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menuitem "CAC" "per , ""CAC (Clock Frequency Accuracy Measurement Circuit)"""
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menuitem "CAN0" "per , ""CAN0 (CAN0 Module)"""
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menuitem "CRC" "per , ""CRC (CRC Calculator)"""
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menuitem "CTSU" "per , ""CTSU (Capacitive Touch Sensing Unit)"""
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popup "DAC (8-bit D/A converter)"
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(
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menuitem "DAC8" "per , ""DAC (8-bit D/A converter),DAC8"""
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menuitem "DAC12" "per , ""DAC (8-bit D/A converter),DAC12"""
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)
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menuitem "DBG" "per , ""DBG (Debug Function)"""
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menuitem "DOC" "per , ""DOC (Data Operation Circuit)"""
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menuitem "DTC" "per , ""DTC (Data Transfer Controller)"""
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menuitem "ELC" "per , ""ELC (Event Link Controller)"""
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menuitem "FCACHE" "per , ""FCACHE (Flash Cache)"""
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menuitem "GPT_OPS" "per , ""GPT_OPS (Output Phase Switching Controller)"""
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popup "GPT (General Purpose Timer)"
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(
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menuitem "GPT161" "per , ""GPT (General Purpose Timer),GPT161"""
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menuitem "GPT162" "per , ""GPT (General Purpose Timer),GPT162"""
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menuitem "GPT163" "per , ""GPT (General Purpose Timer),GPT163"""
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menuitem "GPT164" "per , ""GPT (General Purpose Timer),GPT164"""
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menuitem "GPT165" "per , ""GPT (General Purpose Timer),GPT165"""
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menuitem "GPT166" "per , ""GPT (General Purpose Timer),GPT166"""
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menuitem "GPT320" "per , ""GPT (General Purpose Timer),GPT320"""
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)
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menuitem "ICU" "per , ""ICU (Interrupt Controller)"""
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popup "IIC (Inter-Integrated Circuit 0)"
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(
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menuitem "IIC0" "per , ""IIC (Inter-Integrated Circuit 0),IIC0"""
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menuitem "IIC1" "per , ""IIC (Inter-Integrated Circuit 0),IIC1"""
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)
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menuitem "IWDT" "per , ""IWDT (Independent Watchdog Timer)"""
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menuitem "KINT" "per , ""KINT (Key Interrupt Function)"""
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menuitem "MMF" "per , ""MMF (Memory Mirror Function)"""
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menuitem "MMPU" "per , ""MMPU (Bus Master MPU)"""
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menuitem "MSTP" "per , ""MSTP (Module Stop Control B C D)"""
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menuitem "OPAMP" "per , ""OPAMP (OperationalAmplifier)"""
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menuitem "PFS" "per , ""PFS (Pmn Pin Function Control Register)"""
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menuitem "PMISC" "per , ""PMISC (Miscellaneous Port Control Register)"""
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menuitem "POEG" "per , ""POEG (Port Output Enable Module for GPT)"""
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popup "PORT (Port 0 Control Registers)"
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(
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menuitem "PORT0" "per , ""PORT (Port 0 Control Registers),PORT0"""
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menuitem "PORT1" "per , ""PORT (Port 0 Control Registers),PORT1"""
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menuitem "PORT2" "per , ""PORT (Port 0 Control Registers),PORT2"""
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menuitem "PORT3" "per , ""PORT (Port 0 Control Registers),PORT3"""
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menuitem "PORT4" "per , ""PORT (Port 0 Control Registers),PORT4"""
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menuitem "PORT5" "per , ""PORT (Port 0 Control Registers),PORT5"""
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menuitem "PORT9" "per , ""PORT (Port 0 Control Registers),PORT9"""
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)
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menuitem "RTC" "per , ""RTC (Real-time Counter)"""
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popup "SCI (Serial Communication Interface 0)"
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(
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menuitem "SCI0" "per , ""SCI (Serial Communication Interface 0),SCI0"""
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menuitem "SCI1" "per , ""SCI (Serial Communication Interface 0),SCI1"""
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menuitem "SCI9" "per , ""SCI (Serial Communication Interface 0),SCI9"""
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)
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menuitem "SDADC24" "per , ""SDADC24 (24-Bit Sigma-Delta A/D Converter)"""
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menuitem "SMPU" "per , ""SMPU (Bus Slave MPU)"""
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popup "SPI (Serial Peripheral Interface 0)"
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(
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menuitem "SPI0" "per , ""SPI (Serial Peripheral Interface 0),SPI0"""
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menuitem "SPI1" "per , ""SPI (Serial Peripheral Interface 0),SPI1"""
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)
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menuitem "SPMON" "per , ""SPMON (CPU Stack Pointer Monitor)"""
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menuitem "SRAM" "per , ""SRAM (SRAM Control)"""
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menuitem "SYSTEM" "per , ""SYSTEM (System Control)"""
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menuitem "TSN" "per , ""TSN (Temperature Sensor)"""
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menuitem "USBFS" "per , ""USBFS (USB 2.0 FS Module)"""
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menuitem "WDT" "per , ""WDT (Watchdog Timer Unit)"""
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)
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)
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