342 lines
11 KiB
Plaintext
342 lines
11 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: RF7FS1 Specific Menu
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; @Props: Released
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; @Author: AST, WIL
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; @Changelog: 2016-10-12 WIL
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; @Manufacturer: RENESAS - Renesas Technology, Corp.
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; @Chip: R7FS124762A01CLM, R7FS124763A01CFL, R7FS124763A01CFM, R7FS124763A01CNB,
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; R7FS124763A01CNE, R7FS124763A01CNF, R7FS124772A01CLM, R7FS124773A01CFL,
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; R7FS124773A01CFM, R7FS124773A01CNB, R7FS124773A01CNE, R7FS124773A01CNF
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; @Core: Cortex-M0P
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menr7fs1.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0+)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0+),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "Resets" "per , ""Resets"""
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menuitem "OM/IM" "per , ""Option-Setting Memory and Information Memory"""
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menuitem "LVD" "per , ""LVD (Low Voltage Detection)"""
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menuitem "CGC" "per , ""Clock Generation Circuit"""
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menuitem "CAC" "per , ""CAC (Clock Frequency Accuracy Measurement Circuit)"""
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menuitem "LPM" "per , ""Low Power Modes"""
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menuitem "RWP" "per , ""Register Write Protection"""
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menuitem "ICU" "per , ""ICU (Interrupt Controller Unit)"""
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menuitem "Buses" "per , ""Buses"""
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menuitem "DTC" "per , ""DTC (Data Transfer Controller)"""
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menuitem "ELC" "per , ""ELC (Event Link Controller)"""
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popup "IO"
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(
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menuitem "Port 0" "per , ""IO,port 0"""
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menuitem "Port 1" "per , ""IO,port 1"""
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menuitem "Port 2" "per , ""IO,port 2"""
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menuitem "Port 3" "per , ""IO,port 3"""
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menuitem "Port 4" "per , ""IO,port 4"""
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if (cpuis("R7FS124773A01CFM")||cpuis("R7FS124763A01CFM")||cpuis("R7FS124773A01CNB")||cpuis("R7FS124763A01CNB")||cpuis("R7FS124773A01CFL")||cpuis("R7FS124763A01CFL")||cpuis("R7FS124773A01CNE")||cpuis("R7FS124763A01CNE"))
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(
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menuitem "Port 5" "per , ""IO,Port 5"""
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)
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)
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menuitem "KINT" "per , ""KINT (Key Interrupt Function)"""
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menuitem "POEG" "per , ""POEG (Port Output Enable for GPT)"""
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popup "GPT"
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(
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menuitem "32bit" "per , ""GPT (General PWM Timer),32bit"""
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menuitem "16bit (1)" "per , ""GPT (General PWM Timer),16bit (1)"""
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menuitem "16bit (2)" "per , ""GPT (General PWM Timer),16bit (2)"""
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menuitem "16bit (3)" "per , ""GPT (General PWM Timer),16bit (3)"""
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menuitem "16bit (4)" "per , ""GPT (General PWM Timer),16bit (4)"""
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if (!cpuis("R7FS124762A01CLM")&&!cpuis("R7FS124762A01CLM")&&!cpuis("R7FS124773A01CNF")&&!cpuis("R7FS124763A01CNF"))
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(
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menuitem "16bit (5)" "per , ""GPT (General PWM Timer),16bit (5)"""
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menuitem "16bit (6)" "per , ""GPT (General PWM Timer),16bit (6)"""
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)
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)
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popup "AGT"
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(
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menuitem "AGT 1" "per , ""AGT (Asynchronous General Purpose Timer),AGT 1"""
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menuitem "AGT 2" "per , ""AGT (Asynchronous General Purpose Timer),AGT 2"""
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)
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menuitem "RTC" "per , ""RTC (Real Time Clock)"""
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menuitem "WDT" "per , ""WDT (Watchdog Timer)"""
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menuitem "IWDT" "per , ""IWDT (Independent Watchdog Timer)"""
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menuitem "USBFS" "per , ""USBFS (USB 2.0 Full-Speed Module)"""
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popup "SCI"
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(
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menuitem "SCI 0" "per , ""SCI (Serial Communications Interface),SCI 0"""
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menuitem "SCI 1" "per , ""SCI (Serial Communications Interface),SCI 1"""
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menuitem "SCI 9" "per , ""SCI (Serial Communications Interface),SCI 9"""
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)
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popup "IIC"
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(
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menuitem "IIC 0" "per , ""IIC (I2C Bus Interface),IIC 0"""
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menuitem "IIC 1" "per , ""IIC (I2C Bus Interface),IIC 1"""
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)
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menuitem "CAN" "per , ""CAN (Controller Area Network)"""
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popup "SPI"
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(
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menuitem "SPI 0" "per , ""SPI (Serial Peripheral Interface),SPI 0"""
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menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1"""
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)
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menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check Calculator)"""
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menuitem "ADC14" "per , ""ADC14 (14-Bit A/D Converter)"""
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menuitem "DAC12" "per , ""DAC12 (12-Bit D/A Converter)"""
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menuitem "TSN" "per , ""TSN (Temperature Sensor)"""
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menuitem "ACMPLP" "per , ""ACMPLP (Low-Power Analog Comparator)"""
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menuitem "CTSU" "per , ""CTSU (Capacitive Touch Sensing Unit)"""
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menuitem "DOC" "per , ""DOC (Data Operation Circuit)"""
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menuitem "SRAM" "per , ""SRAM (Static Random Access Memory)"""
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)
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)
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