438 lines
18 KiB
Plaintext
438 lines
18 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: PSoC 4200M Specific Menu
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; @Props: Released
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; @Author: KWI, DAB
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; @Changelog: 2019-01-25 KWI
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; 2022-01-21 DAB
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; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation
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; @Core: Cortex-M0
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; @Chip: CY8C4245AXI-M445, CY8C4245AZI-M433, CY8C4245AZI-M445, CY8C4245LTI-DM405,
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; CY8C4245LTI-M445, CY8C4246AXI-M445, CY8C4246AZI-M443, CY8C4246AZI-M445,
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; CY8C4246AZI-M475, CY8C4246LTI-DM405, CY8C4246LTI-M445, CY8C4246LTI-M475,
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; CY8C4247AXI-M485, CY8C4247AZI-M475, CY8C4247AZI-M485, CY8C4247LTI-M475
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menpsoc4200m.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0),System Control"""
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menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "CAN0" "per , ""CAN0 (CAN Controller)"""
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popup "CAN0_CAN_RX (RxMessage buffer control/command)"
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(
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menuitem "CAN0_CAN_RX0" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX0"""
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menuitem "CAN0_CAN_RX1" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX1"""
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menuitem "CAN0_CAN_RX2" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX2"""
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menuitem "CAN0_CAN_RX3" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX3"""
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menuitem "CAN0_CAN_RX4" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX4"""
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menuitem "CAN0_CAN_RX5" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX5"""
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menuitem "CAN0_CAN_RX6" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX6"""
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menuitem "CAN0_CAN_RX7" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX7"""
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menuitem "CAN0_CAN_RX8" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX8"""
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menuitem "CAN0_CAN_RX9" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX9"""
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menuitem "CAN0_CAN_RX10" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX10"""
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menuitem "CAN0_CAN_RX11" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX11"""
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menuitem "CAN0_CAN_RX12" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX12"""
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menuitem "CAN0_CAN_RX13" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX13"""
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menuitem "CAN0_CAN_RX14" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX14"""
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menuitem "CAN0_CAN_RX15" "per , ""CAN0_CAN_RX (RxMessage buffer control/command),CAN0_CAN_RX15"""
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)
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popup "CAN0_CAN_TX (TxMessage Buffer control/command)"
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(
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menuitem "CAN0_CAN_TX0" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX0"""
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menuitem "CAN0_CAN_TX1" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX1"""
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menuitem "CAN0_CAN_TX2" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX2"""
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menuitem "CAN0_CAN_TX3" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX3"""
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menuitem "CAN0_CAN_TX4" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX4"""
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menuitem "CAN0_CAN_TX5" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX5"""
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menuitem "CAN0_CAN_TX6" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX6"""
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menuitem "CAN0_CAN_TX7" "per , ""CAN0_CAN_TX (TxMessage Buffer control/command),CAN0_CAN_TX7"""
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)
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menuitem "CAN1" "per , ""CAN1 (CAN Controller)"""
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popup "CAN1_CAN_RX (RxMessage buffer control/command)"
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(
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menuitem "CAN1_CAN_RX0" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX0"""
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menuitem "CAN1_CAN_RX1" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX1"""
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menuitem "CAN1_CAN_RX2" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX2"""
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menuitem "CAN1_CAN_RX3" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX3"""
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menuitem "CAN1_CAN_RX4" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX4"""
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menuitem "CAN1_CAN_RX5" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX5"""
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menuitem "CAN1_CAN_RX6" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX6"""
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menuitem "CAN1_CAN_RX7" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX7"""
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menuitem "CAN1_CAN_RX8" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX8"""
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menuitem "CAN1_CAN_RX9" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX9"""
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menuitem "CAN1_CAN_RX10" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX10"""
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menuitem "CAN1_CAN_RX11" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX11"""
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menuitem "CAN1_CAN_RX12" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX12"""
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menuitem "CAN1_CAN_RX13" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX13"""
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menuitem "CAN1_CAN_RX14" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX14"""
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menuitem "CAN1_CAN_RX15" "per , ""CAN1_CAN_RX (RxMessage buffer control/command),CAN1_CAN_RX15"""
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)
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popup "CAN1_CAN_TX (TxMessage Buffer control/command)"
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(
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menuitem "CAN1_CAN_TX0" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX0"""
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menuitem "CAN1_CAN_TX1" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX1"""
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menuitem "CAN1_CAN_TX2" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX2"""
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menuitem "CAN1_CAN_TX3" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX3"""
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menuitem "CAN1_CAN_TX4" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX4"""
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menuitem "CAN1_CAN_TX5" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX5"""
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menuitem "CAN1_CAN_TX6" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX6"""
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menuitem "CAN1_CAN_TX7" "per , ""CAN1_CAN_TX (TxMessage Buffer control/command),CAN1_CAN_TX7"""
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)
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menuitem "CM0" "per , ""CM0 (Cortex-M0 System Bus (ARM PPB Peripherals))"""
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menuitem "CORE" "per , ""CORE (SRSSv2 Registers (Power Clock Reset))"""
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menuitem "CPUSS" "per , ""CPUSS (CPU Subsystem)"""
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popup "CSD (Capsense Controller)"
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(
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menuitem "CSD0" "per , ""CSD (Capsense Controller),CSD0"""
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menuitem "CSD1" "per , ""CSD (Capsense Controller),CSD1"""
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)
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popup "CTBM (Continuous Time Block Mini)"
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(
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menuitem "CTBM0" "per , ""CTBM (Continuous Time Block Mini),CTBM0"""
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menuitem "CTBM1" "per , ""CTBM (Continuous Time Block Mini),CTBM1"""
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)
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menuitem "DMAC" "per , ""DMAC (DataWire/DMA Controller)"""
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popup "DMAC_DESCR (Descriptors)"
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(
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menuitem "DMAC_DESCR0" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR0"""
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menuitem "DMAC_DESCR1" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR1"""
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menuitem "DMAC_DESCR2" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR2"""
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menuitem "DMAC_DESCR3" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR3"""
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menuitem "DMAC_DESCR4" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR4"""
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menuitem "DMAC_DESCR5" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR5"""
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menuitem "DMAC_DESCR6" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR6"""
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menuitem "DMAC_DESCR7" "per , ""DMAC_DESCR (Descriptors),DMAC_DESCR7"""
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)
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menuitem "GPIO" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"""
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popup "GPIO_PRT (GPIO port registers)"
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(
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menuitem "GPIO_PRT0" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT0"""
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menuitem "GPIO_PRT1" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT1"""
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menuitem "GPIO_PRT2" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT2"""
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menuitem "GPIO_PRT3" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT3"""
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menuitem "GPIO_PRT4" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT4"""
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menuitem "GPIO_PRT5" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT5"""
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menuitem "GPIO_PRT6" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT6"""
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menuitem "GPIO_PRT7" "per , ""GPIO_PRT (GPIO port registers),GPIO_PRT7"""
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)
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menuitem "HSIOM" "per , ""HSIOM (High Speed IO Matrix (HSIOM))"""
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menuitem "LCD" "per , ""LCD (LCD Controller Block)"""
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menuitem "LPCOMP" "per , ""LPCOMP (Low-power Comparator)"""
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menuitem "PASS" "per , ""PASS (PASS top-level MMIO (DSAB INTR))"""
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menuitem "PASS_DSAB" "per , ""PASS_DSAB (DSAB configuration)"""
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menuitem "PERI" "per , ""PERI (Peripheral Interconnect)"""
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menuitem "PERI_TR_GROUP" "per , ""PERI_TR_GROUP (Peripheral Interconnect trigger group control registers)"""
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menuitem "ROM_DATA" "per , ""ROM_DATA (No description available)"""
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menuitem "ROMTABLE" "per , ""ROMTABLE (CoreSight ROM-Table with Cypress Vendor/Silicon ID)"""
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menuitem "SAR" "per , ""SAR (SAR ADC with Sequencer)"""
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popup "SCB (Serial Communications Block (SPI/UART/I2C))"
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(
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menuitem "SCB0" "per , ""SCB (Serial Communications Block (SPI/UART/I2C)),SCB0"""
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menuitem "SCB1" "per , ""SCB (Serial Communications Block (SPI/UART/I2C)),SCB1"""
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menuitem "SCB2" "per , ""SCB (Serial Communications Block (SPI/UART/I2C)),SCB2"""
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menuitem "SCB3" "per , ""SCB (Serial Communications Block (SPI/UART/I2C)),SCB3"""
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)
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menuitem "SFLASH" "per , ""SFLASH (Supervisory Flash Area (Cypress Trim & Wounding Info))"""
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menuitem "SPCIF" "per , ""SPCIF (Flash Control Interface)"""
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menuitem "TCPWM" "per , ""TCPWM (Timer/Counter/PWM)"""
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popup "TCPWM_CNT (Timer/Counter/PWM Counter Module)"
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(
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menuitem "TCPWM_CNT0" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT0"""
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menuitem "TCPWM_CNT1" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT1"""
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menuitem "TCPWM_CNT2" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT2"""
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menuitem "TCPWM_CNT3" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT3"""
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menuitem "TCPWM_CNT4" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT4"""
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menuitem "TCPWM_CNT5" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT5"""
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menuitem "TCPWM_CNT6" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT6"""
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menuitem "TCPWM_CNT7" "per , ""TCPWM_CNT (Timer/Counter/PWM Counter Module),TCPWM_CNT7"""
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)
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menuitem "TST" "per , ""TST (Test Subsystem)"""
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menuitem "UDB" "per , ""UDB (Programmable Digital Subsystem)"""
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menuitem "UDB_BCTL0" "per , ""UDB_BCTL0 (UDB Array Bank Control)"""
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popup "UDB_DSI (DSI Configuration (16 DSI))"
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(
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menuitem "UDB_DSI0" "per , ""UDB_DSI (DSI Configuration (16 DSI)),UDB_DSI0"""
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menuitem "UDB_DSI1" "per , ""UDB_DSI (DSI Configuration (16 DSI)),UDB_DSI1"""
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menuitem "UDB_DSI2" "per , ""UDB_DSI (DSI Configuration (16 DSI)),UDB_DSI2"""
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menuitem "UDB_DSI3" "per , ""UDB_DSI (DSI Configuration (16 DSI)),UDB_DSI3"""
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)
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menuitem "UDB_P0_ROUTE" "per , ""UDB_P0_ROUTE (Routing Configuration for one UDB Pair)"""
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popup "UDB_P0_U (Single UDB Configuration)"
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|
(
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menuitem "UDB_P0_U0" "per , ""UDB_P0_U (Single UDB Configuration),UDB_P0_U0"""
|
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menuitem "UDB_P0_U1" "per , ""UDB_P0_U (Single UDB Configuration),UDB_P0_U1"""
|
|
)
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menuitem "UDB_P1_ROUTE" "per , ""UDB_P1_ROUTE (Routing Configuration for one UDB Pair)"""
|
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popup "UDB_P1_U (Single UDB Configuration)"
|
|
(
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menuitem "UDB_P1_U0" "per , ""UDB_P1_U (Single UDB Configuration),UDB_P1_U0"""
|
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menuitem "UDB_P1_U1" "per , ""UDB_P1_U (Single UDB Configuration),UDB_P1_U1"""
|
|
)
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popup "UDB_PA (Port Adapter Configuration)"
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|
(
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menuitem "UDB_PA0" "per , ""UDB_PA (Port Adapter Configuration),UDB_PA0"""
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menuitem "UDB_PA1" "per , ""UDB_PA (Port Adapter Configuration),UDB_PA1"""
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menuitem "UDB_PA2" "per , ""UDB_PA (Port Adapter Configuration),UDB_PA2"""
|
|
menuitem "UDB_PA3" "per , ""UDB_PA (Port Adapter Configuration),UDB_PA3"""
|
|
)
|
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menuitem "UDB_UDBIF" "per , ""UDB_UDBIF (UDB Subsystem Interface Configuration)"""
|
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popup "UDB_W (UDB Working Registers 8-bit mode (1 UDB at a time))"
|
|
(
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menuitem "UDB_W8" "per , ""UDB_W (UDB Working Registers 8-bit mode (1 UDB at a time)),UDB_W8"""
|
|
menuitem "UDB_W16" "per , ""UDB_W (UDB Working Registers 8-bit mode (1 UDB at a time)),UDB_W16"""
|
|
menuitem "UDB_W32" "per , ""UDB_W (UDB Working Registers 8-bit mode (1 UDB at a time)),UDB_W32"""
|
|
)
|
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menuitem "WCO" "per , ""WCO (32KHz Oscillator)"""
|
|
)
|
|
)
|