415 lines
15 KiB
Plaintext
415 lines
15 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: PSoC 4200L Specific Menu
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; @Props: Released
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; @Author: KMB, AJK
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; @Changelog: 2017-11-03 KMB
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; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation
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; @Core: Cortex-M0
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; @Chip: CY8C4246AZI-L423, CY8C4246AZI-L433, CY8C4246AZI-L435, CY8C4246AZI-L445,
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; CY8C4246LTI-L445, CY8C4247AZI-L423, CY8C4247AZI-L433, CY8C4247AZI-L445,
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; CY8C4247AZI-L475, CY8C4247AZI-L485, CY8C4247BZI-L479, CY8C4247BZI-L489,
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; CY8C4247LTI-L445, CY8C4247LTI-L475, CY8C4247LTI-L485, CY8C4248AZI-L475,
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; CY8C4248AZI-L485, CY8C4248BZI-L479, CY8C4248BZI-L489, CY8C4248LTI-L475,
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; CY8C4248LTI-L485
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menpsoc4200l.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0),System Control"""
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menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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if (cpuis("CY8C424?BZI-L489")||cpuis("*-L485")||cpuis("CY8C424?LTI-L485"))
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(
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menuitem "CAN" "per , ""CAN,CAN0"""
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menuitem "CAN" "per , ""CAN,CAN1"""
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)
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menuitem "CPUSS;CPU Sub-System" "per , ""CPUSS (CPU Sub-System)"""
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popup "CSD;CapSense Sigma-Delta"
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(
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if (!cpuis("CY8C424?AZI-L433")&&!cpuis("CY8C4246AZI-L435"))
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(
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menuitem "CSD0" "per , ""CSD (CapSense Sigma-Delta),CSD0"""
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)
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if (!cpuis("CY8C424?AZI-L433")&&!cpuis("CY8C4246AZI-L435")&&!cpuis("CY8C424?AZI-L423"))
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(
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menuitem "CSD1" "per , ""CSD (CapSense Sigma-Delta),CSD1"""
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)
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)
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popup "CTBM;Continuous Time Block Mini"
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(
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menuitem "CTBM0" "per , ""CTBM (Continuous Time Block Mini),CTBM0"""
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if (cpuis("*-L475")||cpuis("*-L479")||cpuis("*-L485")||cpuis("*-L489"))
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(
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menuitem "CTBM1" "per , ""CTBM (Continuous Time Block Mini),CTBM1"""
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)
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)
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menuitem "DMAC;Direct-Memory Access" "per , ""DMAC (Direct-Memory Access)"""
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popup "GPIO"
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(
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menuitem "PORT 0" "per , ""GPIO,PORT 0"""
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menuitem "PORT 1" "per , ""GPIO,PORT 1"""
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menuitem "PORT 2" "per , ""GPIO,PORT 2"""
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menuitem "PORT 3" "per , ""GPIO,PORT 3"""
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menuitem "PORT 4" "per , ""GPIO,PORT 4"""
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if (!cpuis("CY8C424?AZI-L423")||!cpuis("CY8C424?AZI-L433"))
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(
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menuitem "PORT 5" "per , ""GPIO,PORT 5"""
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menuitem "PORT 6" "per , ""GPIO,PORT 6"""
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)
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menuitem "PORT 7" "per , ""GPIO,PORT 7"""
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if (cpuis("CY8C424?BZI-L489")||cpuis("CY8C424?BZI-L479"))
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(
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menuitem "PORT 8" "per , ""GPIO,PORT 8"""
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menuitem "PORT 9" "per , ""GPIO,PORT 9"""
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menuitem "PORT 10" "per , ""GPIO,PORT 10"""
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menuitem "PORT 11" "per , ""GPIO,PORT 11"""
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menuitem "PORT 12" "per , ""GPIO,PORT 12"""
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)
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if (!cpuis("CY8C424?AZI-L423")||!cpuis("CY8C424?AZI-L433"))
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(
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menuitem "PORT 13" "per , ""GPIO,PORT 13"""
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)
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)
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menuitem "HSIOM;High Speed I/O Matrix" "per , ""HSIOM (High Speed I/O Matrix)"""
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if (cpuis("*-L423")||cpuis("*-L445")||cpuis("*-L485")||cpuis("*-L489"))
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(
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menuitem "LCD" "per , ""LCD"""
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)
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menuitem "LPCOMP;Low Power Comparator" "per , ""LPCOMP (Low Power Comparator)"""
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menuitem "PASS;Programmable Analog Sub-System" "per , ""PASS (Programmable Analog Sub-System)"""
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menuitem "ROM" "per , ""ROM"""
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menuitem "SAR ADC" "per , ""SAR ADC"""
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popup "SCB"
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(
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menuitem "SCB0" "per , ""SCB,SCB0"""
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menuitem "SCB1" "per , ""SCB,SCB1"""
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menuitem "SCB2" "per , ""SCB,SCB2"""
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if (!cpuis("CY8C424?AZI-L423")&&!cpuis("CY8C424?AZI-L433"))
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(
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menuitem "SCB3" "per , ""SCB,SCB3"""
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)
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)
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menuitem "SFLASH;Supervisory Flash registers" "per , ""SFLASH (Supervisory Flash registers)"""
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menuitem "SPCIF;SPC Interface registers" "per , ""SPCIF (SPC Interface registers)"""
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menuitem "SRSS;System Resources Sub-System registers" "per , ""SRSS (System Resources Sub-System registers)"""
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menuitem "SRSS External Clock registers" "per , ""SRSS External Clock registers"""
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menuitem "SRSS Peripheral Clock registers" "per , ""SRSS Peripheral Clock registers"""
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menuitem "SRSS Watch Crystal Oscillator registers" "per , ""SRSS Watch Crystal Oscillator registers"""
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menuitem "TCPWM Control and Status registers" "per , ""TCPWM Control and Status registers"""
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menuitem "TCPWM Counter registers" "per , ""TCPWM Counter registers"""
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popup "TCPWM Counter registers"
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(
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menuitem "TCPWM_CNT0" "per , ""TCPWM Counter registers,TCPWM_CNT0"""
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menuitem "TCPWM_CNT1" "per , ""TCPWM Counter registers,TCPWM_CNT1"""
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menuitem "TCPWM_CNT2" "per , ""TCPWM Counter registers,TCPWM_CNT2"""
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menuitem "TCPWM_CNT3" "per , ""TCPWM Counter registers,TCPWM_CNT3"""
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menuitem "TCPWM_CNT4" "per , ""TCPWM Counter registers,TCPWM_CNT4"""
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menuitem "TCPWM_CNT5" "per , ""TCPWM Counter registers,TCPWM_CNT5"""
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menuitem "TCPWM_CNT6" "per , ""TCPWM Counter registers,TCPWM_CNT6"""
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menuitem "TCPWM_CNT7" "per , ""TCPWM Counter registers,TCPWM_CNT7"""
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)
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menuitem "Peripheral Trigger registers" "per , ""Peripheral Trigger registers"""
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menuitem "UDB;Universal Digital Block registers" "per , ""UDB (Universal Digital Block registers)"""
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menuitem "UDB Array Bank Control registers" "per , ""UDB Array Bank Control registers"""
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popup "UDB Digital System Interconnect registers"
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(
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menuitem "UDB_DSI0" "per , ""UDB Digital System Interconnect registers,UDB_DSI0"""
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menuitem "UDB_DSI1" "per , ""UDB Digital System Interconnect registers,UDB_DSI1"""
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menuitem "UDB_DSI2" "per , ""UDB Digital System Interconnect registers,UDB_DSI2"""
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menuitem "UDB_DSI3" "per , ""UDB Digital System Interconnect registers,UDB_DSI3"""
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menuitem "UDB_DSI4" "per , ""UDB Digital System Interconnect registers,UDB_DSI4"""
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menuitem "UDB_DSI5" "per , ""UDB Digital System Interconnect registers,UDB_DSI5"""
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menuitem "UDB_DSI6" "per , ""UDB Digital System Interconnect registers,UDB_DSI6"""
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menuitem "UDB_DSI7" "per , ""UDB Digital System Interconnect registers,UDB_DSI7"""
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)
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popup "UDB Port Adapter registers"
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(
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menuitem "UDB_P0" "per , ""UDB Port Adapter registers,UDB_P0"""
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menuitem "UDB_P1" "per , ""UDB Port Adapter registers,UDB_P1"""
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menuitem "UDB_P2" "per , ""UDB Port Adapter registers,UDB_P2"""
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menuitem "UDB_P3" "per , ""UDB Port Adapter registers,UDB_P3"""
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menuitem "UDB_P4" "per , ""UDB Port Adapter registers,UDB_P4"""
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menuitem "UDB_P5" "per , ""UDB Port Adapter registers,UDB_P5"""
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menuitem "UDB_P6" "per , ""UDB Port Adapter registers,UDB_P6"""
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menuitem "UDB_P7" "per , ""UDB Port Adapter registers,UDB_P7"""
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)
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popup "UDB Routing registers"
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(
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menuitem "UDB_P0" "per , ""UDB Routing registers,UDB_P0"""
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menuitem "UDB_P1" "per , ""UDB Routing registers,UDB_P1"""
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menuitem "UDB_P2" "per , ""UDB Routing registers,UDB_P2"""
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menuitem "UDB_P3" "per , ""UDB Routing registers,UDB_P3"""
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)
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menuitem "UDB 8-bit Working registers" "per , ""UDB 8-bit Working registers"""
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menuitem "UDB 16-bit Concatenated Working registers" "per , ""UDB 16-bit Concatenated Working registers"""
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menuitem "UDB 16-bit Working registers" "per , ""UDB 16-bit Working registers"""
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menuitem "UDB 32-bit Working registers" "per , ""UDB 32-bit Working registers"""
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menuitem "UDB Interface registers" "per , ""UDB Interface registers"""
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popup "UDBSNG"
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(
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menuitem "UDB P0 U0" "per , ""UDBSNG Registers,UDB P0 U0"""
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menuitem "UDB P0 U1" "per , ""UDBSNG Registers,UDB P0 U1"""
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menuitem "UDB P1 U0" "per , ""UDBSNG Registers,UDB P1 U0"""
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menuitem "UDB P1 U1" "per , ""UDBSNG Registers,UDB P1 U1"""
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menuitem "UDB P2 U0" "per , ""UDBSNG Registers,UDB P2 U0"""
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menuitem "UDB P2 U1" "per , ""UDBSNG Registers,UDB P2 U1"""
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menuitem "UDB P3 U0" "per , ""UDBSNG Registers,UDB P3 U0"""
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menuitem "UDB P3 U1" "per , ""UDBSNG Registers,UDB P3 U1"""
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)
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if !CPUIS("CY8C4246AZI-L423")&&!CPUIS("CY8C4247AZI-L423")
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(
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menuitem "USB Registers" "per , ""USB Registers"""
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menuitem "USB Control registers" "per , ""USB Control registers"""
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)
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)
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)
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