293 lines
7.3 KiB
Plaintext
293 lines
7.3 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: NRF51xxx Specific Menu
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; @Manufacturer: NORDICSEMI - Nordic Semiconductor
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; @Author: KAO, GAJ, KMB
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; @Changelog: 2016-11-10 KMB
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; @Chip: Nnrf51???QFAA, Nnrf51???QFAB, Nnrf51???QFAC, Nnrf51???CEAA, Nnrf51???CDAB,
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; Nnrf51???CFAC, NRF51422QFAA, NRF51422QFAB, NRF51422QFAC, NRF51422CEAA,
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; NRF51422CDAB, NRF51422CFAC, NRF51822CTAA, NRF51822CTAC
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; @Core: Cortex-M0
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mennrf51xxx.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0),System Control"""
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menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "NVMC" "per , ""Non-Volatile Memory Controller (NVMC)"""
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menuitem "FICR" "per , ""Factory Information Configuration Registers (FICR)"""
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menuitem "UICR" "per , ""User Information Configuration Registers (UICR)"""
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menuitem "MPU" "per , ""Memory Protection Unit (MPU)"""
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menuitem "POWER" "per , ""Power management (POWER)"""
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menuitem "CLOCK" "per , ""Clock management (CLOCK)"""
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menuitem "GPIO" "per , ""GPIO"""
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menuitem "GPIOTE" "per , ""GPIO tasks and events (GPIOTE)"""
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menuitem "PPI" "per , ""Programmable Peripheral Interconnect (PPI)"""
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menuitem "RADIO" "per , ""2.4 GHz radio (RADIO)"""
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menuitem "TIMER" "per , ""Timer/counter (TIMER)"""
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menuitem "RTC" "per , ""Real Time Counter (RTC)"""
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menuitem "WDT" "per , ""Watchdog timer (WDT)"""
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menuitem "RNG" "per , ""Random Number Generator (RNG)"""
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menuitem "TEMP" "per , ""Temperature sensor (TEMP)"""
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menuitem "ECB" "per , ""AES Electronic Codebook Mode Encryption (ECB)"""
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menuitem "CCM" "per , ""AES CCM Mode Encryption (CCM)"""
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menuitem "AAR" "per , ""Accelerated Address Resolver (AAR)"""
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menuitem "SPI" "per , ""Serial Peripheral Interface Master (SPI)"""
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menuitem "SPIS" "per , ""SPI Slave (SPIS)"""
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menuitem "TWI" "per , ""I2C compatible Two Wire Interface (TWI)"""
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menuitem "UART" "per , ""Universal Asynchronous Receiver/Transmitter (UART)"""
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menuitem "QDEC" "per , ""Quadrature Decoder (QDEC)"""
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menuitem "ADC" "per , ""Analog to Digital Converter (ADC)"""
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menuitem "LPCOMP" "per , ""Low Power Comparator (LPCOMP)"""
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)
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)
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