Files
Gen4_R-Car_Trace32/2_Trunk/menkinetisw45.men
2025-10-14 09:52:32 +09:00

385 lines
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Plaintext

; --------------------------------------------------------------------------------
; @Title: Kinetis W45 Specific Menu
; @Props: Released
; @Author: KWI, ADR
; @Changelog: 2021-04-21 KWI
; 2022-01-24 ADR
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-M33F
; @Chip: MKW45B41Z82AFPA, MKW45B41Z82AFTA, MKW45B41Z83AFPA, MKW45B41Z83AFTA
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menkinetisw45.men 16339 2023-07-03 13:30:14Z pegold $
add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M33F)"
(
menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "ADC0" "per , ""ADC"""
menuitem "ATX0" "per , ""ATX (Analog Test Annex)"""
menuitem "AXBS0" "per , ""AXBS"""
menuitem "BRIC" "per , ""BRIC"""
if (cpuis("MKW45B41Z83*"))
(
menuitem "CAN0" "per , ""CAN,CAN0"""
)
menuitem "CCM32K" "per , ""CCM32K"""
menuitem "CIU2" "per , ""CIU2 (no description available)"""
menuitem "CMC0" "per , ""CMC"""
menuitem "CRC0" "per , ""CRC"""
menuitem "MP" "per , ""DMA (DMA MP)"""
menuitem "TCD" "per , ""DMA_TCD (DMA TCD)"""
menuitem "DSB0" "per , ""DSB"""
menuitem "EWM0" "per , ""EWM"""
menuitem "FLEXIO0" "per , ""FLEXIO"""
menuitem "FRO192M0" "per , ""FRO192M (d_ip_fro192mhz_syn)"""
menuitem "XCVR_2P4GHZ_PHY" "per , ""GEN4PHY (2.4GHz PHY REGISTERS)"""
menuitem "GENFSK" "per , ""GENFSK (GENERIC FSK)"""
popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
(
menuitem "GPIOA" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
menuitem "GPIOB" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
menuitem "GPIOC" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
menuitem "GPIOD" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOD"""
)
menuitem "I3C" "per , ""I3C"""
popup "LPCMP"
(
menuitem "LPCMP0" "per , ""LPCMP,LPCMP0"""
menuitem "LPCMP1" "per , ""LPCMP,LPCMP1"""
)
popup "LPI2C"
(
menuitem "LPI2C0" "per , ""LPI2C,LPI2C0"""
menuitem "LPI2C1" "per , ""LPI2C,LPI2C1"""
)
menuitem "LPIT0" "per , ""LPIT"""
popup "LPSPI"
(
menuitem "LPSPI0" "per , ""LPSPI,LPSPI0"""
menuitem "LPSPI1" "per , ""LPSPI,LPSPI1"""
)
popup "LPTMR"
(
menuitem "LPTMR0" "per , ""LPTMR,LPTMR0"""
menuitem "LPTMR1" "per , ""LPTMR,LPTMR1"""
)
popup "LPUART"
(
menuitem "LPUART0" "per , ""LPUART,LPUART0"""
menuitem "LPUART1" "per , ""LPUART,LPUART1"""
)
menuitem "LTC" "per , ""LTC"""
menuitem "MCM" "per , ""MCM"""
menuitem "MRCC" "per , ""MRCC"""
menuitem "MSCM" "per , ""MSCM"""
menuitem "FMU0" "per , ""MSF1 (Flash)"""
menuitem "NPX" "per , ""NPX (FMC)"""
popup "PORT"
(
menuitem "PORTA" "per , ""PORT,PORTA"""
menuitem "PORTB" "per , ""PORT,PORTB"""
menuitem "PORTC" "per , ""PORT,PORTC"""
menuitem "PORTD" "per , ""PORT,PORTD"""
)
menuitem "RADIO_CTRL" "per , ""RADIO_CTRL (RADIO_MISC)"""
menuitem "RBME" "per , ""RBME"""
popup "REGFILE"
(
menuitem "REGFILE0" "per , ""REGFILE,REGFILE0"""
menuitem "REGFILE1" "per , ""REGFILE,REGFILE1"""
)
menuitem "RF_CMC1" "per , ""RF_CMC1 (RF_CMC)"""
menuitem "RF_FMCCFG" "per , ""RF_FMCCFG (RadioFlash)"""
menuitem "RF_FMU" "per , ""RF_FMU (Flash)"""
menuitem "RF_SFA" "per , ""RF_SFA (Signal Frequency Analyser)"""
menuitem "RFMC" "per , ""RFMC"""
menuitem "ROMCP" "per , ""ROMCP (ROMC)"""
menuitem "RTC" "per , ""RTC (Real-time Counter)"""
menuitem "RX_PACKET_RAM" "per , ""RX_PACKET_RAM (RADIO_PACKET_RAM)"""
menuitem "S3MUA" "per , ""S3MU (S3MUA)"""
menuitem "SCG0" "per , ""SCG"""
menuitem "SEMA42" "per , ""SEMA42"""
menuitem "SFA0" "per , ""SFA (Signal Frequency Analyser)"""
menuitem "SMSCM" "per , ""SMSCM"""
menuitem "SPC0" "per , ""SPC"""
menuitem "SYSPM" "per , ""SYSPM"""
popup "TPM"
(
menuitem "TPM0" "per , ""TPM,TPM0"""
menuitem "TPM1" "per , ""TPM,TPM1"""
menuitem "TPM2" "per , ""TPM,TPM2"""
)
menuitem "TRDC" "per , ""TRDC"""
menuitem "TRGMUX0" "per , ""TRGMUX"""
menuitem "TSTMR0" "per , ""TSTMR0 (TSTMR)"""
menuitem "TX_PACKET_RAM" "per , ""TX_PACKET_RAM (RADIO_PACKET_RAM)"""
menuitem "VBAT0" "per , ""VBAT"""
menuitem "VREF0" "per , ""VREF"""
popup "WDOG (Watchdog Timer Unit)"
(
menuitem "WDOG0" "per , ""WDOG (Watchdog Timer Unit),WDOG0"""
menuitem "WDOG1" "per , ""WDOG (Watchdog Timer Unit),WDOG1"""
)
menuitem "WOR_REGS" "per , ""WOR"""
menuitem "WUU0" "per , ""WUU"""
menuitem "XCVR_ANALOG" "per , ""XCVR_ANALOG"""
menuitem "XCVR_MISC" "per , ""XCVR_MISC"""
menuitem "XCVR_PLL_DIG" "per , ""XCVR_PLL_DIG"""
menuitem "XCVR_RX_DIG" "per , ""XCVR_RX_DIG (2P4GHZ_RX_DIG)"""
menuitem "XCVR_TSM" "per , ""XCVR_TSM"""
menuitem "XCVR_TX_DIG" "per , ""XCVR_TX_DIG"""
)
)