385 lines
11 KiB
Plaintext
385 lines
11 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Kinetis W45 Specific Menu
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; @Props: Released
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; @Author: KWI, ADR
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; @Changelog: 2021-04-21 KWI
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; 2022-01-24 ADR
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; @Manufacturer: NXP - NXP Semiconductors
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; @Core: Cortex-M33F
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; @Chip: MKW45B41Z82AFPA, MKW45B41Z82AFTA, MKW45B41Z83AFPA, MKW45B41Z83AFTA
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menkinetisw45.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M33F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
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menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "ADC0" "per , ""ADC"""
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menuitem "ATX0" "per , ""ATX (Analog Test Annex)"""
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menuitem "AXBS0" "per , ""AXBS"""
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menuitem "BRIC" "per , ""BRIC"""
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if (cpuis("MKW45B41Z83*"))
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(
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menuitem "CAN0" "per , ""CAN,CAN0"""
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)
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menuitem "CCM32K" "per , ""CCM32K"""
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menuitem "CIU2" "per , ""CIU2 (no description available)"""
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menuitem "CMC0" "per , ""CMC"""
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menuitem "CRC0" "per , ""CRC"""
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menuitem "MP" "per , ""DMA (DMA MP)"""
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menuitem "TCD" "per , ""DMA_TCD (DMA TCD)"""
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menuitem "DSB0" "per , ""DSB"""
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menuitem "EWM0" "per , ""EWM"""
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menuitem "FLEXIO0" "per , ""FLEXIO"""
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menuitem "FRO192M0" "per , ""FRO192M (d_ip_fro192mhz_syn)"""
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menuitem "XCVR_2P4GHZ_PHY" "per , ""GEN4PHY (2.4GHz PHY REGISTERS)"""
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menuitem "GENFSK" "per , ""GENFSK (GENERIC FSK)"""
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popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
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(
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menuitem "GPIOA" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
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menuitem "GPIOB" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
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menuitem "GPIOC" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
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menuitem "GPIOD" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOD"""
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)
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menuitem "I3C" "per , ""I3C"""
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popup "LPCMP"
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(
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menuitem "LPCMP0" "per , ""LPCMP,LPCMP0"""
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menuitem "LPCMP1" "per , ""LPCMP,LPCMP1"""
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)
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popup "LPI2C"
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(
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menuitem "LPI2C0" "per , ""LPI2C,LPI2C0"""
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menuitem "LPI2C1" "per , ""LPI2C,LPI2C1"""
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)
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menuitem "LPIT0" "per , ""LPIT"""
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popup "LPSPI"
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(
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menuitem "LPSPI0" "per , ""LPSPI,LPSPI0"""
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menuitem "LPSPI1" "per , ""LPSPI,LPSPI1"""
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)
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popup "LPTMR"
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(
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menuitem "LPTMR0" "per , ""LPTMR,LPTMR0"""
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menuitem "LPTMR1" "per , ""LPTMR,LPTMR1"""
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)
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popup "LPUART"
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(
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menuitem "LPUART0" "per , ""LPUART,LPUART0"""
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menuitem "LPUART1" "per , ""LPUART,LPUART1"""
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)
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menuitem "LTC" "per , ""LTC"""
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menuitem "MCM" "per , ""MCM"""
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menuitem "MRCC" "per , ""MRCC"""
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menuitem "MSCM" "per , ""MSCM"""
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menuitem "FMU0" "per , ""MSF1 (Flash)"""
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menuitem "NPX" "per , ""NPX (FMC)"""
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popup "PORT"
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(
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menuitem "PORTA" "per , ""PORT,PORTA"""
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menuitem "PORTB" "per , ""PORT,PORTB"""
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menuitem "PORTC" "per , ""PORT,PORTC"""
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menuitem "PORTD" "per , ""PORT,PORTD"""
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)
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menuitem "RADIO_CTRL" "per , ""RADIO_CTRL (RADIO_MISC)"""
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menuitem "RBME" "per , ""RBME"""
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popup "REGFILE"
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(
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menuitem "REGFILE0" "per , ""REGFILE,REGFILE0"""
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menuitem "REGFILE1" "per , ""REGFILE,REGFILE1"""
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)
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menuitem "RF_CMC1" "per , ""RF_CMC1 (RF_CMC)"""
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menuitem "RF_FMCCFG" "per , ""RF_FMCCFG (RadioFlash)"""
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menuitem "RF_FMU" "per , ""RF_FMU (Flash)"""
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menuitem "RF_SFA" "per , ""RF_SFA (Signal Frequency Analyser)"""
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menuitem "RFMC" "per , ""RFMC"""
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menuitem "ROMCP" "per , ""ROMCP (ROMC)"""
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menuitem "RTC" "per , ""RTC (Real-time Counter)"""
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menuitem "RX_PACKET_RAM" "per , ""RX_PACKET_RAM (RADIO_PACKET_RAM)"""
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menuitem "S3MUA" "per , ""S3MU (S3MUA)"""
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menuitem "SCG0" "per , ""SCG"""
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menuitem "SEMA42" "per , ""SEMA42"""
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menuitem "SFA0" "per , ""SFA (Signal Frequency Analyser)"""
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menuitem "SMSCM" "per , ""SMSCM"""
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menuitem "SPC0" "per , ""SPC"""
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menuitem "SYSPM" "per , ""SYSPM"""
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popup "TPM"
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(
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menuitem "TPM0" "per , ""TPM,TPM0"""
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menuitem "TPM1" "per , ""TPM,TPM1"""
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menuitem "TPM2" "per , ""TPM,TPM2"""
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)
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menuitem "TRDC" "per , ""TRDC"""
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menuitem "TRGMUX0" "per , ""TRGMUX"""
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menuitem "TSTMR0" "per , ""TSTMR0 (TSTMR)"""
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menuitem "TX_PACKET_RAM" "per , ""TX_PACKET_RAM (RADIO_PACKET_RAM)"""
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menuitem "VBAT0" "per , ""VBAT"""
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menuitem "VREF0" "per , ""VREF"""
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popup "WDOG (Watchdog Timer Unit)"
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(
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menuitem "WDOG0" "per , ""WDOG (Watchdog Timer Unit),WDOG0"""
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menuitem "WDOG1" "per , ""WDOG (Watchdog Timer Unit),WDOG1"""
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)
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menuitem "WOR_REGS" "per , ""WOR"""
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menuitem "WUU0" "per , ""WUU"""
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menuitem "XCVR_ANALOG" "per , ""XCVR_ANALOG"""
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menuitem "XCVR_MISC" "per , ""XCVR_MISC"""
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menuitem "XCVR_PLL_DIG" "per , ""XCVR_PLL_DIG"""
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menuitem "XCVR_RX_DIG" "per , ""XCVR_RX_DIG (2P4GHZ_RX_DIG)"""
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menuitem "XCVR_TSM" "per , ""XCVR_TSM"""
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menuitem "XCVR_TX_DIG" "per , ""XCVR_TX_DIG"""
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)
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)
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