481 lines
14 KiB
Plaintext
481 lines
14 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Kinetis W Family Specific Menu
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; @Manufacturer: NXP - NXP Semiconductors
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; @Author: SZM, BFG, FSZ
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; @Changelog: 2017-05-12 BFG
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; 2018-02-26 STR
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; 2018-03-08 FSZ
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; @Chip: MKW21D256VHA5, MKW21D512VHA5, MKW22D512VHA5, MKW24D512VHA5,
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; MKW01Z128CHNR, MKW20Z160VHT4, MKW21Z256VHT4, MKW21Z512VHT4,
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; MKW30Z160VHM4, MKW30Z160VHM4R, MKW31Z256VHT4, MKW31Z512VHT4,
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; MKW40Z160VHT4, MKW40Z160VHT4R, MKW41Z256VHT4, MKW41Z512VHT4,
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; MKW01Z128CHN, MKW21D256VHA5R, MKW41Z512VHT4R
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; @Core: Cortex-M4, Cortex-M0P
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for usr use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menkinetisw.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if (corename()=="CORTEXM4")
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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if (corename()=="CORTEXM0+")
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(
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popup "[:chip]Core Registers (Cortex-M0+)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0+),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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separator
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popup "PORT"
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(
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menuitem "PORTA" "per , ""PORT (Port control and interrupts),PORTA"""
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if (cpuis("MKW01Z128*")||cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
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(
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menuitem "PORTB" "per , ""PORT (Port control and interrupts),PORTB"""
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)
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menuitem "PORTC" "per , ""PORT (Port control and interrupts),PORTC"""
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if (cpuis("MKW01Z128*")||cpuis("MKW2?D*"))
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(
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menuitem "PORTD" "per , ""PORT (Port control and interrupts),PORTD"""
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menuitem "PORTE" "per , ""PORT (Port control and interrupts),PORTE"""
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)
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)
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separator
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menuitem "SIM" "per , ""SIM (System Integration Module)"""
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menuitem "SMC" "per , ""SMC (System Mode Controller)"""
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menuitem "PMC" "per , ""PMC (Power Management Controller)"""
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if (cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
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(
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menuitem "DCDC" "per , ""DCDC (DCDC Converter)"""
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)
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menuitem "LLWU" "per , ""LLWU (Low-Leakage Wakeup Unit)"""
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menuitem "RCM" "per , ""RCM (Reset Control Module)"""
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menuitem "MCM" "per , ""MCM (Miscellaneous Control Module)"""
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if (cpuis("MKW01Z128*")||cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
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(
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popup "MTB (Micro Trace Buffer)"
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(
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menuitem "MTB_RAM" "per , ""MTB (Micro Trace Buffer),MTB_RAM"""
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menuitem "MTB_DWT" "per , ""MTB (Micro Trace Buffer),MTB_DWT"""
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menuitem "System ROM" "per , ""MTB (Micro Trace Buffer),System ROM"""
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)
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)
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menuitem "DMAMUX" "per , ""DMAMUX (Direct Memory Access Multiplexer)"""
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if (cpuis("MKW41Z*")||cpuis("MKW31Z*")||cpuis("MKW21Z*")||cpuis("MKW2?D*"))
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(
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menuitem "eDMA" "per , ""eDMA (Enhanced Direct Memory Access)"""
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)
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if (cpuis("MKW01Z128*")||cpuis("MKW40Z*")||cpuis("MKW30Z*")||cpuis("MKW20Z*"))
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(
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menuitem "DMA" "per , ""DMA (Direct Memory Access)"""
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)
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if (cpuis("MKW2?D*"))
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(
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menuitem "EWM" "per , ""EWM (External Watchdog Monitor)"""
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menuitem "WDOG" "per , ""WDOG (Watchdog Timer)"""
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)
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menuitem "MCG" "per , ""MCG (Multipurpose Clock Generator)"""
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if (!cpuis("MKW4?Z*")&&!cpuis("MKW3?Z*")&&!cpuis("MKW2?Z*"))
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(
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menuitem "OSC" "per , ""OSC (Oscillator)"""
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)
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separator
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if (cpuis("MKW2?D*"))
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(
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menuitem "FMC" "per , ""FMC (Flash Memory Controller)"""
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menuitem "FTFL" "per , ""FTFL (Flash Memory Module)"""
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)
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if (cpuis("MKW01Z128*")||cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
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(
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menuitem "FTFA" "per , ""FTFA (Flash Memory Module)"""
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)
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if (cpuis("MKW2?D*"))
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(
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menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check)"""
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menuitem "MMCAU" "per , ""MMCAU (Memory-Mapped Cryptographic Acceleration Unit)"""
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menuitem "RNGA" "per , ""RNGA (Random Number Generator Accelerator)"""
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)
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separator
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menuitem "ADC" "per , ""ADC (Analog-to-Digital Converter)"""
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popup "CMP"
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(
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menuitem "CMP0" "per , ""CMP (Comparator),CMP0"""
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if (cpuis("MKW2?D*"))
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(
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menuitem "CMP1" "per , ""CMP (Comparator),CMP1"""
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)
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)
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menuitem "DAC" "per , ""DAC (Digital-to-Analog Converter)"""
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if (cpuis("MKW41Z*")||cpuis("MKW31Z*")||cpuis("MKW21Z*"))
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(
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menuitem "VREF" "per , ""VREF (Voltage Reference)"""
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)
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if (!cpuis("MKW2?D*"))
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(
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popup "TPM"
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|
(
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menuitem "TMP0" "per , ""TPM (Timer/PWM Module),TPM0"""
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menuitem "TMP1" "per , ""TPM (Timer/PWM Module),TPM1"""
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menuitem "TMP2" "per , ""TPM (Timer/PWM Module),TPM2"""
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)
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)
|
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separator
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if (cpuis("MKW2?D*"))
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(
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menuitem "PDB" "per , ""PDB (Programmable Delay Block)"""
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popup "FTM"
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(
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menuitem "Module 0" "per , ""FTM (FlexTimer Module),Module 0"""
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menuitem "Module 1" "per , ""FTM (FlexTimer Module),Module 1"""
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menuitem "Module 2" "per , ""FTM (FlexTimer Module),Module 2"""
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)
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)
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menuitem "PIT" "per , ""PIT (Periodic Interrupt Timer)"""
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menuitem "LPTMR" "per , ""LPTMR (Low-Power Timer)"""
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|
if (!cpuis("MKW01Z128*"))
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(
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menuitem "CMT" "per , ""CMT (Carrier Modulator Transmitter)"""
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)
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menuitem "RTC" "per , ""RTC (Real Time Clock)"""
|
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separator
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if (cpuis("MKW22D*")||cpuis("MKW24D*"))
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(
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menuitem "USBOTG" "per , ""USBOTG (Universal Serial Bus OTG Controller)"""
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menuitem "USBDCD" "per , ""USBDCD (USB Device Charger Detection Module)"""
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)
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popup "SPI"
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|
(
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menuitem "Module 0" "per , ""SPI (Serial Peripheral Interface),Module 0"""
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menuitem "Module 1" "per , ""SPI (Serial Peripheral Interface),Module 1"""
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)
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popup "I2C"
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(
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menuitem "Module 0" "per , ""I2C (Inter-Integrated Circuit),Module 0"""
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menuitem "Module 1" "per , ""I2C (Inter-Integrated Circuit),Module 1"""
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)
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if (cpuis("MKW40Z*")||cpuis("MKW30Z*")||cpuis("MKW20Z*"))
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(
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menuitem "UART0" "per , ""UART0 (Universal Asynchronous Receiver Transmitter)"""
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)
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if (cpuis("MKW41Z*")||cpuis("MKW31Z*")||cpuis("MKW21Z*"))
|
|
(
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menuitem "LPUART0" "per , ""LPUART0 (Low Power Universal Asynchronous Receiver Transmitter)"""
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)
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if (cpuis("MKW01Z128*")||cpuis("MKW2?D*"))
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(
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popup "UART"
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(
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menuitem "Module 0" "per , ""UART (Universal Asynchronous Receiver Transmitter),Module 0"""
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menuitem "Module 1" "per , ""UART (Universal Asynchronous Receiver Transmitter),Module 1"""
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menuitem "Module 2" "per , ""UART (Universal Asynchronous Receiver Transmitter),Module 2"""
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)
|
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)
|
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if (cpuis("MKW2?D*"))
|
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(
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menuitem "I2S" "per , ""I2S (Integrated Interchip Sound)"""
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)
|
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separator
|
|
popup "GPIO"
|
|
(
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menuitem "GPIOA" "per , ""GPIO (General Purpose Input/Output),GPIOA"""
|
|
if (cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*")||cpuis("MKW01Z128*"))
|
|
(
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menuitem "GPIOB" "per , ""GPIO (General Purpose Input/Output),GPIOB"""
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)
|
|
menuitem "GPIOC" "per , ""GPIO (General Purpose Input/Output),GPIOC"""
|
|
if (!cpuis("MKW4?Z*")&&!cpuis("MKW3?Z*")&&!cpuis("MKW2?Z*"))
|
|
(
|
|
menuitem "GPIOD" "per , ""GPIO (General Purpose Input/Output),GPIOD"""
|
|
menuitem "GPIOE" "per , ""GPIO (General Purpose Input/Output),GPIOE"""
|
|
)
|
|
)
|
|
if (cpuis("MKW01Z128*")||cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
|
|
(
|
|
menuitem "TSI" "per , ""TSI (Touch Sensing Input)"""
|
|
)
|
|
if (cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
|
|
(
|
|
menuitem "LTC" "per , ""LTC (LP Trusted Cryptography)"""
|
|
menuitem "TRNG" "per , ""TRNG (True Random Number Generator)"""
|
|
)
|
|
if (cpuis("MKW4?Z*")||cpuis("MKW3?Z*")||cpuis("MKW2?Z*"))
|
|
(
|
|
menuitem "RSIM" "per , ""RSIM (Radio System Integration Module)"""
|
|
menuitem "Transceiver Registers" "per , ""Transceiver Registers"""
|
|
if (cpuis("MKW41Z*")||cpuis("MKW31Z*")||cpuis("MKW40Z*")||cpuis("MKW30Z*"))
|
|
(
|
|
menuitem "BLE RF" "per , ""BLE RF"""
|
|
)
|
|
if (cpuis("MKW41Z*")||cpuis("MKW31Z*"))
|
|
(
|
|
menuitem "Generic FSK" "per , ""Generic FSK"""
|
|
)
|
|
if (cpuis("MKW40Z*")||cpuis("MKW20Z*")||cpuis("MKW41Z*")||cpuis("MKW21Z*"))
|
|
(
|
|
menuitem "ZigBee" "per , ""ZigBee"""
|
|
)
|
|
)
|
|
)
|
|
)
|