453 lines
16 KiB
Plaintext
453 lines
16 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: KMx Specific Menu
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; @Props: Released
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; @Author: SZM, BCA
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; @Changelog: 2018-04-04 BCA
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; @Manufacturer: NXP - NXP Semiconductors
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; @Chip: MKM14Z128CHH5,MKM14Z64CHH5,MKM33Z128CLH5,MKM33Z128CLL5
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; MKM33Z64CLH5,MKM33Z64CLL5,MKM34Z128CLL5,MKM14Z128ACHH5
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; MKM14Z128ACHH5R,MKM14Z64ACHH5,MKM33Z128ACLH5,MKM33Z128ACLH5R
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; MKM33Z128CLH5R,MKM33Z64ACLL5,MKM33Z64ACLL5R,MKM33Z64ACLH5
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; MKM33Z128ACLL5,MKM34Z128ACLL5,MKM34Z128ACLL5R,MKM33Z64CLL5R
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; MKM14Z128CHH5R,MKM34Z256VLL7,MKM34Z256VLL7R,MKM34Z256VLQ7
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menkinetism.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0+)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0+),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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popup "Ports"
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(
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menuitem "PORTA" "per , ""PORT (Port control and interrupts),PORTA"""
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if !cpuis("MKM14Z128CHH5*")&&!cpuis("MKM14Z64CHH5")&&!cpuis("MKM14Z128ACHH5*")&&!cpuis("MKM14Z64ACHH5")
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(
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menuitem "PORTB" "per , ""PORT (Port control and interrupts),PORTB"""
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menuitem "PORTC" "per , ""PORT (Port control and interrupts),PORTC"""
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menuitem "PORTD" "per , ""PORT (Port control and interrupts),PORTD"""
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)
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menuitem "PORTE" "per , ""PORT (Port control and interrupts),PORTE"""
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menuitem "PORTF" "per , ""PORT (Port control and interrupts),PORTF"""
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menuitem "PORTG" "per , ""PORT (Port control and interrupts),PORTG"""
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if !cpuis("MKM33Z128CLH5*")&&!cpuis("MKM33Z64CLH5")&&!cpuis("MKM33Z128ACLH5*")&&!cpuis("MKM33Z64ACLH5")
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(
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menuitem "PORTH" "per , ""PORT (Port control and interrupts),PORTH"""
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)
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menuitem "PORTI" "per , ""PORT (Port control and interrupts),PORTI"""
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if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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if cpuis("MKM34Z256VLQ7")
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(
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menuitem "PORTJ" "per , ""PORT (Port control and interrupts),PORTJ"""
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menuitem "PORTK" "per , ""PORT (Port control and interrupts),PORTK"""
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menuitem "PORTL" "per , ""PORT (Port control and interrupts),PORTL"""
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)
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menuitem "PORTM" "per , ""PORT (Port control and interrupts),PORTM"""
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)
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)
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menuitem "SIM" "per , ""SIM (System Integration Module)"""
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menuitem "MCM" "per , ""MCM (Miscellaneous Control Module)"""
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menuitem "RCM" "per , ""RCM (Reset Control Module)"""
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menuitem "SMC" "per , ""SMC (System Mode Controller)"""
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menuitem "XBAR" "per , ""XBAR (Inter-Peripheral Crossbar Switch)"""
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if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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menuitem "MMAU" "per , ""MMAU (Memory Mapped Arithmetic Unit)"""
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)
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menuitem "LLWU" "per , ""LLWU (Low-Leakage Wakeup Unit)"""
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popup "DMAC"
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(
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menuitem "CHANNEL 0" "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 0"""
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menuitem "CHANNEL 1" "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 1"""
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menuitem "CHANNEL 2" "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 2"""
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menuitem "CHANNEL 3" "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 3"""
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)
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menuitem "DMAMUX" "per , ""DMAMUX (Direct Memory Access Multiplexer)"""
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menuitem "AIPS-Lite" "per , ""AIPS-Lite (Peripheral Bridge)"""
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menuitem "MPU" "per , ""MPU (Memory Protection Unit)"""
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menuitem "PMC" "per , ""PMC (Power Management Controller)"""
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menuitem "WDOG" "per , ""WDOG (Watchdog Timer)"""
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menuitem "EWM" "per , ""EWM (External Watchdog Monitor)"""
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menuitem "AFE" "per , ""AFE (Analog Front End)"""
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popup "ADC"
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(
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menuitem "COMMON" "per , ""ADC (Analog-to-Digital Converter),COMMON"""
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menuitem "CHANNEL A" "per , ""ADC (Analog-to-Digital Converter),CHANNEL A"""
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menuitem "CHANNEL B" "per , ""ADC (Analog-to-Digital Converter),CHANNEL B"""
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menuitem "CHANNEL C" "per , ""ADC (Analog-to-Digital Converter),CHANNEL C"""
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menuitem "CHANNEL D" "per , ""ADC (Analog-to-Digital Converter),CHANNEL D"""
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)
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popup "CMP"
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(
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menuitem "CHANNEL 0" "per , ""CMP (Comparator),CHANNEL 0"""
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menuitem "CHANNEL 1" "per , ""CMP (Comparator),CHANNEL 1"""
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if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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menuitem "CHANNEL 2" "per , ""CMP (Comparator),CHANNEL 2"""
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)
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)
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menuitem "VREF" "per , ""VREF (Voltage Reference)"""
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menuitem "MCG" "per , ""MCG (Multipurpose Clock Generator)"""
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menuitem "OSC" "per , ""OSC (Oscillator)"""
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menuitem "IRTC" "per , ""IRTC (Independent Real Time Clock)"""
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menuitem "LPTMR" "per , ""LPTMR (Low-Power Timer)"""
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popup "PIT"
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(
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menuitem "PIT 0" "per , ""PIT (Periodic Interrupt Timer),PIT 0"""
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menuitem "PIT 1" "per , ""PIT (Periodic Interrupt Timer),PIT 1"""
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)
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popup "TMR"
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(
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menuitem "TIMER 0" "per , ""TMR (Quad Timer),TIMER 0"""
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menuitem "TIMER 1" "per , ""TMR (Quad Timer),TIMER 1"""
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menuitem "TIMER 2" "per , ""TMR (Quad Timer),TIMER 2"""
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menuitem "TIMER 3" "per , ""TMR (Quad Timer),TIMER 3"""
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)
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if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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menuitem "PDB" "per , ""PDB (Programmable Delay Block)"""
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)
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popup "I2C"
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(
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menuitem "I2C 0" "per , ""I2C (Inter-Integrated Circuit),I2C 0"""
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if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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menuitem "I2C 1" "per , ""I2C (Inter-Integrated Circuit),I2C 1"""
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)
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)
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popup "SPI"
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(
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menuitem "SPI 0" "per , ""SPI (Serial Peripheral Interface),SPI 0"""
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menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1"""
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)
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popup "UART"
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(
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menuitem "MODULE 0" "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 0"""
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menuitem "MODULE 1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 1"""
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menuitem "MODULE 2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 2"""
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menuitem "MODULE 3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 3"""
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)
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if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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menuitem "LPUART" "per , ""Low-Power Universal Asynchronous Receiver/Transmitter (LPUART)"""
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menuitem "MMCAU" "per , ""MMCAU (Memory Mapped Cryptographic Acceleration Unit)"""
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)
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menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check)"""
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menuitem "RNGA" "per , ""RNGA (Random Number Generator Accelerator)"""
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if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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(
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menuitem "SLCD" "per , ""SLCD (LCD Controller)"""
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)
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popup "GPIO"
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(
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menuitem "GPIOA" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO A"""
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if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5*")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")
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(
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menuitem "GPIOB" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO B"""
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menuitem "GPIOC" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO C"""
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menuitem "GPIOD" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO D"""
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)
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menuitem "GPIOE" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO E"""
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menuitem "GPIOF" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO F"""
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menuitem "GPIOG" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO G"""
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if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM14Z128CHH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
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|
(
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|
menuitem "GPIOH" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO H"""
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|
)
|
|
menuitem "GPIOI" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO I"""
|
|
if cpuis("MKM34Z256VLQ7")
|
|
(
|
|
menuitem "GPIOJ" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO J"""
|
|
menuitem "GPIOK" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO K"""
|
|
menuitem "GPIOL" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO L"""
|
|
)
|
|
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
|
|
(
|
|
menuitem "GPIOM" "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO M"""
|
|
)
|
|
)
|
|
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
|
|
(
|
|
popup "FGPIO"
|
|
(
|
|
menuitem "FGPIOA" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOA"""
|
|
menuitem "FGPIOB" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOB"""
|
|
menuitem "FGPIOC" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOC"""
|
|
menuitem "FGPIOD" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOD"""
|
|
menuitem "FGPIOE" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOE"""
|
|
menuitem "FGPIOF" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOF"""
|
|
menuitem "FGPIOG" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOG"""
|
|
menuitem "FGPIOH" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOH"""
|
|
menuitem "FGPIOI" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOI"""
|
|
if cpuis("MKM34Z256VLQ7")
|
|
(
|
|
menuitem "FGPIOJ" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOJ"""
|
|
menuitem "FGPIOK" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOK"""
|
|
menuitem "FGPIOL" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOL"""
|
|
)
|
|
menuitem "FGPIOM" "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOM"""
|
|
)
|
|
)
|
|
if cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
|
|
(
|
|
popup "MTB"
|
|
(
|
|
menuitem "MTB_RAM" "per , ""MTB (Micro Trace Buffer),MTB_RAM"""
|
|
menuitem "MTB_DWT" "per , ""MTB (Micro Trace Buffer),MTB_DWT"""
|
|
menuitem "ROM" "per , ""MTB (Micro Trace Buffer),ROM"""
|
|
)
|
|
)
|
|
menuitem "FTFA" "per , ""FTFA (Flash Memory Module)"""
|
|
)
|
|
)
|