466 lines
17 KiB
Plaintext
466 lines
17 KiB
Plaintext
; --------------------------------------------------------------------------------
|
|
; @Title: IMXRT5xx Specific Menu
|
|
; @Props: Released
|
|
; @Author: KWI, PIW
|
|
; @Changelog: 2021-03-19 KWI
|
|
; 2022-03-01 PIW
|
|
; @Manufacturer: NXP - NXP Semiconductors
|
|
; @Core: Cortex-M33F
|
|
; @Chip: IMXRT533, IMXRT555, IMXRT595-CM33
|
|
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: menimxrt5xx.men 16339 2023-07-03 13:30:14Z pegold $
|
|
|
|
add
|
|
menu
|
|
(
|
|
IF SOFTWARE.BUILD.BASE()>=69655.
|
|
(
|
|
popup "&CPU"
|
|
(
|
|
separator
|
|
IF CPU.FEATURE(MMU)
|
|
(
|
|
popup "[:mmu]MMU"
|
|
(
|
|
menuitem "[:mmureg]MMU Control" "MMU.view"
|
|
separator
|
|
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
|
|
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
|
|
separator
|
|
IF CPU.FEATURE(ITLBDUMP)
|
|
(
|
|
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
|
|
)
|
|
IF CPU.FEATURE(DTLBDUMP)
|
|
(
|
|
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
|
|
)
|
|
IF CPU.FEATURE(TLB0DUMP)
|
|
(
|
|
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
|
|
)
|
|
IF CPU.FEATURE(TLB1DUMP)
|
|
(
|
|
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
|
|
)
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("SMMU")
|
|
(
|
|
popup "[:mmu]SMMU"
|
|
(
|
|
menuitem "[:chip]SMMU1 Registers"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
|
|
SMMU.Register.Global &(name)
|
|
)
|
|
menuitem "[:mmureg]SMMU1 StreamMapTable"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
|
|
SMMU.StreamMapTable &(name)
|
|
)
|
|
IF COMPonent.AVAILable("SMMU2")
|
|
(
|
|
separator
|
|
menuitem "[:chip]SMMU2 Registers"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
|
|
SMMU.Register.Global &(name)
|
|
)
|
|
menuitem "[:mmureg]SMMU2 StreamMapTable"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
|
|
SMMU.StreamMapTable &(name)
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("SMMU3")
|
|
(
|
|
separator
|
|
menuitem "[:chip]SMMU3 Registers"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
|
|
SMMU.Register.Global &(name)
|
|
)
|
|
menuitem "[:mmureg]SMMU3 StreamMapTable"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
|
|
SMMU.StreamMapTable &(name)
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("SMMU4")
|
|
(
|
|
separator
|
|
menuitem "[:chip]SMMU4 Registers"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
|
|
SMMU.Register.Global &(name)
|
|
)
|
|
menuitem "[:mmureg]SMMU4 StreamMapTable"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
|
|
SMMU.StreamMapTable &(name)
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("SMMU5")
|
|
(
|
|
separator
|
|
menuitem "[:chip]SMMU5 Registers"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
|
|
SMMU.Register.Global &(name)
|
|
)
|
|
menuitem "[:mmureg]SMMU5 StreamMapTable"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
|
|
SMMU.StreamMapTable &(name)
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("SMMU6")
|
|
(
|
|
separator
|
|
menuitem "[:chip]SMMU6 Registers"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
|
|
SMMU.Register.Global &(name)
|
|
)
|
|
menuitem "[:mmureg]SMMU6 StreamMapTable"
|
|
(
|
|
PRIVATE &name
|
|
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
|
|
SMMU.StreamMapTable &(name)
|
|
)
|
|
)
|
|
)
|
|
)
|
|
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
|
|
(
|
|
popup "[:cache]Cache"
|
|
(
|
|
IF CPU.FEATURE(L1ICACHEDUMP)
|
|
(
|
|
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
|
|
menuitem "[:cache]ICACHE List" "CACHE.List IC"
|
|
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
|
|
)
|
|
IF CPU.FEATURE(L1DCACHEDUMP)
|
|
(
|
|
separator
|
|
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
|
|
menuitem "[:cache]DCACHE List" "CACHE.List DC"
|
|
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
|
|
)
|
|
IF CPU.FEATURE(L2CACHEDUMP)
|
|
(
|
|
separator
|
|
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
|
|
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
|
|
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
|
|
)
|
|
)
|
|
)
|
|
)
|
|
popup "&Trace"
|
|
(
|
|
separator
|
|
IF COMPonent.AVAILable("ITM")
|
|
(
|
|
popup "ITM"
|
|
(
|
|
default
|
|
menuitem "[:oconfig]ITM settings..." "ITM.state"
|
|
separator
|
|
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("STM")
|
|
(
|
|
popup "STM"
|
|
(
|
|
default
|
|
menuitem "[:oconfig]STM settings..." "STM.state"
|
|
separator
|
|
menuitem "[:alist]STMTrace List" "STMTrace.List"
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("HTM")
|
|
(
|
|
popup "HTM"
|
|
(
|
|
default
|
|
menuitem "[:oconfig]HTM settings..." "HTM.state"
|
|
separator
|
|
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
|
|
)
|
|
)
|
|
IF COMPonent.AVAILable("TPIU")
|
|
(
|
|
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
|
|
)
|
|
IF COMPonent.AVAILable("ETR")
|
|
(
|
|
menuitem "[:oconfig]ETR settings..."
|
|
(
|
|
PRIVATE &pdd
|
|
&pdd=OS.PDD()
|
|
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
|
|
)
|
|
)
|
|
)
|
|
popup "&Misc"
|
|
(
|
|
popup "Tools"
|
|
(
|
|
IF CPUIS64BIT()||CPU.FEATURE("SPR")
|
|
(
|
|
menuitem "ARM System Register Converter"
|
|
(
|
|
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
|
|
)
|
|
)
|
|
IF CPU.FEATURE("C15")
|
|
(
|
|
menuitem "ARM Coprocessor Converter"
|
|
(
|
|
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
|
|
)
|
|
)
|
|
)
|
|
)
|
|
popup "&Perf"
|
|
(
|
|
IF CPU.FEATURE(BMC)
|
|
(
|
|
before "Reset"
|
|
menuitem "[:bmc]Benchmark Counters" "BMC.state"
|
|
before "Reset"
|
|
separator
|
|
)
|
|
)
|
|
)
|
|
popup "Peripherals"
|
|
(
|
|
popup "[:chip]Core Registers (Cortex-M33F)"
|
|
(
|
|
menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control"""
|
|
menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
|
|
menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
|
|
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
|
|
menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
|
|
popup "[:chip]Debug"
|
|
(
|
|
menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
|
|
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
|
|
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
|
|
)
|
|
)
|
|
separator
|
|
menuitem "ACMP0" "per , ""ACMP (CMP)"""
|
|
menuitem "ADC0" "per , ""ADC"""
|
|
menuitem "AHB_SECURE_CTRL" "per , ""AHB_SECURE_CTRL"""
|
|
menuitem "AXI_SWITCH_AMIB" "per , ""AXI_SWITCH_AMIB"""
|
|
menuitem "AXI_SWITCH_ASIB" "per , ""AXI_SWITCH_ASIB"""
|
|
popup "CACHE64_CTRL (CACHE64)"
|
|
(
|
|
menuitem "CACHE64_CTRL0" "per , ""CACHE64_CTRL (CACHE64),CACHE64_CTRL0"""
|
|
menuitem "CACHE64_CTRL1" "per , ""CACHE64_CTRL (CACHE64),CACHE64_CTRL1"""
|
|
)
|
|
popup "CACHE64_POLSEL"
|
|
(
|
|
menuitem "CACHE64_POLSEL0" "per , ""CACHE64_POLSEL,CACHE64_POLSEL0"""
|
|
menuitem "CACHE64_POLSEL1" "per , ""CACHE64_POLSEL,CACHE64_POLSEL1"""
|
|
)
|
|
menuitem "CASPER" "per , ""CASPER"""
|
|
popup "CLKCTL (Clock Controller 0)"
|
|
(
|
|
menuitem "CLKCTL0" "per , ""CLKCTL (Clock Controller 0),CLKCTL0"""
|
|
menuitem "CLKCTL1" "per , ""CLKCTL (Clock Controller 0),CLKCTL1"""
|
|
)
|
|
menuitem "CRC_ENGINE" "per , ""CRC"""
|
|
popup "CTIMER (Counter/Timer)"
|
|
(
|
|
menuitem "CTIMER0" "per , ""CTIMER (Counter/Timer),CTIMER0"""
|
|
menuitem "CTIMER1" "per , ""CTIMER (Counter/Timer),CTIMER1"""
|
|
menuitem "CTIMER2" "per , ""CTIMER (Counter/Timer),CTIMER2"""
|
|
menuitem "CTIMER3" "per , ""CTIMER (Counter/Timer),CTIMER3"""
|
|
menuitem "CTIMER4" "per , ""CTIMER (Counter/Timer),CTIMER4"""
|
|
)
|
|
menuitem "DEBUGGER_MAILBOX" "per , ""DEBUGGER_MAILBOX (Debug)"""
|
|
popup "DMA (DMA0 controller)"
|
|
(
|
|
menuitem "DMA0" "per , ""DMA (DMA0 controller),DMA0"""
|
|
menuitem "DMA1" "per , ""DMA (DMA0 controller),DMA1"""
|
|
)
|
|
menuitem "DMIC0" "per , ""DMIC"""
|
|
popup "FLEXCOMM"
|
|
(
|
|
menuitem "FLEXCOMM0" "per , ""FLEXCOMM,FLEXCOMM0"""
|
|
menuitem "FLEXCOMM1" "per , ""FLEXCOMM,FLEXCOMM1"""
|
|
menuitem "FLEXCOMM2" "per , ""FLEXCOMM,FLEXCOMM2"""
|
|
menuitem "FLEXCOMM3" "per , ""FLEXCOMM,FLEXCOMM3"""
|
|
menuitem "FLEXCOMM4" "per , ""FLEXCOMM,FLEXCOMM4"""
|
|
menuitem "FLEXCOMM5" "per , ""FLEXCOMM,FLEXCOMM5"""
|
|
menuitem "FLEXCOMM6" "per , ""FLEXCOMM,FLEXCOMM6"""
|
|
menuitem "FLEXCOMM7" "per , ""FLEXCOMM,FLEXCOMM7"""
|
|
menuitem "FLEXCOMM8" "per , ""FLEXCOMM,FLEXCOMM8"""
|
|
menuitem "FLEXCOMM9" "per , ""FLEXCOMM,FLEXCOMM9"""
|
|
menuitem "FLEXCOMM10" "per , ""FLEXCOMM,FLEXCOMM10"""
|
|
menuitem "FLEXCOMM11" "per , ""FLEXCOMM,FLEXCOMM11"""
|
|
menuitem "FLEXCOMM12" "per , ""FLEXCOMM,FLEXCOMM12"""
|
|
menuitem "FLEXCOMM13" "per , ""FLEXCOMM,FLEXCOMM13"""
|
|
menuitem "FLEXCOMM14" "per , ""FLEXCOMM,FLEXCOMM14"""
|
|
menuitem "FLEXCOMM15" "per , ""FLEXCOMM,FLEXCOMM15"""
|
|
menuitem "FLEXCOMM16" "per , ""FLEXCOMM,FLEXCOMM16"""
|
|
)
|
|
menuitem "FLEXIO0" "per , ""FLEXIO"""
|
|
popup "FLEXSPI"
|
|
(
|
|
menuitem "FLEXSPI0" "per , ""FLEXSPI,FLEXSPI0"""
|
|
menuitem "FLEXSPI1" "per , ""FLEXSPI,FLEXSPI1"""
|
|
)
|
|
menuitem "FREQME" "per , ""FREQME (Frequency Measurement)"""
|
|
popup "GPIOHS (GPIO General Purpose I/O (GPIO))"
|
|
(
|
|
menuitem "GPIO" "per , ""GPIOHS (GPIO General Purpose I/O (GPIO)),GPIO"""
|
|
menuitem "SECGPIO" "per , ""GPIOHS (GPIO General Purpose I/O (GPIO)),SECGPIO"""
|
|
)
|
|
menuitem "HASHCRYPT" "per , ""HASHCRYPT"""
|
|
popup "I2C (Inter-Integrated Circuit)"
|
|
(
|
|
menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
|
|
menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
|
|
menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit),I2C2"""
|
|
menuitem "I2C3" "per , ""I2C (Inter-Integrated Circuit),I2C3"""
|
|
menuitem "I2C4" "per , ""I2C (Inter-Integrated Circuit),I2C4"""
|
|
menuitem "I2C5" "per , ""I2C (Inter-Integrated Circuit),I2C5"""
|
|
menuitem "I2C6" "per , ""I2C (Inter-Integrated Circuit),I2C6"""
|
|
menuitem "I2C7" "per , ""I2C (Inter-Integrated Circuit),I2C7"""
|
|
menuitem "I2C8" "per , ""I2C (Inter-Integrated Circuit),I2C8"""
|
|
menuitem "I2C9" "per , ""I2C (Inter-Integrated Circuit),I2C9"""
|
|
menuitem "I2C10" "per , ""I2C (Inter-Integrated Circuit),I2C10"""
|
|
menuitem "I2C11" "per , ""I2C (Inter-Integrated Circuit),I2C11"""
|
|
menuitem "I2C12" "per , ""I2C (Inter-Integrated Circuit),I2C12"""
|
|
menuitem "I2C13" "per , ""I2C (Inter-Integrated Circuit),I2C13"""
|
|
menuitem "I2C15" "per , ""I2C (Inter-Integrated Circuit),I2C15"""
|
|
)
|
|
popup "I2S (Inter-Integrated Sound Bus Controller)"
|
|
(
|
|
menuitem "I2S0" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S0"""
|
|
menuitem "I2S1" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S1"""
|
|
menuitem "I2S2" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S2"""
|
|
menuitem "I2S3" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S3"""
|
|
menuitem "I2S4" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S4"""
|
|
menuitem "I2S5" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S5"""
|
|
menuitem "I2S6" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S6"""
|
|
menuitem "I2S7" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S7"""
|
|
menuitem "I2S8" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S8"""
|
|
menuitem "I2S9" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S9"""
|
|
menuitem "I2S10" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S10"""
|
|
menuitem "I2S11" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S11"""
|
|
menuitem "I2S12" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S12"""
|
|
menuitem "I2S13" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S13"""
|
|
)
|
|
popup "I3C"
|
|
(
|
|
menuitem "I3C0" "per , ""I3C,I3C0"""
|
|
menuitem "I3C1" "per , ""I3C,I3C1"""
|
|
)
|
|
menuitem "INPUTMUX" "per , ""INPUTMUX"""
|
|
menuitem "IOPCTL" "per , ""IOPCTL"""
|
|
if (cpuis("IMXRT595-CM33")||cpuis("IMXRT555"))
|
|
(
|
|
menuitem "LCDIF" "per , ""LCDIF (LCD Interface),LCDIF"""
|
|
menuitem "MIPI_DSI_HOST" "per , ""MIPI_DSI_HOST (MIPI DSI Host),MIPI_DSI_HOST"""
|
|
)
|
|
menuitem "MRT0" "per , ""MRT (Multi-Rate Timer (MRT))"""
|
|
menuitem "MUA" "per , ""MU (MUA)"""
|
|
menuitem "NVIC" "per , ""NVIC"""
|
|
menuitem "OCOTP0" "per , ""OCOTP (OCOTP Controller)"""
|
|
menuitem "OSTIMER0" "per , ""OSTIMER"""
|
|
menuitem "OTFAD0" "per , ""OTFAD"""
|
|
menuitem "PINT" "per , ""PINT (Pin Interrupts and Pattern Match)"""
|
|
menuitem "PMC" "per , ""PMC (Power Management)"""
|
|
menuitem "POWERQUAD" "per , ""POWERQUAD (PowerQuad)"""
|
|
menuitem "PUF" "per , ""PUF (PUF Controller)"""
|
|
popup "RSTCTL (Reset Controller 0)"
|
|
(
|
|
menuitem "RSTCTL0" "per , ""RSTCTL (Reset Controller 0),RSTCTL0"""
|
|
menuitem "RSTCTL1" "per , ""RSTCTL (Reset Controller 0),RSTCTL1"""
|
|
)
|
|
menuitem "RTC" "per , ""RTC (Real-time Counter)"""
|
|
menuitem "SAU" "per , ""SAU"""
|
|
menuitem "SCB" "per , ""SCB"""
|
|
menuitem "SCNSCB" "per , ""SCNSCB"""
|
|
menuitem "SCT0" "per , ""SCT (SCTimer)"""
|
|
menuitem "SEMA42" "per , ""SEMA42"""
|
|
popup "SPI (Serial Peripheral Interfaces (SPI))"
|
|
(
|
|
menuitem "SPI0" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI0"""
|
|
menuitem "SPI1" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI1"""
|
|
menuitem "SPI2" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI2"""
|
|
menuitem "SPI3" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI3"""
|
|
menuitem "SPI4" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI4"""
|
|
menuitem "SPI5" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI5"""
|
|
menuitem "SPI6" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI6"""
|
|
menuitem "SPI7" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI7"""
|
|
menuitem "SPI8" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI8"""
|
|
menuitem "SPI9" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI9"""
|
|
menuitem "SPI10" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI10"""
|
|
menuitem "SPI11" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI11"""
|
|
menuitem "SPI12" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI12"""
|
|
menuitem "SPI13" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI13"""
|
|
menuitem "SPI14" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI14"""
|
|
menuitem "SPI16" "per , ""SPI (Serial Peripheral Interfaces (SPI)),SPI16"""
|
|
)
|
|
popup "SYSCTL (SYSCTL0)"
|
|
(
|
|
menuitem "SYSCTL0" "per , ""SYSCTL (SYSCTL0),SYSCTL0"""
|
|
menuitem "SYSCTL1" "per , ""SYSCTL (SYSCTL0),SYSCTL1"""
|
|
)
|
|
menuitem "TRNG" "per , ""TRNG"""
|
|
popup "USART (Flexcomm USART)"
|
|
(
|
|
menuitem "USART0" "per , ""USART (Flexcomm USART),USART0"""
|
|
menuitem "USART1" "per , ""USART (Flexcomm USART),USART1"""
|
|
menuitem "USART2" "per , ""USART (Flexcomm USART),USART2"""
|
|
menuitem "USART3" "per , ""USART (Flexcomm USART),USART3"""
|
|
menuitem "USART4" "per , ""USART (Flexcomm USART),USART4"""
|
|
menuitem "USART5" "per , ""USART (Flexcomm USART),USART5"""
|
|
menuitem "USART6" "per , ""USART (Flexcomm USART),USART6"""
|
|
menuitem "USART7" "per , ""USART (Flexcomm USART),USART7"""
|
|
menuitem "USART8" "per , ""USART (Flexcomm USART),USART8"""
|
|
menuitem "USART9" "per , ""USART (Flexcomm USART),USART9"""
|
|
menuitem "USART10" "per , ""USART (Flexcomm USART),USART10"""
|
|
menuitem "USART11" "per , ""USART (Flexcomm USART),USART11"""
|
|
menuitem "USART12" "per , ""USART (Flexcomm USART),USART12"""
|
|
menuitem "USART13" "per , ""USART (Flexcomm USART),USART13"""
|
|
)
|
|
menuitem "USBHSD" "per , ""USBHSD (USB2.0 HS Device Controller)"""
|
|
menuitem "USBHSDCD" "per , ""USBHSDCD (USBDCD)"""
|
|
menuitem "USBHSH" "per , ""USBHSH (USB2.0 HS Host Controller)"""
|
|
menuitem "USBPHY" "per , ""USBPHY (USB2.0 HS PHY)"""
|
|
popup "USDHC (Ultra Secured Digital Host Controller)"
|
|
(
|
|
menuitem "USDHC0" "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC0"""
|
|
menuitem "USDHC1" "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC1"""
|
|
)
|
|
menuitem "UTICK0" "per , ""UTICK"""
|
|
popup "WWDT"
|
|
(
|
|
menuitem "WWDT0" "per , ""WWDT,WWDT0"""
|
|
menuitem "WWDT1" "per , ""WWDT,WWDT1"""
|
|
)
|
|
)
|
|
)
|