399 lines
13 KiB
Plaintext
399 lines
13 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: GD32E5XX Specific Menu
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; @Props: Released
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; @Author: KWI, ADR
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; @Changelog: 2021-04-22 KWI
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; 2021-01-26 ADR
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; @Manufacturer: GigaDevice - GigaDevice Semiconductor Inc.
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; @Core: Cortex-M33F
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; @Chip: GD32E503CC, GD32E503CE, GD32E503RC, GD32E503RE, GD32E503VC, GD32E503VE,
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; GD32E503ZC, GD32E503ZE, GD32E505RB, GD32E505RC, GD32E505RE, GD32E505VC,
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; GD32E505VE, GD32E505ZC, GD32E505ZE, GD32E507RC, GD32E507RE, GD32E507VC,
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; GD32E507VE, GD32E507ZC
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mengd32e5xx.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M33F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
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menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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popup "ADC (Analog to digital converter)"
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(
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menuitem "ADC0" "per , ""ADC (Analog to digital converter),ADC0"""
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menuitem "ADC1" "per , ""ADC (Analog to digital converter),ADC1"""
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menuitem "ADC2" "per , ""ADC (Analog to digital converter),ADC2"""
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)
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menuitem "AFIO" "per , ""AFIO (Alternate-function I/Os)"""
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menuitem "BKP" "per , ""BKP (Backup registers)"""
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if cpuis("GD32E50*CL")
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(
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menuitem "CMP" "per , ""CMP (Comparator),CMP"""
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)
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menuitem "CRC" "per , ""CRC (cyclic redundancy check calculation unit)"""
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menuitem "CTC" "per , ""CTC (Clock trim controller)"""
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menuitem "DAC" "per , ""DAC (Digital-to-analog converter)"""
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menuitem "DBG" "per , ""DBG (Debug support)"""
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popup "DMA (DMA controller)"
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(
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menuitem "DMA0" "per , ""DMA (DMA controller),DMA0"""
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menuitem "DMA1" "per , ""DMA (DMA controller),DMA1"""
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)
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if cpuis("GD32E50*CL")
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(
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popup "ENET (Ethernet MAC)"
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(
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menuitem "ENET_DMA" "per , ""ENET (Ethernet MAC),ENET_DMA"""
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menuitem "ENET_MAC" "per , ""ENET (Ethernet MAC),ENET_MAC"""
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menuitem "ENET_MAC_FCTH" "per , ""ENET (Ethernet MAC),ENET_MAC_FCTH"""
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menuitem "ENET_MSC" "per , ""ENET (Ethernet MAC),ENET_MSC"""
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menuitem "ENET_PTP" "per , ""ENET (Ethernet MAC),ENET_PTP"""
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)
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)
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menuitem "EXMC" "per , ""EXMC (External memory controller)"""
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menuitem "EXTI" "per , ""EXTI (External interrupt/event controller)"""
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menuitem "FMC" "per , ""FMC"""
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menuitem "FWDGT" "per , ""FWDGT (free watchdog timer)"""
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popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
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(
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menuitem "GPIOA" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
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menuitem "GPIOB" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
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menuitem "GPIOC" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
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menuitem "GPIOD" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOD"""
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menuitem "GPIOE" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOE"""
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menuitem "GPIOF" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOF"""
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menuitem "GPIOG" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOG"""
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)
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popup "I2C (Inter-Integrated Circuit)"
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(
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menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
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menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
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menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit),I2C2"""
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)
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menuitem "NVIC" "per , ""NVIC (Nested Vectored Interrupt Controller)"""
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menuitem "PMU" "per , ""PMU (Program Memory Unit)"""
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menuitem "RCU" "per , ""RCU (Reset and clock unit)"""
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menuitem "RTC" "per , ""RTC (Real-time Counter)"""
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if cpuis("GD32E50*HD")
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(
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menuitem "SDIO" "per , ""SDIO (Secure digital input/output interface),SDIO"""
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)
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popup "SHRTIMER (SHRTIMER Master TIMER)"
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(
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menuitem "MASTER_TIMER" "per , ""SHRTIMER (SHRTIMER Master TIMER),MASTER_TIMER"""
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menuitem "SHRTIMER_COMMON" "per , ""SHRTIMER (SHRTIMER Master TIMER),SHRTIMER_COMMON"""
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menuitem "SLAVE_TIMER0" "per , ""SHRTIMER (SHRTIMER Master TIMER),SLAVE_TIMER0"""
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menuitem "SLAVE_TIMER1" "per , ""SHRTIMER (SHRTIMER Master TIMER),SLAVE_TIMER1"""
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menuitem "SLAVE_TIMER2" "per , ""SHRTIMER (SHRTIMER Master TIMER),SLAVE_TIMER2"""
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menuitem "SLAVE_TIMER3" "per , ""SHRTIMER (SHRTIMER Master TIMER),SLAVE_TIMER3"""
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menuitem "SLAVE_TIMER4" "per , ""SHRTIMER (SHRTIMER Master TIMER),SLAVE_TIMER4"""
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)
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popup "SPI (Serial peripheral interface)"
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(
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menuitem "SPI0" "per , ""SPI (Serial peripheral interface),SPI0"""
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menuitem "SPI1" "per , ""SPI (Serial peripheral interface),SPI1"""
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menuitem "SPI2" "per , ""SPI (Serial peripheral interface),SPI2"""
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)
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menuitem "SQPI" "per , ""SQPI (Serial/Quad Parallel Interface)"""
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popup "TIMER (Timer/Counter)"
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(
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menuitem "TIMER0" "per , ""TIMER (Timer/Counter),TIMER0"""
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menuitem "TIMER1" "per , ""TIMER (Timer/Counter),TIMER1"""
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menuitem "TIMER2" "per , ""TIMER (Timer/Counter),TIMER2"""
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menuitem "TIMER3" "per , ""TIMER (Timer/Counter),TIMER3"""
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menuitem "TIMER4" "per , ""TIMER (Timer/Counter),TIMER4"""
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menuitem "TIMER5" "per , ""TIMER (Timer/Counter),TIMER5"""
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menuitem "TIMER6" "per , ""TIMER (Timer/Counter),TIMER6"""
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menuitem "TIMER7" "per , ""TIMER (Timer/Counter),TIMER7"""
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menuitem "TIMER8" "per , ""TIMER (Timer/Counter),TIMER8"""
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menuitem "TIMER9" "per , ""TIMER (Timer/Counter),TIMER9"""
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menuitem "TIMER10" "per , ""TIMER (Timer/Counter),TIMER10"""
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menuitem "TIMER11" "per , ""TIMER (Timer/Counter),TIMER11"""
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menuitem "TIMER12" "per , ""TIMER (Timer/Counter),TIMER12"""
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menuitem "TIMER13" "per , ""TIMER (Timer/Counter),TIMER13"""
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)
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if cpuis("GD32E50*CL")
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(
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menuitem "TMU" "per , ""TMU (Thermal Monitoring Unit),TMU"""
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)
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popup "UART (Universal Asynchronous Receiver/Transmitter)"
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(
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menuitem "UART3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
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menuitem "UART4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
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)
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popup "USART (Universal synchronous asynchronous receiver transmitter)"
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(
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menuitem "USART0" "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART0"""
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menuitem "USART1" "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART1"""
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menuitem "USART2" "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART2"""
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menuitem "USART5" "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART5"""
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)
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if cpuis("GD32E50*HD")
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(
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menuitem "USBD" "per , ""USBD (Universal Serial Bus Device),USBD"""
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)
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if cpuis("GD32E50*CL")
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(
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popup "USBHS (USB on the go high speed host)"
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(
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menuitem "USBGS_HOST" "per , ""USBHS (USB on the go high speed host),USBGS_HOST"""
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menuitem "USBHS_DEVICE" "per , ""USBHS (USB on the go high speed host),USBHS_DEVICE"""
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menuitem "USBHS_GLOBAL" "per , ""USBHS (USB on the go high speed host),USBHS_GLOBAL"""
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menuitem "USBHS_PWRCLK" "per , ""USBHS (USB on the go high speed host),USBHS_PWRCLK"""
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)
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)
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menuitem "WWDGT" "per , ""WWDGT (Window watchdog timer)"""
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)
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)
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