369 lines
10 KiB
Plaintext
369 lines
10 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: EFR32MG Specific Menu
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; @Props: Released
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; @Author: KWI, ADR
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; @Changelog: 2019-08-28 KWI
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; 2022-01-20 ADR
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; @Manufacturer: ENERGYMICRO - Energy Micro AS
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; @Core: Cortex-M4F
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; @Chip: EFR32MG12P132F1024, EFR32MG12P231F1024, EFR32MG12P232F1024,
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; EFR32MG12P332F1024, EFR32MG12P431F1024, EFR32MG12P432F1024,
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; EFR32MG12P433F1024, EFR32MG13P632F512, EFR32MG13P732F512,
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; EFR32MG13P733F512, EFR32MG14P632F256, EFR32MG14P732F256,
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; EFR32MG14P733F256, EFR32MG1B132F256, EFR32MG1B232F256, EFR32MG1B632F256,
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; EFR32MG1B732F256, EFR32MG1P132F256, EFR32MG1P133F256, EFR32MG1P232F256,
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; EFR32MG1P233F256, EFR32MG1P632F256, EFR32MG1P732F256, EFR32MG1V132F256
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menefr32mg.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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popup "ACMP;ACMP0"
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(
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menuitem "ACMP$1" "per , ""ACMP (ACMP0),ACMP$1"""
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)
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menuitem "ADC0" "per , ""ADC0"""
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menuitem "CMU" "per , ""CMU"""
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menuitem "CRYOTIMER" "per , ""CRYOTIMER"""
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")
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(
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popup "CRYPTO"
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(
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menuitem "CRYPTO" "per , ""CRYPTO,CRYPTO"""
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menuitem "CRYPTO1" "per , ""CRYPTO,CRYPTO1"""
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)
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menuitem "CSEN" "per , ""CSEN"""
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)
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menuitem "EMU" "per , ""EMU"""
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")
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(
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menuitem "ETM" "per , ""ETM"""
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)
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menuitem "FPUEH" "per , ""FPUEH"""
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menuitem "GPCRC" "per , ""GPCRC"""
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menuitem "GPIO;General Purpose I/O Ports And Peripheral I/O Lines" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"""
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")
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(
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popup "I2C;Inter-Integrated Circuit"
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(
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menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
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menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
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)
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)
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menuitem "IDAC0" "per , ""IDAC0"""
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menuitem "LDMA" "per , ""LDMA"""
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")||cpuis("EFR32MG14P*")
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(
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menuitem "LESENSE" "per , ""LESENSE"""
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)
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menuitem "LETIMER0" "per , ""LETIMER0"""
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menuitem "LEUART0" "per , ""LEUART0"""
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menuitem "MSC" "per , ""MSC"""
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if cpuis("EFR32MG12P*")
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(
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popup "PCNT;PCNT0"
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(
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menuitem "PCNT0" "per , ""PCNT (PCNT0),PCNT0"""
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menuitem "PCNT$1" "per , ""PCNT (PCNT0),PCNT$1"""
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)
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)
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menuitem "PRS" "per , ""PRS"""
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menuitem "RMU" "per , ""RMU"""
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menuitem "RTCC" "per , ""RTCC"""
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")||cpuis("EFR32MG14P*")
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(
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menuitem "SMU" "per , ""SMU"""
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)
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popup "TIMER;Timer/Counter"
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(
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menuitem "TIMER$1" "per , ""TIMER (Timer/Counter),TIMER$1"""
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)
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")||cpuis("EFR32MG14P*")
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(
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menuitem "TRNG0" "per , ""TRNG0"""
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)
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if cpuis("EFR32MG12P*")
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(
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popup "USART;USART0"
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(
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menuitem "USART$1" "per , ""USART (USART0),USART$1"""
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")
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(
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menuitem "USART2" "per , ""USART (USART0),USART2"""
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)
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menuitem "USART3" "per , ""USART (USART0),USART3"""
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)
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)
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if cpuis("EFR32MG12P*")||cpuis("EFR32MG13P*")||cpuis("EFR32MG14P*")
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(
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menuitem "VDAC0" "per , ""VDAC0"""
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popup "WDOG;Watchdog Timer Unit"
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(
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menuitem "WDOG0" "per , ""WDOG (Watchdog Timer Unit),WDOG0"""
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menuitem "WDOG1" "per , ""WDOG (Watchdog Timer Unit),WDOG1"""
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)
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)
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if cpuis("EFR32MG12P*")
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(
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popup "WTIMER;WTIMER0"
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(
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menuitem "WTIMER0" "per , ""WTIMER (WTIMER0),WTIMER0"""
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menuitem "WTIMER1" "per , ""WTIMER (WTIMER0),WTIMER1"""
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)
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)
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)
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)
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