598 lines
22 KiB
Plaintext
598 lines
22 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: AT91SAM9G10/20/45/15/25/35/46 Specific Menu
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; @Props: Released
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; @Author: BOB, ZAK, ZUB
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; @Changelog:
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; 2008-04-24
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; 2009-10-12
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; 2012-09-26
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; @Manufacturer: ATMEL - Atmel Corporation
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; @Core: ARM926EJ-S
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menat91sam9g.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core"
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(
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menuitem "[:chip]ID Registers" "per , ""ARM Core Registers,ID Registers"""
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menuitem "[:chip]MMU Control and Configuration" "per , ""ARM Core Registers,MMU Control and Configuration"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""ARM Core Registers,Cache Control and Configuration"""
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menuitem "[:chip]TCM Control and Configuration" "per , ""ARM Core Registers,TCM Control and Configuration"""
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menuitem "[:chip]Test and Debug" "per , ""ARM Core Registers,Test and Debug"""
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menuitem "[:chip]ICEbreaker" "per , ""ARM Core Registers,ICEbreaker"""
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)
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separator
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if (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
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(
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menuitem "BSC" "per , ""BSC (Boot Sequence Controller)"""
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menuitem "AIC" "per , ""AIC (Advanced Interrupt Controller)"""
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)
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menuitem "RSTC" "per , ""RSTC (Reset Controller)"""
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
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(
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menuitem "RTT" "per , ""RTT (Real-Time Timer)"""
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)
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if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
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(
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menuitem "RTC" "per , ""RTC (Real Time Clock)"""
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)
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menuitem "PIT" "per , ""PIT (Periodic Interval Timer)"""
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menuitem "WDT" "per , ""WDT (Watchdog Timer)"""
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menuitem "SHDWC" "per , ""SHDWC (Shutdown Controller)"""
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menuitem "GPBR" "per , ""GPBR (General Purpose Backup Registers)"""
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if (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
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(
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menuitem "SCKC" "per , ""SCKC (Slow Clock Controller)"""
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menuitem "PMC" "per , ""PMC (Power Management Controller)"""
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popup "PIO"
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(
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menuitem "PIO A" "per , ""PIO (Parallel Input/Output Controller),PIOA"""
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menuitem "PIO B" "per , ""PIO (Parallel Input/Output Controller),PIOB"""
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menuitem "PIO C" "per , ""PIO (Parallel Input/Output Controller),PIOC"""
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menuitem "PIO D" "per , ""PIO (Parallel Input/Output Controller),PIOD"""
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)
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menuitem "DBGU" "per , ""DBGU (Debug Unit)"""
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)
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menuitem "MATRIX" "per , ""MATRIX (Bus Matrix)"""
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if (cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G35")
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(
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menuitem "PMECC" "per , ""PMECC (Programmable Multibit ECC Controller)"""
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menuitem "PMERRLOC" "per , ""(Programmable Multibit ECC Error Location User Interface)"""
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)
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popup "SMC"
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(
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menuitem "CS0" "per , ""SMC (Static Memory Controller),CS0"""
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menuitem "CS1" "per , ""SMC (Static Memory Controller),CS1"""
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menuitem "CS2" "per , ""SMC (Static Memory Controller),CS2"""
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menuitem "CS3" "per , ""SMC (Static Memory Controller),CS3"""
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menuitem "CS4" "per , ""SMC (Static Memory Controller),CS4"""
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menuitem "CS5" "per , ""SMC (Static Memory Controller),CS5"""
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menuitem "CS6" "per , ""SMC (Static Memory Controller),CS6"""
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menuitem "CS7" "per , ""SMC (Static Memory Controller),CS7"""
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if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
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(
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menuitem "Delay I/O" "per , ""SMC (Static Memory Controller),Delay I/O Registers"""
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)
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)
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if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
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(
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popup "DDRSDRC"
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(
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menuitem "DDRSDRC0" "per , ""DDRSDRC (DDR/SDR SDRAM Controller),DDRSDRC0"""
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menuitem "DDRSDRC1" "per , ""DDRSDRC (DDR/SDR SDRAM Controller),DDRSDRC1"""
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)
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)
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if (cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G35")
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(
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menuitem "DDRSDRC" "per , ""DDRSDRC (DDR SDR SDRAM Controller)"""
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)
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else
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(
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menuitem "SDRAMC" "per , ""SDRAMC (SDRAM Controller)"""
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)
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if (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
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(
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menuitem "DMAC" "per , ""DMAC (DMA Controller)"""
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menuitem "UHPHS OHCI" "per , ""UHPHS OHCI (USB High Speed Host Port)"""
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menuitem "UHPHS EHCI" "per , ""UHPHS EHCI (USB High Speed Host Port)"""
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menuitem "UDPHS" "per , ""UDPHS (USB High Speed Device Port)"""
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popup "HSMCI"
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(
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menuitem "HSMCI 0" "per , ""HSMCI (MultiMedia Card Interface),HSMCI 0"""
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menuitem "HSMCI 1" "per , ""HSMCI (MultiMedia Card Interface),HSMCI 1"""
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)
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)
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if (cpu()=="AT91SAM9G20"||cpu()=="AT91SAM9G46")
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(
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menuitem "ECC" "per , ""ECC (Error Corrected Code)"""
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)
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if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
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(
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menuitem "CLK GEN" "per , ""Clock Generator"""
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)
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
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(
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menuitem "PMC" "per , ""PMC (Power Management Controller)"""
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menuitem "AIC" "per , ""AIC (Advanced Interrupt Controller)"""
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menuitem "DBGU" "per , ""DBGU (Debug Unit)"""
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popup "PIO"
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(
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menuitem "PIO A" "per , ""PIO (Parallel Input/Output Controller),PIOA"""
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menuitem "PIO B" "per , ""PIO (Parallel Input/Output Controller),PIOB"""
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menuitem "PIO C" "per , ""PIO (Parallel Input/Output Controller),PIOC"""
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if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
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(
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menuitem "PIO D" "per , ""PIO (Parallel Input/Output Controller),PIOD"""
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menuitem "PIO E" "per , ""PIO (Parallel Input/Output Controller),PIOE"""
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)
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)
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)
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popup "SPI"
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(
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menuitem "SPI0" "per , ""SPI (Serial Peripheral Interface),SPI0"""
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
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(
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menuitem "PDC_SPI0" "per , ""SPI (Serial Peripheral Interface),PDC_SPI0"""
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)
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menuitem "SPI1" "per , ""SPI (Serial Peripheral Interface),SPI1"""
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
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(
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menuitem "PDC_SPI1" "per , ""SPI (Serial Peripheral Interface),PDC_SPI1"""
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)
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)
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if (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
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(
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popup "TC"
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(
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menuitem "TC Channel 0" "per , ""TC (Timer/Counter),TC Channel 0"""
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menuitem "TC Channel 1" "per , ""TC (Timer/Counter),TC Channel 1"""
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menuitem "TC Channel 2" "per , ""TC (Timer/Counter),TC Channel 2"""
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menuitem "Block Registers (TC0/TC1/TC2)" "per , ""TC (Timer/Counter),Block Registers (TC0/TC1/TC2)"""
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menuitem "TC Channel 3" "per , ""TC (Timer/Counter),TC Channel 3"""
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menuitem "TC Channel 4" "per , ""TC (Timer/Counter),TC Channel 4"""
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menuitem "TC Channel 5" "per , ""TC (Timer/Counter),TC Channel 5"""
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menuitem "Block Registers (TC3/TC4/TC5)" "per , ""TC (Timer/Counter),Block Registers (TC3/TC4/TC5)"""
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)
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)
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if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
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(
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popup "TWI"
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(
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menuitem "TWI 1" "per , ""TWI (Two-wire Interface),TWI 1"""
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menuitem "TWI 2" "per , ""TWI (Two-wire Interface),TWI 2"""
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)
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)
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if (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
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(
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popup "TWI"
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(
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menuitem "TWI 0" "per , ""TWI (Two-wire Interface),TWI 0"""
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menuitem "TWI 1" "per , ""TWI (Two-wire Interface),TWI 1"""
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menuitem "TWI 2" "per , ""TWI (Two-wire Interface),TWI 2"""
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)
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)
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else
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(
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menuitem "TWI" "per , ""TWI (Two-wire Interface)"""
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)
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if (cpu()=="AT91SAM9G46")
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(
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menuitem "TRNG" "per , ""TRNG (True Random Number Generator)"""
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)
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popup "USART"
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|
(
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menuitem "USART0" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),USART0"""
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
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(
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menuitem "PDC_USART0" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),PDC_USART0"""
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)
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menuitem "USART1" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),USART1"""
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
|
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(
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menuitem "PDC_USART1" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),PDC_USART1"""
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)
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menuitem "USART2" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),USART2"""
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if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
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(
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|
menuitem "PDC_USART2" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),PDC_USART2"""
|
|
)
|
|
menuitem "USART3" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),USART3"""
|
|
if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
|
|
(
|
|
menuitem "PDC_USART3" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),PDC_USART3"""
|
|
)
|
|
if (cpu()=="AT91SAM9G20")
|
|
(
|
|
menuitem "USART4" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),USART4"""
|
|
menuitem "PDC_USART4" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),PDC_USART4"""
|
|
menuitem "USART5" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),USART5"""
|
|
menuitem "PDC_USART5" "per , ""USART (Universal Synchronous/Asynchronous Receiver/Transmitter),PDC_USART5"""
|
|
)
|
|
)
|
|
if (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
|
|
(
|
|
popup "UART "
|
|
(
|
|
menuitem "UART 0" "per , ""UART (Universal Asynchronous Receiver Transceiver),UART 0"""
|
|
menuitem "UART 1" "per , ""UART (Universal Asynchronous Receiver Transceiver),UART 1"""
|
|
)
|
|
menuitem "ADC" "per , ""ADC (Analog-to-digital Converter)"""
|
|
)
|
|
popup "SSC"
|
|
(
|
|
menuitem "SSC0" "per , ""SSC (Synchronous Serial Controller),SSC0"""
|
|
menuitem "PDC_SSC0" "per , ""SSC (Synchronous Serial Controller),PDC_SSC0"""
|
|
if (cpu()=="AT91SAM9G10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
|
|
(
|
|
menuitem "SSC1" "per , ""SSC (Synchronous Serial Controller),SSC1"""
|
|
if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
|
|
(
|
|
menuitem "PDC_SSC1" "per , ""SSC (Synchronous Serial Controller),PDC_SSC1"""
|
|
)
|
|
if (cpu()=="AT91SAM9G10")
|
|
(
|
|
menuitem "SSC2" "per , ""SSC (Synchronous Serial Controller),SSC2"""
|
|
menuitem "PDC_SSC2" "per , ""SSC (Synchronous Serial Controller),PDC_SSC2"""
|
|
)
|
|
)
|
|
)
|
|
if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
|
|
(
|
|
if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
|
|
(
|
|
popup "TC"
|
|
(
|
|
menuitem "TC Channel 0" "per , ""TC (Timer/Counter),TC Channel 0"""
|
|
menuitem "TC Channel 1" "per , ""TC (Timer/Counter),TC Channel 1"""
|
|
menuitem "TC Channel 2" "per , ""TC (Timer/Counter),TC Channel 2"""
|
|
menuitem "Block Registers (TC0/TC1/TC2)" "per , ""TC (Timer/Counter),Block Registers (TC0/TC1/TC2)"""
|
|
menuitem "TC Channel 3" "per , ""TC (Timer/Counter),TC Channel 3"""
|
|
menuitem "TC Channel 4" "per , ""TC (Timer/Counter),TC Channel 4"""
|
|
menuitem "TC Channel 5" "per , ""TC (Timer/Counter),TC Channel 5"""
|
|
menuitem "Block Registers (TC3/TC4/TC5)" "per , ""TC (Timer/Counter),Block Registers (TC3/TC4/TC5)"""
|
|
)
|
|
)
|
|
else
|
|
(
|
|
popup "TC"
|
|
(
|
|
menuitem "TC Channel 0" "per , ""TC (Timer/Counter),TC Channel 0"""
|
|
menuitem "TC Channel 1" "per , ""TC (Timer/Counter),TC Channel 1"""
|
|
menuitem "TC Channel 2" "per , ""TC (Timer/Counter),TC Channel 2"""
|
|
menuitem "Block Registers (TC0/TC1/TC2)" "per , ""TC (Timer/Counter),Block Registers (TC0/TC1/TC2)"""
|
|
if (cpu()=="AT91SAM9G20")
|
|
(
|
|
menuitem "TC Channel 3" "per , ""TC (Timer/Counter),TC Channel 3"""
|
|
menuitem "TC Channel 4" "per , ""TC (Timer/Counter),TC Channel 4"""
|
|
menuitem "TC Channel 5" "per , ""TC (Timer/Counter),TC Channel 5"""
|
|
menuitem "Block Registers (TC3/TC4/TC5)" "per , ""TC (Timer/Counter), (TC3/TC4/TC5)"""
|
|
)
|
|
)
|
|
)
|
|
if (cpu()=="AT91SAM9G46")
|
|
(
|
|
popup "HSMCI"
|
|
(
|
|
menuitem "HSMCI 0" "per , ""HSMCI (MultiMedia Card Interface),HSMCI 0"""
|
|
menuitem "HSMCI 1" "per , ""HSMCI (MultiMedia Card Interface),HSMCI 1"""
|
|
)
|
|
)
|
|
else
|
|
(
|
|
popup "MCI"
|
|
(
|
|
menuitem "MCI 0" "per , ""MCI (MultiMedia Card Interface),MCI 0"""
|
|
menuitem "PDC_MCI 0" "per , ""MCI (MultiMedia Card Interface),PDC_MCI 0"""
|
|
if (cpu()=="AT91SAM9G45")
|
|
(
|
|
menuitem "MCI 1" "per , ""MCI (MultiMedia Card Interface),MCI 1"""
|
|
menuitem "PDC_MCI 1" "per , ""MCI (MultiMedia Card Interface),PDC_MCI 1"""
|
|
)
|
|
)
|
|
)
|
|
)
|
|
if (cpu()=="AT91SAM9G20"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25")
|
|
(
|
|
menuitem "EMAC" "per , ""EMAC (Ethernet MAC 10/100)"""
|
|
)
|
|
if (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
|
|
(
|
|
if (cpu()=="AT91SAM9G45")
|
|
(
|
|
popup "UHP OHCI"
|
|
(
|
|
menuitem "Control and Status Partition" "per , ""UHPHS OHCI (USB High Speed Host Port),Control and Status Partition"""
|
|
menuitem "Memory Pointer Partition" "per , ""UHPHS OHCI (USB High Speed Host Port),Memory Pointer Partition"""
|
|
menuitem "Frame Counter Partition" "per , ""UHPHS OHCI (USB High Speed Host Port),Frame Counter Partition"""
|
|
menuitem "Root Hub Partition" "per , ""UHPHS OHCI (USB High Speed Host Port),Root Hub Partition"""
|
|
)
|
|
menuitem "UHP EHCI" "per , ""UHPHS EHCI (USB High Speed Host Port)"""
|
|
menuitem "UDP" "per , ""UDPHS (USB High Speed Device Port)"""
|
|
)
|
|
else
|
|
(
|
|
menuitem "UDP" "per , ""UDP (USB Device Port)"""
|
|
popup "UHP"
|
|
(
|
|
menuitem "Control and Status Partition" "per , ""UHP (USB Host Port),Control and Status Partition"""
|
|
menuitem "Memory Pointer Partition" "per , ""UHP (USB Host Port),Memory Pointer Partition"""
|
|
menuitem "Frame Counter Partition" "per , ""UHP (USB Host Port),Frame Counter Partition"""
|
|
menuitem "Root Hub Partition" "per , ""UHP (USB Host Port),Root Hub Partition"""
|
|
)
|
|
)
|
|
)
|
|
if (cpu()=="AT91SAM9G20"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G25")
|
|
(
|
|
menuitem "ISI" "per , ""ISI (Image Sensor Interface)"""
|
|
)
|
|
if (cpu()=="AT91SAM9G20")
|
|
(
|
|
menuitem "ADC" "per , ""ADC (Analog-to-digital Converter)"""
|
|
)
|
|
if (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G46")
|
|
(
|
|
menuitem "TSADCC" "per , ""TSADCC (Touch Screen ADC Controller)"""
|
|
menuitem "DMAC" "per , ""DMAC (Direct Memory Access Controller)"""
|
|
menuitem "PWM" "per , ""PWM (Pulse Width Modulation Controller)"""
|
|
menuitem "AC97" "per , ""AC97 (Audio Codec 97)"""
|
|
if (cpu()=="AT91SAM9G46")
|
|
(
|
|
menuitem "AES" "per , ""AES (Advanced Encryption Standard)"""
|
|
menuitem "TDES" "per , ""TDES (Triple Data Encryption Standard)"""
|
|
menuitem "SHA " "per , ""SHA (Secure Hash Algorithm)"""
|
|
)
|
|
if (cpu()!="AT91SAM9G46")
|
|
(
|
|
menuitem "TRNG" "per , ""TRNG (True Random Number Generator)"""
|
|
)
|
|
)
|
|
if (cpu()=="AT91SAM9G10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35")
|
|
(
|
|
menuitem "LCDC" "per , ""LCDC (LCD Controller)"""
|
|
)
|
|
else
|
|
(
|
|
)
|
|
)
|
|
)
|