473 lines
19 KiB
Plaintext
473 lines
19 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: AM335x-CM3 Specific Menu
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; @Props: Released
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; @Author: MAF, PIW
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; @Changelog: 2017-03-27 MAF
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; 2022-05-17 PIW
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; @Manufacturer: TI - Texas Instruments
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; @Core: Cortex-M3, Cortex-A8, PRU
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; @Chip: AM3351-CM3 AM3352-CM3 AM3354-CM3 AM3356-CM3 AM3357-CM3 AM3358-CM3
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; AM3359-CM3, AM335X-ICSS
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menam335xcm3.men 16340 2023-07-03 14:25:09Z pegold $
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add
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menu
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(
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if (cpu()=="AM335X-ICSS0"||cpu()=="PRU")
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(
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popup "AM335x-ICSS"
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(
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menuitem "CFG" "PER , ""CFG"""
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menuitem "PRU0_CTRL" "PER , ""PRU0_CTRL"""
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menuitem "PRU1_CTRL" "PER , ""PRU1_CTRL"""
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menuitem "INTC" "PER , ""INTC"""
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menuitem "MII_RT_CFG" "PER , ""MII_RT_CFG"""
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menuitem "MDIO" "PER , ""MDIO"""
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menuitem "IEP" "PER , ""IEP"""
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menuitem "DEBUG" "PER , ""DEBUG"""
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)
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)
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else
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if (CORENAME()=="CORTEXA8")
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(
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popup "[:chip]Core Registers (Cortex-A8)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A8),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A8),System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A8),Memory Management Unit"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A8),Cache Control and Configuration"""
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menuitem "[:chip]L2 Cache Control and Configuration" "per , ""Core Registers (Cortex-A8),L2 Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A8),System Performance Monitor"""
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A8),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A8),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A8),Watchpoint Control Registers"""
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)
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)
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else if (CORENAME()=="CORTEXM3")
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(
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popup "[:chip]Core Registers (Cortex-M3)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M3),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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separator
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popup "Memory Subsystem"
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(
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menuitem "GPMC" "per , ""Memory Subsystem,GPMC (General purpose memory controller)"""
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popup "EMIF;(External Memory Interface)"
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(
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menuitem "EMIF4D" "per , ""Memory Subsystem,EMIF (External Memory Interface),EMIF4D"""
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menuitem "DDR2/3/mDDR" "per , ""Memory Subsystem,EMIF (External Memory Interface),DDR2/3/mDDR"""
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)
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menuitem "ELM" "per , ""Memory Subsystem,ELM (Error Location Module)"""
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)
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popup "PRCM;(Power/Reset/Clock Managenent)"
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(
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popup "CM;(Clock Module Registers)"
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(
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menuitem "CM_PER" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_PER"""
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menuitem "CM_WKUP" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_WKUP"""
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menuitem "CM_DPLL" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_DPLL"""
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menuitem "CM_MPU" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_MPU"""
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menuitem "CM_DEVICE" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_DEVICE"""
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menuitem "CM_RTC" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_RTC"""
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menuitem "CM_GFX" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_GFX"""
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menuitem "CM_CEFUSE" "per , ""PRCM (Power/Reset/Clock Managenent),CM (Clock Module Registers),CM_CEFUSE"""
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)
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popup "PRM;(Port Management Registers)"
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(
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menuitem "PRM_IRQ" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_IRQ"""
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menuitem "PRM_PER" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_PER"""
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menuitem "PRM_WKUP" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_WKUP"""
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menuitem "PRM_MPU" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_MPU"""
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menuitem "PRM_DEVICE" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_DEVICE"""
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menuitem "PRM_RTC" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_RTC"""
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menuitem "PRM_GFX" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_GFX"""
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menuitem "PRM_CEFUSE" "per , ""PRCM (Power/Reset/Clock Managenent),PRM (Port Management Registers),PRM_CEFUSE"""
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)
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)
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menuitem "Control Module" "per , ""Control Module"""
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popup "EDMA;(Enhanced Direct Memory Access)"
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(
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menuitem "EDMA3CC" "per , ""EDMA (Enhanced Direct Memory Access),EDMA3CC"""
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popup "EDMA3TCC"
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(
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menuitem "EDMA3TC0" "per , ""EDMA (Enhanced Direct Memory Access),EDMA3TCC,EDMA3TC0"""
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menuitem "EDMA3TC1" "per , ""EDMA (Enhanced Direct Memory Access),EDMA3TCC,EDMA3TC1"""
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menuitem "EDMA3TC2" "per , ""EDMA (Enhanced Direct Memory Access),EDMA3TCC,EDMA3TC2"""
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)
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)
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menuitem "TSC" "per , ""TSC (Touchscreen Controller)"""
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menuitem "LCD Controller" "per , ""LCD Controller"""
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popup "Ethernet Subsystem"
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(
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menuitem "CPSW_ALE" "per , ""Ethernet Subsystem,CPSW_ALE"""
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menuitem "CPSW_CPDMA" "per , ""Ethernet Subsystem,CPSW_CPDMA"""
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menuitem "CPSW_CPTS" "per , ""Ethernet Subsystem,CPSW_CPTS"""
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menuitem "CPSW_STATS" "per , ""Ethernet Subsystem,CPSW_STATS"""
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menuitem "CPSW_STATERAM" "per , ""Ethernet Subsystem,CPSW_STATERAM"""
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menuitem "CPSW_PORT" "per , ""Ethernet Subsystem,CPSW_PORT"""
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popup "CPSW_SL"
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(
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menuitem "CPSW_SL 1" "per , ""Ethernet Subsystem,CPSW_SL,CPSW_SL 1"""
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menuitem "CPSW_SL 2" "per , ""Ethernet Subsystem,CPSW_SL,CPSW_SL 2"""
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)
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menuitem "CPSW_SS" "per , ""Ethernet Subsystem,CPSW_SS"""
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menuitem "CPSW_WR" "per , ""Ethernet Subsystem,CPSW_WR"""
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menuitem "MDIO" "per , ""Ethernet Subsystem,MDIO"""
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)
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popup "PWMSS;(Pulse-Width Modulation Subsystem)"
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(
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popup "PWMSS"
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(
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menuitem "PWMSS0" "per , ""PWMSS (Pulse-Width Modulation Subsystem),PWMSS,PWMSS0"""
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menuitem "PWMSS1" "per , ""PWMSS (Pulse-Width Modulation Subsystem),PWMSS,PWMSS1"""
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menuitem "PWMSS2" "per , ""PWMSS (Pulse-Width Modulation Subsystem),PWMSS,PWMSS2"""
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)
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popup "ePWM"
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(
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menuitem "PWMSS0" "per , ""PWMSS (Pulse-Width Modulation Subsystem),ePWM,ePWM0"""
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menuitem "PWMSS1" "per , ""PWMSS (Pulse-Width Modulation Subsystem),ePWM,ePWM1"""
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menuitem "PWMSS2" "per , ""PWMSS (Pulse-Width Modulation Subsystem),ePWM,ePWM2"""
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)
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popup "eCAP"
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(
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menuitem "eCAP0" "per , ""PWMSS (Pulse-Width Modulation Subsystem),eCAP,eCAP0"""
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menuitem "eCAP1" "per , ""PWMSS (Pulse-Width Modulation Subsystem),eCAP,eCAP1"""
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menuitem "eCAP2" "per , ""PWMSS (Pulse-Width Modulation Subsystem),eCAP,eCAP2"""
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)
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popup "eQEP"
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(
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menuitem "eQEP0" "per , ""PWMSS (Pulse-Width Modulation Subsystem),eQEP,eQEP0"""
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menuitem "eQEP1" "per , ""PWMSS (Pulse-Width Modulation Subsystem),eQEP,eQEP1"""
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menuitem "eQEP2" "per , ""PWMSS (Pulse-Width Modulation Subsystem),eQEP,eQEP2"""
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)
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)
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popup "USB;(Universal Serial Bus)"
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(
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menuitem "USBSS" "per , ""USB (Universal Serial Bus),USBSS"""
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popup "USB"
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(
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menuitem "USB0" "per , ""USB (Universal Serial Bus),USB,USB0"""
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menuitem "USB1" "per , ""USB (Universal Serial Bus),USB,USB1"""
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)
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popup "USB_PHY"
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|
(
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menuitem "USB0_PHY" "per , ""USB (Universal Serial Bus),USB_PHY,USB0_PHY"""
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menuitem "USB1_PHY" "per , ""USB (Universal Serial Bus),USB_PHY,USB1_PHY"""
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)
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menuitem "CPPI_DMA" "per , ""USB (Universal Serial Bus),CPPI_DMA"""
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menuitem "CPPI_DMA_SCHEDULER" "per , ""USB (Universal Serial Bus),CPPI_DMA_SCHEDULER"""
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menuitem "QUEUE_MGR" "per , ""USB (Universal Serial Bus),QUEUE_MGR (USB Queue Manager)"""
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)
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popup "Interprocessor Communication"
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|
(
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menuitem "Mailbox" "per , ""Interprocessor Communication,Mailbox"""
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menuitem "Spinlock" "per , ""Interprocessor Communication,Spinlock"""
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)
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menuitem "MMC" "per , ""MMC (Multimedia Card)"""
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menuitem "UART" "per , ""UART (Universal Asynchronous Receiver/Transmitter)"""
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popup "Timers"
|
|
(
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popup "DMTimer"
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(
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menuitem "DMTimer 0" "per , ""Timers,DMTimer,DMTimer 0"""
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|
menuitem "DMTimer 1" "per , ""Timers,DMTimer,DMTimer 1"""
|
|
menuitem "DMTimer 2" "per , ""Timers,DMTimer,DMTimer 2"""
|
|
menuitem "DMTimer 3" "per , ""Timers,DMTimer,DMTimer 3"""
|
|
menuitem "DMTimer 4" "per , ""Timers,DMTimer,DMTimer 4"""
|
|
menuitem "DMTimer 5" "per , ""Timers,DMTimer,DMTimer 5"""
|
|
menuitem "DMTimer 6" "per , ""Timers,DMTimer,DMTimer 6"""
|
|
menuitem "DMTimer 7" "per , ""Timers,DMTimer,DMTimer 7"""
|
|
)
|
|
menuitem "DMTIMER 1MS" "per , ""Timers,DMTIMER 1MS"""
|
|
menuitem "RTCSS" "per , ""Timers,RTCSS (Real Time Clock)"""
|
|
menuitem "WDT" "per , ""Timers,WDT (Watchdog)"""
|
|
)
|
|
popup "I2C"
|
|
(
|
|
menuitem "I2C0" "per , ""I2C,I2C0"""
|
|
menuitem "I2C1" "per , ""I2C,I2C1"""
|
|
)
|
|
popup "McASP;(Multichannel Audio Serial Port)"
|
|
(
|
|
menuitem "McASP0" "per , ""McASP (Multichannel Audio Serial Port),McASP0"""
|
|
menuitem "McASP1" "per , ""McASP (Multichannel Audio Serial Port),McASP1"""
|
|
)
|
|
if !cpuis("AM3351-CM3")
|
|
(
|
|
popup "DCAN;(Controller Area Network)"
|
|
(
|
|
menuitem "DCAN0" "per , ""DCAN (Controller Area Network),DCAN0"""
|
|
menuitem "DCAN1" "per , ""DCAN (Controller Area Network),DCAN1"""
|
|
)
|
|
)
|
|
popup "McSPI;(Multichannel Serial Port Interface)"
|
|
(
|
|
menuitem "McSPI0" "per , ""McSPI (Multichannel Serial Port Interface),McSPI0"""
|
|
menuitem "McSPI1" "per , ""McSPI (Multichannel Serial Port Interface),McSPI1"""
|
|
)
|
|
popup "GPIO;(General-Purpose Input/Output)"
|
|
(
|
|
menuitem "GPIO0" "per , ""GPIO (General-Purpose Input/Output),GPIO0"""
|
|
menuitem "GPIO1" "per , ""GPIO (General-Purpose Input/Output),GPIO1"""
|
|
menuitem "GPIO2" "per , ""GPIO (General-Purpose Input/Output),GPIO2"""
|
|
menuitem "GPIO3" "per , ""GPIO (General-Purpose Input/Output),GPIO3"""
|
|
)
|
|
popup "Debug Subsystem"
|
|
(
|
|
menuitem "DebugSS_DRM;(Debug Resource Manager)" "per , ""Debug Subsystem,DebugSS_DRM (Debug Resource Manager)"""
|
|
menuitem "DebugSS_ETB;(Embedded Trace Buffer)" "per , ""Debug Subsystem,DebugSS_ETB (Embedded Trace Buffer)"""
|
|
)
|
|
)
|
|
)
|
|
)
|