74 lines
1.1 KiB
Plaintext
74 lines
1.1 KiB
Plaintext
#ifndef RAM_SIZE
|
|
# define RAM_SIZE 16K
|
|
#endif
|
|
|
|
#ifndef ROM_SIZE
|
|
# define FLASH SRAM
|
|
#endif
|
|
|
|
ENTRY(_start)
|
|
|
|
MEMORY
|
|
{
|
|
#ifdef ROM_SIZE
|
|
FLASH : ORIGIN = 0x00000000, LENGTH = ROM_SIZE
|
|
#endif
|
|
SRAM : ORIGIN = 0x40000000, LENGTH = RAM_SIZE
|
|
}
|
|
|
|
PHDRS
|
|
{
|
|
phRHCW PT_LOAD;
|
|
phText PT_LOAD;
|
|
phData PT_LOAD;
|
|
}
|
|
|
|
SECTIONS
|
|
{
|
|
.rhcw : ALIGN(4) {
|
|
*/crt0.* (.rhcw)
|
|
} > FLASH :phRHCW
|
|
|
|
.ivec : ALIGN(4096) { /* ALIGN(4096) only required for e200z0 cores, otherwise use ALIGN(16) */
|
|
* (.ivec)
|
|
} > FLASH :phText
|
|
|
|
.start : ALIGN(4) {
|
|
*/crt0.* (.start)
|
|
} > FLASH :phText
|
|
|
|
.mmudata : ALIGN(4) {
|
|
*/crt0.* (.mmudata)
|
|
} > FLASH :phText
|
|
|
|
.text : ALIGN(4) {
|
|
* (.text)
|
|
} > FLASH :phText
|
|
|
|
.text_vle : ALIGN(4) {
|
|
* (.text_vle)
|
|
} > FLASH :phText
|
|
|
|
.rodata : ALIGN(4) {
|
|
* (.rodata)
|
|
} > FLASH :phText
|
|
|
|
.data : ALIGN(64) {
|
|
* (.data)
|
|
} > SRAM AT> FLASH :phData
|
|
|
|
.bss : ALIGN(64) {
|
|
* (.bss)
|
|
* (.sbss)
|
|
} > SRAM :phData
|
|
}
|
|
|
|
__stack_end = ORIGIN(SRAM)+LENGTH(SRAM)-8;
|
|
__bss_start = ADDR(.bss);
|
|
__bss_size = SIZEOF(.bss);
|
|
__SRAM_start = ORIGIN(SRAM);
|
|
__SRAM_size = LENGTH(SRAM);
|
|
__data_vaddr = ADDR(.data);
|
|
__data_laddr = LOADADDR(.data);
|
|
__data_size = SIZEOF(.data);
|