woody/Gen4_R-Car_Trace32
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
main
Gen4_R-Car_Trace32/2_Trunk/demo/arm/flash/stm32f0xx.cmm
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

258 lines
9.9 KiB
Plaintext
Raw Permalink Blame History

; --------------------------------------------------------------------------------
; @Title: Example Script for programming of ST STM32F0xx internal flash
;
; @Description:
; Script arguments:
;
; DO stm32f0xx [PREPAREONLY] [CPU=<cpu>] [DUALPORT=0|1]
;
; PREPAREONLY only declares flash but does not execute flash programming
;
; CPU=<cpu> selects CPU derivative <cpu>
;
; DUALPORT default value is 0 (disabled). If DualPort mode is enabled
; flash algorithm stays running until flash programming is
; finished. Data is tranferred via dual port memory access.
;
; Example:
;
; DO ~~/demo/arm/flash/stm32f0xx CPU=STM32F051R8 DUALPORT=1 PREPAREONLY
;
; List of STM32F0xx derivatives and their configuration:
;
; CPU-Type Flash size Page size WRP size RAM size
; [kByte] [kByte] [kByte] [kByte]
; --------------------------------------------------------------------------------
; STM32F030C8 64. 1. 4. 8.
; STM32F030F4 16. 1. 4. 4.
; STM32F030K6 32. 1. 4. 4.
; STM32F030R8 64. 1. 4. 8.
; STM32F030CC 256. 2. 31.*4.+132. 32.
; STM32F030RC 256. 2. 31.*4.+132. 32.
; --------------------------------------------------------------------------------
; STM32F031C4 16. 1. 4. 4.
; STM32F031C6 32. 1. 4. 4.
; STM32F031F4 16. 1. 4. 4.
; STM32F031F6 32. 1. 4. 4.
; STM32F031G4 16. 1. 4. 4.
; STM32F031G6 32. 1. 4. 4.
; STM32F031K4 16. 1. 4. 4.
; STM32F031K6 32. 1. 4. 4.
; STM32F031E6 32. 1. 4. 4.
; --------------------------------------------------------------------------------
; STM32F038C6 32. 1. 4. 4.
; STM32F038F6 32. 1. 4. 4.
; STM32F038G6 32. 1. 4. 4.
; STM32F038K6 32. 1. 4. 4.
; STM32F038E6 32. 1. 4. 4.
; --------------------------------------------------------------------------------
; STM32F042C4 16. 1. 4. 6.
; STM32F042C6 32. 1. 4. 6.
; STM32F042F4 16. 1. 4. 6.
; STM32F042F6 32. 1. 4. 6.
; STM32F042G4 16. 1. 4. 6.
; STM32F042G6 32. 1. 4. 6.
; STM32F042K4 16. 1. 4. 6.
; STM32F042K6 32. 1. 4. 6.
; STM32F042T6 32. 1. 4. 6.
; --------------------------------------------------------------------------------
; STM32F048C6 32. 1. 4. 6.
; STM32F048G6 32. 1. 4. 6.
; STM32F048T6 32. 1. 4. 6.
; --------------------------------------------------------------------------------
; STM32F050C4 16. 1. 4. 4.
; STM32F050C6 32. 1. 4. 4.
; STM32F050G6 32. 1. 4. 4.
; STM32F050K4 16. 1. 4. 4.
; STM32F050K6 32. 1. 4. 4.
; --------------------------------------------------------------------------------
; STM32F051C4 16. 1. 4. 4.
; STM32F051C6 32. 1. 4. 4.
; STM32F051C8 64. 1. 4. 8.
; STM32F051K4 16. 1. 4. 4.
; STM32F051K6 32. 1. 4. 4.
; STM32F051K8 64. 1. 4. 8.
; STM32F051R4 16. 1. 4. 4.
; STM32F051R6 32. 1. 4. 4.
; STM32F051R8 64. 1. 4. 8.
; STM32F051T8 64. 1. 4. 8.
; --------------------------------------------------------------------------------
; STM32F058C8 64. 1. 4. 8.
; STM32F058R8 64. 1. 4. 8.
; STM32F058T8 64. 1. 4. 8.
; --------------------------------------------------------------------------------
; STM32F070C6 32. 1. 4. 4.
; STM32F070CB 128. 2. 4. 16.
; STM32F070F6 32. 1. 4. 4.
; STM32F070RB 128. 2. 4. 16.
; --------------------------------------------------------------------------------
; STM32F071CB 128. 2. 4. 16.
; STM32F071RB 128. 2. 4. 16.
; STM32F071V8 64. 2. 4. 16.
; STM32F071VB 128. 2. 4. 16.
; --------------------------------------------------------------------------------
; STM32F072C8 64. 2. 4. 16.
; STM32F072CB 128. 2. 4. 16.
; STM32F072R8 64. 2. 4. 16.
; STM32F072RB 128. 2. 4. 16.
; STM32F072V8 64. 2. 4. 16.
; STM32F072VB 128. 2. 4. 16.
; --------------------------------------------------------------------------------
; STM32F078CB 128. 2. 4. 16.
; STM32F078RB 128. 2. 4. 16.
; STM32F078VB 128. 2. 4. 16.
; --------------------------------------------------------------------------------
; STM32F091CB 128. 2. 4. 32.
; STM32F091CC 256. 2. 31.*4.+132. 32.
; STM32F091RB 128. 2. 4. 32.
; STM32F091RC 256. 2. 31.*4.+132. 32.
; STM32F091VB 128. 2. 4. 32.
; STM32F091VC 256. 2. 31.*4.+132. 32.
; --------------------------------------------------------------------------------
; STM32F098CC 256. 2. 31.*4.+132. 32.
; STM32F098RC 256. 2. 31.*4.+132. 32.
; STM32F098VC 256. 2. 31.*4.+132. 32.
;
; Flash base address is 0x08000000
; SRAM base address is 0x20000000
;
; @Author: WRD
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; @Chip: STM32F0*
; --------------------------------------------------------------------------------
; $Rev: 12744 $
; $Id: stm32f0xx.cmm 12744 2023-11-17 08:31:16Z mschaeffner $
LOCAL &parameters
ENTRY %LINE &parameters
LOCAL &param_prepareonly
&param_prepareonly=(STRing.SCAN(STRing.UPpeR("&parameters"),"PREPAREONLY",0)!=-1)
LOCAL &param_cpu
&param_cpu=STRing.SCANAndExtract(STRing.UPpeR("&parameters"),"CPU=","")
LOCAL &param_dualport
&param_dualport=0
IF VERSION.BUILD.BASE()>=43441.
&param_dualport=STRing.SCANAndExtract(STRing.UPpeR("&parameters"),"DUALPORT=","0")
; --------------------------------------------------------------------------------
; CPU setup
IF SYStem.MODE()<5
(
SYStem.RESet
IF "&param_cpu"!=""
SYStem.CPU &param_cpu
IF !CPUIS(STM32F0*)
SYStem.CPU STM32F0*
SYStem.CONFIG.DEBUGPORTTYPE SWD
SYStem.Up
)
; --------------------------------------------------------------------------------
; Flash declaration
FLASH.RESet
GOSUB FlashDeclaration &param_dualport
; Flash script ends here if called with parameter PREPAREONLY
IF &param_prepareonly
ENDDO PREPAREDONE
; --------------------------------------------------------------------------------
; Flash programming example
DIALOG.YESNO "Program flash memory?"
LOCAL &progflash
ENTRY &progflash
IF &progflash
(
FLASH.ReProgram.ALL /Erase
Data.LOAD.auto *
FLASH.ReProgram.off
; Reset device
SYStem.Down
SYStem.Up
)
ENDDO
; --------------------------------------------------------------------------------
; Flash declaration depending on selected CPU
FlashDeclaration:
LOCAL &DualPort
ENTRY &DualPort
LOCAL &FlashSize
LOCAL &PageSize
IF CPUIS("STM32F0???4")
(
&FlashSize=0x4000
&PageSize=0x400
)
ELSE IF CPUIS("STM32F0???6")
(
&FlashSize=0x8000
&PageSize=0x400
)
ELSE IF CPUIS("STM32F03??8")||CPUIS("STM32F05??8")
(
&FlashSize=0x10000
&PageSize=0x400
)
ELSE IF CPUIS("STM32F07??8")
(
&FlashSize=0x10000
&PageSize=0x800
)
ELSE IF CPUIS("STM32F0???B")
(
&FlashSize=0x20000
&PageSize=0x800
)
ELSE IF CPUIS("STM32F0???C")
(
&FlashSize=0x40000
&PageSize=0x800
)
ELSE
(
PRINT %ERROR "FLASH size of CPU type is unknown"
ENDDO
)
IF &FlashSize>=0x4000
FLASH.Create 1. 0x08000000--0x08003FFF &PageSize TARGET Word
IF &FlashSize>=0x8000
FLASH.Create 1. 0x08004000--0x08007FFF &PageSize TARGET Word
IF &FlashSize>=0x10000
FLASH.Create 1. 0x08008000--0x0800FFFF &PageSize TARGET Word
IF &FlashSize>=0x20000
FLASH.Create 1. 0x08010000--0x0801FFFF &PageSize TARGET Word
IF &FlashSize>=0x40000
FLASH.Create 1. 0x08020000--0x0803FFFF &PageSize TARGET Word
; For Main Flash memory boot mode flash memory is aliased to address 0x0
; Because SYSCFG_CFGR1:MEM_MODE[1:0] is not indicating active memory remap
; we are comparing flash reset vector against reset vector at alias address
Data.ComPare 0x0--0x7 0x08000000
IF !FOUND()
FLASH.CreateALIAS 0x0000--0xFFFF 0x08000000
IF &DualPort==0
FLASH.TARGET 0x20000000 0x20000800 0x400 ~~/demo/arm/flash/word/stm32f0.bin
ELSE
FLASH.TARGET 0x20000000 EAHB:0x20000800 0x400 ~~/demo/arm/flash/word/stm32f0.bin /DualPort
RETURN
Reference in New Issue View Git Blame Copy Permalink