197 lines
6.8 KiB
Plaintext
197 lines
6.8 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Example for flash declaration of NXP LPC40xx Cortex-M4 internal flash.
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;
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; @Description:
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; Script arguments:
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;
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; DO lpc40xx [PREPAREONLY] [CPU=<cpu>]
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;
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; PREPAREONLY only declares flash but does not execute flash programming
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;
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; CPU=<cpu> selects CPU derivative <cpu>
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;
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; Example:
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;
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; DO ~~/demo/arm/flash/lpc40xx CPU=LPC4088 PREPAREONLY
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;
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; List of LPC40xx derivatives and their configuration:
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;
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; CPU-Type Flash EEPROM RamSize
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; [kB] [B] [kB]
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; --------------------------------------------------------------------------------
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; LPC4072 64. 2048. 24.
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; LPC4074 128. 2048. 40.
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; LPC4076 256. 2048. 80.
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; LPC4078 512. 4032. 96.
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; LPC4088 512. 4032. 96.
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;
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; Memories:
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;
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; Flash at 0x00000000
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; 32/64 kB Main SRAM at 0x10000000
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; Boot ROM at 0x1FFF0000
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; Driver ROM at 0x1FFF8000
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; 8/16 kB Peripheral SRAM bank 0 at 0x20000000
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; 16 kB Peripheral SRAM bank 1 at 0x20004000
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;
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; Code Read Protection (CRP):
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;
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; CRP is invoked by programming a specific pattern in flash bank A or B
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; at offset 0x000002FC.
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;
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; Name Pattern Description
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; --------------------------------------------------------------------------------
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; CRP1 0x12345678 Access to chip via the JTAG pins is disabled. This mode
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; allows partial flash update using the following ISP
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; commands and restrictions:
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; * Write to RAM command can not access RAM below
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; 0x10000200. This is due to use of the RAM by the ISP
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; code.
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; * Read Memory command: disabled.
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; * Copy RAM to Flash command: cannot write to Sector 0.
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; * Go command: disabled.
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; * Erase sector(s) command: can erase any individual
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; sector except sector 0 only, or can erase all sectors
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; at once.
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; * Compare command: disabled
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; This mode is useful when CRP is required and flash
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; field updates are needed but all sectors can not be
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; erased. The compare command is disabled, so in the
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; case of partial flash updates the secondary loader
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; should implement a checksum mechanism to verify the
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; integrity of the flash.
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; CRP2 0x87654321 This is similar to CRP1 with the following additions:
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; * Write to RAM command: disabled.
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; * Copy RAM to Flash: disabled.
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; * Erase command: only allows erase of all sectors.
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; CRP3 0x43218765 This is similar to CRP2, but ISP entry by pulling
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; P2[10] LOW is disabled if a valid user code is present
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; in flash sector 0.
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; This mode effectively disables ISP override using the
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; P2[10] pin. It is up to the user's application to
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; provide for flash updates by using IAP calls or by
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; invoking ISP with UART0.
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; CAUTION: If CRP3 is selected, no future factory testing
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; can be performed on the device.
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;
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; Flash programming commands use 32 bytes of space in the top portion of the
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; on-chip RAM for execution.
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;
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; HINTS:
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;
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; Flash clock has to match System Clock Frequency (M4_CLK).
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; FLASH.CLocK.AUTO can be used for automatic flash clock measurement.
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;
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; Boot flash cannot be programmed or erased with builtin flash
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; algorithm.
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;
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; Data has to be loaded into flash aligned to page boundaries.
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;
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; Vector table checksum generation is done by script, so that it
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; can be used or switched off, as needed.
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;
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; @Author: WRD
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; @Chip: LPC40*
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; --------------------------------------------------------------------------------
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; $Rev: 12049 $
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; $Id: lpc40xx.cmm 12049 2023-04-20 12:32:16Z bschroefel $
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LOCAL ¶meters ¶m_prepareonly
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ENTRY %LINE ¶meters
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¶m_prepareonly=(STRing.SCAN(STRing.UPpeR("¶meters"),"PREPAREONLY",0)!=-1)
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LOCAL ¶m_cpu
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¶m_cpu=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"CPU=","")
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; ------------------------------------------------------------------------------
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; Setup CPU
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IF SYStem.MODE()<5
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(
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SYStem.RESet
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IF "¶m_cpu"!=""
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SYStem.CPU ¶m_cpu
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IF !CPUIS(LPC40*)
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SYStem.CPU LPC40*
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SYStem.CONFIG.DEBUGPORTTYPE JTAG
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SYStem.CONFIG.CONNECTOR MIPI20T
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SYStem.Option.ResBreak OFF
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SYStem.Up
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)
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; ------------------------------------------------------------------------------
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; Flash declaration
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FLASH.RESet
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GOSUB FlashDeclaration
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; Flash script ends here if called with parameter PREPAREONLY
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IF ¶m_prepareonly
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ENDDO PREPAREDONE
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; ------------------------------------------------------------------------------
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; Flash programming example
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DIALOG.YESNO "Program flash memory?"
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LOCAL &progflash
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ENTRY &progflash
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IF &progflash
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(
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; ensure BootROM Remap shows FLASH at 0x0
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Data.Set 0x400fc040 %Long %LE 0x1
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; Example for download
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FLASH.ReProgram.ALL /Erase
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; 1. Download file
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Data.LOAD.auto *
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; 2. Checksum generation
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Data.SUM 0x00000000--0x0000001B /Long ; Calculate checksum of all (other) vectors
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Data.Set 0x0000001C %Long -Data.SUM() ; Write the 2's complement in reserved vector's spot
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; 3. Flash programming
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FLASH.ReProgram.off
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; Reset device
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SYStem.Down
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SYStem.Up
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)
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ENDDO
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; --------------------------------------------------------------------------------
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; Flash declaration depending on selected CPU
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FlashDeclaration:
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LOCAL &FlashSize
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IF CPUIS("LPC40?2*")
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&FlashSize=0x10000
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ELSE IF CPUIS("LPC40?4*")
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&FlashSize=0x20000
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ELSE IF CPUIS("LPC40?6*")
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&FlashSize=0x40000
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ELSE IF CPUIS("LPC40?8*")
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&FlashSize=0x80000
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ELSE
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(
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PRINT %ERROR "FLASH size of CPU type is unknown"
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ENDDO
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)
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IF &FlashSize>=0x10000
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FLASH.Create 1. 0x00000000--0x0000FFFF 0x1000 TARGET Long
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IF &FlashSize>=0x20000
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FLASH.Create 1. 0x00010000--0x0001FFFF 0x8000 TARGET Long
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IF &FlashSize>=0x40000
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FLASH.Create 1. 0x00020000--0x0003FFFF 0x8000 TARGET Long
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IF &FlashSize>=0x80000
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FLASH.Create 1. 0x00040000--0x0007FFFF 0x8000 TARGET Long
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FLASH.TARGET 0x10000000 0x10001000 0x1000 ~~/demo/arm/flash/long/lpc4000.bin
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FLASH.CLocK.AUTO
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RETURN
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