313 lines
11 KiB
Plaintext
313 lines
11 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: SPI(Serial NOR) Flash Program script for iMXRT1062 OEM(EmbeddedArtists)
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; @Description:
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; The ATXP32(Adestro) is connected to the FLEXSPI controller
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; ATXP32 is the OPI DDR Mode supported flash memory
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;
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; SRAM: 0x20001000
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; FlexSPI(controller) Base: 0x402A8000
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; FlexSPI AHB memory mapped ADDRESS: //NC:0x60000000
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;
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; Prerequisites:
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;
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; @Keywords: ARM, Cortex-M7
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; @Author: JIM
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; @Board: iMXRT1062-OEM
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; @Chip: IMXRT106?
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: imxrt1062oem-spi.cmm 12049 2023-04-20 12:32:16Z bschroefel $
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WinCLEAR
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PRIVATE ¶meters ¶m_prepareonly
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ENTRY %LINE ¶meters
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¶m_prepareonly=(STRing.SCAN(STRing.UPpeR("¶meters"),"PREPAREONLY",0)!=-1)
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&FLEXSPI_BASE=0x402A8000 ;FLEXSPI0 controller base address
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AREA.view
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; initialize and start the debugger
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SYStem.RESet
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SYStem.CPU IMXRT1062
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SYStem.CONFIG.DEBUGPORTTYPE SWD
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IF hardware.COMBIPROBE()||hardware.UTRACE()
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(
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SYStem.CONFIG.CONNECTOR MIPI20T
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)
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SYStem.Option DUALPORT ON
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SYStem.MemAccess DAP
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SYStem.JtagClock 10MHz
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Trace.DISable
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SYStem.Up
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//GOSUB OPIDDR2SPI ; enable this line if the current SPI flash mode is the OPI DDR
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GOSUB clockInit
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GOSUB IOMUXconfig
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GOSUB FLEXSPIconfig
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GOSUB READ_ID_TEST
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; disable Watchdog
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GOSUB DisableWatchdog
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FLASH.RESet
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FLASH.Create 0x60000000++0x3FFFFF 0x10000 TARGET Byte
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FLASH.TARGET 0x20001000 EAHB:0x20003000 0x2000 ~~/demo/arm/flash/byte/snoratxp32_flexspi.bin /DualPort
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//spi flash lock check
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FLASH.SPI.CMD 1. 0x05 /READ 0x4 vm:0x0
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IF ((Data.Byte(vm:0x0)&0x3C)!=0x0) //if the flash is locked, then make it unlock
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(
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print "unlock spi flash ..."
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FLASH.SPI.CMD 1. 0x6
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FLASH.SPI.CMD 1. 0x1 0x0
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)
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IF ¶m_prepareonly
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ENDDO
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;FLASH.ReProgram ALL
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;Data.LOAD.auto *
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;Data.LOAD.Binary * 0x60000000
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;FLASH.ReProgram OFF
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Data.dump NC:0x60000000 ; Memory Class NC (Non-cache....)
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ENDDO
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; --------------------------------------------------------------------------------
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FLEXSPIconfig:
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(
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//unlock
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Data.Set A:&FLEXSPI_BASE+0x018 %LE %Long 0x5AF05AF0
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Data.Set A:&FLEXSPI_BASE+0x01C %LE %Long 2
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PER.Set.simple ASD:0x402A8000 %Long 0xFFFF8003
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WAIT 100.ms
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PER.Set.simple ASD:0x402A8000 %Long 0xFFFF8000
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//controller init
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Data.Set A:&FLEXSPI_BASE+0x004 %LE %Long 0xFFFFFFFF
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Data.Set A:&FLEXSPI_BASE+0x008 %LE %Long 0x200001F7
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Data.Set A:&FLEXSPI_BASE+0x00C %LE %Long 0x58
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Data.Set A:&FLEXSPI_BASE+0x020 %LE %Long 0x80000000
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Data.Set A:&FLEXSPI_BASE+0x024 %LE %Long 0x80000000
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Data.Set A:&FLEXSPI_BASE+0x028 %LE %Long 0x80000000
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Data.Set A:&FLEXSPI_BASE+0x060 %LE %Long 0x00200000
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Data.Set A:&FLEXSPI_BASE+0x060 %LE %Long 0x1000 ; 0x4000 * 0x400(KB unit size) = 16MB Flash_A0 size.
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Data.Set A:&FLEXSPI_BASE+0x064 %LE %Long 0x1000
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Data.Set A:&FLEXSPI_BASE+0x068 %LE %Long 0x1000
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Data.Set A:&FLEXSPI_BASE+0x06C %LE %Long 0x1000
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//timing
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Data.Set A:&FLEXSPI_BASE+0x070 %LE %Long 0x44; 0x00000063
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Data.Set A:&FLEXSPI_BASE+0x074 %LE %Long 0x44; 0x00000063
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Data.Set A:&FLEXSPI_BASE+0x078 %LE %Long 0x44; 0x00000063
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Data.Set A:&FLEXSPI_BASE+0x07C %LE %Long 0x44; 0x00000063
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Data.Set A:&FLEXSPI_BASE+0x080 %LE %Long 0x00000900
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Data.Set A:&FLEXSPI_BASE+0x084 %LE %Long 0x00000900
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Data.Set A:&FLEXSPI_BASE+0x088 %LE %Long 0x00000900
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Data.Set A:&FLEXSPI_BASE+0x08C %LE %Long 0x00000900
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Data.Set A:&FLEXSPI_BASE+0x0B8 %LE %Long 0x1 ; water marker level 0 , reset assert 0x1
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Data.Set A:&FLEXSPI_BASE+0x0BC %LE %Long 0x1 ; water marker level 0 , reset assert 0x1
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Data.Set A:&FLEXSPI_BASE+0x0C0 %LE %Long 0x0100
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Data.Set A:&FLEXSPI_BASE+0x0C4 %LE %Long 0x0100
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//LUT0 for read the spi memory data to the AHB
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//FAST READ Quad I/O
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; Data.Set A:&FLEXSPI_BASE+0x200 %LE %Long 0x0A1804EB
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; Data.Set A:&FLEXSPI_BASE+0x204 %LE %Long 0x26043206
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; Data.Set A:&FLEXSPI_BASE+0x208 %LE %Long 0x00
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; Data.Set A:&FLEXSPI_BASE+0x20C %LE %Long 0x00
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//Normal Read Mode
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Data.Set A:&FLEXSPI_BASE+0x200 %LE %Long 0x08180403
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Data.Set A:&FLEXSPI_BASE+0x204 %LE %Long 0x00002404
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Data.Set A:&FLEXSPI_BASE+0x208 %LE %Long 0x00
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Data.Set A:&FLEXSPI_BASE+0x20C %LE %Long 0x00
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//AHB update automatically even though the window size is < 1KB
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Data.Set A:&FLEXSPI_BASE+0x00C %LE %Long Data.Long(A:&FLEXSPI_BASE+0x00C)&~0x20
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RETURN
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)
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IOMUXconfig:
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(
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//pin mux
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Data.Set A:0x401F81EC %LE %Long 0x1 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U);
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Data.Set A:0x401F81F0 %LE %Long 0x11 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 1U);
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Data.Set A:0x401F81E4 %LE %Long 0x5 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_04_FLEXSPIB_SCLK, 1U);
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Data.Set A:0x401F81E8 %LE %Long 0x11 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 1U);
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Data.Set A:0x401F81F4 %LE %Long 0x1 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U);
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Data.Set A:0x401F81F8 %LE %Long 0x1 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U);
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Data.Set A:0x401F81FC %LE %Long 0x1 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U);
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Data.Set A:0x401F8200 %LE %Long 0x1 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U);
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Data.Set A:0x401F81E0 %LE %Long 0x5 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_03_FLEXSPIB_DATA00, 1U);
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Data.Set A:0x401F81DC %LE %Long 0x5 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_FLEXSPIB_DATA01, 1U);
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Data.Set A:0x401F81D8 %LE %Long 0x5 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_FLEXSPIB_DATA02, 1U);
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Data.Set A:0x401F81D4 %LE %Long 0x5 ; IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_FLEXSPIB_DATA03, 1U);
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//pin config
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Data.Set A:0x401F83DC %LE %Long 0x000F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 0x10F1u);
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Data.Set A:0x401F83E0 %LE %Long 0x000F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10F1u);
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Data.Set A:0x401F83D4 %LE %Long 0x010B0 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_04_FLEXSPIB_SCLK, 0x10F1u);
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Data.Set A:0x401F83D8 %LE %Long 0x130F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0x0130F1u);
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Data.Set A:0x401F83E4 %LE %Long 0x000F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10F1u);
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Data.Set A:0x401F83E8 %LE %Long 0x000F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10F1u);
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Data.Set A:0x401F83EC %LE %Long 0x000F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10F1u);
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Data.Set A:0x401F83F0 %LE %Long 0x000F1 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10F1u);
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Data.Set A:0x401F83D0 %LE %Long 0x010B0 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_03_FLEXSPIB_DATA00, 0x10F1u);
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Data.Set A:0x401F83CC %LE %Long 0x010B0 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_02_FLEXSPIB_DATA01, 0x10F1u);
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Data.Set A:0x401F83C8 %LE %Long 0x010B0 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_FLEXSPIB_DATA02, 0x10F1u);
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Data.Set A:0x401F83C4 %LE %Long 0x010B0 ; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_FLEXSPIB_DATA03, 0x10F1u);
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RETURN
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)
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clockInit: ;()
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(
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// Enable all clocks
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Data.Set A:0x400FC068 %Long 0xffffffff
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Data.Set A:0x400FC06C %Long 0xffffffff
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;Data.Set A:0x400FC070 %Long 0xffffffff
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;Data.Set A:0x400FC074 %Long 0xffffffff
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Data.Set A:0x400FC078 %Long 0xffffffff
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Data.Set A:0x400FC07C %Long 0xffffffff
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Data.Set A:0x400FC080 %Long 0xffffffff ;CCGR6.CG5[11:10]: FLEXSPI enable clk
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Data.Set A:0x400D8000 %Long 0x00012042
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Data.Set A:0x400D8030 %Long 0x80012042
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Data.Set A:0x400D8100 %Long 0x58535858
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Data.Set A:0x400D8010 %Long 0x3000
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Data.Set A:0x400D8010 %Long 0x80003000
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Data.Set A:0x400D80A0 %LE %Long 0x0001100C ;CCM_ANALOG_PLL_VIDEOn, !!! influence on the FLEXSPI data flickering !!!
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Data.Set A:0x400D80F0 %Long 0x4F5A6363
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Data.Set A:0x400FC010 %Long 0x1 ;CCM_CACRR
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Data.Set A:0x400FC024 %Long 0x06490b03
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Data.Set A:0x400FC018 %Long 0x2dae8324 ;CCM_CBCMR
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Data.Set A:0x400FC018 %Long 0x35AE8304 ;CCM_CBCMR
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Data.Set A:0x400FC01C %LE %Long 0x07900001 ;CCM_CSCMR1, FLEXSPI_PODF[25:23]
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Data.Set A:0x400FC01C %LE %Long 0x07930001
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Data.Set A:0x400FC024 %LE %Long 0x06490B03
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Data.Set A:0x400D8000 %Long 0x80002042
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Data.Set A:0x400D8030 %Long 0x80002001 ;CCM_ANALOG_PLL_SYSn
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Data.Set A:0x400D8010 %Long 0x80003000 ;CCM_ANALOG_PLL_USB1n
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RETURN
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)
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READ_ID_TEST:
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(
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PRINT "READ_ID_TEST..."
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&readSize=0x10
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Data.Set A:&FLEXSPI_BASE+0x210 %LE %Long 0x2400049F|((&readSize&0xFF)<<16.) ;readid with 16 bytes READ data
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Data.Set A:&FLEXSPI_BASE+0x214 %LE %Long 0x0 ;
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GOSUB LUT_EXECUTE &readSize
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RETURN
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)
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ADESTO_OPIDDR2SPI:
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(
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PRINT "Adesto OPI 2 SPI ..."
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&readSize=0x0
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Data.Set A:&FLEXSPI_BASE+0x210 %LE %Long 0x0706 ;readid with 16 bytes READ data
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Data.Set A:&FLEXSPI_BASE+0x214 %LE %Long 0x0 ;
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GOSUB LUT_EXECUTE &readSize
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Data.Set A:&FLEXSPI_BASE+0x210 %LE %Long 0x07FF ;readid with 16 bytes READ data
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Data.Set A:&FLEXSPI_BASE+0x214 %LE %Long 0x0 ;
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GOSUB LUT_EXECUTE &readSize
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RETURN
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)
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LUT_EXECUTE:
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(
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ENTRY &data_size
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// Data.Set ASD:&FLEXSPI_BASE+0x80 %LE %Long 0x80000900 ;FLASHCR2
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Data.Set ASD:&FLEXSPI_BASE+0x14 %LE %Long -1 ;INTR clear
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Data.Set A:&FLEXSPI_BASE+0xB8 %Long 0x1 ;IPRXFCR
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Data.Set A:&FLEXSPI_BASE+0xBC %Long 0x1 ;IPTXFCR
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Data.Set A:&FLEXSPI_BASE+0x0A4 %LE %Long (1.<<16.)|&data_size
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Data.Set A:&FLEXSPI_BASE+0x0B0 %LE %Long 1 ;start
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&readbuffer_addr=&FLEXSPI_BASE+0x100
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IF &data_size>0
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(
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&byteCnt=0.
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RePeaT 4.
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(
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PRINT "0x" Data.Long(A:&readbuffer_addr)&0xFF " ;" &byteCnt "."
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PRINT "0x" (Data.Long(A:&readbuffer_addr)>>8.)&0xFF " ;" &byteCnt+1. "."
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PRINT "0x" (Data.Long(A:&readbuffer_addr)>>16.)&0xFF " ;" &byteCnt+2. "."
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PRINT "0x" Data.Long(A:&readbuffer_addr)>>24. " ;" &byteCnt+3. "."
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&byteCnt=&byteCnt+4.
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&readbuffer_addr=&readbuffer_addr+0x4
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&data_size=&data_size-4.
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)
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)
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RETURN
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)
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DisableWatchdog:
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(
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LOCAL &tmp1 &tmp2
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&tmp1=Data.Long(ST:0x20000000)
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&tmp2=Data.Long(ST:0x20000004)
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Register.SWAP
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; The watchdog has a restrictive timing. It has to be configured and unlocked within a peripod
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; of 128 cycles. Therefor the unlock sequence need to be done by a small target program.
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Data.Assemble ST:0x20000000 str r1,[r0] ;SD:0x400BC004 = 0xD928C520 (Key)
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Data.Assemble , str r3,[r2] ;SD:0x400BC000 = 0x00002120 (Control register)
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Data.Assemble , str r5,[r4] ;SD:0x40052008 = 0x0000FFFF (Timeout value)
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Data.Assemble , bkpt #0
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Register.Set PC 0x20000000
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Register.Set SP 0x20001000
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Register.Set R0 0x400BC004
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Register.Set R1 0xD928C520
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Register.Set R2 0x400BC000
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Register.Set R3 0x00002100
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Register.Set R4 0x400BC008
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Register.Set R5 0x0000FFFF
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Go.direct
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WAIT !STATE.RUN()
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Data.Set ST:0x20000000 %Long &tmp1
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Data.Set ST:0x20000004 %Long &tmp2
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Register.SWAP
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RETURN
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)
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OPIDDR2SPI:
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(
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Data.Set A:&FLEXSPI_BASE+0x018 %LE %Long 0x5AF05AF0
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Data.Set A:&FLEXSPI_BASE+0x01C %LE %Long 2
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GOSUB ADESTO_OPIDDR2SPI //switch back opi(ddr) -> dafault spi mode
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RETURN
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)
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