203 lines
6.8 KiB
Plaintext
203 lines
6.8 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: IMX8MQ(ARM, Cortex-A53) on IMX8MQ-EVK Board eMMC FLASH Program script
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; @Description:
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; The Micron (MTFC4GACAAAM-JWA57) is on the USDHC1
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;
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; SRAM: 0x900000
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; USDHC(controller) Base: 0x30B40000
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;
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; @Keywords: Flash eMMC
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; @Author: jjeong
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; @Board: IMX8MQ-EVK
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; @Chip: IMX8MQ*
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: imx8m-emmc.cmm 12049 2023-04-20 12:32:16Z bschroefel $
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PRIVATE &arg1 &nSdhc
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LOCAL &MMC_BASE
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&nSdhc=1.
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RESet
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SYStem.RESet
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SYStem.CPU IMX8MQ
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SYStem.JtagClock 10MHz
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SYStem.MemAccess DAP ;need for dualport
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SYStem.Option ResBreak OFF
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SYStem.Option WaitIDCODE 1.5s
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Trace.DISable
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CORE.ASSIGN 1.
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SYStem.Up
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Register.Set M 0x5 ;EL1h
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// CCM_TARGET_ROOTn : Address: 3038_0000h base + 8000h offset + (128d x i), where i=0d to 124d
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// i=88. USDHC1_CLK_ROOT, i=89. USDHC2_CLK_ROOT
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IF &nSdhc==1.
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(
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&MMC_BASE=0x30B40000 ;SDHC1
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Data.Set A:0x30384518 %LE %Long 0x3 ;CCM_CCGR81_CLEAR, clock gating register CCM_CCGR81
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Data.Set A:(0x30388000+0x2C00) %LE %Long 0x10000000 ;USDHC1_CLK_ROOT - MUX=25MHz, DIV=1
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Data.Set A:0x30384514 %LE %Long 0x3 ;CCM_CCGR81_SET, clock gating register CCM_CCGR81
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GOSUB Config_SDHC1
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)
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ELSE IF &nSdhc==2.
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(
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&MMC_BASE=0x30B50000 ;SDHC2
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Data.Set A:0x30384528 %LE %Long 0x3 ;CCM_CCGR82_CLEAR, clock gating register CCM_CCGR82
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Data.Set A:(0x30388000+0x2C80) %LE %Long 0x11000002 ;USDHC2_CLK_ROOT - MUX=25MHz, DIV=1
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Data.Set A:0x30384524 %LE %Long 0x3 ;CCM_CCGR82_SET, clock gating register CCM_CCGR82
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GOSUB Config_SDHC2
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)
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GOSUB READ_ID_TEST
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LOCAL &pdd
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&pdd=OS.PresentDemoDirectory()
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FLASHFILE.RESet
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;FLASHFILE.CONFIG <eMMC controller> <0x0> <0x0>
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FLASHFILE.CONFIG &MMC_BASE 0x0 0x0
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;FLASHFILE.TARGET <<code range>> <<data range>> <<algorithm file>>
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FLASHFILE.TARGET 0x900000++0x1fff 0x902000++0x27ff &pdd/flash/byte/emmc_imx8.bin /KEEP /STACKSIZE 0x200
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;FLASHFILE.TARGET A:0x900000++0x1fff EAHB:0x902000++0x27ff &pdd/flash/byte/emmc_imx8.bin /KEEP /STACKSIZE 0x200 /DUALPORT
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FLASHFILE.GETID
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Data.Set A:&MMC_BASE+0x2C %LE %Long 0x008E0002 ; 25MHz clk
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//Get EXTended CSD registers
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FLASHFILE.GETEXTCSD
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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//When you access to the other partition on the flash
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;FLASHFILE.SETEXTCSD 179. 0x00 ; access: partition null, no boot, access: no boot partition
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;FLASHFILE.SETEXTCSD 179. 0x48 ; access: partition null
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;FLASHFILE.SETEXTCSD 179. 0x49 ; access: partition boot 1
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;FLASHFILE.SETEXTCSD 179. 0x4A ; access: partition boot 2
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FLASHFILE.DUMP 0x0 ; Read NAND
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;FLASHFILE.ERASE 0x0--0xFFFFF ; Erase NAND
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;FLASHFILE.LOAD * 0x0 ; Write NAND
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ENDDO
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Config_SDHC1:
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(
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; --------------------------------------------------------------------------------
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; IO Mux for SDHC1
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; --------------------------------------------------------------------------------
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Data.Set A:0x303300A0 %LE %Long 0x0 ;USDHC1_CLK, IOMUXC_SW_MUX_CTL_PAD_SD1_CLK
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Data.Set A:0x303300A4 %LE %Long 0x0 ;USDHC1_CMD, IOMUXC_SW_MUX_CTL_PAD_SD1_CMD
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Data.Set A:0x303300A8 %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA0
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Data.Set A:0x303300AC %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA1
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Data.Set A:0x303300B0 %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA2
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Data.Set A:0x303300B4 %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA3
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Data.Set A:0x30330308 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_CLK
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Data.Set A:0x3033030C %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_CMD
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Data.Set A:0x30330310 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0
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Data.Set A:0x30330314 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA1
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Data.Set A:0x30330318 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA2
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Data.Set A:0x3033031C %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA3
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; --------------------------------------------------------------------------------
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; Config SDHC
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; --------------------------------------------------------------------------------
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Data.Set A:&MMC_BASE+0x04 %LE %Long 0x00010200 ; blk size,cnt
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Data.Set A:&MMC_BASE+0x28 %LE %Long 0x08800020 ; bus width, endian
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Data.Set A:&MMC_BASE+0x2C %LE %Long 0x008E2008 ; DVS=0, SDCLKFS=0x20 -> 25MHz/64. ~= 400KHz clk
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Data.Set A:&MMC_BASE+0x34 %LE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x38 %LE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x44 %LE %Long 0x00100010 ; read/write fifo threshold level 64bytes
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RETURN
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)
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Config_SDHC2:
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(
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; --------------------------------------------------------------------------------
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; IO Mux for SDHC2
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; --------------------------------------------------------------------------------
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; <tbd>
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; --------------------------------------------------------------------------------
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; Config SDHC
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; --------------------------------------------------------------------------------
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Data.Set A:&MMC_BASE+0x04 %LE %Long 0x00010200 ; blk size,cnt
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Data.Set A:&MMC_BASE+0x28 %LE %Long 0x08800020 ; bus width, endian
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Data.Set A:&MMC_BASE+0x2C %LE %Long 0x008E2008 ; DVS=0, SDCLKFS=0x20 -> 25MHz/64. ~= 400KHz clk
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Data.Set A:&MMC_BASE+0x34 %LE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x38 %LE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x44 %LE %Long 0x00100010 ;read/write fifo threshold level 64bytes
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RETURN
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)
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READ_ID_TEST:
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//CMD0
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RePeaT 2.
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(
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x0 ;cmd
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WAIT 10.ms
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)
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//CMD1
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RePeaT 10.
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(
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x40FF8000 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x01020000 ;cmd1
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WAIT 100.ms
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&resp=Data.Long(A:(&MMC_BASE+0x10))
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//print "CMD1 resp: 0x" &resp
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IF (&resp&0x80000000)==0x80000000
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(
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GOTO jump_cmd2
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)
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)
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PRINT "CMD1 fail"
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END
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jump_cmd2:
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//CMD2
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x02010000 ;cmd2
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WAIT 10.ms
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//CMD3
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0xc %Long 0x03020000 ;cmd3
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WAIT 10.ms
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//CMD10
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0xc %Long 0x0A010000 ;cmd10
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WAIT 10.ms
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//Response2
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PRINT "CID register"
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PRINT "[127:104] 0x" Data.Long(A:(&MMC_BASE+0x1c))
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PRINT "[103:72] 0x" Data.Long(A:(&MMC_BASE+0x18))
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PRINT "[71:40] 0x" Data.Long(A:(&MMC_BASE+0x14))
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PRINT "[39:8] 0x" Data.Long(A:(&MMC_BASE+0x10))
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RETURN
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