227 lines
7.5 KiB
Plaintext
227 lines
7.5 KiB
Plaintext
; --------------------------------------------------------------------------------
|
|
; @Title: Hyper FLASH Program script for the for Traveo-ii CYTVII-B-H-8M
|
|
; @Description:
|
|
; The S26KL512S (Spansion Hyper flash) is connected to the SMIF controller
|
|
;
|
|
; SRAM: 0x28001000
|
|
; SMIF(controller) Base: 0x40420000 or 0x40430000
|
|
; memory mapped: 0x60000000
|
|
;
|
|
; P24_1(GM_CK_R) - HYPERF_CLK/SPIB_CLK
|
|
; P24_2(GM_RWDS_R) - HYPERF_RWDS
|
|
; P24_3(GM_CS#0_R) - HYPERF_CS0
|
|
; P24_4(GM_CS#1_R) - HYPERF_CS1
|
|
; P25_0(GM_DQ0_R) - HYPERF_DQ0
|
|
; P25_1(GM_DQ1_R) - HYPERF_DQ1
|
|
; P25_2(GM_DQ2_R) - HYPERF_DQ2
|
|
; P25_3(GM_DQ3_R) - HYPERF_DQ3
|
|
; P25_4(GM_DQ4_R) - HYPERF_DQ4
|
|
; P25_5(GM_DQ5_R) - HYPERF_DQ5
|
|
; P25_6(GM_DQ6_R) - HYPERF_DQ6
|
|
; P25_7(GM_DQ7_R) - HYPERF_DQ7
|
|
;
|
|
; @Chip: CYT4BF8-CM0+
|
|
; @Board: CYTVII-B-H-8M
|
|
; @Author: JIM
|
|
; @Keywords: ARM, Cortex-M0+ Spansion HyperFlash QuadSPI
|
|
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: cytvii-hyper.cmm 12049 2023-04-20 12:32:16Z bschroefel $
|
|
|
|
&SMIF_BASE=0x40420000
|
|
|
|
PRIVATE ¶meters
|
|
ENTRY %LINE ¶meters
|
|
|
|
PRIVATE ¶m_prepareonly ¶m_cpu ¶m_dualport
|
|
¶m_prepareonly=(STRing.SCAN(STRing.UPpeR("¶meters"),"PREPAREONLY",0)!=-1)
|
|
¶m_cpu=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"CPU=","")
|
|
¶m_dualport=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"DUALPORT=","0")
|
|
|
|
; --------------------------------------------------------------------------------
|
|
; initialize and start the debugger
|
|
RESet
|
|
SYStem.RESet
|
|
SYStem.CPU CYT4BF8-CM0+
|
|
SYStem.CONFIG.DEBUGPORTTYPE JTAG
|
|
IF hardware.COMBIPROBE()||hardware.UTRACE()
|
|
(
|
|
SYStem.CONFIG.CONNECTOR MIPI20T
|
|
)
|
|
SYStem.Option.DUALPORT ON
|
|
SYStem.MemAccess DAP
|
|
SYStem.JtagClock 10MHz
|
|
Trace.DISable
|
|
Break.RESet
|
|
SYStem.Up
|
|
|
|
; ------------------------------------------------------------------------------
|
|
; pin mux setting (alternative function setting)
|
|
GOSUB PIN_MUX
|
|
|
|
; ------------------------------------------------------------------------------
|
|
; spi controller setting
|
|
GOSUB SMIF_INIT
|
|
GOSUB READ_CFI_TEST
|
|
|
|
; Init SRAM (32KB) for the flash algorithm
|
|
Data.Set A:0x28001000++03FFF %Long 0x00000000
|
|
|
|
; ------------------------------------------------------------------------------
|
|
; Flash declaration
|
|
|
|
FLASH.RESet
|
|
FLASH.Create 0x60000000++0x3FFFFFF 0x40000 TARGET Word
|
|
FLASH.TARGET 0x28001000 EAHB:0x28003000 0x2000 ~~/demo/arm/flash/word/hyper_cysmif.bin /DualPort
|
|
|
|
|
|
; Flash script ends here if called with parameter PREPAREONLY
|
|
IF ¶m_prepareonly
|
|
ENDDO PREPAREDONE
|
|
|
|
; ------------------------------------------------------------------------------
|
|
; Flash programming example
|
|
|
|
DIALOG.YESNO "Program flash memory?"
|
|
LOCAL &progflash
|
|
ENTRY &progflash
|
|
IF &progflash
|
|
(
|
|
FLASH.ReProgram.ALL /Erase
|
|
Data.LOAD.auto *
|
|
FLASH.ReProgram.off
|
|
|
|
; Reset device
|
|
SYStem.Down
|
|
SYStem.Up
|
|
)
|
|
|
|
ENDDO
|
|
|
|
|
|
PIN_MUX:
|
|
(
|
|
PER.Set.simple ASD:0x40300180 %Long 0x17171700 ;HSIOM PRT[24]
|
|
PER.Set.simple ASD:0x40300184 %Long 0x00000017 ;HSIOM PRT[24]
|
|
PER.Set.simple ASD:0x40300190 %Long 0x17171717 ;HSIOM PRT[25]
|
|
PER.Set.simple ASD:0x40300194 %Long 0x17171717 ;HSIOM PRT[25]
|
|
|
|
;GPIO pull up, because of the /HOLD pin
|
|
PER.Set.simple ASD:0x40310C14 %Long 0x00080000
|
|
PER.Set.simple ASD:0x40310C44 %Long 0x000EEEE0 ;PRT[24]
|
|
|
|
PER.Set.simple ASD:0x40310C94 %Long 0x00000000
|
|
PER.Set.simple ASD:0x40310CC4 %Long 0xEEEEEEEE
|
|
|
|
RETURN
|
|
)
|
|
|
|
SMIF_INIT:
|
|
(
|
|
PER.Set.simple A:&SMIF_BASE+0x000 %Long 0x0300 ;base->unCTL.u32Register
|
|
PER.Set.simple A:&SMIF_BASE+0x080 %Long 0x0000 ;base->unTX_DATA_FIFO_CTL
|
|
PER.Set.simple A:&SMIF_BASE+0x0C0 %Long 0x0000 ;base->unRX_DATA_MMIO_FIFO_CTL
|
|
PER.Set.simple A:&SMIF_BASE+0x7C8 %Long 0x0000 ;base->unINTR_MASK
|
|
PER.Set.simple A:&SMIF_BASE+0x800 %Long 0x0000 ;base->DEVICE0[idx].unCTL
|
|
PER.Set.simple A:&SMIF_BASE+0x880 %Long 0x0000 ;base->DEVICE1[idx].unCTL
|
|
|
|
PER.Set.simple A:&SMIF_BASE+0x000 %Long 0x2010
|
|
PER.Set.simple A:&SMIF_BASE+0x800 %Long 0x0001 ;base->DEVICE0[idx].unCTL
|
|
PER.Set.simple A:&SMIF_BASE+0x880 %Long 0x0201 ;base->DEVICE1[idx].unCTL
|
|
|
|
PER.Set.simple A:&SMIF_BASE+0x808 %Long 0x60000000 ; ahb address
|
|
PER.Set.simple A:&SMIF_BASE+0x80C %Long 0xF8000000 ; ahb size mask, 0x7FFFFFF 8*16MB
|
|
PER.Set.simple A:&SMIF_BASE+0x820 %Long 0x7 ;
|
|
PER.Set.simple A:&SMIF_BASE+0x840 %Long 0x400700A0 ; Hyper Flash read command
|
|
PER.Set.simple A:&SMIF_BASE+0x844 %Long 0x00070000
|
|
PER.Set.simple A:&SMIF_BASE+0x848 %Long 0x00000000
|
|
PER.Set.simple A:&SMIF_BASE+0x84C %Long 0x4000000A ; set the read latency cycles 10.
|
|
|
|
PER.Set.simple A:&SMIF_BASE+0x850 %Long 0x00070000
|
|
|
|
PER.Set.simple A:&SMIF_BASE+0x100 %Long Data.Long(A:&SMIF_BASE+0x100)&~0x80000000 ;disable cache for ahb address
|
|
PER.Set.simple A:&SMIF_BASE+0x800 %Long 0x80000000 ;enable
|
|
PER.Set.simple A:&SMIF_BASE+0x000 %Long 0x80002011 ;enable AHB
|
|
|
|
RETURN
|
|
)
|
|
|
|
READ_CFI_TEST:
|
|
(
|
|
|
|
PER.Set.simple A:&SMIF_BASE+0x000 %Long 0x00002010 ;disable SMIF
|
|
PER.Set.simple A:&SMIF_BASE+0x000 %Long 0x80002010 ;enable MMIO,SMIF
|
|
|
|
//RESET_HYPERFLASH
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x00172000 ; TX_cmd, cs0, not_end, ddr, 8bit 0x20 0x00
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x001700AA ; TX_cmd, cs0, not_end, ddr, 8bit 0x00 0xAA
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x00176005 ; TX_cmd, cs0, not_end, ddr, 8bit 0x00 0xAA
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x011F0000 ; TX_CNT(with DATA),cs0, end, ddr, 8bit, 1 word (-1)
|
|
Data.Set A:&SMIF_BASE+0x0094 %Long 0x0F0 //write 16word
|
|
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x00172000 ; TX_cmd, cs0, not_end, ddr, 8bit 0x20 0x00
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x001700AA ; TX_cmd, cs0, not_end, ddr, 8bit 0x00 0xAA
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x00176005 ; TX_cmd, cs0, not_end, ddr, 8bit 0x00 0xAA
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x011F0000 ; TX_CNT(with DATA),cs0, end, ddr, 8bit, 1 word (-1)
|
|
Data.Set A:&SMIF_BASE+0x0094 %Long 0x098 //write 16word
|
|
|
|
&addr=0x0
|
|
&rSize=0x80
|
|
&idx=0.
|
|
|
|
Data.Set A:&SMIF_BASE+0x050 %Long 0x0017A000
|
|
Data.Set A:&SMIF_BASE+0x050 %Long 0x00170000|&addr
|
|
Data.Set A:&SMIF_BASE+0x050 %Long 0x00176000
|
|
Data.Set A:&SMIF_BASE+0x050 %Long 0x021F0000|(((&rSize)>>1)-1) //read &rSize bytes (&rSize/2 word)
|
|
|
|
PRINT ""
|
|
PRINT "READ CFI TEST..."
|
|
PRINT "index : data(word)"
|
|
RePeaT &rSize>>2
|
|
(
|
|
GOSUB READ_SMIF_FIFO
|
|
ENTRY &temp
|
|
|
|
IF &idx==16.
|
|
PRINTF " %02d. : 0x%08X ;expect Manufacturer/Device ID and CFI start" &idx &temp
|
|
ELSE IF &idx==32.
|
|
PRINTF " %02d. : 0x%08X ;expect data (0x00520051,'QRY')" &idx &temp
|
|
ELSE
|
|
PRINTF " %02d. : 0x%08X" &idx &temp
|
|
|
|
&idx=&idx+2.
|
|
|
|
)
|
|
|
|
//RESET_HYPERFLASH
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x00172000 ; TX_cmd, cs0, not_end, ddr, 8bit 0x20 0x00
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x001700AA ; TX_cmd, cs0, not_end, ddr, 8bit 0x00 0xAA
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x00176005 ; TX_cmd, cs0, not_end, ddr, 8bit 0x00 0xAA
|
|
Data.Set A:&SMIF_BASE+0x0050 %Long 0x011F0000 ; TX_CNT(with DATA),cs0, end, ddr, 8bit, 1 word (-1)
|
|
Data.Set A:&SMIF_BASE+0x0094 %Long 0x0F0 //write 16word
|
|
|
|
PER.Set.simple A:&SMIF_BASE+0x000 %Long 0x80002011 ;enable AHB
|
|
RETURN
|
|
)
|
|
|
|
|
|
READ_SMIF_FIFO:
|
|
(
|
|
&bkup_pc=Register(pc)
|
|
|
|
Register.Set R6 &SMIF_BASE
|
|
|
|
Data.Assemble ST:0x28040000 movs r0,#0xD8
|
|
Data.Assemble , ldr r0,[r6,r0]
|
|
Data.Assemble , b 0x28040000
|
|
|
|
Register.Set PC 0x28040000
|
|
Step 3.
|
|
|
|
&rdata=Register(r0)
|
|
//print "read: 0x" &rdata
|
|
|
|
Register.Set PC &bkup_pc
|
|
|
|
RETURN &rdata
|
|
) |