; -------------------------------------------------------------------------------- ; @Title: SPEARx On-Chip Peripherals ; @Props: Released ; @Author: ADI, DAW, FIL, MPO ; @Changelog: 2009-05-06 ; @Manufacturer: STM - ST Microelectronics N.V. ; @Doc: UM510_rev1.1.pdf; hcir1_0a.pdf; SPEAr300_UM0.9.pdf ; @Core: ARM926EJ-S ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perspearx.per 7592 2017-02-18 13:54:14Z askoncej $ config 16. 8. width 0xB tree "ARM Core Registers" AUTOINDENT.PUSH AUTOINDENT.OFF width 8. tree "ID Registers" group c15:0x0000--0x0000 line.long 0x0 "MIDR,Identity Code" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer" hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision" hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision" group c15:0x0100--0x0100 line.long 0x0 "CTR,Cache Type" bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes" textline " " bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16" textline " " bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16" group c15:0x0200--0x0200 line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register" bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes" bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes" tree.end tree "MMU Control and Configuration" width 8. group c15:0x0001--0x0001 line.long 0x0 "CR,Control Register" bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable" bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin" bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable" bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable" bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable" bitfld.long 0x0 7. " B ,Endianism" "Little,Big" textline " " bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable" bitfld.long 0x0 0. " M ,MMU" "Disable,Enable" textline " " group c15:0x0002--0x0002 line.long 0x0 "TTBR,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address" textline " " group c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group c15:0x0005--0x0005 line.long 0x0 "DFSR,Data Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x0105--0x0105 line.long 0x0 "IFSR,Instruction Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x0006--0x0006 line.long 0x0 "DFAR,Data Fault Address Register" textline " " group c15:0x000a--0x000a line.long 0x0 "TLBR,TLB Lockdown Register" bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. " P ,P bit" "0,1" textline " " group c15:0x000d--0x000d line.long 0x0 "FCSEPID,FCSE Process ID" group c15:0x010d--0x010d line.long 0x0 "CONTEXT,Context ID" tree.end tree "Cache Control and Configuration" group c15:0x0009--0x0009 line.long 0x0 "DCACHE,Data Cache Lockdown" bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1" bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1" bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1" bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1" group c15:0x0109--0x0109 line.long 0x0 "ICACHE,Instruction Cache Lockdown" bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1" bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1" bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1" bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1" tree.end tree "TCM Control and Configuration" group c15:0x0019--0x0019 line.long 0x0 "DTCM,Data TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address" bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res" bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable" group c15:0x0119--0x0119 line.long 0x0 "ITCM,Instruction TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address" bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res" bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable" tree.end tree "Test and Debug" group c15:0x000f--0x000f line.long 0x0 "DOVRR,Debug Override Register" bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable" bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort" bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort" textline " " bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable" bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable" bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable" bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT" group c15:0x001f--0x001f line.long 0x0 "ADDRESS,Debug/Test Address" ;wgroup c15:0x402f--0x402f ; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry" ;wgroup c15:0x403f--0x403f ; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry" ;wgroup c15:0x404f--0x404f ; line.long 0x0 "RMTLBPA,Read PA in main TLB entry" ;wgroup c15:0x405f--0x405f ; line.long 0x0 "WMTLBPA,Write PA in main TLB entry" ;wgroup c15:0x407f--0x407f ; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM" ;wgroup c15:0x412f--0x412f ; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry" ;wgroup c15:0x413f--0x413f ; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry" ;wgroup c15:0x414f--0x414f ; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry" ;wgroup c15:0x415f--0x415f ; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry" ;wgroup c15:0x417f--0x417f ; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM" group c15:0x101f--0x101f line.long 0x0 "TRACE,Trace Control" bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall" bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall" group c15:0x700f--0x700f line.long 0x0 "CACHE,Cache Debug Control" bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through" bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable" bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable" group c15:0x701f--0x701f line.long 0x0 "MMU,MMU Debug Control" bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable" bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable" bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable" bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable" textline " " bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable" bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable" bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable" bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable" group c15:0x002f--0x002f line.long 0x0 "REMAP,Memory Region Remap" bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB" bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB" textline " " bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB" bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB" tree.end tree "ICEbreaker" width 8. group ice:0x0--0x5 "Debug Control" line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled" bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled" textline " " bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled" bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled" bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x4 "DBGSTAT,Debug Status Register" bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res" bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java" bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb" bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1" bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled" bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x8 "VECTOR,Vector Catch Register" bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena" bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena" bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena" bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena" bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena" bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena" bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena" line.long 0x10 "COMCTRL,Debug Communication Control Register" bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend" bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend" line.long 0x14 "COMDATA,Debug Communication Data Register" group ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" tree.end AUTOINDENT.POP tree.end tree.open "MISC (Miscellaneous registers)" tree.open "Local space" tree "Region 1" base asd:0xfca80000 sif (cpu()=="SPEAR600") width 17. rgroup.long 0x00++0x03 "SOC main configuration parameters" line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" bitfld.long 0x00 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " bitfld.long 0x00 18. " DUAL_CORE ,Processors number currently embedded inside the SoC" "Single,Dual" textline " " bitfld.long 0x00 17. " NAND_DISAB ,Nand flash interface disable" "No,Yes" textline " " bitfld.long 0x00 16. " NAND_16B ,Nand flash interface 8/16bit data width configuration type" "8 bit,8/16 bit" textline " " bitfld.long 0x00 13. " FULL_RAS_MODE ,SoC operating mode" "SoC,RAS" textline " " bitfld.long 0x00 11. " EXPI_IOBRG_ENB ,Enable predisposition AHB expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " EXPI_RAS_ENB ,Enable programmable logic master/slave internal ports" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EXPI_CLK_SRC ,Expansion interface source clock and reset definition" "External src. clk & reset signals,Clk and reset signals from internal logic" textline " " bitfld.long 0x00 8. " EXPI_ITF_ENB ,Enable expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " SOC_APPLIC ,SoC application scheme" "Standalone application,I/O bridge connectivity,Dual chip solution (self_cfg5),Dual chip solution (self_cfg4)" textline " " bitfld.long 0x00 0.--5. " SOC_CFG ,SoC operating mode" "Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg7,Reserved,Self_cfg0,Self_cfg1,Self_cfg2,Self_cfg3,Self_cfg4,Self_cfg5,Self_cfg6,Self_cfg7,Self_cfg8,Self_cfg9" group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 14.--15. " DEBUG_FREEZ ,Enable timer and watch dog clock freeze" "Processor-1/processor-2,Processor-2,Processor-1/processor-2,Processor-1" textline " " bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 0.--2. " SOC_DBG ,Spear600 debug configuration" "Dbg_disab,Dbg_jtag1,Dbg_jtag2,Dbg_jtagd,Dbg_jtage,Dbg_etm1,Dbg_etm2,Dbg_etma" group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode,Sync. mode,Reserved,Async. mode,?..." textline " " bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "30Mhz Oscillator,Programmable PL_CLK(2) sig.,Sync. Mode,?..." textline " " bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "30Mhz Oscillator,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" if (((data.long(asd:0xfca80000+0x24))&0x3000)==0x00) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfca80000+0x24))&0x3000)==0x1000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfca80000+0x24))&0x3000)==0x2000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel/)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel/)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" else group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" endif group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR5_FREEZ ,General purpose timer 5 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 16. " GPTMR4_FREEZ ,General purpose timer 4 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 15. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 14. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 12. " GPTMR5_CLKSEL ,General purpose timer-5 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR4_CLKSEL ,General purpose timer-4 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 10. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 9. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" textline " " bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK (2) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" textline " " bitfld.long 0x00 2.--3. " CLCD_CLKSEL ,Color LCD display source clock definition" "48Mhz,CLCD Clock Synthesizer,Programmable PL_CLK (3) signal,?..." textline " " bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 30. " DDR_ENB ,DDR memory controller clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDRCORE_CLKENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDRCTRL_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" bitfld.long 0x04 26. " USBH2_CLKENB ,Enable usb2 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " GMAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" bitfld.long 0x04 22. " CLCD_CLKENB ,Enable color lcd controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO3_CLKENB ,Enable gpio-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 16. " GPTM3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" bitfld.long 0x04 14. " SSP3_CLKENB ,Enable ssp-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GPIO4_CLKENB ,Enable gpio-4 clock" "Disabled,Enabled" bitfld.long 0x04 12. " GPTM5_CLKENB ,Enable general purpose timer-5 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " GPTM4_CLKENB ,Enable general purpose timer-4 clock" "Disabled,Enabled" bitfld.long 0x04 10. " IRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " FSMC_CLKENB ,Enable nand flash controller clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 6. " SSP2_CLKENB ,Enable ssp-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SSP1_CLKENB ,Enable ssp-1 clock" "Disabled,Enabled" bitfld.long 0x04 4. " UART2_CLKENB ,Enable uart-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART1_CLKENB ,Enable uart-1 clock" "Disabled,Enabled" bitfld.long 0x04 2. " ARM2_CLKENB ,Enable Arm-2 subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ARM1_CLKENB ,Enable Arm-1 subsystem clock" "Disabled,Enabled" bitfld.long 0x04 0. " ARM1_ENB ,Enable Arm1 clock gating functionality" "Disabled,Enabled" group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (0) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_CLKENB ,Enable 125Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" group.long 0x50++0x07 line.long 0x00 "AMEM_CLK_CFG,AMEM_CLK_CFG Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory port-2 soft reset command" "No reset,Reset" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory port-2 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory port-2 source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory port-2 clock gating functionality" "Disabled,Enabled" line.long 0x04 "EXPI_CLK_CFG,EXPI_CLK_CFG Register" hexmask.long.byte 0x04 24.--31. 1. " EXPI_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x04 16.--23. 1. " EXPI_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x04 15. " EXPI_RST ,Ahb expansion interface reset command" "No reset,Reset" bitfld.long 0x04 14. " EXPI_LOPBCK ,Ahb expansion interface loopback" "Disabled,Enabled" textline " " bitfld.long 0x04 12.--13. " EXPI_COMPR_SEL ,Expansion interface bus compression scheme definition" "Reserved,Reserved,Low compression,?..." bitfld.long 0x04 11. " EXPI_CLK_RETIM ,Expi internal clock retiming functionality" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " EXPI_CLK_ENB ,Expansion interface clock gating functionality" "Disabled,Enabled" bitfld.long 0x04 9. " EXPI_RST ,Expansion interface soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 8. " EXPI_DMA_CFG[3] ,Expansion interface DMA channel 3 transfer type definition" "DMA single word,DMA burst" bitfld.long 0x04 7. " EXPI_DMA_CFG[2] ,Expansion interface DMA channel 2 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " EXPI_DMA_CFG[1] ,Expansion interface DMA channel 1 transfer type definition" "Disabled,Enabled" bitfld.long 0x04 5. " EXPI_DMA_CFG[0] ,Expansion interface DMA channel 0 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EXPI_SYNT_ENB ,Expi clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x04 1.--3. " EXPI_CLK_SEL ,Expansion interface source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." textline " " bitfld.long 0x04 0. " PORTCTR_CLK_ENB ,Port controller logic clock gating functionality" "Disabled,Enabled" group.long 0x5c--0x7b "Auxiliary clock synthesizer Registers" line.long 0x0 "CLCD_CLK_SYNT,CLCD_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "GMAC_CLK_SYNT,GMAC_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x1C "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x1C 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x1C 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x1C 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x1C 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 "Soft reset control" line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 30. " DDR_ENBR ,DDR memory controller reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDRCORE_SWRST ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDRCTRL_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " USBH2_SWRST ,Active usb2 host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" bitfld.long 0x00 23. " GMAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CLCD_SWRST ,Active color lcd controller reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO3_SWRST ,Active gpio-3 reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SSP3_SWRST ,Active ssp-3 reset" "Disabled,Enabled" bitfld.long 0x00 13. " GPIO4_SWRST ,Active gpio-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " GPTM5_SWRST ,Active general purpose timer-5 reset" "Disabled,Enabled" bitfld.long 0x00 11. " GPTM4_SWRST ,Active general purpose timer-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IRDA_SWRST ,Active irda reset" "Disabled,Enabled" bitfld.long 0x00 9. " FSMC_SWRST ,Active nand flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SSP2_SWRST ,Active ssp-2 reset" "Disabled,Enabled" bitfld.long 0x00 5. " SSP1_SWRST ,Active ssp-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UART2_SWRST ,Active uart-2 reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARM2_SWRST ,Active Arm-2 subsystem reset" "Disabled,Enabled" bitfld.long 0x00 1. " ARM1_SWRST ,Active Arm-1 subsystem reset" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ARM1_ENBR ,Arm1 reset enable" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" width 15. group.long 0x7c--0x9f "SoC configuration basic parameter" line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xb0++0x03 line.long 0x00 "ICM10_ARB_CFG,ICM10_ARB_CFG Register" bitfld.long 0x00 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x00 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0f line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHA15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,Expi_7 out(rfu),?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHA14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,Expi_7 inp(rfu),?..." textline " " bitfld.long 0x00 26.--27. " DMA_CFG_CHA13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,Expi_6 out(rfu),?..." bitfld.long 0x00 24.--25. " DMA_CFG_CHA12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,Expi_6 inp(rfu),?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHA11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,Expi_5 out(rfu),?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHA10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,Expi_5 inp(rfu),?..." textline " " bitfld.long 0x00 18.--19. " DMA_CFG_CHA09 ,Dma channel 9 configuration scheme" "SPP1 out,RAS_4 out,Expi_4 out(rfu),?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHA08 ,Dma channel 8 configuration scheme" "SPP1 inp,RAS_4 inp,Expi_4 inp(rfu),?..." textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHA07 ,Dma channel 7 configuration scheme" "SPP3 out,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHA06 ,Dma channel 6 configuration scheme" "SPP3 inp,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHA05 ,Dma channel 5 configuration scheme" "Uart2 out,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHA04 ,Dma channel 4 configuration scheme" "Uart2 inp,RAS_2 inp,?..." textline " " bitfld.long 0x00 6.--7. " DMA_CFG_CHA03 ,Dma channel 3 configuration scheme" "Uart1 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHA02 ,Dma channel 2 configuration scheme" "Uart1 inp,RAS_1 inp,Expi_1 in/out,?..." textline " " bitfld.long 0x00 2.--3. " DMA_CFG_CHA01 ,Dma channel 1 configuration scheme" "SPP2 out,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHA00 ,Dma channel 0 configuration scheme" "SPP2 inp,RAS_0 inp,Expi_0 in/out,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 14. " RXERROR3_USBH2 ,Usb receiver error 3" "No error,Error" bitfld.long 0x04 13. " RXERROR2_USBH1 ,Usb receiver error 2" "No error,Error" textline " " bitfld.long 0x04 12. " RXERROR1_USBDV ,Usb receiver error 1" "No error,Error" bitfld.long 0x04 10. " PHYRESET_CHN3 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 9. " PHYRESET_CHN2 ,Usb2 triple phy soft reset command" "No reset,Reset" bitfld.long 0x04 8. " PHYRESET_CHN1 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" bitfld.long 0x04 1. " PLL_PWDN ,USB phy Pll3 power down" "Enabled,Powered down" textline " " bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "GMII_txclk125' signal,PLL2 output clock,30Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" line.long 0x0c "EXPI_CFG_CTR,EXPI_CFG_CTR Register" bitfld.long 0x0C 28.--31. " ML3ICM9_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" bitfld.long 0x0C 27. " ML3H2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " ML3H2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 25. " ML3H2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 24. " ML3H2H_CLKSYNC ,Asynchronous bridge master/slave clock type definition" "Asynchronous,Synchronous" bitfld.long 0x0C 20.--23. " IC8EH2H_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" textline " " bitfld.long 0x0C 19. " EXPI_INTOUT_REQ ,Expansion interface software interrupt output request" "Not requested,Requested" bitfld.long 0x0C 18. " ICM8EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " ICM8EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 16. " ICM8EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 15. " ICM8EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 14. " ICM8EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 13. " ICM8EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 12. " ICM8EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " EXPI_FULLADDR_ENB ,Enable full 32 bit haddr on expi interface" "Least 24 bit,32 bit" bitfld.long 0x0C 6. " ICM9EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ICM9EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 4. " ICM9EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 3. " ICM9EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 2. " ICM9EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 1. " ICM9EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 0. " ICM9EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" width 15. group.long 0xc0++0x1f "Inter-processor communication functionality" line.long 0x0 "PRC1_LOCK_CTR,PRC1_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" line.long 0x4 "PRC2_LOCK_CTR,PRC2_LOCK_CTR Register" bitfld.long 0x4 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x4 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x4 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x4 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x4 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x4 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x4 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x4 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x4 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x4 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x4 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x4 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x4 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x4 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" line.long 0x8 "PRC3_LOCK_CTR,PRC3_LOCK_CTR Register" bitfld.long 0x8 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x8 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x8 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x8 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x8 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x8 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x8 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x8 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x8 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x8 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x8 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x8 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x8 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x8 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x8 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x8 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x8 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" line.long 0xC "PRC4_LOCK_CTR,PRC4_LOCK_CTR Register" bitfld.long 0xC 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0xC 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0xC 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0xC 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0xC 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0xC 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0xC 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0xC 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0xC 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0xC 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0xC 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0xC 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0xC 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0xC 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0xC 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0xC 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0xC 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" line.long 0x10 "PRC1_IRQ_CTR,PRC1_IRQ_CTR Register" bitfld.long 0x10 21. " INT1_REQ_PRC4_2 ,Pending Proc-4 irq. Line-2" "Not pending,Pending" bitfld.long 0x10 20. " INT1_REQ_PRC4_1 ,Pending Proc-4 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x10 19. " INT1_REQ_PRC3_2 ,Pending Proc-3 irq. Line-2" "Not pending,Pending" bitfld.long 0x10 18. " INT1_REQ_PRC3_1 ,Pending Proc-3 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x10 17. " INT1_REQ_PRC2_2 ,Pending Proc-2 irq. Line-2" "Not pending,Pending" bitfld.long 0x10 16. " INT1_REQ_PRC2_1 ,Pending Proc-2 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x10 5. " INT4_REQ_PRC1_2 ,Interrupt request for the Proc-4 irq. Line-2" "Not requested,Requested" bitfld.long 0x10 4. " INT4_REQ_PRC1_1 ,Interrupt request for the Proc-4 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x10 3. " INT3_REQ_PRC1_2 ,Interrupt request for the Proc-3 irq. Line-2" "Not requested,Requested" bitfld.long 0x10 2. " INT3_REQ_PRC1_1 ,Interrupt request for the Proc-3 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x10 1. " INT2_REQ_PRC1_2 ,Interrupt request for the Proc-2 irq. Line-2" "Not requested,Requested" bitfld.long 0x10 0. " INT2_REQ_PRC1_1 ,Interrupt request for the Proc-2 irq. Line-1" "Not requested,Requested" line.long 0x14 "PRC2_IRQ_CTR,PRC2_IRQ_CTR Register" bitfld.long 0x14 21. " INT2_REQ_PRC4_2 ,Pending Proc-4 irq. Line-2" "Not pending,Pending" bitfld.long 0x14 20. " INT2_REQ_PRC4_1 ,Pending Proc-4 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x14 19. " INT2_REQ_PRC3_2 ,Pending Proc-3 irq. Line-2" "Not pending,Pending" bitfld.long 0x14 18. " INT2_REQ_PRC3_1 ,Pending Proc-3 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x14 17. " INT2_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x14 16. " INT2_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x14 5. " INT4_REQ_PRC2_2 ,Interrupt request for the Proc-4 irq. Line-2" "Not requested,Requested" bitfld.long 0x14 4. " INT4_REQ_PRC2_1 ,Interrupt request for the Proc-4 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x14 3. " INT3_REQ_PRC2_2 ,Interrupt request for the Proc-3 irq. Line-2" "Not requested,Requested" bitfld.long 0x14 2. " INT3_REQ_PRC2_1 ,Interrupt request for the Proc-3 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x14 1. " INT1_REQ_PRC2_2 ,Interrupt request for the Proc-1 irq. Line-2" "Not requested,Requested" bitfld.long 0x14 0. " INT1_REQ_PRC2_1 ,Interrupt request for the Proc-1 irq. Line-1" "Not requested,Requested" line.long 0x18 "PRC3_IRQ_CTR,PRC3_IRQ_CTR Register" bitfld.long 0x18 21. " INT3_REQ_PRC4_2 ,Pending Proc-4 irq. Line-2" "Not pending,Pending" bitfld.long 0x18 20. " INT3_REQ_PRC4_1 ,Pending Proc-4 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x18 19. " INT3_REQ_PRC2_2 ,Pending Proc-2 irq. Line-2" "Not pending,Pending" bitfld.long 0x18 18. " INT3_REQ_PRC2_1 ,Pending Proc-2 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x18 17. " INT3_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x18 16. " INT3_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x18 5. " INT4_REQ_PRC3_2 ,Interrupt request for the Proc-4 irq. Line-2" "Not requested,Requested" bitfld.long 0x18 4. " INT4_REQ_PRC3_1 ,Interrupt request for the Proc-4 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x18 3. " INT2_REQ_PRC3_2 ,Interrupt request for the Proc-2 irq. Line-2" "Not requested,Requested" bitfld.long 0x18 2. " INT2_REQ_PRC3_1 ,Interrupt request for the Proc-2 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x18 1. " INT1_REQ_PRC3_2 ,Interrupt request for the Proc-1 irq. Line-2" "Not requested,Requested" bitfld.long 0x18 0. " INT1_REQ_PRC3_1 ,Interrupt request for the Proc-1 irq. Line-1" "Not requested,Requested" line.long 0x1c "PRC4_IRQ_CTR,PRC4_IRQ_CTR Register" bitfld.long 0x1c 21. " INT4_REQ_PRC3_2 ,Pending Proc-3 irq. Line-2" "Not pending,Pending" bitfld.long 0x1c 20. " INT4_REQ_PRC3_1 ,Pending Proc-3 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x1c 19. " INT4_REQ_PRC2_2 ,Pending Proc-2 irq. Line-2" "Not pending,Pending" bitfld.long 0x1c 18. " INT4_REQ_PRC2_1 ,Pending Proc-2 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x1c 17. " INT4_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x1c 16. " INT4_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x1c 5. " INT3_REQ_PRC4_2 ,Interrupt request for the Proc-3 irq. Line-2" "Not requested,Requested" bitfld.long 0x1c 4. " INT3_REQ_PRC4_1 ,Interrupt request for the Proc-3 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x1c 3. " INT2_REQ_PRC4_2 ,Interrupt request for the Proc-2 irq. Line-2" "Not requested,Requested" bitfld.long 0x1c 2. " INT2_REQ_PRC4_1 ,Interrupt request for the Proc-2 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x1c 1. " INT1_REQ_PRC4_2 ,Interrupt request for the Proc-1 irq. Line-2" "Not requested,Requested" bitfld.long 0x1c 0. " INT1_REQ_PRC4_1 ,Interrupt request for the Proc-1 irq. Line-1" "Not requested,Requested" width 17. group.long 0xe0++0x13 "Special configuration parameters" line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " wakeup_fiq_enb ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Fiq" line.long 0x4 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" hexmask.long.byte 0x4 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x4 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x4 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x4 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x4 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x4 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x4 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x4 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x8 "COMPSSTL_2V5_CFG,COMPSSTL_2V5_CFG Register" hexmask.long.byte 0x8 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x8 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x8 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x8 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x8 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x8 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x8 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x8 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x0c "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" hexmask.long.byte 0x0c 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x0c 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x0c 4. " sts_ok ,Valid code compensation" "Low,High" textline " " bitfld.long 0x0c 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x0c 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x0c 1. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x0c 0. " EN ,Compensation cell internal command parameter" "Low,High" line.long 0x10 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" bitfld.long 0x10 31. " LVDS_BENGUP_ENB ,Pad LVDS bang-up enable" "Enabled,Disabled" textline " " bitfld.long 0x10 16.--19. " SWKEY_DDRSEL ,External memory interface configuration type" "HW memory auto-conf.,Reserved,Reserved,Reserved,Reserved,Reserved,SW memory conf.,?..." textline " " bitfld.long 0x10 15. " DRAM_TYPE ,Memory interface configuration type" "DDR1,DDR2" bitfld.long 0x10 14. " COM_REF ,Internal/External SSTL common reference voltage definition" "Internal,External" textline " " bitfld.long 0x10 12. " PSEUDO_DIF_DIS ,DQS0;1 SSTL pad differential/single ended configuration type" "Differential,Single ended" bitfld.long 0x10 10.--11. " NDQS_PDN/PU_SEL ,Programmable nDQS0;1 Pull down/up functionality connected with PDCLKB signal of SSTL differential pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 3. " DRIVE_MODE_S_W ,SSTL pad drive strain mode" "Strong,Weak" textline " " bitfld.long 0x10 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" bitfld.long 0x10 0. " SSTL_SEL ,SW Memory model selection" "DDR1(SSTL2V5),DDR2(SSTL1V8)" group.long 0xf4++0x27 "Memory bist execution control" line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(LCDC palette Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" textline " " bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" textline " " bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" textline " " bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Gmac_rxfifo)" "Disabled,Run" bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Gmac_txfifo)" "Disabled,Run" textline " " bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" bitfld.long 0x00 1. " RBACT1[01] ,Run bist execution command(Usb_host_2)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host_1)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras buf. Sp1Kx32_1:8)" "Disabled,Run" bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras buf. Dp1Kx32_1:4)" "Disabled,Run" textline " " bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras buf. Sp2Kx32_1:4)" "Disabled,Run" bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras hwac.Sp48x128_1:3)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras buf. Dp512Kx32_1:8)" "Disabled,Run" bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras buf. Sp512x32_9:16)" "Disabled,Run" textline " " bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras buf. Sp512x32_1:8)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(Rbact (arm-1) memory pool)" "Disabled,Run" line.long 0x10 "BIST5_CFG_CTR,BIST5_CFG_CTR Register" bitfld.long 0x10 31. " BIST5_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x10 28. " BIST5_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x10 24.--27. " BIST5_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x10 0. " RBACT5[00] ,Run bist execution command(Rbact (arm-2) memory pool)" "Disabled,Run" line.long 0x14 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x14 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x14 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x14 13. " BBAD1[13] ,Bist execution result(LCDC palette Fifo)" "Not failed,Failed" bitfld.long 0x14 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x14 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x14 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x14 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x14 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x14 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x14 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x14 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x14 4. " BBAD1[04] ,Bist execution result(Gmac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x14 3. " BBAD1[03] ,Bist execution result(Gmac_txfifo)" "Not failed,Failed" bitfld.long 0x14 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x14 1. " BBAD1[01] ,Bist execution result(Usb_host_2)" "Not failed,Failed" bitfld.long 0x14 0. " BBAD1[00] ,Bist execution result(Usb_host_1)" "Not failed,Failed" line.long 0x18 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x18 31. " BIST2_end ,End memory bist2 execution" "Pending,Ended" bitfld.long 0x18 18. " BBAD2[18] ,Bist execution result(Ras buf. Sp1Kx32_8)" "Not failed,Failed" textline " " bitfld.long 0x18 17. " BBAD2[17] ,Bist execution result(Ras buf. Sp1Kx32_7)" "Not failed,Failed" bitfld.long 0x18 16. " BBAD2[16] ,Bist execution result(Ras buf. Sp1Kx32_6)" "Not failed,Failed" textline " " bitfld.long 0x18 15. " BBAD2[15] ,Bist execution result(Ras buf. Sp1Kx32_5)" "Not failed,Failed" bitfld.long 0x18 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 8. " BBAD2[08] ,Bist execution result(Ras buf. Dp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 7. " BBAD2[07] ,Bist execution result(Ras buf. Dp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 6. " BBAD2[06] ,Bist execution result(Ras buf. Sp2Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 5. " BBAD2[05] ,Bist execution result(Ras buf. Sp2Kx32_3)" "Not failed,Failed" bitfld.long 0x18 4. " BBAD2[04] ,Bist execution result(Ras buf. Sp2Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 3. " BBAD2[03] ,Bist execution result(Ras buf. Sp2Kx32_1)" "Not failed,Failed" bitfld.long 0x18 2. " BBAD2[02] ,Bist execution result(Ras hwacc.Sp48x128_3)" "Not failed,Failed" textline " " bitfld.long 0x18 1. " BBAD2[01] ,Bist execution result(Ras hwacc.Sp48x128_2)" "Not failed,Failed" bitfld.long 0x18 0. " BBAD2[00] ,Bist execution result(Ras hwacc.Sp48x128_1)" "Not failed,Failed" line.long 0x1c "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x1c 31. " BIST3_end ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x1c 23. " BBAD3[23] ,Bist execution result(Ras buf. Dp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 22. " BBAD3[22] ,Bist execution result(Ras buf. Dp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 21. " BBAD3[21] ,Bist execution result(Ras buf. Dp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 20. " BBAD3[20] ,Bist execution result(Ras buf. Dp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 19. " BBAD3[19] ,Bist execution result(Ras buf. Dp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 18. " BBAD3[18] ,Bist execution result(Ras buf. Dp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 17. " BBAD3[17] ,Bist execution result(Ras buf. Dp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 16. " BBAD3[16] ,Bist execution result(Ras buf. Dp512x32_1)" "Not failed,Failed" bitfld.long 0x1c 15. " BBAD3[15] ,Bist execution result(Ras buf. Sp512x32_16)" "Not failed,Failed" textline " " bitfld.long 0x1c 14. " BBAD3[14] ,Bist execution result(Ras buf. Sp512x32_15)" "Not failed,Failed" bitfld.long 0x1c 13. " BBAD3[13] ,Bist execution result(Ras buf. Sp512x32_14)" "Not failed,Failed" textline " " bitfld.long 0x1c 12. " BBAD3[12] ,Bist execution result(Ras buf. Sp512x32_13)" "Not failed,Failed" bitfld.long 0x1c 11. " BBAD3[11] ,Bist execution result(Ras buf. Sp512x32_12)" "Not failed,Failed" textline " " bitfld.long 0x1c 10. " BBAD3[10] ,Bist execution result(Ras buf. Sp512x32_11)" "Not failed,Failed" bitfld.long 0x1c 9. " BBAD3[09] ,Bist execution result(Ras buf. Sp512x32_10)" "Not failed,Failed" textline " " bitfld.long 0x1c 8. " BBAD3[08] ,Bist execution result(Ras buf. Sp512x32_9)" "Not failed,Failed" bitfld.long 0x1c 7. " BBAD3[07] ,Bist execution result(Ras buf. Sp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 6. " BBAD3[06] ,Bist execution result(Ras buf. Sp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 5. " BBAD3[05] ,Bist execution result(Ras buf. Sp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 4. " BBAD3[04] ,Bist execution result(Ras buf. Sp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 3. " BBAD3[03] ,Bist execution result(Ras buf. Sp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 2. " BBAD3[02] ,Bist execution result(Ras buf. Sp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 1. " BBAD3[01] ,Bist execution result(Ras buf. Sp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 0. " BBAD3[00] ,Bist execution result(Ras buf. Sp512x32_1)" "Not failed,Failed" line.long 0x20 "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x20 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x20 19. " BBAD4[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 18. " BBAD4[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 17. " BBAD4[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 16. " BBAD4[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 15. " BBAD4[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 14. " BBAD4[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x20 13. " BBAD4[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x20 12. " BBAD4[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x20 11. " BBAD4[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 10. " BBAD4[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 9. " BBAD4[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 8. " BBAD4[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 7. " BBAD4[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 6. " BBAD4[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 5. " BBAD4[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 4. " BBAD4[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 3. " BBAD4[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 2. " BBAD4[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x20 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" line.long 0x24 "BIST5_STS_RES,BIST5_STS_RES Register" bitfld.long 0x24 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x24 19. " BBAD[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 18. " BBAD[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 17. " BBAD[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 16. " BBAD[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 15. " BBAD[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 14. " BBAD[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x24 13. " BBAD[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x24 12. " BBAD[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x24 11. " BBAD[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 10. " BBAD[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 9. " BBAD[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 8. " BBAD[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 7. " BBAD[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 6. " BBAD[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 5. " BBAD[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 4. " BBAD[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 3. " BBAD[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 2. " BBAD[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x24 1. " BBAD[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 0. " BBAD[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 "Diagnostic functionality" line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 21. " EXPI_EH2HS_ERR ,Expansion interface write deferred error" "No error,Error" textline " " bitfld.long 0x00 20. " EXPI_EH2HM_ERR ,Expansion interface write deferred error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXP_ERR_ENB ,Enable AHB Expansion interface write deferred error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 16.--23. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" textline " " hexmask.long.byte 0x00 8.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" hexmask.long.byte 0x00 0.--7. 1. " CUSTOM_ID ,Customization type" rgroup.long 0x3c++0x03 line.long 0x00 "SOC_USER_ID,SOC_USER_ID Register" hexmask.long.word 0x00 16.--31. 1. " Spear_magic_number ,Spear magic number" width 0xb else width 18. rgroup.long 0x00++0x03 line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x0 6.--18. 1. " FIXED ,Fixed Value" textline " " endif bitfld.long 0x0 0.--5. " SOC_CFG ,SoC operating mode" "Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,?..." group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 15. " DEBUG_FREEZ ,Enable freeze condition when processor enters in debug mode" "Disabled,Enabled" bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 4.--5. " SOC_DBG6 ,Spear300 debug configuration" "Dbg_disab,Dbg_etm1,Dbg_jtag1,?..." group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL2_MOD,PLL2_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Sync. mode PLL2,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,Sync. mode PLL1,?..." textline " " else bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Reserved,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,?..." textline " " endif bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(4) sig.,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI24_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI24_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" bitfld.long 0x00 16. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" bitfld.long 0x00 12. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK(3) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 31. " C3_CLOCK_ENB ,C3 clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDR_CORE_ENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDR_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 26. " USBH_CLOCK ,Enable usb ehci host reset" "Disabled,Enabled" textline " " endif bitfld.long 0x04 25. " USBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" bitfld.long 0x04 23. " MAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO_CLKENB ,Enable gpio clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " GPT3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" bitfld.long 0x04 11. " GPT2_CLKENB ,Enable general purpose timer-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " FIRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 5. " SSP_CLKENB ,Enable ssp clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART_CLKENB ,Enable uart clock" "Disabled,Enabled" bitfld.long 0x04 1. " ARM_CLKENB ,Enable Arm subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ARM_ENB ,Enable Arm clock gating functionality" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 20.--23. 1. " SOC_PLATFORM ,Soc_platform" textline " " hexmask.long.byte 0x00 16.--22. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" hexmask.long.byte 0x00 10.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" textline " " hexmask.long.byte 0x00 4.--7. 1. " TECH_TYPE ,Tech Type" endif group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (4) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CLK24M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.long 0x50++0x03 line.long 0x00 "AMEM_CFG_CTRL,AMEM_CFG_CTRL Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X(7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y(7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory Port-1 soft reset" "Disabled,Enabled" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory Port-1 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory Port-1 source clock" "HCLK,PLL1,PLL2,Ras_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory Port-1 clock gate" "Disabled,Enabled" endif group.long 0x60++0x1b line.long 0x0 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "MAC_CLK_SYNT,MAC_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 31. " C3_RESET ,C3 reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDR_CORE_ENBR ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDR_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26. " USBH1_EHCI_SWRST ,Active usb1 ehci host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_OHCI_SWRST ,Active usb1 ohci host reset" "Disabled,Enabled" textline " " else bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" endif bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO_SWRST ,Active gpio reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" bitfld.long 0x00 12. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " GPTM2_SWRST ,Active general purpose timer-2 reset" "Disabled,Enabled" bitfld.long 0x00 10. " FIRDA_SWRST ,Active firda reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SSP_SWRST ,Active ssp reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart reset" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARM_SWRST ,Active Arm subsystem reset" "Disabled,Enabled" bitfld.long 0x00 0. " ARM_ENBR ,Arm reset enable" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0x3C++0x03 line.long 0x00 "SOC_USER_ID,SOC User ID Register" hexmask.long.byte 0x00 27.--31. 1. " USER_ID ,User Id" hexmask.long.byte 0x00 16.--23. 1. " USER_VERSION ,User Version" textline " " hexmask.long.byte 0x00 10.--15. 1. " USER_VERSION ,User Version" endif group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK24M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" group.long 0x7c--0x9f line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0b line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHAN15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHAN14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,?..." else bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "Reserved,RAS_6 out,?..." endif bitfld.long 0x00 24.--25. " DMA_CFG_CHAN12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHAN11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHAN10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SSP0 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SSP0 inp,RAS_4 inp,?..." else bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SPI1 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SPI1 inp,RAS_4 inp,?..." endif textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHAN07 ,Dma channel 7 configuration scheme" "Reserved,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHAN06 ,Dma channel 6 configuration scheme" "Reserved,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHAN05 ,Dma channel 5 configuration scheme" "Reserved,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHAN04 ,Dma channel 4 configuration scheme" "Reserved,RAS_2 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart0 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart0 inp,RAS_1 inp,?..." textline " " else bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart inp,RAS_1 inp,?..." textline " " endif bitfld.long 0x00 2.--3. " DMA_CFG_CHAN01 ,Dma channel 1 configuration scheme" "Reserved,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHAN00 ,Dma channel 0 configuration scheme" "Reserved,RAS_0 inp,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 0. " PLL_PWDN ,State of PLL blocks" "Powered up,Powered down" else bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x08 "MAC_CFG_CTR,MAC_CFG_CTR Register" bitfld.long 0x08 4. " MAC_SYNT_ENB ,Mac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " MAC_CLK_SEL ,Mac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" else line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" endif sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0xc0++0x07 line.long 0x0 "PRC1_LOCK_CTR,PRC1_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" line.long 0x4 "PRC2_LOCK_CTR,PRC2_LOCK_CTR Register" bitfld.long 0x4 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x4 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x4 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x4 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x4 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x4 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x4 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x4 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x4 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x4 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x4 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x4 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x4 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x4 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x07 line.long 0x00 "PRC1_IRQ_CTR,PRC1_IRQ_CTR Register" bitfld.long 0x00 2. " INT2_REQ_PRC1_1 ,Interrupt request for the Proc-3 irq. Line-1" "Not requested,Requested" line.long 0x04 "PRC2_IRQ_CTR,PRC2_IRQ_CTR Register" bitfld.long 0x04 17. " INT2_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x04 16. " INT2_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" endif group.long 0xe0++0x07 line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " WAKEUP_FIQ_ENB ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Firq" line.long 0x04 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" bitfld.long 0x04 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x04 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " hexmask.long.byte 0x04 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x04 4. " COMPOK ,Valid code compensation" "Not valid,Valid" textline " " bitfld.long 0x04 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x04 2. " FREEZE ,Freeze command" "Not frozen,Frozen" textline " " bitfld.long 0x04 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x04 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" group.long 0xec++0x07 line.long 0x00 "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" bitfld.long 0x00 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x00 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.byte 0x00 16.--22. 1. " NASRC ,Copy of code on compensation bus" textline " " endif bitfld.long 0x00 4. " COMPOK ,Valid code compensation" "Low,High" bitfld.long 0x00 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" textline " " bitfld.long 0x00 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x00 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x00 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x04 "DDR_PAD,DDR_PAD Register" else line.long 0x04 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" endif bitfld.long 0x04 15.--18. " DDR_SW_MODE ,External memory interface configuration type" "HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,SW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf." bitfld.long 0x04 14. " DDR_EN_PAD ,DDR (Low Power) or DDR2 (RO)" "DDR2,DDR low power" textline " " bitfld.long 0x04 13. " REFSSTL ,Internal/External SSTL common reference voltage definition" "Internal,External" bitfld.long 0x04 12. " GATE_OPEN_MODE ,GATE_OPEN_MODE" "Low,High" textline " " bitfld.long 0x04 10. " ENZI ,Input buffer enable" "Disabled,Enabled" bitfld.long 0x04 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x04 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 3. " S_W_MODE ,SSTL pad drive strain mode" "Strong,Weak" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "200MHz,266MHz,333MHz,?..." else bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" endif bitfld.long 0x04 0. " DDR_LOW_POWER_DDR2_MODE ,SW Memory model selection" "DDR2,DDR low power" group.long 0xf4++0xf line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" textline " " bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(Application SubSys.)" "Disabled,Run" bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" textline " " bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" textline " " bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" textline " " bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Mac_rxfifo)" "Disabled,Run" textline " " bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Mac_txfifo)" "Disabled,Run" bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras local data buffer 0)" "Disabled,Run" textline " " bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras local data buffer 1)" "Disabled,Run" bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras HWACC data buffer)" "Disabled,Run" textline " " bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras HWACC data desc.)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras local data buffer 2)" "Disabled,Run" textline " " bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras local data buffer 3_0)" "Disabled,Run" bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras local data buffer 3_1)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x0c 7. " RBACT4[07] ,Run bist execution command(ARM926CM_MMU)" "Disabled,Run" textline " " bitfld.long 0x0c 6. " RBACT4[06] ,Run bist execution command(ARM926CM_IValid)" "Disabled,Run" bitfld.long 0x0c 5. " RBACT4[05] ,Run bist execution command(ARM926CM_ITag)" "Disabled,Run" textline " " bitfld.long 0x0c 4. " RBACT4[04] ,Run bist execution command(ARM926CM_ICAche)" "Disabled,Run" bitfld.long 0x0c 3. " RBACT4[03] ,Run bist execution command(ARM926CM_DValid)" "Disabled,Run" textline " " bitfld.long 0x0c 2. " RBACT4[02] ,Run bist execution command(ARM926CM_DTag)" "Disabled,Run" bitfld.long 0x0c 1. " RBACT4[01] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" rgroup.long 0x108++0xf line.long 0x00 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x00 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x00 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x00 13. " BBAD1[13] ,Bist execution result(Application SubSys.)" "Not failed,Failed" bitfld.long 0x00 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x00 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x00 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x00 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x00 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x00 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x00 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x00 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x00 4. " BBAD1[04] ,Bist execution result(Mac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x00 3. " BBAD1[03] ,Bist execution result(Mac_txfifo)" "Not failed,Failed" bitfld.long 0x00 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD1[00] ,Bist execution result(Usb_host)" "Not failed,Failed" line.long 0x04 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x04 31. " BIST2_END ,End memory bist2 execution" "Pending,Ended" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc SpDp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc SpDp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc SpDp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc SpDp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc SpDp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc SpDp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc SpDp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc SpDp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr Dp96x128)" "Not failed,Failed" else bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp8K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Sp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc dp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc dp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc dp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc dp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc dp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc dp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc dp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc dp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr dp96x128)" "Not failed,Failed" endif line.long 0x08 "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x08 31. " BIST3_END ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x08 13. " BBAD3[13] ,Bist execution result(Ras buf. sp2K8_8)" "Not failed,Failed" textline " " bitfld.long 0x08 12. " BBAD3[12] ,Bist execution result(Ras buf. sp2K8_7)" "Not failed,Failed" bitfld.long 0x08 11. " BBAD3[11] ,Bist execution result(Ras buf. sp2K8_6)" "Not failed,Failed" textline " " bitfld.long 0x08 10. " BBAD3[10] ,Bist execution result(Ras buf. sp2K8_5)" "Not failed,Failed" bitfld.long 0x08 9. " BBAD3[09] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 8. " BBAD3[08] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 7. " BBAD3[07] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 6. " BBAD3[06] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" bitfld.long 0x08 5. " BBAD3[05] ,Bist execution result(Ras buf. sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 4. " BBAD3[04] ,Bist execution result(Ras buf. sp4K8_1)" "Not failed,Failed" bitfld.long 0x08 3. " BBAD3[03] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 2. " BBAD3[02] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 1. " BBAD3[01] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 0. " BBAD3[00] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" line.long 0x0c "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x0c 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x0c 13. " BBAD4[13] ,Bist execution result(Arm ddata Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x0c 12. " BBAD4[12] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x0c 11. " BBAD4[11] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x0c 10. " BBAD4[10] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x0c 9. " BBAD4[09] ,Bist execution result(Arm dtag Sp256Kx22)" "Not failed,Failed" textline " " bitfld.long 0x0c 8. " BBAD4[08] ,Bist execution result(Arm dcvalid Sp32x24)" "Not failed,Failed" bitfld.long 0x0c 7. " BBAD4[07] ,Bist execution result(Arm dcdirty Sp128x8)" "Not failed,Failed" textline " " bitfld.long 0x0c 6. " BBAD4[06] ,Bist execution result(Arm iicdata Sp1kx32_4)" "Not failed,Failed" bitfld.long 0x0c 5. " BBAD4[05] ,Bist execution result(Arm iicdata Sp1kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x0c 4. " BBAD4[04] ,Bist execution result(Arm iicdata Sp1kx32_2)" "Not failed,Failed" bitfld.long 0x0c 3. " BBAD4[03] ,Bist execution result(Arm icdata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x0c 2. " BBAD4[02] ,Bist execution result(Arm itag Sp128x88)" "Not failed,Failed" bitfld.long 0x0c 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32x24)" "Not failed,Failed" textline " " bitfld.long 0x0c 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" rgroup.long 0x118++0x03 sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x00 "BIST5_RSLT_REG,BIST5_RSLT_REG Register" else line.long 0x00 "BIST5_STS_RES,BIST5_STS_RES Register" endif bitfld.long 0x00 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x00 19. " BBAD5[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 18. " BBAD5[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 17. " BBAD5[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 16. " BBAD5[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 15. " BBAD5[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 14. " BBAD5[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x00 13. " BBAD5[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x00 12. " BBAD5[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x00 11. " BBAD5[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 10. " BBAD5[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 9. " BBAD5[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 8. " BBAD5[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 7. " BBAD5[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 6. " BBAD5[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 5. " BBAD5[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 4. " BBAD5[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 3. " BBAD5[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 2. " BBAD5[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x00 1. " BBAD5[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD5[00] ,Bist execution result(ARM MMU Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" endif textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" textline " " bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "USB0_TUN_PRM,USB0_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x124++0x03 line.long 0x00 "USB1_TUN_PRM,USB1_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x128++0x03 line.long 0x00 "USB2_TUN_PRM,USB2_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x130++0x13 line.long 0x00 "PLGPIO0_PAD_PRG,PLGPIO0_PAD_PRG Register" bitfld.long 0x00 31. " PDN_UART ,Pull down control for UART lines" "No effect,Pull down" bitfld.long 0x00 30. " PUP_UART ,Pull up control for UART lines" "No effect,Pull up" textline " " bitfld.long 0x00 29. " PDN_5 ,Pull down control for pads 20,21,22,23" "No effect,Pull down" bitfld.long 0x00 28. " PUP_5 ,Pull up control for pads 20,21,22,23" "No effect,Pull up" textline " " bitfld.long 0x00 26.--27. " DRV_5 ,Drive strength control for pads 20, 21,22, 23" "0,1,2,3" bitfld.long 0x00 25. " SLEW_5 ,Slew rate control for pads 20,21,22,23" "Low,High" textline " " bitfld.long 0x00 24. " PDN_4 ,Pull down control for pads 16,17,18,19" "No effect,Pull down" bitfld.long 0x00 23. " PUP_4 ,Pull up control for pads 16,17,18,19" "No effect,Pull up" textline " " bitfld.long 0x00 21.--22. " DRV_4 ,Drive strength control for pads 16,17,18,19" "0,1,2,3" bitfld.long 0x00 20. " SLEW_4 ,Slew control for pads 16,17,18,19" "Low,High" textline " " bitfld.long 0x00 19. " PDN_3 ,Pull down control for pads 12,13,14,15" "No effect,Pull down" bitfld.long 0x00 18. " PUP_3 ,Pull up control for pads 12,13,14,15" "No effect,Pull up" textline " " bitfld.long 0x00 16.--17. " DRV_3 ,Drive strength control for pads PL-GPIO 15, 14, 13 and 12" "0,1,2,3" bitfld.long 0x00 15. " SLEW_3 ,Slew control for pads 12,13,14,15" "Low,High" textline " " bitfld.long 0x00 14. " PDN_2 ,Pull down control for pads 8,9" "No effect,Pull down" bitfld.long 0x00 13. " PUP_2 ,Pull up control for pads 8,9" "No effect,Pull up" textline " " bitfld.long 0x00 11.--12. " DRV_2 ,Drive strength control for pads 8,9,10,11" "0,1,2,3" bitfld.long 0x00 10. " SLEW_2 ,Slew control for pads 8,9,10,11" "Low,High" textline " " bitfld.long 0x00 9. " PDN_1 ,Pull down control for pads 6,7" "No effect,Pull down" bitfld.long 0x00 8. " PUP_1 ,Pull up control for pads 6,7" "No effect,Pull up" textline " " bitfld.long 0x00 6.--7. " DRV_1 ,Drive strength control for pads 4,5,6,7" "0,1,2,3" bitfld.long 0x00 5. " SLEW_1 ,Slew control for pads 4,5,6,7" "Low,High" textline " " bitfld.long 0x00 4. " PDN_0 ,Pull down control for pads 0,1" "No effect,Pull down" bitfld.long 0x00 3. " PUP_0 ,Pull up control for pads 0,1" "No effect,Pull up" textline " " bitfld.long 0x00 1.--2. " DRV_0 ,Drive strength control for pads 0,1,2,3" "0,1,2,3" bitfld.long 0x00 0. " SLEW_0 ,Slew control for pads 0,1,2,3" "Low,High" line.long 0x04 "PLGPIO1_PAD_PRG,PLGPIO1_PAD_PRG Register" bitfld.long 0x04 31. " PDN_I2C ,Pull down control for I2C lines" "No effect,Pull down" bitfld.long 0x04 30. " PUP_I2C ,Pull up control for I2C lines" "No effect,Pull up" textline " " bitfld.long 0x04 29. " PDN_11 ,Pull down control for pads 45,46,47" "No effect,Pull down" bitfld.long 0x04 28. " PUP_11 ,Pull up control for pads 45,46,47" "No effect,Pull up" textline " " bitfld.long 0x04 26.--27. " DRV_11 ,Drive strength control for pads 44,45,46,47" "0,1,2,3" bitfld.long 0x04 25. " SLEW_11 ,Slew control for pads 44,45,46,47" "Low,High" textline " " bitfld.long 0x04 24. " PDN_10 ,Pull down control for pads 40,41,42,43,44" "No effect,Pull down" bitfld.long 0x04 23. " PUP_10 ,Pull up control for pads 40,41,42,43,44" "No effect,Pull up" textline " " bitfld.long 0x04 21.--22. " DRV_10 ,Drive strength control for pads 40,41,42,43" "0,1,2,3" bitfld.long 0x04 20. " SLEW_10 ,Slew control for pads 40,41,42,43" "Low,High" textline " " bitfld.long 0x04 19. " PDN_9 ,Pull down control for pads 37,38,39" "No effect,Pull down" bitfld.long 0x04 18. " PUP_9 ,Pull up control for pads 37,38,39" "No effect,Pull up" textline " " bitfld.long 0x04 16.--17. " DRV_9 ,Drive strength control for pads 36,37,38,39" "0,1,2,3" bitfld.long 0x04 15. " SLEW_9 ,Slew control for pads 36,37,38,39" "Low,High" textline " " bitfld.long 0x04 14. " PDN_8 ,Pull down control for pads 32,33,34,35,36" "No effect,Pull down" bitfld.long 0x04 13. " PUP_8 ,Pull up control for pads 32,33,34,35,36" "No effect,Pull up" textline " " bitfld.long 0x04 11.--12. " DRV_8 ,Drive strength control for pads 32,33,34,35" "0,1,2,3" bitfld.long 0x04 10. " SLEW_8 ,Slew control for pads 32,33,34,35" "Low,High" textline " " bitfld.long 0x04 9. " PDN_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull down" bitfld.long 0x04 8. " PUP_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull up" textline " " bitfld.long 0x04 6.--7. " DRV_7 ,Pull up control for pads 28,29,30,31" "0,1,2,3" bitfld.long 0x04 5. " SLEW_7 ,Drive Strength control for pads 28,29,30,31" "Low,High" textline " " bitfld.long 0x04 4. " PDN_6 ,Pull down control for pads 24,25,26,27" "No effect,Pull down" bitfld.long 0x04 3. " PUP_6 ,Pull up control for pads 24,25,26,27" "No effect,Pull up" textline " " bitfld.long 0x04 1.--2. " DRV_6 ,Drive strength control for pads 24,25,26,27" "0,1,2,3" bitfld.long 0x04 0. " SLEW_6 ,Slew rate control for PL-GPIO 27, 26, 25, and 24" "Low,High" line.long 0x08 "PLGPIO2_PAD_PRG,PLGPIO2_PAD_PRG Register" bitfld.long 0x08 31. " PDN_ETHERNET ,Pull down control for ETHERNET" "No effect,Pull down" bitfld.long 0x08 30. " PUP_ETHERNET ,Pull up control for ETHERNET" "No effect,Pull up" textline " " bitfld.long 0x08 29. " PDN_17 ,Pull down control for pads 68,69,70,71" "No effect,Pull down" bitfld.long 0x08 28. " PUP_17 ,Pull up control for pads 68,69,70,71" "No effect,Pull up" textline " " bitfld.long 0x08 26.--27. " DRV_17 ,Drive strength control for pads 68,69,70,71" "0,1,2,3" bitfld.long 0x08 25. " SLEW_17 ,Slew control for pads 68,69,70,71" "Low,High" textline " " bitfld.long 0x08 24. " PDN_16 ,Pull down control for pads 64,65,66,67" "No effect,Pull down" bitfld.long 0x08 23. " PUP_16 ,Pull up control for pads 64,65,66,67" "No effect,Pull up" textline " " bitfld.long 0x08 21.--22. " DRV_16 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 20. " SLEW_16 ,Slew control for pads 64,65,66,67" "Low,High" textline " " bitfld.long 0x08 19. " PDN_15 ,Pull down control for pads 60,61,62,63" "No effect,Pull down" bitfld.long 0x08 18. " PUP_15 ,Pull up control for pads 60,61,62,63" "No effect,Pull up" textline " " bitfld.long 0x08 16.--17. " DRV_15 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 15. " SLEW_15 ,Slew rate control for pads 60,61,62,63" "Low,High" textline " " bitfld.long 0x08 14. " PDN_14 ,Pull down control for pads 56,57,58,59" "No effect,Pull down" bitfld.long 0x08 13. " PUP_14 ,Pull up control for pads 56,57,58,59" "No effect,Pull up" textline " " bitfld.long 0x08 11.--12. " DRV_14 ,Drive strength control for pads 56,57,58,59" "0,1,2,3" bitfld.long 0x08 10. " SLEW_14 ,Slew control for pads 56,57,58,59" "Low,High" textline " " bitfld.long 0x08 9. " PDN_13 ,Pull down control for pads 52,53,54,55" "No effect,Pull down" bitfld.long 0x08 8. " PUP_13 ,Pull up control for pads 52,53,54,55" "No effect,Pull up" textline " " bitfld.long 0x08 6.--7. " DRV_13 ,Pull up control for pads 52,53,54,55" "0,1,2,3" bitfld.long 0x08 5. " SLEW_13 ,Drive strength control for pads 52,53,54,55" "Low,High" textline " " bitfld.long 0x08 4. " PDN_12 ,Pull down control for pads 48,49,50,51" "No effect,Pull down" bitfld.long 0x08 3. " PUP_12 ,Pull up control for pads 48,49,50,51" "No effect,Pull up" textline " " bitfld.long 0x08 1.--2. " DRV_12 ,Drive strength control for pads 48,49,50,51" "0,1,2,3" bitfld.long 0x08 0. " SLEW_12 ,Slew control for pads 48,49,50,51" "Low,High" line.long 0x0c "PLGPIO3_PAD_PRG,PLGPIO3_PAD_PRG Register" bitfld.long 0x0C 29. " PDN_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull down" bitfld.long 0x0C 28. " PUP_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull up" textline " " bitfld.long 0x0C 26.--27. " DRV_23 ,Drive strength control for pad 92,93,94,95" "0,1,2,3" bitfld.long 0x0C 25. " SLEW_23 ,Slew control for pads 92,93,94,95" "Low,High" textline " " bitfld.long 0x0C 24. " PDN_22 ,Pull down control for pads 88,89,90,91" "No effect,Pull down" bitfld.long 0x0C 23. " PUP_22 ,Pull up control for pads 88,89,90,91" "No effect,Pull up" textline " " bitfld.long 0x0C 21.--22. " DRV_22 ,Drive strength control for pads 88,89,90,91" "0,1,2,3" bitfld.long 0x0C 20. " SLEW_22 ,Slew control for pads 88,89,90,91" "Low,High" textline " " bitfld.long 0x0C 19. " PDN_21 ,Pull down control for pads 84,85,86,87" "No effect,Pull down" bitfld.long 0x0C 18. " PUP_21 ,Pull up control for pads 84,85,86,87" "No effect,Pull up" textline " " bitfld.long 0x0C 16.--17. " DRV_21 ,Drive strength control for pads 84,85,86,87" "0,1,2,3" bitfld.long 0x0C 15. " SLEW_21 ,Slew rate control for pads 84,85,86,87" "Low,High" textline " " bitfld.long 0x0C 14. " PDN_20 ,Pull down control for pads 80,81,82,83" "No effect,Pull down" bitfld.long 0x0C 13. " PUP_20 ,Pull up control for pads 80,81,82,83" "No effect,Pull up" textline " " bitfld.long 0x0C 11.--12. " DRV_20 ,Drive strength control for pads 80,81,82,83" "0,1,2,3" bitfld.long 0x0C 10. " SLEW_20 ,Slew rate control for pads 80,81,82,83" "Low,High" textline " " bitfld.long 0x0C 9. " PDN_19 ,Pull down control for pads 76,77,78,79" "No effect,Pull down" bitfld.long 0x0C 8. " PUP_19 ,Pull up control for pads 76,77,78,79" "No effect,Pull up" textline " " bitfld.long 0x0C 6.--7. " DRV_19 ,Drive strength control for pads 76,77,78,79" "0,1,2,3" bitfld.long 0x0C 5. " SLEW_19 ,Slew rate control for pads 76,77,78,79" "Low,High" textline " " bitfld.long 0x0C 4. " PDN_18 ,Pull down control for pads 72,72,74,75" "No effect,Pull down" bitfld.long 0x0C 3. " PUP_18 ,Pull up control for pads 72,72,74,75" "No effect,Pull up" textline " " bitfld.long 0x0C 1.--2. " DRV_18 ,Drive strength control for pads 72,72,74,75" "0,1,2,3" bitfld.long 0x0C 0. " SLEW_18 ,Slew rate control for pads 72,72,74,75" "Low,High" line.long 0x10 "PLGPIO4_PAD_PRG,PLGPIO4_PAD_PRG Register" bitfld.long 0x10 24. " PDN_CLK4 ,Pull down control for CLK4" "No effect,Pull down" bitfld.long 0x10 23. " PUP_CLK4 ,Pull up control for pads CLK4" "No effect,Pull up" textline " " bitfld.long 0x10 21.--22. " DRV_CLK4 ,Drive strength control for pads CLK4" "0,1,2,3" bitfld.long 0x10 20. " SLEW_CLK4 ,Slew rate control for pads CLK4" "Low,High" textline " " bitfld.long 0x10 19. " PDN_CLK3 ,Pull down control for pads CLK3" "No effect,Pull down" bitfld.long 0x10 18. " PUP_CLK3 ,Pull up control for pads CLK3" "No effect,Pull up" textline " " bitfld.long 0x10 16.--17. " DRV_CLK3 ,Drive strength control for pads CLK3" "0,1,2,3" bitfld.long 0x10 15. " SLEW_CLK3 ,Slew control for pads CLK3" "Low,High" textline " " bitfld.long 0x10 14. " PDN_CLK2 ,Pull down control for pads CLK2" "No effect,Pull down" bitfld.long 0x10 13. " PUP_CLK2 ,Pull up control for pads CLK2" "No effect,Pull up" textline " " bitfld.long 0x10 11.--12. " DRV_CLK2 ,Drive strength control for pads CLK2" "0,1,2,3" bitfld.long 0x10 10. " SLEW_CLK2 ,Slew rate control for pads CLK2" "Low,High" textline " " bitfld.long 0x10 9. " PDN_CLK1 ,Pull down control for pads CLK1" "No effect,Pull down" bitfld.long 0x10 8. " PUP_CLK1 ,Pull up control for pads CLK1" "No effect,Pull up" textline " " bitfld.long 0x10 6.--7. " DRV_CLK1 ,Drive strength control for pads CLK1" "0,1,2,3" bitfld.long 0x10 5. " SLEW_CLK1 ,Slew control for CLK1 and pads 96,97" "Low,High" textline " " bitfld.long 0x10 4. " PDN_24 ,Pull down control for pads 96,97" "No effect,Pull down" bitfld.long 0x10 3. " PUP_24 ,Pull up control for pads 96,97" "No effect,Pull up" textline " " bitfld.long 0x10 1.--2. " DRV_24 ,Drive strength control for pads 96,97" "0,1,2,3" width 0xb endif tree.end sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") tree "Region 2" base asd:0xfca90000 sif (cpu()=="SPEAR600") width 17. rgroup.long 0x00++0x03 "SOC main configuration parameters" line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" bitfld.long 0x00 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " bitfld.long 0x00 18. " DUAL_CORE ,Processors number currently embedded inside the SoC" "Single,Dual" textline " " bitfld.long 0x00 17. " NAND_DISAB ,Nand flash interface disable" "No,Yes" textline " " bitfld.long 0x00 16. " NAND_16B ,Nand flash interface 8/16bit data width configuration type" "8 bit,8/16 bit" textline " " bitfld.long 0x00 13. " FULL_RAS_MODE ,SoC operating mode" "SoC,RAS" textline " " bitfld.long 0x00 11. " EXPI_IOBRG_ENB ,Enable predisposition AHB expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " EXPI_RAS_ENB ,Enable programmable logic master/slave internal ports" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EXPI_CLK_SRC ,Expansion interface source clock and reset definition" "External src. clk & reset signals,Clk and reset signals from internal logic" textline " " bitfld.long 0x00 8. " EXPI_ITF_ENB ,Enable expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " SOC_APPLIC ,SoC application scheme" "Standalone application,I/O bridge connectivity,Dual chip solution (self_cfg5),Dual chip solution (self_cfg4)" textline " " bitfld.long 0x00 0.--5. " SOC_CFG ,SoC operating mode" "Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg7,Reserved,Self_cfg0,Self_cfg1,Self_cfg2,Self_cfg3,Self_cfg4,Self_cfg5,Self_cfg6,Self_cfg7,Self_cfg8,Self_cfg9" group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 14.--15. " DEBUG_FREEZ ,Enable timer and watch dog clock freeze" "Processor-1/processor-2,Processor-2,Processor-1/processor-2,Processor-1" textline " " bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 0.--2. " SOC_DBG ,Spear600 debug configuration" "Dbg_disab,Dbg_jtag1,Dbg_jtag2,Dbg_jtagd,Dbg_jtage,Dbg_etm1,Dbg_etm2,Dbg_etma" group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode,Sync. mode,Reserved,Async. mode,?..." textline " " bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "30Mhz Oscillator,Programmable PL_CLK(2) sig.,Sync. Mode,?..." textline " " bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "30Mhz Oscillator,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" if (((data.long(asd:0xfca90000+0x24))&0x3000)==0x00) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfca90000+0x24))&0x3000)==0x1000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfca90000+0x24))&0x3000)==0x2000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel/)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel/)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" else group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" endif group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR5_FREEZ ,General purpose timer 5 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 16. " GPTMR4_FREEZ ,General purpose timer 4 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 15. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 14. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 12. " GPTMR5_CLKSEL ,General purpose timer-5 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR4_CLKSEL ,General purpose timer-4 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 10. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 9. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" textline " " bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK (2) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" textline " " bitfld.long 0x00 2.--3. " CLCD_CLKSEL ,Color LCD display source clock definition" "48Mhz,CLCD Clock Synthesizer,Programmable PL_CLK (3) signal,?..." textline " " bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 30. " DDR_ENB ,DDR memory controller clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDRCORE_CLKENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDRCTRL_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" bitfld.long 0x04 26. " USBH2_CLKENB ,Enable usb2 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " GMAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" bitfld.long 0x04 22. " CLCD_CLKENB ,Enable color lcd controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO3_CLKENB ,Enable gpio-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 16. " GPTM3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" bitfld.long 0x04 14. " SSP3_CLKENB ,Enable ssp-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GPIO4_CLKENB ,Enable gpio-4 clock" "Disabled,Enabled" bitfld.long 0x04 12. " GPTM5_CLKENB ,Enable general purpose timer-5 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " GPTM4_CLKENB ,Enable general purpose timer-4 clock" "Disabled,Enabled" bitfld.long 0x04 10. " IRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " FSMC_CLKENB ,Enable nand flash controller clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 6. " SSP2_CLKENB ,Enable ssp-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SSP1_CLKENB ,Enable ssp-1 clock" "Disabled,Enabled" bitfld.long 0x04 4. " UART2_CLKENB ,Enable uart-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART1_CLKENB ,Enable uart-1 clock" "Disabled,Enabled" bitfld.long 0x04 2. " ARM2_CLKENB ,Enable Arm-2 subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ARM1_CLKENB ,Enable Arm-1 subsystem clock" "Disabled,Enabled" bitfld.long 0x04 0. " ARM1_ENB ,Enable Arm1 clock gating functionality" "Disabled,Enabled" group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (0) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_CLKENB ,Enable 125Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" group.long 0x50++0x07 line.long 0x00 "AMEM_CLK_CFG,AMEM_CLK_CFG Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory port-2 soft reset command" "No reset,Reset" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory port-2 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory port-2 source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory port-2 clock gating functionality" "Disabled,Enabled" line.long 0x04 "EXPI_CLK_CFG,EXPI_CLK_CFG Register" hexmask.long.byte 0x04 24.--31. 1. " EXPI_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x04 16.--23. 1. " EXPI_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x04 15. " EXPI_RST ,Ahb expansion interface reset command" "No reset,Reset" bitfld.long 0x04 14. " EXPI_LOPBCK ,Ahb expansion interface loopback" "Disabled,Enabled" textline " " bitfld.long 0x04 12.--13. " EXPI_COMPR_SEL ,Expansion interface bus compression scheme definition" "Reserved,Reserved,Low compression,?..." bitfld.long 0x04 11. " EXPI_CLK_RETIM ,Expi internal clock retiming functionality" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " EXPI_CLK_ENB ,Expansion interface clock gating functionality" "Disabled,Enabled" bitfld.long 0x04 9. " EXPI_RST ,Expansion interface soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 8. " EXPI_DMA_CFG[3] ,Expansion interface DMA channel 3 transfer type definition" "DMA single word,DMA burst" bitfld.long 0x04 7. " EXPI_DMA_CFG[2] ,Expansion interface DMA channel 2 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " EXPI_DMA_CFG[1] ,Expansion interface DMA channel 1 transfer type definition" "Disabled,Enabled" bitfld.long 0x04 5. " EXPI_DMA_CFG[0] ,Expansion interface DMA channel 0 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EXPI_SYNT_ENB ,Expi clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x04 1.--3. " EXPI_CLK_SEL ,Expansion interface source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." textline " " bitfld.long 0x04 0. " PORTCTR_CLK_ENB ,Port controller logic clock gating functionality" "Disabled,Enabled" group.long 0x5c--0x7b "Auxiliary clock synthesizer Registers" line.long 0x0 "CLCD_CLK_SYNT,CLCD_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "GMAC_CLK_SYNT,GMAC_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x1C "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x1C 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x1C 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x1C 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x1C 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 "Soft reset control" line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 30. " DDR_ENBR ,DDR memory controller reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDRCORE_SWRST ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDRCTRL_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " USBH2_SWRST ,Active usb2 host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" bitfld.long 0x00 23. " GMAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CLCD_SWRST ,Active color lcd controller reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO3_SWRST ,Active gpio-3 reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SSP3_SWRST ,Active ssp-3 reset" "Disabled,Enabled" bitfld.long 0x00 13. " GPIO4_SWRST ,Active gpio-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " GPTM5_SWRST ,Active general purpose timer-5 reset" "Disabled,Enabled" bitfld.long 0x00 11. " GPTM4_SWRST ,Active general purpose timer-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IRDA_SWRST ,Active irda reset" "Disabled,Enabled" bitfld.long 0x00 9. " FSMC_SWRST ,Active nand flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SSP2_SWRST ,Active ssp-2 reset" "Disabled,Enabled" bitfld.long 0x00 5. " SSP1_SWRST ,Active ssp-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UART2_SWRST ,Active uart-2 reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARM2_SWRST ,Active Arm-2 subsystem reset" "Disabled,Enabled" bitfld.long 0x00 1. " ARM1_SWRST ,Active Arm-1 subsystem reset" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ARM1_ENBR ,Arm1 reset enable" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" width 15. group.long 0x7c--0x9f "SoC configuration basic parameter" line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xb0++0x03 line.long 0x00 "ICM10_ARB_CFG,ICM10_ARB_CFG Register" bitfld.long 0x00 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x00 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0f line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHA15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,Expi_7 out(rfu),?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHA14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,Expi_7 inp(rfu),?..." textline " " bitfld.long 0x00 26.--27. " DMA_CFG_CHA13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,Expi_6 out(rfu),?..." bitfld.long 0x00 24.--25. " DMA_CFG_CHA12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,Expi_6 inp(rfu),?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHA11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,Expi_5 out(rfu),?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHA10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,Expi_5 inp(rfu),?..." textline " " bitfld.long 0x00 18.--19. " DMA_CFG_CHA09 ,Dma channel 9 configuration scheme" "SPP1 out,RAS_4 out,Expi_4 out(rfu),?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHA08 ,Dma channel 8 configuration scheme" "SPP1 inp,RAS_4 inp,Expi_4 inp(rfu),?..." textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHA07 ,Dma channel 7 configuration scheme" "SPP3 out,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHA06 ,Dma channel 6 configuration scheme" "SPP3 inp,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHA05 ,Dma channel 5 configuration scheme" "Uart2 out,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHA04 ,Dma channel 4 configuration scheme" "Uart2 inp,RAS_2 inp,?..." textline " " bitfld.long 0x00 6.--7. " DMA_CFG_CHA03 ,Dma channel 3 configuration scheme" "Uart1 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHA02 ,Dma channel 2 configuration scheme" "Uart1 inp,RAS_1 inp,Expi_1 in/out,?..." textline " " bitfld.long 0x00 2.--3. " DMA_CFG_CHA01 ,Dma channel 1 configuration scheme" "SPP2 out,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHA00 ,Dma channel 0 configuration scheme" "SPP2 inp,RAS_0 inp,Expi_0 in/out,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 14. " RXERROR3_USBH2 ,Usb receiver error 3" "No error,Error" bitfld.long 0x04 13. " RXERROR2_USBH1 ,Usb receiver error 2" "No error,Error" textline " " bitfld.long 0x04 12. " RXERROR1_USBDV ,Usb receiver error 1" "No error,Error" bitfld.long 0x04 10. " PHYRESET_CHN3 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 9. " PHYRESET_CHN2 ,Usb2 triple phy soft reset command" "No reset,Reset" bitfld.long 0x04 8. " PHYRESET_CHN1 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" bitfld.long 0x04 1. " PLL_PWDN ,USB phy Pll3 power down" "Enabled,Powered down" textline " " bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "GMII_txclk125' signal,PLL2 output clock,30Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" line.long 0x0c "EXPI_CFG_CTR,EXPI_CFG_CTR Register" bitfld.long 0x0C 28.--31. " ML3ICM9_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" bitfld.long 0x0C 27. " ML3H2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " ML3H2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 25. " ML3H2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 24. " ML3H2H_CLKSYNC ,Asynchronous bridge master/slave clock type definition" "Asynchronous,Synchronous" bitfld.long 0x0C 20.--23. " IC8EH2H_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" textline " " bitfld.long 0x0C 19. " EXPI_INTOUT_REQ ,Expansion interface software interrupt output request" "Not requested,Requested" bitfld.long 0x0C 18. " ICM8EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " ICM8EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 16. " ICM8EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 15. " ICM8EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 14. " ICM8EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 13. " ICM8EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 12. " ICM8EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " EXPI_FULLADDR_ENB ,Enable full 32 bit haddr on expi interface" "Least 24 bit,32 bit" bitfld.long 0x0C 6. " ICM9EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ICM9EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 4. " ICM9EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 3. " ICM9EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 2. " ICM9EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 1. " ICM9EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 0. " ICM9EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" width 15. group.long 0xc0++0x03 "Inter-processor communication functionality" line.long 0x0 "PRC2_LOCK_CTR,PRC2_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x03 line.long 0x00 "PRC2_IRQ_CTR,PRC2_IRQ_CTR Register" bitfld.long 0x00 21. " INT2_REQ_PRC4_2 ,Pending Proc-4 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 20. " INT2_REQ_PRC4_1 ,Pending Proc-4 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 19. " INT2_REQ_PRC3_2 ,Pending Proc-3 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 18. " INT2_REQ_PRC3_1 ,Pending Proc-3 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 17. " INT2_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 16. " INT2_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 5. " INT4_REQ_PRC2_2 ,Interrupt request for the Proc-4 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 4. " INT4_REQ_PRC2_1 ,Interrupt request for the Proc-4 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x00 3. " INT3_REQ_PRC2_2 ,Interrupt request for the Proc-3 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 2. " INT3_REQ_PRC2_1 ,Interrupt request for the Proc-3 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x00 1. " INT1_REQ_PRC2_2 ,Interrupt request for the Proc-1 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 0. " INT1_REQ_PRC2_1 ,Interrupt request for the Proc-1 irq. Line-1" "Not requested,Requested" width 17. group.long 0xe0++0x13 "Special configuration parameters" line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " wakeup_fiq_enb ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Fiq" line.long 0x4 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" hexmask.long.byte 0x4 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x4 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x4 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x4 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x4 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x4 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x4 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x4 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x8 "COMPSSTL_2V5_CFG,COMPSSTL_2V5_CFG Register" hexmask.long.byte 0x8 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x8 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x8 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x8 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x8 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x8 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x8 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x8 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x0c "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" hexmask.long.byte 0x0c 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x0c 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x0c 4. " sts_ok ,Valid code compensation" "Low,High" textline " " bitfld.long 0x0c 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x0c 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x0c 1. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x0c 0. " EN ,Compensation cell internal command parameter" "Low,High" line.long 0x10 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" bitfld.long 0x10 31. " LVDS_BENGUP_ENB ,Pad LVDS bang-up enable" "Enabled,Disabled" textline " " bitfld.long 0x10 16.--19. " SWKEY_DDRSEL ,External memory interface configuration type" "HW memory auto-conf.,Reserved,Reserved,Reserved,Reserved,Reserved,SW memory conf.,?..." textline " " bitfld.long 0x10 15. " DRAM_TYPE ,Memory interface configuration type" "DDR1,DDR2" bitfld.long 0x10 14. " COM_REF ,Internal/External SSTL common reference voltage definition" "Internal,External" textline " " bitfld.long 0x10 12. " PSEUDO_DIF_DIS ,DQS0;1 SSTL pad differential/single ended configuration type" "Differential,Single ended" bitfld.long 0x10 10.--11. " NDQS_PDN/PU_SEL ,Programmable nDQS0;1 Pull down/up functionality connected with PDCLKB signal of SSTL differential pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 3. " DRIVE_MODE_S_W ,SSTL pad drive strain mode" "Strong,Weak" textline " " bitfld.long 0x10 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" bitfld.long 0x10 0. " SSTL_SEL ,SW Memory model selection" "DDR1(SSTL2V5),DDR2(SSTL1V8)" group.long 0xf4++0x27 "Memory bist execution control" line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(LCDC palette Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" textline " " bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" textline " " bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" textline " " bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Gmac_rxfifo)" "Disabled,Run" bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Gmac_txfifo)" "Disabled,Run" textline " " bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" bitfld.long 0x00 1. " RBACT1[01] ,Run bist execution command(Usb_host_2)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host_1)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras buf. Sp1Kx32_1:8)" "Disabled,Run" bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras buf. Dp1Kx32_1:4)" "Disabled,Run" textline " " bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras buf. Sp2Kx32_1:4)" "Disabled,Run" bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras hwac.Sp48x128_1:3)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras buf. Dp512Kx32_1:8)" "Disabled,Run" bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras buf. Sp512x32_9:16)" "Disabled,Run" textline " " bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras buf. Sp512x32_1:8)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(Rbact (arm-1) memory pool)" "Disabled,Run" line.long 0x10 "BIST5_CFG_CTR,BIST5_CFG_CTR Register" bitfld.long 0x10 31. " BIST5_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x10 28. " BIST5_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x10 24.--27. " BIST5_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x10 0. " RBACT5[00] ,Run bist execution command(Rbact (arm-2) memory pool)" "Disabled,Run" line.long 0x14 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x14 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x14 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x14 13. " BBAD1[13] ,Bist execution result(LCDC palette Fifo)" "Not failed,Failed" bitfld.long 0x14 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x14 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x14 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x14 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x14 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x14 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x14 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x14 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x14 4. " BBAD1[04] ,Bist execution result(Gmac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x14 3. " BBAD1[03] ,Bist execution result(Gmac_txfifo)" "Not failed,Failed" bitfld.long 0x14 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x14 1. " BBAD1[01] ,Bist execution result(Usb_host_2)" "Not failed,Failed" bitfld.long 0x14 0. " BBAD1[00] ,Bist execution result(Usb_host_1)" "Not failed,Failed" line.long 0x18 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x18 31. " BIST2_end ,End memory bist2 execution" "Pending,Ended" bitfld.long 0x18 18. " BBAD2[18] ,Bist execution result(Ras buf. Sp1Kx32_8)" "Not failed,Failed" textline " " bitfld.long 0x18 17. " BBAD2[17] ,Bist execution result(Ras buf. Sp1Kx32_7)" "Not failed,Failed" bitfld.long 0x18 16. " BBAD2[16] ,Bist execution result(Ras buf. Sp1Kx32_6)" "Not failed,Failed" textline " " bitfld.long 0x18 15. " BBAD2[15] ,Bist execution result(Ras buf. Sp1Kx32_5)" "Not failed,Failed" bitfld.long 0x18 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 8. " BBAD2[08] ,Bist execution result(Ras buf. Dp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 7. " BBAD2[07] ,Bist execution result(Ras buf. Dp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 6. " BBAD2[06] ,Bist execution result(Ras buf. Sp2Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 5. " BBAD2[05] ,Bist execution result(Ras buf. Sp2Kx32_3)" "Not failed,Failed" bitfld.long 0x18 4. " BBAD2[04] ,Bist execution result(Ras buf. Sp2Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 3. " BBAD2[03] ,Bist execution result(Ras buf. Sp2Kx32_1)" "Not failed,Failed" bitfld.long 0x18 2. " BBAD2[02] ,Bist execution result(Ras hwacc.Sp48x128_3)" "Not failed,Failed" textline " " bitfld.long 0x18 1. " BBAD2[01] ,Bist execution result(Ras hwacc.Sp48x128_2)" "Not failed,Failed" bitfld.long 0x18 0. " BBAD2[00] ,Bist execution result(Ras hwacc.Sp48x128_1)" "Not failed,Failed" line.long 0x1c "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x1c 31. " BIST3_end ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x1c 23. " BBAD3[23] ,Bist execution result(Ras buf. Dp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 22. " BBAD3[22] ,Bist execution result(Ras buf. Dp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 21. " BBAD3[21] ,Bist execution result(Ras buf. Dp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 20. " BBAD3[20] ,Bist execution result(Ras buf. Dp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 19. " BBAD3[19] ,Bist execution result(Ras buf. Dp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 18. " BBAD3[18] ,Bist execution result(Ras buf. Dp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 17. " BBAD3[17] ,Bist execution result(Ras buf. Dp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 16. " BBAD3[16] ,Bist execution result(Ras buf. Dp512x32_1)" "Not failed,Failed" bitfld.long 0x1c 15. " BBAD3[15] ,Bist execution result(Ras buf. Sp512x32_16)" "Not failed,Failed" textline " " bitfld.long 0x1c 14. " BBAD3[14] ,Bist execution result(Ras buf. Sp512x32_15)" "Not failed,Failed" bitfld.long 0x1c 13. " BBAD3[13] ,Bist execution result(Ras buf. Sp512x32_14)" "Not failed,Failed" textline " " bitfld.long 0x1c 12. " BBAD3[12] ,Bist execution result(Ras buf. Sp512x32_13)" "Not failed,Failed" bitfld.long 0x1c 11. " BBAD3[11] ,Bist execution result(Ras buf. Sp512x32_12)" "Not failed,Failed" textline " " bitfld.long 0x1c 10. " BBAD3[10] ,Bist execution result(Ras buf. Sp512x32_11)" "Not failed,Failed" bitfld.long 0x1c 9. " BBAD3[09] ,Bist execution result(Ras buf. Sp512x32_10)" "Not failed,Failed" textline " " bitfld.long 0x1c 8. " BBAD3[08] ,Bist execution result(Ras buf. Sp512x32_9)" "Not failed,Failed" bitfld.long 0x1c 7. " BBAD3[07] ,Bist execution result(Ras buf. Sp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 6. " BBAD3[06] ,Bist execution result(Ras buf. Sp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 5. " BBAD3[05] ,Bist execution result(Ras buf. Sp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 4. " BBAD3[04] ,Bist execution result(Ras buf. Sp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 3. " BBAD3[03] ,Bist execution result(Ras buf. Sp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 2. " BBAD3[02] ,Bist execution result(Ras buf. Sp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 1. " BBAD3[01] ,Bist execution result(Ras buf. Sp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 0. " BBAD3[00] ,Bist execution result(Ras buf. Sp512x32_1)" "Not failed,Failed" line.long 0x20 "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x20 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x20 19. " BBAD4[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 18. " BBAD4[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 17. " BBAD4[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 16. " BBAD4[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 15. " BBAD4[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 14. " BBAD4[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x20 13. " BBAD4[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x20 12. " BBAD4[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x20 11. " BBAD4[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 10. " BBAD4[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 9. " BBAD4[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 8. " BBAD4[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 7. " BBAD4[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 6. " BBAD4[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 5. " BBAD4[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 4. " BBAD4[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 3. " BBAD4[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 2. " BBAD4[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x20 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" line.long 0x24 "BIST5_STS_RES,BIST5_STS_RES Register" bitfld.long 0x24 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x24 19. " BBAD[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 18. " BBAD[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 17. " BBAD[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 16. " BBAD[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 15. " BBAD[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 14. " BBAD[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x24 13. " BBAD[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x24 12. " BBAD[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x24 11. " BBAD[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 10. " BBAD[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 9. " BBAD[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 8. " BBAD[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 7. " BBAD[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 6. " BBAD[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 5. " BBAD[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 4. " BBAD[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 3. " BBAD[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 2. " BBAD[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x24 1. " BBAD[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 0. " BBAD[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 "Diagnostic functionality" line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 21. " EXPI_EH2HS_ERR ,Expansion interface write deferred error" "No error,Error" textline " " bitfld.long 0x00 20. " EXPI_EH2HM_ERR ,Expansion interface write deferred error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXP_ERR_ENB ,Enable AHB Expansion interface write deferred error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 16.--23. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" textline " " hexmask.long.byte 0x00 8.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" hexmask.long.byte 0x00 0.--7. 1. " CUSTOM_ID ,Customization type" rgroup.long 0x3c++0x03 line.long 0x00 "SOC_USER_ID,SOC_USER_ID Register" hexmask.long.word 0x00 16.--31. 1. " Spear_magic_number ,Spear magic number" width 0xb else width 18. rgroup.long 0x00++0x03 line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x0 6.--18. 1. " FIXED ,Fixed Value" textline " " endif bitfld.long 0x0 0.--5. " SOC_CFG ,SoC operating mode" "Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,?..." group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 15. " DEBUG_FREEZ ,Enable freeze condition when processor enters in debug mode" "Disabled,Enabled" bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 4.--5. " SOC_DBG6 ,Spear300 debug configuration" "Dbg_disab,Dbg_etm1,Dbg_jtag1,?..." group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL2_MOD,PLL2_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Sync. mode PLL2,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,Sync. mode PLL1,?..." textline " " else bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Reserved,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,?..." textline " " endif bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(4) sig.,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI24_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI24_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" bitfld.long 0x00 16. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" bitfld.long 0x00 12. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK(3) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 31. " C3_CLOCK_ENB ,C3 clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDR_CORE_ENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDR_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 26. " USBH_CLOCK ,Enable usb ehci host reset" "Disabled,Enabled" textline " " endif bitfld.long 0x04 25. " USBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" bitfld.long 0x04 23. " MAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO_CLKENB ,Enable gpio clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " GPT3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" bitfld.long 0x04 11. " GPT2_CLKENB ,Enable general purpose timer-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " FIRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 5. " SSP_CLKENB ,Enable ssp clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART_CLKENB ,Enable uart clock" "Disabled,Enabled" bitfld.long 0x04 1. " ARM_CLKENB ,Enable Arm subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ARM_ENB ,Enable Arm clock gating functionality" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 20.--23. 1. " SOC_PLATFORM ,Soc_platform" textline " " hexmask.long.byte 0x00 16.--22. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" hexmask.long.byte 0x00 10.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" textline " " hexmask.long.byte 0x00 4.--7. 1. " TECH_TYPE ,Tech Type" endif group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (4) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CLK24M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.long 0x50++0x03 line.long 0x00 "AMEM_CFG_CTRL,AMEM_CFG_CTRL Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X(7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y(7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory Port-1 soft reset" "Disabled,Enabled" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory Port-1 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory Port-1 source clock" "HCLK,PLL1,PLL2,Ras_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory Port-1 clock gate" "Disabled,Enabled" endif group.long 0x60++0x1b line.long 0x0 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "MAC_CLK_SYNT,MAC_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 31. " C3_RESET ,C3 reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDR_CORE_ENBR ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDR_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26. " USBH1_EHCI_SWRST ,Active usb1 ehci host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_OHCI_SWRST ,Active usb1 ohci host reset" "Disabled,Enabled" textline " " else bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" endif bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO_SWRST ,Active gpio reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" bitfld.long 0x00 12. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " GPTM2_SWRST ,Active general purpose timer-2 reset" "Disabled,Enabled" bitfld.long 0x00 10. " FIRDA_SWRST ,Active firda reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SSP_SWRST ,Active ssp reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart reset" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARM_SWRST ,Active Arm subsystem reset" "Disabled,Enabled" bitfld.long 0x00 0. " ARM_ENBR ,Arm reset enable" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0x3C++0x03 line.long 0x00 "SOC_USER_ID,SOC User ID Register" hexmask.long.byte 0x00 27.--31. 1. " USER_ID ,User Id" hexmask.long.byte 0x00 16.--23. 1. " USER_VERSION ,User Version" textline " " hexmask.long.byte 0x00 10.--15. 1. " USER_VERSION ,User Version" endif group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK24M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" group.long 0x7c--0x9f line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0b line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHAN15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHAN14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,?..." else bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "Reserved,RAS_6 out,?..." endif bitfld.long 0x00 24.--25. " DMA_CFG_CHAN12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHAN11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHAN10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SSP0 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SSP0 inp,RAS_4 inp,?..." else bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SPI1 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SPI1 inp,RAS_4 inp,?..." endif textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHAN07 ,Dma channel 7 configuration scheme" "Reserved,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHAN06 ,Dma channel 6 configuration scheme" "Reserved,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHAN05 ,Dma channel 5 configuration scheme" "Reserved,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHAN04 ,Dma channel 4 configuration scheme" "Reserved,RAS_2 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart0 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart0 inp,RAS_1 inp,?..." textline " " else bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart inp,RAS_1 inp,?..." textline " " endif bitfld.long 0x00 2.--3. " DMA_CFG_CHAN01 ,Dma channel 1 configuration scheme" "Reserved,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHAN00 ,Dma channel 0 configuration scheme" "Reserved,RAS_0 inp,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 0. " PLL_PWDN ,State of PLL blocks" "Powered up,Powered down" else bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x08 "MAC_CFG_CTR,MAC_CFG_CTR Register" bitfld.long 0x08 4. " MAC_SYNT_ENB ,Mac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " MAC_CLK_SEL ,Mac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" else line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" endif sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0xc0++0x03 line.long 0x0 "PRC2_LOCK_CTR,PRC2_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x03 line.long 0x00 "PRC2_IRQ_CTR,PRC2_IRQ_CTR Register" bitfld.long 0x00 17. " INT2_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 16. " INT2_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" endif group.long 0xe0++0x07 line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " WAKEUP_FIQ_ENB ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Firq" line.long 0x04 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" bitfld.long 0x04 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x04 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " hexmask.long.byte 0x04 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x04 4. " COMPOK ,Valid code compensation" "Not valid,Valid" textline " " bitfld.long 0x04 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x04 2. " FREEZE ,Freeze command" "Not frozen,Frozen" textline " " bitfld.long 0x04 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x04 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" group.long 0xec++0x07 line.long 0x00 "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" bitfld.long 0x00 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x00 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.byte 0x00 16.--22. 1. " NASRC ,Copy of code on compensation bus" textline " " endif bitfld.long 0x00 4. " COMPOK ,Valid code compensation" "Low,High" bitfld.long 0x00 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" textline " " bitfld.long 0x00 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x00 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x00 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x04 "DDR_PAD,DDR_PAD Register" else line.long 0x04 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" endif bitfld.long 0x04 15.--18. " DDR_SW_MODE ,External memory interface configuration type" "HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,SW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf." bitfld.long 0x04 14. " DDR_EN_PAD ,DDR (Low Power) or DDR2 (RO)" "DDR2,DDR low power" textline " " bitfld.long 0x04 13. " REFSSTL ,Internal/External SSTL common reference voltage definition" "Internal,External" bitfld.long 0x04 12. " GATE_OPEN_MODE ,GATE_OPEN_MODE" "Low,High" textline " " bitfld.long 0x04 10. " ENZI ,Input buffer enable" "Disabled,Enabled" bitfld.long 0x04 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x04 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 3. " S_W_MODE ,SSTL pad drive strain mode" "Strong,Weak" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "200MHz,266MHz,333MHz,?..." else bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" endif bitfld.long 0x04 0. " DDR_LOW_POWER_DDR2_MODE ,SW Memory model selection" "DDR2,DDR low power" group.long 0xf4++0xf line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" textline " " bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(Application SubSys.)" "Disabled,Run" bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" textline " " bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" textline " " bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" textline " " bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Mac_rxfifo)" "Disabled,Run" textline " " bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Mac_txfifo)" "Disabled,Run" bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras local data buffer 0)" "Disabled,Run" textline " " bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras local data buffer 1)" "Disabled,Run" bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras HWACC data buffer)" "Disabled,Run" textline " " bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras HWACC data desc.)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras local data buffer 2)" "Disabled,Run" textline " " bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras local data buffer 3_0)" "Disabled,Run" bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras local data buffer 3_1)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x0c 7. " RBACT4[07] ,Run bist execution command(ARM926CM_MMU)" "Disabled,Run" textline " " bitfld.long 0x0c 6. " RBACT4[06] ,Run bist execution command(ARM926CM_IValid)" "Disabled,Run" bitfld.long 0x0c 5. " RBACT4[05] ,Run bist execution command(ARM926CM_ITag)" "Disabled,Run" textline " " bitfld.long 0x0c 4. " RBACT4[04] ,Run bist execution command(ARM926CM_ICAche)" "Disabled,Run" bitfld.long 0x0c 3. " RBACT4[03] ,Run bist execution command(ARM926CM_DValid)" "Disabled,Run" textline " " bitfld.long 0x0c 2. " RBACT4[02] ,Run bist execution command(ARM926CM_DTag)" "Disabled,Run" bitfld.long 0x0c 1. " RBACT4[01] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" rgroup.long 0x108++0xf line.long 0x00 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x00 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x00 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x00 13. " BBAD1[13] ,Bist execution result(Application SubSys.)" "Not failed,Failed" bitfld.long 0x00 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x00 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x00 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x00 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x00 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x00 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x00 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x00 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x00 4. " BBAD1[04] ,Bist execution result(Mac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x00 3. " BBAD1[03] ,Bist execution result(Mac_txfifo)" "Not failed,Failed" bitfld.long 0x00 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD1[00] ,Bist execution result(Usb_host)" "Not failed,Failed" line.long 0x04 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x04 31. " BIST2_END ,End memory bist2 execution" "Pending,Ended" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc SpDp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc SpDp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc SpDp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc SpDp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc SpDp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc SpDp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc SpDp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc SpDp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr Dp96x128)" "Not failed,Failed" else bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp8K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Sp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc dp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc dp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc dp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc dp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc dp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc dp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc dp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc dp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr dp96x128)" "Not failed,Failed" endif line.long 0x08 "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x08 31. " BIST3_END ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x08 13. " BBAD3[13] ,Bist execution result(Ras buf. sp2K8_8)" "Not failed,Failed" textline " " bitfld.long 0x08 12. " BBAD3[12] ,Bist execution result(Ras buf. sp2K8_7)" "Not failed,Failed" bitfld.long 0x08 11. " BBAD3[11] ,Bist execution result(Ras buf. sp2K8_6)" "Not failed,Failed" textline " " bitfld.long 0x08 10. " BBAD3[10] ,Bist execution result(Ras buf. sp2K8_5)" "Not failed,Failed" bitfld.long 0x08 9. " BBAD3[09] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 8. " BBAD3[08] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 7. " BBAD3[07] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 6. " BBAD3[06] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" bitfld.long 0x08 5. " BBAD3[05] ,Bist execution result(Ras buf. sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 4. " BBAD3[04] ,Bist execution result(Ras buf. sp4K8_1)" "Not failed,Failed" bitfld.long 0x08 3. " BBAD3[03] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 2. " BBAD3[02] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 1. " BBAD3[01] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 0. " BBAD3[00] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" line.long 0x0c "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x0c 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x0c 13. " BBAD4[13] ,Bist execution result(Arm ddata Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x0c 12. " BBAD4[12] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x0c 11. " BBAD4[11] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x0c 10. " BBAD4[10] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x0c 9. " BBAD4[09] ,Bist execution result(Arm dtag Sp256Kx22)" "Not failed,Failed" textline " " bitfld.long 0x0c 8. " BBAD4[08] ,Bist execution result(Arm dcvalid Sp32x24)" "Not failed,Failed" bitfld.long 0x0c 7. " BBAD4[07] ,Bist execution result(Arm dcdirty Sp128x8)" "Not failed,Failed" textline " " bitfld.long 0x0c 6. " BBAD4[06] ,Bist execution result(Arm iicdata Sp1kx32_4)" "Not failed,Failed" bitfld.long 0x0c 5. " BBAD4[05] ,Bist execution result(Arm iicdata Sp1kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x0c 4. " BBAD4[04] ,Bist execution result(Arm iicdata Sp1kx32_2)" "Not failed,Failed" bitfld.long 0x0c 3. " BBAD4[03] ,Bist execution result(Arm icdata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x0c 2. " BBAD4[02] ,Bist execution result(Arm itag Sp128x88)" "Not failed,Failed" bitfld.long 0x0c 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32x24)" "Not failed,Failed" textline " " bitfld.long 0x0c 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" rgroup.long 0x118++0x03 sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x00 "BIST5_RSLT_REG,BIST5_RSLT_REG Register" else line.long 0x00 "BIST5_STS_RES,BIST5_STS_RES Register" endif bitfld.long 0x00 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x00 19. " BBAD5[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 18. " BBAD5[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 17. " BBAD5[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 16. " BBAD5[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 15. " BBAD5[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 14. " BBAD5[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x00 13. " BBAD5[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x00 12. " BBAD5[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x00 11. " BBAD5[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 10. " BBAD5[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 9. " BBAD5[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 8. " BBAD5[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 7. " BBAD5[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 6. " BBAD5[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 5. " BBAD5[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 4. " BBAD5[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 3. " BBAD5[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 2. " BBAD5[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x00 1. " BBAD5[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD5[00] ,Bist execution result(ARM MMU Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" endif textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" textline " " bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "USB0_TUN_PRM,USB0_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x124++0x03 line.long 0x00 "USB1_TUN_PRM,USB1_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x128++0x03 line.long 0x00 "USB2_TUN_PRM,USB2_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x130++0x13 line.long 0x00 "PLGPIO0_PAD_PRG,PLGPIO0_PAD_PRG Register" bitfld.long 0x00 31. " PDN_UART ,Pull down control for UART lines" "No effect,Pull down" bitfld.long 0x00 30. " PUP_UART ,Pull up control for UART lines" "No effect,Pull up" textline " " bitfld.long 0x00 29. " PDN_5 ,Pull down control for pads 20,21,22,23" "No effect,Pull down" bitfld.long 0x00 28. " PUP_5 ,Pull up control for pads 20,21,22,23" "No effect,Pull up" textline " " bitfld.long 0x00 26.--27. " DRV_5 ,Drive strength control for pads 20, 21,22, 23" "0,1,2,3" bitfld.long 0x00 25. " SLEW_5 ,Slew rate control for pads 20,21,22,23" "Low,High" textline " " bitfld.long 0x00 24. " PDN_4 ,Pull down control for pads 16,17,18,19" "No effect,Pull down" bitfld.long 0x00 23. " PUP_4 ,Pull up control for pads 16,17,18,19" "No effect,Pull up" textline " " bitfld.long 0x00 21.--22. " DRV_4 ,Drive strength control for pads 16,17,18,19" "0,1,2,3" bitfld.long 0x00 20. " SLEW_4 ,Slew control for pads 16,17,18,19" "Low,High" textline " " bitfld.long 0x00 19. " PDN_3 ,Pull down control for pads 12,13,14,15" "No effect,Pull down" bitfld.long 0x00 18. " PUP_3 ,Pull up control for pads 12,13,14,15" "No effect,Pull up" textline " " bitfld.long 0x00 16.--17. " DRV_3 ,Drive strength control for pads PL-GPIO 15, 14, 13 and 12" "0,1,2,3" bitfld.long 0x00 15. " SLEW_3 ,Slew control for pads 12,13,14,15" "Low,High" textline " " bitfld.long 0x00 14. " PDN_2 ,Pull down control for pads 8,9" "No effect,Pull down" bitfld.long 0x00 13. " PUP_2 ,Pull up control for pads 8,9" "No effect,Pull up" textline " " bitfld.long 0x00 11.--12. " DRV_2 ,Drive strength control for pads 8,9,10,11" "0,1,2,3" bitfld.long 0x00 10. " SLEW_2 ,Slew control for pads 8,9,10,11" "Low,High" textline " " bitfld.long 0x00 9. " PDN_1 ,Pull down control for pads 6,7" "No effect,Pull down" bitfld.long 0x00 8. " PUP_1 ,Pull up control for pads 6,7" "No effect,Pull up" textline " " bitfld.long 0x00 6.--7. " DRV_1 ,Drive strength control for pads 4,5,6,7" "0,1,2,3" bitfld.long 0x00 5. " SLEW_1 ,Slew control for pads 4,5,6,7" "Low,High" textline " " bitfld.long 0x00 4. " PDN_0 ,Pull down control for pads 0,1" "No effect,Pull down" bitfld.long 0x00 3. " PUP_0 ,Pull up control for pads 0,1" "No effect,Pull up" textline " " bitfld.long 0x00 1.--2. " DRV_0 ,Drive strength control for pads 0,1,2,3" "0,1,2,3" bitfld.long 0x00 0. " SLEW_0 ,Slew control for pads 0,1,2,3" "Low,High" line.long 0x04 "PLGPIO1_PAD_PRG,PLGPIO1_PAD_PRG Register" bitfld.long 0x04 31. " PDN_I2C ,Pull down control for I2C lines" "No effect,Pull down" bitfld.long 0x04 30. " PUP_I2C ,Pull up control for I2C lines" "No effect,Pull up" textline " " bitfld.long 0x04 29. " PDN_11 ,Pull down control for pads 45,46,47" "No effect,Pull down" bitfld.long 0x04 28. " PUP_11 ,Pull up control for pads 45,46,47" "No effect,Pull up" textline " " bitfld.long 0x04 26.--27. " DRV_11 ,Drive strength control for pads 44,45,46,47" "0,1,2,3" bitfld.long 0x04 25. " SLEW_11 ,Slew control for pads 44,45,46,47" "Low,High" textline " " bitfld.long 0x04 24. " PDN_10 ,Pull down control for pads 40,41,42,43,44" "No effect,Pull down" bitfld.long 0x04 23. " PUP_10 ,Pull up control for pads 40,41,42,43,44" "No effect,Pull up" textline " " bitfld.long 0x04 21.--22. " DRV_10 ,Drive strength control for pads 40,41,42,43" "0,1,2,3" bitfld.long 0x04 20. " SLEW_10 ,Slew control for pads 40,41,42,43" "Low,High" textline " " bitfld.long 0x04 19. " PDN_9 ,Pull down control for pads 37,38,39" "No effect,Pull down" bitfld.long 0x04 18. " PUP_9 ,Pull up control for pads 37,38,39" "No effect,Pull up" textline " " bitfld.long 0x04 16.--17. " DRV_9 ,Drive strength control for pads 36,37,38,39" "0,1,2,3" bitfld.long 0x04 15. " SLEW_9 ,Slew control for pads 36,37,38,39" "Low,High" textline " " bitfld.long 0x04 14. " PDN_8 ,Pull down control for pads 32,33,34,35,36" "No effect,Pull down" bitfld.long 0x04 13. " PUP_8 ,Pull up control for pads 32,33,34,35,36" "No effect,Pull up" textline " " bitfld.long 0x04 11.--12. " DRV_8 ,Drive strength control for pads 32,33,34,35" "0,1,2,3" bitfld.long 0x04 10. " SLEW_8 ,Slew control for pads 32,33,34,35" "Low,High" textline " " bitfld.long 0x04 9. " PDN_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull down" bitfld.long 0x04 8. " PUP_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull up" textline " " bitfld.long 0x04 6.--7. " DRV_7 ,Pull up control for pads 28,29,30,31" "0,1,2,3" bitfld.long 0x04 5. " SLEW_7 ,Drive Strength control for pads 28,29,30,31" "Low,High" textline " " bitfld.long 0x04 4. " PDN_6 ,Pull down control for pads 24,25,26,27" "No effect,Pull down" bitfld.long 0x04 3. " PUP_6 ,Pull up control for pads 24,25,26,27" "No effect,Pull up" textline " " bitfld.long 0x04 1.--2. " DRV_6 ,Drive strength control for pads 24,25,26,27" "0,1,2,3" bitfld.long 0x04 0. " SLEW_6 ,Slew rate control for PL-GPIO 27, 26, 25, and 24" "Low,High" line.long 0x08 "PLGPIO2_PAD_PRG,PLGPIO2_PAD_PRG Register" bitfld.long 0x08 31. " PDN_ETHERNET ,Pull down control for ETHERNET" "No effect,Pull down" bitfld.long 0x08 30. " PUP_ETHERNET ,Pull up control for ETHERNET" "No effect,Pull up" textline " " bitfld.long 0x08 29. " PDN_17 ,Pull down control for pads 68,69,70,71" "No effect,Pull down" bitfld.long 0x08 28. " PUP_17 ,Pull up control for pads 68,69,70,71" "No effect,Pull up" textline " " bitfld.long 0x08 26.--27. " DRV_17 ,Drive strength control for pads 68,69,70,71" "0,1,2,3" bitfld.long 0x08 25. " SLEW_17 ,Slew control for pads 68,69,70,71" "Low,High" textline " " bitfld.long 0x08 24. " PDN_16 ,Pull down control for pads 64,65,66,67" "No effect,Pull down" bitfld.long 0x08 23. " PUP_16 ,Pull up control for pads 64,65,66,67" "No effect,Pull up" textline " " bitfld.long 0x08 21.--22. " DRV_16 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 20. " SLEW_16 ,Slew control for pads 64,65,66,67" "Low,High" textline " " bitfld.long 0x08 19. " PDN_15 ,Pull down control for pads 60,61,62,63" "No effect,Pull down" bitfld.long 0x08 18. " PUP_15 ,Pull up control for pads 60,61,62,63" "No effect,Pull up" textline " " bitfld.long 0x08 16.--17. " DRV_15 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 15. " SLEW_15 ,Slew rate control for pads 60,61,62,63" "Low,High" textline " " bitfld.long 0x08 14. " PDN_14 ,Pull down control for pads 56,57,58,59" "No effect,Pull down" bitfld.long 0x08 13. " PUP_14 ,Pull up control for pads 56,57,58,59" "No effect,Pull up" textline " " bitfld.long 0x08 11.--12. " DRV_14 ,Drive strength control for pads 56,57,58,59" "0,1,2,3" bitfld.long 0x08 10. " SLEW_14 ,Slew control for pads 56,57,58,59" "Low,High" textline " " bitfld.long 0x08 9. " PDN_13 ,Pull down control for pads 52,53,54,55" "No effect,Pull down" bitfld.long 0x08 8. " PUP_13 ,Pull up control for pads 52,53,54,55" "No effect,Pull up" textline " " bitfld.long 0x08 6.--7. " DRV_13 ,Pull up control for pads 52,53,54,55" "0,1,2,3" bitfld.long 0x08 5. " SLEW_13 ,Drive strength control for pads 52,53,54,55" "Low,High" textline " " bitfld.long 0x08 4. " PDN_12 ,Pull down control for pads 48,49,50,51" "No effect,Pull down" bitfld.long 0x08 3. " PUP_12 ,Pull up control for pads 48,49,50,51" "No effect,Pull up" textline " " bitfld.long 0x08 1.--2. " DRV_12 ,Drive strength control for pads 48,49,50,51" "0,1,2,3" bitfld.long 0x08 0. " SLEW_12 ,Slew control for pads 48,49,50,51" "Low,High" line.long 0x0c "PLGPIO3_PAD_PRG,PLGPIO3_PAD_PRG Register" bitfld.long 0x0C 29. " PDN_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull down" bitfld.long 0x0C 28. " PUP_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull up" textline " " bitfld.long 0x0C 26.--27. " DRV_23 ,Drive strength control for pad 92,93,94,95" "0,1,2,3" bitfld.long 0x0C 25. " SLEW_23 ,Slew control for pads 92,93,94,95" "Low,High" textline " " bitfld.long 0x0C 24. " PDN_22 ,Pull down control for pads 88,89,90,91" "No effect,Pull down" bitfld.long 0x0C 23. " PUP_22 ,Pull up control for pads 88,89,90,91" "No effect,Pull up" textline " " bitfld.long 0x0C 21.--22. " DRV_22 ,Drive strength control for pads 88,89,90,91" "0,1,2,3" bitfld.long 0x0C 20. " SLEW_22 ,Slew control for pads 88,89,90,91" "Low,High" textline " " bitfld.long 0x0C 19. " PDN_21 ,Pull down control for pads 84,85,86,87" "No effect,Pull down" bitfld.long 0x0C 18. " PUP_21 ,Pull up control for pads 84,85,86,87" "No effect,Pull up" textline " " bitfld.long 0x0C 16.--17. " DRV_21 ,Drive strength control for pads 84,85,86,87" "0,1,2,3" bitfld.long 0x0C 15. " SLEW_21 ,Slew rate control for pads 84,85,86,87" "Low,High" textline " " bitfld.long 0x0C 14. " PDN_20 ,Pull down control for pads 80,81,82,83" "No effect,Pull down" bitfld.long 0x0C 13. " PUP_20 ,Pull up control for pads 80,81,82,83" "No effect,Pull up" textline " " bitfld.long 0x0C 11.--12. " DRV_20 ,Drive strength control for pads 80,81,82,83" "0,1,2,3" bitfld.long 0x0C 10. " SLEW_20 ,Slew rate control for pads 80,81,82,83" "Low,High" textline " " bitfld.long 0x0C 9. " PDN_19 ,Pull down control for pads 76,77,78,79" "No effect,Pull down" bitfld.long 0x0C 8. " PUP_19 ,Pull up control for pads 76,77,78,79" "No effect,Pull up" textline " " bitfld.long 0x0C 6.--7. " DRV_19 ,Drive strength control for pads 76,77,78,79" "0,1,2,3" bitfld.long 0x0C 5. " SLEW_19 ,Slew rate control for pads 76,77,78,79" "Low,High" textline " " bitfld.long 0x0C 4. " PDN_18 ,Pull down control for pads 72,72,74,75" "No effect,Pull down" bitfld.long 0x0C 3. " PUP_18 ,Pull up control for pads 72,72,74,75" "No effect,Pull up" textline " " bitfld.long 0x0C 1.--2. " DRV_18 ,Drive strength control for pads 72,72,74,75" "0,1,2,3" bitfld.long 0x0C 0. " SLEW_18 ,Slew rate control for pads 72,72,74,75" "Low,High" line.long 0x10 "PLGPIO4_PAD_PRG,PLGPIO4_PAD_PRG Register" bitfld.long 0x10 24. " PDN_CLK4 ,Pull down control for CLK4" "No effect,Pull down" bitfld.long 0x10 23. " PUP_CLK4 ,Pull up control for pads CLK4" "No effect,Pull up" textline " " bitfld.long 0x10 21.--22. " DRV_CLK4 ,Drive strength control for pads CLK4" "0,1,2,3" bitfld.long 0x10 20. " SLEW_CLK4 ,Slew rate control for pads CLK4" "Low,High" textline " " bitfld.long 0x10 19. " PDN_CLK3 ,Pull down control for pads CLK3" "No effect,Pull down" bitfld.long 0x10 18. " PUP_CLK3 ,Pull up control for pads CLK3" "No effect,Pull up" textline " " bitfld.long 0x10 16.--17. " DRV_CLK3 ,Drive strength control for pads CLK3" "0,1,2,3" bitfld.long 0x10 15. " SLEW_CLK3 ,Slew control for pads CLK3" "Low,High" textline " " bitfld.long 0x10 14. " PDN_CLK2 ,Pull down control for pads CLK2" "No effect,Pull down" bitfld.long 0x10 13. " PUP_CLK2 ,Pull up control for pads CLK2" "No effect,Pull up" textline " " bitfld.long 0x10 11.--12. " DRV_CLK2 ,Drive strength control for pads CLK2" "0,1,2,3" bitfld.long 0x10 10. " SLEW_CLK2 ,Slew rate control for pads CLK2" "Low,High" textline " " bitfld.long 0x10 9. " PDN_CLK1 ,Pull down control for pads CLK1" "No effect,Pull down" bitfld.long 0x10 8. " PUP_CLK1 ,Pull up control for pads CLK1" "No effect,Pull up" textline " " bitfld.long 0x10 6.--7. " DRV_CLK1 ,Drive strength control for pads CLK1" "0,1,2,3" bitfld.long 0x10 5. " SLEW_CLK1 ,Slew control for CLK1 and pads 96,97" "Low,High" textline " " bitfld.long 0x10 4. " PDN_24 ,Pull down control for pads 96,97" "No effect,Pull down" bitfld.long 0x10 3. " PUP_24 ,Pull up control for pads 96,97" "No effect,Pull up" textline " " bitfld.long 0x10 1.--2. " DRV_24 ,Drive strength control for pads 96,97" "0,1,2,3" width 0xb endif tree.end tree "Region 3" base asd:0xfcaa0000 sif (cpu()=="SPEAR600") width 17. rgroup.long 0x00++0x03 "SOC main configuration parameters" line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" bitfld.long 0x00 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " bitfld.long 0x00 18. " DUAL_CORE ,Processors number currently embedded inside the SoC" "Single,Dual" textline " " bitfld.long 0x00 17. " NAND_DISAB ,Nand flash interface disable" "No,Yes" textline " " bitfld.long 0x00 16. " NAND_16B ,Nand flash interface 8/16bit data width configuration type" "8 bit,8/16 bit" textline " " bitfld.long 0x00 13. " FULL_RAS_MODE ,SoC operating mode" "SoC,RAS" textline " " bitfld.long 0x00 11. " EXPI_IOBRG_ENB ,Enable predisposition AHB expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " EXPI_RAS_ENB ,Enable programmable logic master/slave internal ports" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EXPI_CLK_SRC ,Expansion interface source clock and reset definition" "External src. clk & reset signals,Clk and reset signals from internal logic" textline " " bitfld.long 0x00 8. " EXPI_ITF_ENB ,Enable expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " SOC_APPLIC ,SoC application scheme" "Standalone application,I/O bridge connectivity,Dual chip solution (self_cfg5),Dual chip solution (self_cfg4)" textline " " bitfld.long 0x00 0.--5. " SOC_CFG ,SoC operating mode" "Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg7,Reserved,Self_cfg0,Self_cfg1,Self_cfg2,Self_cfg3,Self_cfg4,Self_cfg5,Self_cfg6,Self_cfg7,Self_cfg8,Self_cfg9" group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 14.--15. " DEBUG_FREEZ ,Enable timer and watch dog clock freeze" "Processor-1/processor-2,Processor-2,Processor-1/processor-2,Processor-1" textline " " bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 0.--2. " SOC_DBG ,Spear600 debug configuration" "Dbg_disab,Dbg_jtag1,Dbg_jtag2,Dbg_jtagd,Dbg_jtage,Dbg_etm1,Dbg_etm2,Dbg_etma" group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode,Sync. mode,Reserved,Async. mode,?..." textline " " bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "30Mhz Oscillator,Programmable PL_CLK(2) sig.,Sync. Mode,?..." textline " " bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "30Mhz Oscillator,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" if (((data.long(asd:0xfcaa0000+0x24))&0x3000)==0x00) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfcaa0000+0x24))&0x3000)==0x1000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfcaa0000+0x24))&0x3000)==0x2000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel/)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel/)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" else group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" endif group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR5_FREEZ ,General purpose timer 5 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 16. " GPTMR4_FREEZ ,General purpose timer 4 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 15. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 14. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 12. " GPTMR5_CLKSEL ,General purpose timer-5 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR4_CLKSEL ,General purpose timer-4 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 10. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 9. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" textline " " bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK (2) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" textline " " bitfld.long 0x00 2.--3. " CLCD_CLKSEL ,Color LCD display source clock definition" "48Mhz,CLCD Clock Synthesizer,Programmable PL_CLK (3) signal,?..." textline " " bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 30. " DDR_ENB ,DDR memory controller clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDRCORE_CLKENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDRCTRL_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" bitfld.long 0x04 26. " USBH2_CLKENB ,Enable usb2 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " GMAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" bitfld.long 0x04 22. " CLCD_CLKENB ,Enable color lcd controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO3_CLKENB ,Enable gpio-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 16. " GPTM3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" bitfld.long 0x04 14. " SSP3_CLKENB ,Enable ssp-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GPIO4_CLKENB ,Enable gpio-4 clock" "Disabled,Enabled" bitfld.long 0x04 12. " GPTM5_CLKENB ,Enable general purpose timer-5 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " GPTM4_CLKENB ,Enable general purpose timer-4 clock" "Disabled,Enabled" bitfld.long 0x04 10. " IRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " FSMC_CLKENB ,Enable nand flash controller clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 6. " SSP2_CLKENB ,Enable ssp-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SSP1_CLKENB ,Enable ssp-1 clock" "Disabled,Enabled" bitfld.long 0x04 4. " UART2_CLKENB ,Enable uart-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART1_CLKENB ,Enable uart-1 clock" "Disabled,Enabled" bitfld.long 0x04 2. " ARM2_CLKENB ,Enable Arm-2 subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ARM1_CLKENB ,Enable Arm-1 subsystem clock" "Disabled,Enabled" bitfld.long 0x04 0. " ARM1_ENB ,Enable Arm1 clock gating functionality" "Disabled,Enabled" group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (0) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_CLKENB ,Enable 125Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" group.long 0x50++0x07 line.long 0x00 "AMEM_CLK_CFG,AMEM_CLK_CFG Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory port-2 soft reset command" "No reset,Reset" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory port-2 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory port-2 source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory port-2 clock gating functionality" "Disabled,Enabled" line.long 0x04 "EXPI_CLK_CFG,EXPI_CLK_CFG Register" hexmask.long.byte 0x04 24.--31. 1. " EXPI_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x04 16.--23. 1. " EXPI_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x04 15. " EXPI_RST ,Ahb expansion interface reset command" "No reset,Reset" bitfld.long 0x04 14. " EXPI_LOPBCK ,Ahb expansion interface loopback" "Disabled,Enabled" textline " " bitfld.long 0x04 12.--13. " EXPI_COMPR_SEL ,Expansion interface bus compression scheme definition" "Reserved,Reserved,Low compression,?..." bitfld.long 0x04 11. " EXPI_CLK_RETIM ,Expi internal clock retiming functionality" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " EXPI_CLK_ENB ,Expansion interface clock gating functionality" "Disabled,Enabled" bitfld.long 0x04 9. " EXPI_RST ,Expansion interface soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 8. " EXPI_DMA_CFG[3] ,Expansion interface DMA channel 3 transfer type definition" "DMA single word,DMA burst" bitfld.long 0x04 7. " EXPI_DMA_CFG[2] ,Expansion interface DMA channel 2 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " EXPI_DMA_CFG[1] ,Expansion interface DMA channel 1 transfer type definition" "Disabled,Enabled" bitfld.long 0x04 5. " EXPI_DMA_CFG[0] ,Expansion interface DMA channel 0 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EXPI_SYNT_ENB ,Expi clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x04 1.--3. " EXPI_CLK_SEL ,Expansion interface source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." textline " " bitfld.long 0x04 0. " PORTCTR_CLK_ENB ,Port controller logic clock gating functionality" "Disabled,Enabled" group.long 0x5c--0x7b "Auxiliary clock synthesizer Registers" line.long 0x0 "CLCD_CLK_SYNT,CLCD_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "GMAC_CLK_SYNT,GMAC_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x1C "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x1C 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x1C 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x1C 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x1C 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 "Soft reset control" line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 30. " DDR_ENBR ,DDR memory controller reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDRCORE_SWRST ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDRCTRL_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " USBH2_SWRST ,Active usb2 host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" bitfld.long 0x00 23. " GMAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CLCD_SWRST ,Active color lcd controller reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO3_SWRST ,Active gpio-3 reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SSP3_SWRST ,Active ssp-3 reset" "Disabled,Enabled" bitfld.long 0x00 13. " GPIO4_SWRST ,Active gpio-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " GPTM5_SWRST ,Active general purpose timer-5 reset" "Disabled,Enabled" bitfld.long 0x00 11. " GPTM4_SWRST ,Active general purpose timer-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IRDA_SWRST ,Active irda reset" "Disabled,Enabled" bitfld.long 0x00 9. " FSMC_SWRST ,Active nand flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SSP2_SWRST ,Active ssp-2 reset" "Disabled,Enabled" bitfld.long 0x00 5. " SSP1_SWRST ,Active ssp-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UART2_SWRST ,Active uart-2 reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARM2_SWRST ,Active Arm-2 subsystem reset" "Disabled,Enabled" bitfld.long 0x00 1. " ARM1_SWRST ,Active Arm-1 subsystem reset" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ARM1_ENBR ,Arm1 reset enable" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" width 15. group.long 0x7c--0x9f "SoC configuration basic parameter" line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xb0++0x03 line.long 0x00 "ICM10_ARB_CFG,ICM10_ARB_CFG Register" bitfld.long 0x00 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x00 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0f line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHA15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,Expi_7 out(rfu),?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHA14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,Expi_7 inp(rfu),?..." textline " " bitfld.long 0x00 26.--27. " DMA_CFG_CHA13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,Expi_6 out(rfu),?..." bitfld.long 0x00 24.--25. " DMA_CFG_CHA12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,Expi_6 inp(rfu),?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHA11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,Expi_5 out(rfu),?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHA10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,Expi_5 inp(rfu),?..." textline " " bitfld.long 0x00 18.--19. " DMA_CFG_CHA09 ,Dma channel 9 configuration scheme" "SPP1 out,RAS_4 out,Expi_4 out(rfu),?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHA08 ,Dma channel 8 configuration scheme" "SPP1 inp,RAS_4 inp,Expi_4 inp(rfu),?..." textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHA07 ,Dma channel 7 configuration scheme" "SPP3 out,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHA06 ,Dma channel 6 configuration scheme" "SPP3 inp,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHA05 ,Dma channel 5 configuration scheme" "Uart2 out,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHA04 ,Dma channel 4 configuration scheme" "Uart2 inp,RAS_2 inp,?..." textline " " bitfld.long 0x00 6.--7. " DMA_CFG_CHA03 ,Dma channel 3 configuration scheme" "Uart1 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHA02 ,Dma channel 2 configuration scheme" "Uart1 inp,RAS_1 inp,Expi_1 in/out,?..." textline " " bitfld.long 0x00 2.--3. " DMA_CFG_CHA01 ,Dma channel 1 configuration scheme" "SPP2 out,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHA00 ,Dma channel 0 configuration scheme" "SPP2 inp,RAS_0 inp,Expi_0 in/out,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 14. " RXERROR3_USBH2 ,Usb receiver error 3" "No error,Error" bitfld.long 0x04 13. " RXERROR2_USBH1 ,Usb receiver error 2" "No error,Error" textline " " bitfld.long 0x04 12. " RXERROR1_USBDV ,Usb receiver error 1" "No error,Error" bitfld.long 0x04 10. " PHYRESET_CHN3 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 9. " PHYRESET_CHN2 ,Usb2 triple phy soft reset command" "No reset,Reset" bitfld.long 0x04 8. " PHYRESET_CHN1 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" bitfld.long 0x04 1. " PLL_PWDN ,USB phy Pll3 power down" "Enabled,Powered down" textline " " bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "GMII_txclk125' signal,PLL2 output clock,30Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" line.long 0x0c "EXPI_CFG_CTR,EXPI_CFG_CTR Register" bitfld.long 0x0C 28.--31. " ML3ICM9_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" bitfld.long 0x0C 27. " ML3H2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " ML3H2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 25. " ML3H2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 24. " ML3H2H_CLKSYNC ,Asynchronous bridge master/slave clock type definition" "Asynchronous,Synchronous" bitfld.long 0x0C 20.--23. " IC8EH2H_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" textline " " bitfld.long 0x0C 19. " EXPI_INTOUT_REQ ,Expansion interface software interrupt output request" "Not requested,Requested" bitfld.long 0x0C 18. " ICM8EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " ICM8EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 16. " ICM8EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 15. " ICM8EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 14. " ICM8EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 13. " ICM8EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 12. " ICM8EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " EXPI_FULLADDR_ENB ,Enable full 32 bit haddr on expi interface" "Least 24 bit,32 bit" bitfld.long 0x0C 6. " ICM9EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ICM9EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 4. " ICM9EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 3. " ICM9EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 2. " ICM9EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 1. " ICM9EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 0. " ICM9EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" width 15. group.long 0xc0++0x03 "Inter-processor communication functionality" line.long 0x0 "PRC3_LOCK_CTR,PRC3_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x03 line.long 0x00 "PRC3_IRQ_CTR,PRC3_IRQ_CTR Register" bitfld.long 0x00 21. " INT3_REQ_PRC4_2 ,Pending Proc-4 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 20. " INT3_REQ_PRC4_1 ,Pending Proc-4 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 19. " INT3_REQ_PRC2_2 ,Pending Proc-2 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 18. " INT3_REQ_PRC2_1 ,Pending Proc-2 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 17. " INT3_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 16. " INT3_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 5. " INT4_REQ_PRC3_2 ,Interrupt request for the Proc-4 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 4. " INT4_REQ_PRC3_1 ,Interrupt request for the Proc-4 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x00 3. " INT2_REQ_PRC3_2 ,Interrupt request for the Proc-2 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 2. " INT2_REQ_PRC3_1 ,Interrupt request for the Proc-2 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x00 1. " INT1_REQ_PRC3_2 ,Interrupt request for the Proc-1 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 0. " INT1_REQ_PRC3_1 ,Interrupt request for the Proc-1 irq. Line-1" "Not requested,Requested" width 17. group.long 0xe0++0x13 "Special configuration parameters" line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " wakeup_fiq_enb ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Fiq" line.long 0x4 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" hexmask.long.byte 0x4 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x4 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x4 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x4 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x4 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x4 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x4 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x4 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x8 "COMPSSTL_2V5_CFG,COMPSSTL_2V5_CFG Register" hexmask.long.byte 0x8 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x8 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x8 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x8 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x8 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x8 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x8 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x8 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x0c "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" hexmask.long.byte 0x0c 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x0c 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x0c 4. " sts_ok ,Valid code compensation" "Low,High" textline " " bitfld.long 0x0c 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x0c 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x0c 1. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x0c 0. " EN ,Compensation cell internal command parameter" "Low,High" line.long 0x10 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" bitfld.long 0x10 31. " LVDS_BENGUP_ENB ,Pad LVDS bang-up enable" "Enabled,Disabled" textline " " bitfld.long 0x10 16.--19. " SWKEY_DDRSEL ,External memory interface configuration type" "HW memory auto-conf.,Reserved,Reserved,Reserved,Reserved,Reserved,SW memory conf.,?..." textline " " bitfld.long 0x10 15. " DRAM_TYPE ,Memory interface configuration type" "DDR1,DDR2" bitfld.long 0x10 14. " COM_REF ,Internal/External SSTL common reference voltage definition" "Internal,External" textline " " bitfld.long 0x10 12. " PSEUDO_DIF_DIS ,DQS0;1 SSTL pad differential/single ended configuration type" "Differential,Single ended" bitfld.long 0x10 10.--11. " NDQS_PDN/PU_SEL ,Programmable nDQS0;1 Pull down/up functionality connected with PDCLKB signal of SSTL differential pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 3. " DRIVE_MODE_S_W ,SSTL pad drive strain mode" "Strong,Weak" textline " " bitfld.long 0x10 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" bitfld.long 0x10 0. " SSTL_SEL ,SW Memory model selection" "DDR1(SSTL2V5),DDR2(SSTL1V8)" group.long 0xf4++0x27 "Memory bist execution control" line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(LCDC palette Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" textline " " bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" textline " " bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" textline " " bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Gmac_rxfifo)" "Disabled,Run" bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Gmac_txfifo)" "Disabled,Run" textline " " bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" bitfld.long 0x00 1. " RBACT1[01] ,Run bist execution command(Usb_host_2)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host_1)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras buf. Sp1Kx32_1:8)" "Disabled,Run" bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras buf. Dp1Kx32_1:4)" "Disabled,Run" textline " " bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras buf. Sp2Kx32_1:4)" "Disabled,Run" bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras hwac.Sp48x128_1:3)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras buf. Dp512Kx32_1:8)" "Disabled,Run" bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras buf. Sp512x32_9:16)" "Disabled,Run" textline " " bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras buf. Sp512x32_1:8)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(Rbact (arm-1) memory pool)" "Disabled,Run" line.long 0x10 "BIST5_CFG_CTR,BIST5_CFG_CTR Register" bitfld.long 0x10 31. " BIST5_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x10 28. " BIST5_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x10 24.--27. " BIST5_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x10 0. " RBACT5[00] ,Run bist execution command(Rbact (arm-2) memory pool)" "Disabled,Run" line.long 0x14 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x14 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x14 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x14 13. " BBAD1[13] ,Bist execution result(LCDC palette Fifo)" "Not failed,Failed" bitfld.long 0x14 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x14 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x14 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x14 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x14 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x14 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x14 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x14 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x14 4. " BBAD1[04] ,Bist execution result(Gmac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x14 3. " BBAD1[03] ,Bist execution result(Gmac_txfifo)" "Not failed,Failed" bitfld.long 0x14 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x14 1. " BBAD1[01] ,Bist execution result(Usb_host_2)" "Not failed,Failed" bitfld.long 0x14 0. " BBAD1[00] ,Bist execution result(Usb_host_1)" "Not failed,Failed" line.long 0x18 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x18 31. " BIST2_end ,End memory bist2 execution" "Pending,Ended" bitfld.long 0x18 18. " BBAD2[18] ,Bist execution result(Ras buf. Sp1Kx32_8)" "Not failed,Failed" textline " " bitfld.long 0x18 17. " BBAD2[17] ,Bist execution result(Ras buf. Sp1Kx32_7)" "Not failed,Failed" bitfld.long 0x18 16. " BBAD2[16] ,Bist execution result(Ras buf. Sp1Kx32_6)" "Not failed,Failed" textline " " bitfld.long 0x18 15. " BBAD2[15] ,Bist execution result(Ras buf. Sp1Kx32_5)" "Not failed,Failed" bitfld.long 0x18 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 8. " BBAD2[08] ,Bist execution result(Ras buf. Dp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 7. " BBAD2[07] ,Bist execution result(Ras buf. Dp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 6. " BBAD2[06] ,Bist execution result(Ras buf. Sp2Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 5. " BBAD2[05] ,Bist execution result(Ras buf. Sp2Kx32_3)" "Not failed,Failed" bitfld.long 0x18 4. " BBAD2[04] ,Bist execution result(Ras buf. Sp2Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 3. " BBAD2[03] ,Bist execution result(Ras buf. Sp2Kx32_1)" "Not failed,Failed" bitfld.long 0x18 2. " BBAD2[02] ,Bist execution result(Ras hwacc.Sp48x128_3)" "Not failed,Failed" textline " " bitfld.long 0x18 1. " BBAD2[01] ,Bist execution result(Ras hwacc.Sp48x128_2)" "Not failed,Failed" bitfld.long 0x18 0. " BBAD2[00] ,Bist execution result(Ras hwacc.Sp48x128_1)" "Not failed,Failed" line.long 0x1c "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x1c 31. " BIST3_end ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x1c 23. " BBAD3[23] ,Bist execution result(Ras buf. Dp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 22. " BBAD3[22] ,Bist execution result(Ras buf. Dp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 21. " BBAD3[21] ,Bist execution result(Ras buf. Dp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 20. " BBAD3[20] ,Bist execution result(Ras buf. Dp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 19. " BBAD3[19] ,Bist execution result(Ras buf. Dp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 18. " BBAD3[18] ,Bist execution result(Ras buf. Dp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 17. " BBAD3[17] ,Bist execution result(Ras buf. Dp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 16. " BBAD3[16] ,Bist execution result(Ras buf. Dp512x32_1)" "Not failed,Failed" bitfld.long 0x1c 15. " BBAD3[15] ,Bist execution result(Ras buf. Sp512x32_16)" "Not failed,Failed" textline " " bitfld.long 0x1c 14. " BBAD3[14] ,Bist execution result(Ras buf. Sp512x32_15)" "Not failed,Failed" bitfld.long 0x1c 13. " BBAD3[13] ,Bist execution result(Ras buf. Sp512x32_14)" "Not failed,Failed" textline " " bitfld.long 0x1c 12. " BBAD3[12] ,Bist execution result(Ras buf. Sp512x32_13)" "Not failed,Failed" bitfld.long 0x1c 11. " BBAD3[11] ,Bist execution result(Ras buf. Sp512x32_12)" "Not failed,Failed" textline " " bitfld.long 0x1c 10. " BBAD3[10] ,Bist execution result(Ras buf. Sp512x32_11)" "Not failed,Failed" bitfld.long 0x1c 9. " BBAD3[09] ,Bist execution result(Ras buf. Sp512x32_10)" "Not failed,Failed" textline " " bitfld.long 0x1c 8. " BBAD3[08] ,Bist execution result(Ras buf. Sp512x32_9)" "Not failed,Failed" bitfld.long 0x1c 7. " BBAD3[07] ,Bist execution result(Ras buf. Sp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 6. " BBAD3[06] ,Bist execution result(Ras buf. Sp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 5. " BBAD3[05] ,Bist execution result(Ras buf. Sp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 4. " BBAD3[04] ,Bist execution result(Ras buf. Sp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 3. " BBAD3[03] ,Bist execution result(Ras buf. Sp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 2. " BBAD3[02] ,Bist execution result(Ras buf. Sp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 1. " BBAD3[01] ,Bist execution result(Ras buf. Sp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 0. " BBAD3[00] ,Bist execution result(Ras buf. Sp512x32_1)" "Not failed,Failed" line.long 0x20 "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x20 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x20 19. " BBAD4[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 18. " BBAD4[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 17. " BBAD4[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 16. " BBAD4[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 15. " BBAD4[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 14. " BBAD4[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x20 13. " BBAD4[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x20 12. " BBAD4[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x20 11. " BBAD4[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 10. " BBAD4[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 9. " BBAD4[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 8. " BBAD4[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 7. " BBAD4[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 6. " BBAD4[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 5. " BBAD4[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 4. " BBAD4[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 3. " BBAD4[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 2. " BBAD4[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x20 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" line.long 0x24 "BIST5_STS_RES,BIST5_STS_RES Register" bitfld.long 0x24 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x24 19. " BBAD[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 18. " BBAD[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 17. " BBAD[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 16. " BBAD[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 15. " BBAD[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 14. " BBAD[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x24 13. " BBAD[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x24 12. " BBAD[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x24 11. " BBAD[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 10. " BBAD[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 9. " BBAD[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 8. " BBAD[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 7. " BBAD[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 6. " BBAD[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 5. " BBAD[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 4. " BBAD[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 3. " BBAD[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 2. " BBAD[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x24 1. " BBAD[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 0. " BBAD[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 "Diagnostic functionality" line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 21. " EXPI_EH2HS_ERR ,Expansion interface write deferred error" "No error,Error" textline " " bitfld.long 0x00 20. " EXPI_EH2HM_ERR ,Expansion interface write deferred error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXP_ERR_ENB ,Enable AHB Expansion interface write deferred error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 16.--23. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" textline " " hexmask.long.byte 0x00 8.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" hexmask.long.byte 0x00 0.--7. 1. " CUSTOM_ID ,Customization type" rgroup.long 0x3c++0x03 line.long 0x00 "SOC_USER_ID,SOC_USER_ID Register" hexmask.long.word 0x00 16.--31. 1. " Spear_magic_number ,Spear magic number" width 0xb else width 18. rgroup.long 0x00++0x03 line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x0 6.--18. 1. " FIXED ,Fixed Value" textline " " endif bitfld.long 0x0 0.--5. " SOC_CFG ,SoC operating mode" "Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,?..." group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 15. " DEBUG_FREEZ ,Enable freeze condition when processor enters in debug mode" "Disabled,Enabled" bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 4.--5. " SOC_DBG6 ,Spear300 debug configuration" "Dbg_disab,Dbg_etm1,Dbg_jtag1,?..." group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL2_MOD,PLL2_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Sync. mode PLL2,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,Sync. mode PLL1,?..." textline " " else bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Reserved,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,?..." textline " " endif bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(4) sig.,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI24_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI24_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" bitfld.long 0x00 16. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" bitfld.long 0x00 12. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK(3) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 31. " C3_CLOCK_ENB ,C3 clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDR_CORE_ENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDR_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 26. " USBH_CLOCK ,Enable usb ehci host reset" "Disabled,Enabled" textline " " endif bitfld.long 0x04 25. " USBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" bitfld.long 0x04 23. " MAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO_CLKENB ,Enable gpio clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " GPT3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" bitfld.long 0x04 11. " GPT2_CLKENB ,Enable general purpose timer-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " FIRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 5. " SSP_CLKENB ,Enable ssp clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART_CLKENB ,Enable uart clock" "Disabled,Enabled" bitfld.long 0x04 1. " ARM_CLKENB ,Enable Arm subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ARM_ENB ,Enable Arm clock gating functionality" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 20.--23. 1. " SOC_PLATFORM ,Soc_platform" textline " " hexmask.long.byte 0x00 16.--22. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" hexmask.long.byte 0x00 10.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" textline " " hexmask.long.byte 0x00 4.--7. 1. " TECH_TYPE ,Tech Type" endif group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (4) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CLK24M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.long 0x50++0x03 line.long 0x00 "AMEM_CFG_CTRL,AMEM_CFG_CTRL Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X(7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y(7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory Port-1 soft reset" "Disabled,Enabled" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory Port-1 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory Port-1 source clock" "HCLK,PLL1,PLL2,Ras_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory Port-1 clock gate" "Disabled,Enabled" endif group.long 0x60++0x1b line.long 0x0 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "MAC_CLK_SYNT,MAC_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 31. " C3_RESET ,C3 reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDR_CORE_ENBR ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDR_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26. " USBH1_EHCI_SWRST ,Active usb1 ehci host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_OHCI_SWRST ,Active usb1 ohci host reset" "Disabled,Enabled" textline " " else bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" endif bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO_SWRST ,Active gpio reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" bitfld.long 0x00 12. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " GPTM2_SWRST ,Active general purpose timer-2 reset" "Disabled,Enabled" bitfld.long 0x00 10. " FIRDA_SWRST ,Active firda reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SSP_SWRST ,Active ssp reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart reset" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARM_SWRST ,Active Arm subsystem reset" "Disabled,Enabled" bitfld.long 0x00 0. " ARM_ENBR ,Arm reset enable" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0x3C++0x03 line.long 0x00 "SOC_USER_ID,SOC User ID Register" hexmask.long.byte 0x00 27.--31. 1. " USER_ID ,User Id" hexmask.long.byte 0x00 16.--23. 1. " USER_VERSION ,User Version" textline " " hexmask.long.byte 0x00 10.--15. 1. " USER_VERSION ,User Version" endif group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK24M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" group.long 0x7c--0x9f line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0b line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHAN15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHAN14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,?..." else bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "Reserved,RAS_6 out,?..." endif bitfld.long 0x00 24.--25. " DMA_CFG_CHAN12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHAN11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHAN10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SSP0 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SSP0 inp,RAS_4 inp,?..." else bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SPI1 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SPI1 inp,RAS_4 inp,?..." endif textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHAN07 ,Dma channel 7 configuration scheme" "Reserved,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHAN06 ,Dma channel 6 configuration scheme" "Reserved,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHAN05 ,Dma channel 5 configuration scheme" "Reserved,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHAN04 ,Dma channel 4 configuration scheme" "Reserved,RAS_2 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart0 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart0 inp,RAS_1 inp,?..." textline " " else bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart inp,RAS_1 inp,?..." textline " " endif bitfld.long 0x00 2.--3. " DMA_CFG_CHAN01 ,Dma channel 1 configuration scheme" "Reserved,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHAN00 ,Dma channel 0 configuration scheme" "Reserved,RAS_0 inp,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 0. " PLL_PWDN ,State of PLL blocks" "Powered up,Powered down" else bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x08 "MAC_CFG_CTR,MAC_CFG_CTR Register" bitfld.long 0x08 4. " MAC_SYNT_ENB ,Mac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " MAC_CLK_SEL ,Mac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" else line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" endif sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0xc0++0x03 line.long 0x0 "PRC3_LOCK_CTR,PRC3_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x03 line.long 0x00 "PRC3_IRQ_CTR,PRC3_IRQ_CTR Register" bitfld.long 0x00 17. " INT3_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 16. " INT3_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" endif group.long 0xe0++0x07 line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " WAKEUP_FIQ_ENB ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Firq" line.long 0x04 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" bitfld.long 0x04 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x04 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " hexmask.long.byte 0x04 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x04 4. " COMPOK ,Valid code compensation" "Not valid,Valid" textline " " bitfld.long 0x04 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x04 2. " FREEZE ,Freeze command" "Not frozen,Frozen" textline " " bitfld.long 0x04 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x04 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" group.long 0xec++0x07 line.long 0x00 "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" bitfld.long 0x00 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x00 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.byte 0x00 16.--22. 1. " NASRC ,Copy of code on compensation bus" textline " " endif bitfld.long 0x00 4. " COMPOK ,Valid code compensation" "Low,High" bitfld.long 0x00 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" textline " " bitfld.long 0x00 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x00 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x00 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x04 "DDR_PAD,DDR_PAD Register" else line.long 0x04 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" endif bitfld.long 0x04 15.--18. " DDR_SW_MODE ,External memory interface configuration type" "HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,SW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf." bitfld.long 0x04 14. " DDR_EN_PAD ,DDR (Low Power) or DDR2 (RO)" "DDR2,DDR low power" textline " " bitfld.long 0x04 13. " REFSSTL ,Internal/External SSTL common reference voltage definition" "Internal,External" bitfld.long 0x04 12. " GATE_OPEN_MODE ,GATE_OPEN_MODE" "Low,High" textline " " bitfld.long 0x04 10. " ENZI ,Input buffer enable" "Disabled,Enabled" bitfld.long 0x04 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x04 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 3. " S_W_MODE ,SSTL pad drive strain mode" "Strong,Weak" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "200MHz,266MHz,333MHz,?..." else bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" endif bitfld.long 0x04 0. " DDR_LOW_POWER_DDR2_MODE ,SW Memory model selection" "DDR2,DDR low power" group.long 0xf4++0xf line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" textline " " bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(Application SubSys.)" "Disabled,Run" bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" textline " " bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" textline " " bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" textline " " bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Mac_rxfifo)" "Disabled,Run" textline " " bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Mac_txfifo)" "Disabled,Run" bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras local data buffer 0)" "Disabled,Run" textline " " bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras local data buffer 1)" "Disabled,Run" bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras HWACC data buffer)" "Disabled,Run" textline " " bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras HWACC data desc.)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras local data buffer 2)" "Disabled,Run" textline " " bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras local data buffer 3_0)" "Disabled,Run" bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras local data buffer 3_1)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x0c 7. " RBACT4[07] ,Run bist execution command(ARM926CM_MMU)" "Disabled,Run" textline " " bitfld.long 0x0c 6. " RBACT4[06] ,Run bist execution command(ARM926CM_IValid)" "Disabled,Run" bitfld.long 0x0c 5. " RBACT4[05] ,Run bist execution command(ARM926CM_ITag)" "Disabled,Run" textline " " bitfld.long 0x0c 4. " RBACT4[04] ,Run bist execution command(ARM926CM_ICAche)" "Disabled,Run" bitfld.long 0x0c 3. " RBACT4[03] ,Run bist execution command(ARM926CM_DValid)" "Disabled,Run" textline " " bitfld.long 0x0c 2. " RBACT4[02] ,Run bist execution command(ARM926CM_DTag)" "Disabled,Run" bitfld.long 0x0c 1. " RBACT4[01] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" rgroup.long 0x108++0xf line.long 0x00 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x00 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x00 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x00 13. " BBAD1[13] ,Bist execution result(Application SubSys.)" "Not failed,Failed" bitfld.long 0x00 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x00 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x00 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x00 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x00 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x00 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x00 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x00 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x00 4. " BBAD1[04] ,Bist execution result(Mac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x00 3. " BBAD1[03] ,Bist execution result(Mac_txfifo)" "Not failed,Failed" bitfld.long 0x00 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD1[00] ,Bist execution result(Usb_host)" "Not failed,Failed" line.long 0x04 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x04 31. " BIST2_END ,End memory bist2 execution" "Pending,Ended" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc SpDp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc SpDp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc SpDp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc SpDp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc SpDp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc SpDp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc SpDp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc SpDp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr Dp96x128)" "Not failed,Failed" else bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp8K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Sp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc dp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc dp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc dp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc dp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc dp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc dp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc dp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc dp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr dp96x128)" "Not failed,Failed" endif line.long 0x08 "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x08 31. " BIST3_END ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x08 13. " BBAD3[13] ,Bist execution result(Ras buf. sp2K8_8)" "Not failed,Failed" textline " " bitfld.long 0x08 12. " BBAD3[12] ,Bist execution result(Ras buf. sp2K8_7)" "Not failed,Failed" bitfld.long 0x08 11. " BBAD3[11] ,Bist execution result(Ras buf. sp2K8_6)" "Not failed,Failed" textline " " bitfld.long 0x08 10. " BBAD3[10] ,Bist execution result(Ras buf. sp2K8_5)" "Not failed,Failed" bitfld.long 0x08 9. " BBAD3[09] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 8. " BBAD3[08] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 7. " BBAD3[07] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 6. " BBAD3[06] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" bitfld.long 0x08 5. " BBAD3[05] ,Bist execution result(Ras buf. sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 4. " BBAD3[04] ,Bist execution result(Ras buf. sp4K8_1)" "Not failed,Failed" bitfld.long 0x08 3. " BBAD3[03] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 2. " BBAD3[02] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 1. " BBAD3[01] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 0. " BBAD3[00] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" line.long 0x0c "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x0c 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x0c 13. " BBAD4[13] ,Bist execution result(Arm ddata Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x0c 12. " BBAD4[12] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x0c 11. " BBAD4[11] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x0c 10. " BBAD4[10] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x0c 9. " BBAD4[09] ,Bist execution result(Arm dtag Sp256Kx22)" "Not failed,Failed" textline " " bitfld.long 0x0c 8. " BBAD4[08] ,Bist execution result(Arm dcvalid Sp32x24)" "Not failed,Failed" bitfld.long 0x0c 7. " BBAD4[07] ,Bist execution result(Arm dcdirty Sp128x8)" "Not failed,Failed" textline " " bitfld.long 0x0c 6. " BBAD4[06] ,Bist execution result(Arm iicdata Sp1kx32_4)" "Not failed,Failed" bitfld.long 0x0c 5. " BBAD4[05] ,Bist execution result(Arm iicdata Sp1kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x0c 4. " BBAD4[04] ,Bist execution result(Arm iicdata Sp1kx32_2)" "Not failed,Failed" bitfld.long 0x0c 3. " BBAD4[03] ,Bist execution result(Arm icdata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x0c 2. " BBAD4[02] ,Bist execution result(Arm itag Sp128x88)" "Not failed,Failed" bitfld.long 0x0c 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32x24)" "Not failed,Failed" textline " " bitfld.long 0x0c 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" rgroup.long 0x118++0x03 sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x00 "BIST5_RSLT_REG,BIST5_RSLT_REG Register" else line.long 0x00 "BIST5_STS_RES,BIST5_STS_RES Register" endif bitfld.long 0x00 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x00 19. " BBAD5[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 18. " BBAD5[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 17. " BBAD5[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 16. " BBAD5[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 15. " BBAD5[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 14. " BBAD5[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x00 13. " BBAD5[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x00 12. " BBAD5[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x00 11. " BBAD5[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 10. " BBAD5[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 9. " BBAD5[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 8. " BBAD5[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 7. " BBAD5[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 6. " BBAD5[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 5. " BBAD5[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 4. " BBAD5[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 3. " BBAD5[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 2. " BBAD5[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x00 1. " BBAD5[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD5[00] ,Bist execution result(ARM MMU Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" endif textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" textline " " bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "USB0_TUN_PRM,USB0_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x124++0x03 line.long 0x00 "USB1_TUN_PRM,USB1_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x128++0x03 line.long 0x00 "USB2_TUN_PRM,USB2_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x130++0x13 line.long 0x00 "PLGPIO0_PAD_PRG,PLGPIO0_PAD_PRG Register" bitfld.long 0x00 31. " PDN_UART ,Pull down control for UART lines" "No effect,Pull down" bitfld.long 0x00 30. " PUP_UART ,Pull up control for UART lines" "No effect,Pull up" textline " " bitfld.long 0x00 29. " PDN_5 ,Pull down control for pads 20,21,22,23" "No effect,Pull down" bitfld.long 0x00 28. " PUP_5 ,Pull up control for pads 20,21,22,23" "No effect,Pull up" textline " " bitfld.long 0x00 26.--27. " DRV_5 ,Drive strength control for pads 20, 21,22, 23" "0,1,2,3" bitfld.long 0x00 25. " SLEW_5 ,Slew rate control for pads 20,21,22,23" "Low,High" textline " " bitfld.long 0x00 24. " PDN_4 ,Pull down control for pads 16,17,18,19" "No effect,Pull down" bitfld.long 0x00 23. " PUP_4 ,Pull up control for pads 16,17,18,19" "No effect,Pull up" textline " " bitfld.long 0x00 21.--22. " DRV_4 ,Drive strength control for pads 16,17,18,19" "0,1,2,3" bitfld.long 0x00 20. " SLEW_4 ,Slew control for pads 16,17,18,19" "Low,High" textline " " bitfld.long 0x00 19. " PDN_3 ,Pull down control for pads 12,13,14,15" "No effect,Pull down" bitfld.long 0x00 18. " PUP_3 ,Pull up control for pads 12,13,14,15" "No effect,Pull up" textline " " bitfld.long 0x00 16.--17. " DRV_3 ,Drive strength control for pads PL-GPIO 15, 14, 13 and 12" "0,1,2,3" bitfld.long 0x00 15. " SLEW_3 ,Slew control for pads 12,13,14,15" "Low,High" textline " " bitfld.long 0x00 14. " PDN_2 ,Pull down control for pads 8,9" "No effect,Pull down" bitfld.long 0x00 13. " PUP_2 ,Pull up control for pads 8,9" "No effect,Pull up" textline " " bitfld.long 0x00 11.--12. " DRV_2 ,Drive strength control for pads 8,9,10,11" "0,1,2,3" bitfld.long 0x00 10. " SLEW_2 ,Slew control for pads 8,9,10,11" "Low,High" textline " " bitfld.long 0x00 9. " PDN_1 ,Pull down control for pads 6,7" "No effect,Pull down" bitfld.long 0x00 8. " PUP_1 ,Pull up control for pads 6,7" "No effect,Pull up" textline " " bitfld.long 0x00 6.--7. " DRV_1 ,Drive strength control for pads 4,5,6,7" "0,1,2,3" bitfld.long 0x00 5. " SLEW_1 ,Slew control for pads 4,5,6,7" "Low,High" textline " " bitfld.long 0x00 4. " PDN_0 ,Pull down control for pads 0,1" "No effect,Pull down" bitfld.long 0x00 3. " PUP_0 ,Pull up control for pads 0,1" "No effect,Pull up" textline " " bitfld.long 0x00 1.--2. " DRV_0 ,Drive strength control for pads 0,1,2,3" "0,1,2,3" bitfld.long 0x00 0. " SLEW_0 ,Slew control for pads 0,1,2,3" "Low,High" line.long 0x04 "PLGPIO1_PAD_PRG,PLGPIO1_PAD_PRG Register" bitfld.long 0x04 31. " PDN_I2C ,Pull down control for I2C lines" "No effect,Pull down" bitfld.long 0x04 30. " PUP_I2C ,Pull up control for I2C lines" "No effect,Pull up" textline " " bitfld.long 0x04 29. " PDN_11 ,Pull down control for pads 45,46,47" "No effect,Pull down" bitfld.long 0x04 28. " PUP_11 ,Pull up control for pads 45,46,47" "No effect,Pull up" textline " " bitfld.long 0x04 26.--27. " DRV_11 ,Drive strength control for pads 44,45,46,47" "0,1,2,3" bitfld.long 0x04 25. " SLEW_11 ,Slew control for pads 44,45,46,47" "Low,High" textline " " bitfld.long 0x04 24. " PDN_10 ,Pull down control for pads 40,41,42,43,44" "No effect,Pull down" bitfld.long 0x04 23. " PUP_10 ,Pull up control for pads 40,41,42,43,44" "No effect,Pull up" textline " " bitfld.long 0x04 21.--22. " DRV_10 ,Drive strength control for pads 40,41,42,43" "0,1,2,3" bitfld.long 0x04 20. " SLEW_10 ,Slew control for pads 40,41,42,43" "Low,High" textline " " bitfld.long 0x04 19. " PDN_9 ,Pull down control for pads 37,38,39" "No effect,Pull down" bitfld.long 0x04 18. " PUP_9 ,Pull up control for pads 37,38,39" "No effect,Pull up" textline " " bitfld.long 0x04 16.--17. " DRV_9 ,Drive strength control for pads 36,37,38,39" "0,1,2,3" bitfld.long 0x04 15. " SLEW_9 ,Slew control for pads 36,37,38,39" "Low,High" textline " " bitfld.long 0x04 14. " PDN_8 ,Pull down control for pads 32,33,34,35,36" "No effect,Pull down" bitfld.long 0x04 13. " PUP_8 ,Pull up control for pads 32,33,34,35,36" "No effect,Pull up" textline " " bitfld.long 0x04 11.--12. " DRV_8 ,Drive strength control for pads 32,33,34,35" "0,1,2,3" bitfld.long 0x04 10. " SLEW_8 ,Slew control for pads 32,33,34,35" "Low,High" textline " " bitfld.long 0x04 9. " PDN_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull down" bitfld.long 0x04 8. " PUP_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull up" textline " " bitfld.long 0x04 6.--7. " DRV_7 ,Pull up control for pads 28,29,30,31" "0,1,2,3" bitfld.long 0x04 5. " SLEW_7 ,Drive Strength control for pads 28,29,30,31" "Low,High" textline " " bitfld.long 0x04 4. " PDN_6 ,Pull down control for pads 24,25,26,27" "No effect,Pull down" bitfld.long 0x04 3. " PUP_6 ,Pull up control for pads 24,25,26,27" "No effect,Pull up" textline " " bitfld.long 0x04 1.--2. " DRV_6 ,Drive strength control for pads 24,25,26,27" "0,1,2,3" bitfld.long 0x04 0. " SLEW_6 ,Slew rate control for PL-GPIO 27, 26, 25, and 24" "Low,High" line.long 0x08 "PLGPIO2_PAD_PRG,PLGPIO2_PAD_PRG Register" bitfld.long 0x08 31. " PDN_ETHERNET ,Pull down control for ETHERNET" "No effect,Pull down" bitfld.long 0x08 30. " PUP_ETHERNET ,Pull up control for ETHERNET" "No effect,Pull up" textline " " bitfld.long 0x08 29. " PDN_17 ,Pull down control for pads 68,69,70,71" "No effect,Pull down" bitfld.long 0x08 28. " PUP_17 ,Pull up control for pads 68,69,70,71" "No effect,Pull up" textline " " bitfld.long 0x08 26.--27. " DRV_17 ,Drive strength control for pads 68,69,70,71" "0,1,2,3" bitfld.long 0x08 25. " SLEW_17 ,Slew control for pads 68,69,70,71" "Low,High" textline " " bitfld.long 0x08 24. " PDN_16 ,Pull down control for pads 64,65,66,67" "No effect,Pull down" bitfld.long 0x08 23. " PUP_16 ,Pull up control for pads 64,65,66,67" "No effect,Pull up" textline " " bitfld.long 0x08 21.--22. " DRV_16 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 20. " SLEW_16 ,Slew control for pads 64,65,66,67" "Low,High" textline " " bitfld.long 0x08 19. " PDN_15 ,Pull down control for pads 60,61,62,63" "No effect,Pull down" bitfld.long 0x08 18. " PUP_15 ,Pull up control for pads 60,61,62,63" "No effect,Pull up" textline " " bitfld.long 0x08 16.--17. " DRV_15 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 15. " SLEW_15 ,Slew rate control for pads 60,61,62,63" "Low,High" textline " " bitfld.long 0x08 14. " PDN_14 ,Pull down control for pads 56,57,58,59" "No effect,Pull down" bitfld.long 0x08 13. " PUP_14 ,Pull up control for pads 56,57,58,59" "No effect,Pull up" textline " " bitfld.long 0x08 11.--12. " DRV_14 ,Drive strength control for pads 56,57,58,59" "0,1,2,3" bitfld.long 0x08 10. " SLEW_14 ,Slew control for pads 56,57,58,59" "Low,High" textline " " bitfld.long 0x08 9. " PDN_13 ,Pull down control for pads 52,53,54,55" "No effect,Pull down" bitfld.long 0x08 8. " PUP_13 ,Pull up control for pads 52,53,54,55" "No effect,Pull up" textline " " bitfld.long 0x08 6.--7. " DRV_13 ,Pull up control for pads 52,53,54,55" "0,1,2,3" bitfld.long 0x08 5. " SLEW_13 ,Drive strength control for pads 52,53,54,55" "Low,High" textline " " bitfld.long 0x08 4. " PDN_12 ,Pull down control for pads 48,49,50,51" "No effect,Pull down" bitfld.long 0x08 3. " PUP_12 ,Pull up control for pads 48,49,50,51" "No effect,Pull up" textline " " bitfld.long 0x08 1.--2. " DRV_12 ,Drive strength control for pads 48,49,50,51" "0,1,2,3" bitfld.long 0x08 0. " SLEW_12 ,Slew control for pads 48,49,50,51" "Low,High" line.long 0x0c "PLGPIO3_PAD_PRG,PLGPIO3_PAD_PRG Register" bitfld.long 0x0C 29. " PDN_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull down" bitfld.long 0x0C 28. " PUP_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull up" textline " " bitfld.long 0x0C 26.--27. " DRV_23 ,Drive strength control for pad 92,93,94,95" "0,1,2,3" bitfld.long 0x0C 25. " SLEW_23 ,Slew control for pads 92,93,94,95" "Low,High" textline " " bitfld.long 0x0C 24. " PDN_22 ,Pull down control for pads 88,89,90,91" "No effect,Pull down" bitfld.long 0x0C 23. " PUP_22 ,Pull up control for pads 88,89,90,91" "No effect,Pull up" textline " " bitfld.long 0x0C 21.--22. " DRV_22 ,Drive strength control for pads 88,89,90,91" "0,1,2,3" bitfld.long 0x0C 20. " SLEW_22 ,Slew control for pads 88,89,90,91" "Low,High" textline " " bitfld.long 0x0C 19. " PDN_21 ,Pull down control for pads 84,85,86,87" "No effect,Pull down" bitfld.long 0x0C 18. " PUP_21 ,Pull up control for pads 84,85,86,87" "No effect,Pull up" textline " " bitfld.long 0x0C 16.--17. " DRV_21 ,Drive strength control for pads 84,85,86,87" "0,1,2,3" bitfld.long 0x0C 15. " SLEW_21 ,Slew rate control for pads 84,85,86,87" "Low,High" textline " " bitfld.long 0x0C 14. " PDN_20 ,Pull down control for pads 80,81,82,83" "No effect,Pull down" bitfld.long 0x0C 13. " PUP_20 ,Pull up control for pads 80,81,82,83" "No effect,Pull up" textline " " bitfld.long 0x0C 11.--12. " DRV_20 ,Drive strength control for pads 80,81,82,83" "0,1,2,3" bitfld.long 0x0C 10. " SLEW_20 ,Slew rate control for pads 80,81,82,83" "Low,High" textline " " bitfld.long 0x0C 9. " PDN_19 ,Pull down control for pads 76,77,78,79" "No effect,Pull down" bitfld.long 0x0C 8. " PUP_19 ,Pull up control for pads 76,77,78,79" "No effect,Pull up" textline " " bitfld.long 0x0C 6.--7. " DRV_19 ,Drive strength control for pads 76,77,78,79" "0,1,2,3" bitfld.long 0x0C 5. " SLEW_19 ,Slew rate control for pads 76,77,78,79" "Low,High" textline " " bitfld.long 0x0C 4. " PDN_18 ,Pull down control for pads 72,72,74,75" "No effect,Pull down" bitfld.long 0x0C 3. " PUP_18 ,Pull up control for pads 72,72,74,75" "No effect,Pull up" textline " " bitfld.long 0x0C 1.--2. " DRV_18 ,Drive strength control for pads 72,72,74,75" "0,1,2,3" bitfld.long 0x0C 0. " SLEW_18 ,Slew rate control for pads 72,72,74,75" "Low,High" line.long 0x10 "PLGPIO4_PAD_PRG,PLGPIO4_PAD_PRG Register" bitfld.long 0x10 24. " PDN_CLK4 ,Pull down control for CLK4" "No effect,Pull down" bitfld.long 0x10 23. " PUP_CLK4 ,Pull up control for pads CLK4" "No effect,Pull up" textline " " bitfld.long 0x10 21.--22. " DRV_CLK4 ,Drive strength control for pads CLK4" "0,1,2,3" bitfld.long 0x10 20. " SLEW_CLK4 ,Slew rate control for pads CLK4" "Low,High" textline " " bitfld.long 0x10 19. " PDN_CLK3 ,Pull down control for pads CLK3" "No effect,Pull down" bitfld.long 0x10 18. " PUP_CLK3 ,Pull up control for pads CLK3" "No effect,Pull up" textline " " bitfld.long 0x10 16.--17. " DRV_CLK3 ,Drive strength control for pads CLK3" "0,1,2,3" bitfld.long 0x10 15. " SLEW_CLK3 ,Slew control for pads CLK3" "Low,High" textline " " bitfld.long 0x10 14. " PDN_CLK2 ,Pull down control for pads CLK2" "No effect,Pull down" bitfld.long 0x10 13. " PUP_CLK2 ,Pull up control for pads CLK2" "No effect,Pull up" textline " " bitfld.long 0x10 11.--12. " DRV_CLK2 ,Drive strength control for pads CLK2" "0,1,2,3" bitfld.long 0x10 10. " SLEW_CLK2 ,Slew rate control for pads CLK2" "Low,High" textline " " bitfld.long 0x10 9. " PDN_CLK1 ,Pull down control for pads CLK1" "No effect,Pull down" bitfld.long 0x10 8. " PUP_CLK1 ,Pull up control for pads CLK1" "No effect,Pull up" textline " " bitfld.long 0x10 6.--7. " DRV_CLK1 ,Drive strength control for pads CLK1" "0,1,2,3" bitfld.long 0x10 5. " SLEW_CLK1 ,Slew control for CLK1 and pads 96,97" "Low,High" textline " " bitfld.long 0x10 4. " PDN_24 ,Pull down control for pads 96,97" "No effect,Pull down" bitfld.long 0x10 3. " PUP_24 ,Pull up control for pads 96,97" "No effect,Pull up" textline " " bitfld.long 0x10 1.--2. " DRV_24 ,Drive strength control for pads 96,97" "0,1,2,3" width 0xb endif tree.end tree "Region 4" base asd:0xfcab0000 sif (cpu()=="SPEAR600") width 17. rgroup.long 0x00++0x03 "SOC main configuration parameters" line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" bitfld.long 0x00 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " bitfld.long 0x00 18. " DUAL_CORE ,Processors number currently embedded inside the SoC" "Single,Dual" textline " " bitfld.long 0x00 17. " NAND_DISAB ,Nand flash interface disable" "No,Yes" textline " " bitfld.long 0x00 16. " NAND_16B ,Nand flash interface 8/16bit data width configuration type" "8 bit,8/16 bit" textline " " bitfld.long 0x00 13. " FULL_RAS_MODE ,SoC operating mode" "SoC,RAS" textline " " bitfld.long 0x00 11. " EXPI_IOBRG_ENB ,Enable predisposition AHB expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " EXPI_RAS_ENB ,Enable programmable logic master/slave internal ports" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EXPI_CLK_SRC ,Expansion interface source clock and reset definition" "External src. clk & reset signals,Clk and reset signals from internal logic" textline " " bitfld.long 0x00 8. " EXPI_ITF_ENB ,Enable expansion interface" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " SOC_APPLIC ,SoC application scheme" "Standalone application,I/O bridge connectivity,Dual chip solution (self_cfg5),Dual chip solution (self_cfg4)" textline " " bitfld.long 0x00 0.--5. " SOC_CFG ,SoC operating mode" "Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg0,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg1,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg2,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg3,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg4,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg5,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg6,Self_cfg7,Reserved,Self_cfg0,Self_cfg1,Self_cfg2,Self_cfg3,Self_cfg4,Self_cfg5,Self_cfg6,Self_cfg7,Self_cfg8,Self_cfg9" group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 14.--15. " DEBUG_FREEZ ,Enable timer and watch dog clock freeze" "Processor-1/processor-2,Processor-2,Processor-1/processor-2,Processor-1" textline " " bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 0.--2. " SOC_DBG ,Spear600 debug configuration" "Dbg_disab,Dbg_jtag1,Dbg_jtag2,Dbg_jtagd,Dbg_jtage,Dbg_etm1,Dbg_etm2,Dbg_etma" group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" textline " " bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" textline " " bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode,Sync. mode,Reserved,Async. mode,?..." textline " " bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "30Mhz Oscillator,Programmable PL_CLK(2) sig.,Sync. Mode,?..." textline " " bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "30Mhz Oscillator,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" if (((data.long(asd:0xfcab0000+0x24))&0x3000)==0x00) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfcab0000+0x24))&0x3000)==0x1000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:1)/hclk_divsel)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" elif (((data.long(asd:0xfcab0000+0x24))&0x3000)==0x2000) group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel/)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:1)/hclk_divsel/)" "1:1/1:1,1:2/1:2,1:3/1:3,1:4/1:4" bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" else group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI30_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI30_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 16.--17. " HCLK_CLK2_RATIO ,Hclk to Clk2 clock ratio(clk2_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." textline " " bitfld.long 0x00 14.--15. " HCLK_CLK1_RATIO ,Hclk to Clk1 clock ratio(clk1_divsel(1:2)/hclk_divsel)" "1:1/1:2,1:2/1:4,?..." bitfld.long 0x00 13. " CLK2_DIVSEL ,Pll1_clkout to Clk2 clock ratio definition" "1:1,1:2" textline " " bitfld.long 0x00 12. " CLK1_DIVSEL ,Pll1_clkout to Clk1 clock ratio definition" "1:1,1:2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 6.--7. " PCLK_RATIO_APPL ,Application subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 2.--3. " PCLK_RATIO_ARM2 ,ARM2 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" endif group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR5_FREEZ ,General purpose timer 5 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 16. " GPTMR4_FREEZ ,General purpose timer 4 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 15. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 14. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 12. " GPTMR5_CLKSEL ,General purpose timer-5 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR4_CLKSEL ,General purpose timer-4 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 10. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 9. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" textline " " bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK (2) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" textline " " bitfld.long 0x00 2.--3. " CLCD_CLKSEL ,Color LCD display source clock definition" "48Mhz,CLCD Clock Synthesizer,Programmable PL_CLK (3) signal,?..." textline " " bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 30. " DDR_ENB ,DDR memory controller clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDRCORE_CLKENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDRCTRL_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" bitfld.long 0x04 26. " USBH2_CLKENB ,Enable usb2 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " GMAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" bitfld.long 0x04 22. " CLCD_CLKENB ,Enable color lcd controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO3_CLKENB ,Enable gpio-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 16. " GPTM3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" bitfld.long 0x04 14. " SSP3_CLKENB ,Enable ssp-3 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GPIO4_CLKENB ,Enable gpio-4 clock" "Disabled,Enabled" bitfld.long 0x04 12. " GPTM5_CLKENB ,Enable general purpose timer-5 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " GPTM4_CLKENB ,Enable general purpose timer-4 clock" "Disabled,Enabled" bitfld.long 0x04 10. " IRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " FSMC_CLKENB ,Enable nand flash controller clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 6. " SSP2_CLKENB ,Enable ssp-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SSP1_CLKENB ,Enable ssp-1 clock" "Disabled,Enabled" bitfld.long 0x04 4. " UART2_CLKENB ,Enable uart-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART1_CLKENB ,Enable uart-1 clock" "Disabled,Enabled" bitfld.long 0x04 2. " ARM2_CLKENB ,Enable Arm-2 subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ARM1_CLKENB ,Enable Arm-1 subsystem clock" "Disabled,Enabled" bitfld.long 0x04 0. " ARM1_ENB ,Enable Arm1 clock gating functionality" "Disabled,Enabled" group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (0) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_CLKENB ,Enable 125Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" group.long 0x50++0x07 line.long 0x00 "AMEM_CLK_CFG,AMEM_CLK_CFG Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory port-2 soft reset command" "No reset,Reset" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory port-2 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory port-2 source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory port-2 clock gating functionality" "Disabled,Enabled" line.long 0x04 "EXPI_CLK_CFG,EXPI_CLK_CFG Register" hexmask.long.byte 0x04 24.--31. 1. " EXPI_XDIV ,X (7:0) clock synthesizer constant division" hexmask.long.byte 0x04 16.--23. 1. " EXPI_YDIV ,Y (7:0) clock synthesizer constant division" textline " " bitfld.long 0x04 15. " EXPI_RST ,Ahb expansion interface reset command" "No reset,Reset" bitfld.long 0x04 14. " EXPI_LOPBCK ,Ahb expansion interface loopback" "Disabled,Enabled" textline " " bitfld.long 0x04 12.--13. " EXPI_COMPR_SEL ,Expansion interface bus compression scheme definition" "Reserved,Reserved,Low compression,?..." bitfld.long 0x04 11. " EXPI_CLK_RETIM ,Expi internal clock retiming functionality" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " EXPI_CLK_ENB ,Expansion interface clock gating functionality" "Disabled,Enabled" bitfld.long 0x04 9. " EXPI_RST ,Expansion interface soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 8. " EXPI_DMA_CFG[3] ,Expansion interface DMA channel 3 transfer type definition" "DMA single word,DMA burst" bitfld.long 0x04 7. " EXPI_DMA_CFG[2] ,Expansion interface DMA channel 2 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " EXPI_DMA_CFG[1] ,Expansion interface DMA channel 1 transfer type definition" "Disabled,Enabled" bitfld.long 0x04 5. " EXPI_DMA_CFG[0] ,Expansion interface DMA channel 0 transfer type definition" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EXPI_SYNT_ENB ,Expi clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x04 1.--3. " EXPI_CLK_SEL ,Expansion interface source clock definition" "Hclk,Pll1,Pll2,Ras_clk,Ext_clk,?..." textline " " bitfld.long 0x04 0. " PORTCTR_CLK_ENB ,Port controller logic clock gating functionality" "Disabled,Enabled" group.long 0x5c--0x7b "Auxiliary clock synthesizer Registers" line.long 0x0 "CLCD_CLK_SYNT,CLCD_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "GMAC_CLK_SYNT,GMAC_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x1C "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x1C 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x1C 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" hexmask.long.word 0x1C 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" textline " " hexmask.long.word 0x1C 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 "Soft reset control" line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 30. " DDR_ENBR ,DDR memory controller reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDRCORE_SWRST ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDRCTRL_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " USBH2_SWRST ,Active usb2 host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" bitfld.long 0x00 23. " GMAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CLCD_SWRST ,Active color lcd controller reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO3_SWRST ,Active gpio-3 reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SSP3_SWRST ,Active ssp-3 reset" "Disabled,Enabled" bitfld.long 0x00 13. " GPIO4_SWRST ,Active gpio-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " GPTM5_SWRST ,Active general purpose timer-5 reset" "Disabled,Enabled" bitfld.long 0x00 11. " GPTM4_SWRST ,Active general purpose timer-4 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IRDA_SWRST ,Active irda reset" "Disabled,Enabled" bitfld.long 0x00 9. " FSMC_SWRST ,Active nand flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SSP2_SWRST ,Active ssp-2 reset" "Disabled,Enabled" bitfld.long 0x00 5. " SSP1_SWRST ,Active ssp-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UART2_SWRST ,Active uart-2 reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart-1 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARM2_SWRST ,Active Arm-2 subsystem reset" "Disabled,Enabled" bitfld.long 0x00 1. " ARM1_SWRST ,Active Arm-1 subsystem reset" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ARM1_ENBR ,Arm1 reset enable" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK30M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" width 15. group.long 0x7c--0x9f "SoC configuration basic parameter" line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xb0++0x03 line.long 0x00 "ICM10_ARB_CFG,ICM10_ARB_CFG Register" bitfld.long 0x00 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x00 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x00 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0f line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHA15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,Expi_7 out(rfu),?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHA14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,Expi_7 inp(rfu),?..." textline " " bitfld.long 0x00 26.--27. " DMA_CFG_CHA13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,Expi_6 out(rfu),?..." bitfld.long 0x00 24.--25. " DMA_CFG_CHA12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,Expi_6 inp(rfu),?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHA11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,Expi_5 out(rfu),?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHA10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,Expi_5 inp(rfu),?..." textline " " bitfld.long 0x00 18.--19. " DMA_CFG_CHA09 ,Dma channel 9 configuration scheme" "SPP1 out,RAS_4 out,Expi_4 out(rfu),?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHA08 ,Dma channel 8 configuration scheme" "SPP1 inp,RAS_4 inp,Expi_4 inp(rfu),?..." textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHA07 ,Dma channel 7 configuration scheme" "SPP3 out,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHA06 ,Dma channel 6 configuration scheme" "SPP3 inp,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHA05 ,Dma channel 5 configuration scheme" "Uart2 out,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHA04 ,Dma channel 4 configuration scheme" "Uart2 inp,RAS_2 inp,?..." textline " " bitfld.long 0x00 6.--7. " DMA_CFG_CHA03 ,Dma channel 3 configuration scheme" "Uart1 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHA02 ,Dma channel 2 configuration scheme" "Uart1 inp,RAS_1 inp,Expi_1 in/out,?..." textline " " bitfld.long 0x00 2.--3. " DMA_CFG_CHA01 ,Dma channel 1 configuration scheme" "SPP2 out,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHA00 ,Dma channel 0 configuration scheme" "SPP2 inp,RAS_0 inp,Expi_0 in/out,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 14. " RXERROR3_USBH2 ,Usb receiver error 3" "No error,Error" bitfld.long 0x04 13. " RXERROR2_USBH1 ,Usb receiver error 2" "No error,Error" textline " " bitfld.long 0x04 12. " RXERROR1_USBDV ,Usb receiver error 1" "No error,Error" bitfld.long 0x04 10. " PHYRESET_CHN3 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 9. " PHYRESET_CHN2 ,Usb2 triple phy soft reset command" "No reset,Reset" bitfld.long 0x04 8. " PHYRESET_CHN1 ,Usb2 triple phy soft reset command" "No reset,Reset" textline " " bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" bitfld.long 0x04 1. " PLL_PWDN ,USB phy Pll3 power down" "Enabled,Powered down" textline " " bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "GMII_txclk125' signal,PLL2 output clock,30Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" line.long 0x0c "EXPI_CFG_CTR,EXPI_CFG_CTR Register" bitfld.long 0x0C 28.--31. " ML3ICM9_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" bitfld.long 0x0C 27. " ML3H2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " ML3H2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 25. " ML3H2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 24. " ML3H2H_CLKSYNC ,Asynchronous bridge master/slave clock type definition" "Asynchronous,Synchronous" bitfld.long 0x0C 20.--23. " IC8EH2H_TIKTMOUT ,Tick timeout transfer complete" "50,100,200,350,500,750,1000,1300,1600,2000,2500,3000,3500,4000,4500,5000" textline " " bitfld.long 0x0C 19. " EXPI_INTOUT_REQ ,Expansion interface software interrupt output request" "Not requested,Requested" bitfld.long 0x0C 18. " ICM8EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " ICM8EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 16. " ICM8EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 15. " ICM8EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 14. " ICM8EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 13. " ICM8EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 12. " ICM8EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " EXPI_FULLADDR_ENB ,Enable full 32 bit haddr on expi interface" "Least 24 bit,32 bit" bitfld.long 0x0C 6. " ICM9EH2H_TIKENB ,Enable free running tick timer pulse generation" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ICM9EH2H_RSTSLV ,Asynchronous bridge slave port soft reset command" "No reset,Reset" bitfld.long 0x0C 4. " ICM9EH2H_RSTMST ,Asynchronous bridge master port soft reset command" "No reset,Reset" textline " " bitfld.long 0x0C 3. " ICM9EH2H_IRQ ,Expi write error interrupt" "No error,Error" bitfld.long 0x0C 2. " ICM9EH2H_SFLUSH ,Expi read buffer flush" "Not flushed,Flushed" textline " " bitfld.long 0x0C 1. " ICM9EH2H_SSTALL ,Address phase qualifier for transfers" "SPLIT,HREADY low" bitfld.long 0x0C 0. " ICM9EH2H_RDPREF ,Enable Read undefined length prefetch functionality" "Disabled,Enabled" width 15. group.long 0xc0++0x03 "Inter-processor communication functionality" line.long 0x0 "PRC4_LOCK_CTR,PRC4_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x03 line.long 0x00 "PRC4_IRQ_CTR,PRC4_IRQ_CTR Register" bitfld.long 0x00 21. " INT4_REQ_PRC3_2 ,Pending Proc-3 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 20. " INT4_REQ_PRC3_1 ,Pending Proc-3 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 19. " INT4_REQ_PRC2_2 ,Pending Proc-2 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 18. " INT4_REQ_PRC2_1 ,Pending Proc-2 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 17. " INT4_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 16. " INT4_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" textline " " bitfld.long 0x00 5. " INT3_REQ_PRC4_2 ,Interrupt request for the Proc-3 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 4. " INT3_REQ_PRC4_1 ,Interrupt request for the Proc-3 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x00 3. " INT2_REQ_PRC4_2 ,Interrupt request for the Proc-2 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 2. " INT2_REQ_PRC4_1 ,Interrupt request for the Proc-2 irq. Line-1" "Not requested,Requested" textline " " bitfld.long 0x00 1. " INT1_REQ_PRC4_2 ,Interrupt request for the Proc-1 irq. Line-2" "Not requested,Requested" bitfld.long 0x00 0. " INT1_REQ_PRC4_1 ,Interrupt request for the Proc-1 irq. Line-1" "Not requested,Requested" width 17. group.long 0xe0++0x13 "Special configuration parameters" line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " wakeup_fiq_enb ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Fiq" line.long 0x4 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" hexmask.long.byte 0x4 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x4 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x4 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x4 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x4 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x4 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x4 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x4 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x8 "COMPSSTL_2V5_CFG,COMPSSTL_2V5_CFG Register" hexmask.long.byte 0x8 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x8 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x8 5. " STS_OK ,Valid code compensation" "Low,High" textline " " bitfld.long 0x8 4. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x8 3. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x8 2. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x8 1. " EN ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x8 0. " IDDQ_TQ ,Enable IDDQ mode" "Disabled,Enabled" line.long 0x0c "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" hexmask.long.byte 0x0c 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x0c 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x0c 4. " sts_ok ,Valid code compensation" "Low,High" textline " " bitfld.long 0x0c 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x0c 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x0c 1. " TQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x0c 0. " EN ,Compensation cell internal command parameter" "Low,High" line.long 0x10 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" bitfld.long 0x10 31. " LVDS_BENGUP_ENB ,Pad LVDS bang-up enable" "Enabled,Disabled" textline " " bitfld.long 0x10 16.--19. " SWKEY_DDRSEL ,External memory interface configuration type" "HW memory auto-conf.,Reserved,Reserved,Reserved,Reserved,Reserved,SW memory conf.,?..." textline " " bitfld.long 0x10 15. " DRAM_TYPE ,Memory interface configuration type" "DDR1,DDR2" bitfld.long 0x10 14. " COM_REF ,Internal/External SSTL common reference voltage definition" "Internal,External" textline " " bitfld.long 0x10 12. " PSEUDO_DIF_DIS ,DQS0;1 SSTL pad differential/single ended configuration type" "Differential,Single ended" bitfld.long 0x10 10.--11. " NDQS_PDN/PU_SEL ,Programmable nDQS0;1 Pull down/up functionality connected with PDCLKB signal of SSTL differential pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x10 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x10 3. " DRIVE_MODE_S_W ,SSTL pad drive strain mode" "Strong,Weak" textline " " bitfld.long 0x10 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" bitfld.long 0x10 0. " SSTL_SEL ,SW Memory model selection" "DDR1(SSTL2V5),DDR2(SSTL1V8)" group.long 0xf4++0x27 "Memory bist execution control" line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(LCDC palette Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" textline " " bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" textline " " bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" textline " " bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Gmac_rxfifo)" "Disabled,Run" bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Gmac_txfifo)" "Disabled,Run" textline " " bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" bitfld.long 0x00 1. " RBACT1[01] ,Run bist execution command(Usb_host_2)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host_1)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras buf. Sp1Kx32_1:8)" "Disabled,Run" bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras buf. Dp1Kx32_1:4)" "Disabled,Run" textline " " bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras buf. Sp2Kx32_1:4)" "Disabled,Run" bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras hwac.Sp48x128_1:3)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras buf. Dp512Kx32_1:8)" "Disabled,Run" bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras buf. Sp512x32_9:16)" "Disabled,Run" textline " " bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras buf. Sp512x32_1:8)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(Rbact (arm-1) memory pool)" "Disabled,Run" line.long 0x10 "BIST5_CFG_CTR,BIST5_CFG_CTR Register" bitfld.long 0x10 31. " BIST5_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x10 28. " BIST5_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x10 24.--27. " BIST5_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." textline " " bitfld.long 0x10 0. " RBACT5[00] ,Run bist execution command(Rbact (arm-2) memory pool)" "Disabled,Run" line.long 0x14 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x14 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x14 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x14 13. " BBAD1[13] ,Bist execution result(LCDC palette Fifo)" "Not failed,Failed" bitfld.long 0x14 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x14 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x14 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x14 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x14 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x14 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x14 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x14 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x14 4. " BBAD1[04] ,Bist execution result(Gmac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x14 3. " BBAD1[03] ,Bist execution result(Gmac_txfifo)" "Not failed,Failed" bitfld.long 0x14 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x14 1. " BBAD1[01] ,Bist execution result(Usb_host_2)" "Not failed,Failed" bitfld.long 0x14 0. " BBAD1[00] ,Bist execution result(Usb_host_1)" "Not failed,Failed" line.long 0x18 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x18 31. " BIST2_end ,End memory bist2 execution" "Pending,Ended" bitfld.long 0x18 18. " BBAD2[18] ,Bist execution result(Ras buf. Sp1Kx32_8)" "Not failed,Failed" textline " " bitfld.long 0x18 17. " BBAD2[17] ,Bist execution result(Ras buf. Sp1Kx32_7)" "Not failed,Failed" bitfld.long 0x18 16. " BBAD2[16] ,Bist execution result(Ras buf. Sp1Kx32_6)" "Not failed,Failed" textline " " bitfld.long 0x18 15. " BBAD2[15] ,Bist execution result(Ras buf. Sp1Kx32_5)" "Not failed,Failed" bitfld.long 0x18 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp1Kx32_3)" "Not failed,Failed" bitfld.long 0x18 8. " BBAD2[08] ,Bist execution result(Ras buf. Dp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 7. " BBAD2[07] ,Bist execution result(Ras buf. Dp1Kx32_1)" "Not failed,Failed" bitfld.long 0x18 6. " BBAD2[06] ,Bist execution result(Ras buf. Sp2Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x18 5. " BBAD2[05] ,Bist execution result(Ras buf. Sp2Kx32_3)" "Not failed,Failed" bitfld.long 0x18 4. " BBAD2[04] ,Bist execution result(Ras buf. Sp2Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x18 3. " BBAD2[03] ,Bist execution result(Ras buf. Sp2Kx32_1)" "Not failed,Failed" bitfld.long 0x18 2. " BBAD2[02] ,Bist execution result(Ras hwacc.Sp48x128_3)" "Not failed,Failed" textline " " bitfld.long 0x18 1. " BBAD2[01] ,Bist execution result(Ras hwacc.Sp48x128_2)" "Not failed,Failed" bitfld.long 0x18 0. " BBAD2[00] ,Bist execution result(Ras hwacc.Sp48x128_1)" "Not failed,Failed" line.long 0x1c "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x1c 31. " BIST3_end ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x1c 23. " BBAD3[23] ,Bist execution result(Ras buf. Dp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 22. " BBAD3[22] ,Bist execution result(Ras buf. Dp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 21. " BBAD3[21] ,Bist execution result(Ras buf. Dp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 20. " BBAD3[20] ,Bist execution result(Ras buf. Dp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 19. " BBAD3[19] ,Bist execution result(Ras buf. Dp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 18. " BBAD3[18] ,Bist execution result(Ras buf. Dp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 17. " BBAD3[17] ,Bist execution result(Ras buf. Dp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 16. " BBAD3[16] ,Bist execution result(Ras buf. Dp512x32_1)" "Not failed,Failed" bitfld.long 0x1c 15. " BBAD3[15] ,Bist execution result(Ras buf. Sp512x32_16)" "Not failed,Failed" textline " " bitfld.long 0x1c 14. " BBAD3[14] ,Bist execution result(Ras buf. Sp512x32_15)" "Not failed,Failed" bitfld.long 0x1c 13. " BBAD3[13] ,Bist execution result(Ras buf. Sp512x32_14)" "Not failed,Failed" textline " " bitfld.long 0x1c 12. " BBAD3[12] ,Bist execution result(Ras buf. Sp512x32_13)" "Not failed,Failed" bitfld.long 0x1c 11. " BBAD3[11] ,Bist execution result(Ras buf. Sp512x32_12)" "Not failed,Failed" textline " " bitfld.long 0x1c 10. " BBAD3[10] ,Bist execution result(Ras buf. Sp512x32_11)" "Not failed,Failed" bitfld.long 0x1c 9. " BBAD3[09] ,Bist execution result(Ras buf. Sp512x32_10)" "Not failed,Failed" textline " " bitfld.long 0x1c 8. " BBAD3[08] ,Bist execution result(Ras buf. Sp512x32_9)" "Not failed,Failed" bitfld.long 0x1c 7. " BBAD3[07] ,Bist execution result(Ras buf. Sp512x32_8)" "Not failed,Failed" textline " " bitfld.long 0x1c 6. " BBAD3[06] ,Bist execution result(Ras buf. Sp512x32_7)" "Not failed,Failed" bitfld.long 0x1c 5. " BBAD3[05] ,Bist execution result(Ras buf. Sp512x32_6)" "Not failed,Failed" textline " " bitfld.long 0x1c 4. " BBAD3[04] ,Bist execution result(Ras buf. Sp512x32_5)" "Not failed,Failed" bitfld.long 0x1c 3. " BBAD3[03] ,Bist execution result(Ras buf. Sp512x32_4)" "Not failed,Failed" textline " " bitfld.long 0x1c 2. " BBAD3[02] ,Bist execution result(Ras buf. Sp512x32_3)" "Not failed,Failed" bitfld.long 0x1c 1. " BBAD3[01] ,Bist execution result(Ras buf. Sp512x32_2)" "Not failed,Failed" textline " " bitfld.long 0x1c 0. " BBAD3[00] ,Bist execution result(Ras buf. Sp512x32_1)" "Not failed,Failed" line.long 0x20 "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x20 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x20 19. " BBAD4[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 18. " BBAD4[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 17. " BBAD4[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 16. " BBAD4[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 15. " BBAD4[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 14. " BBAD4[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x20 13. " BBAD4[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x20 12. " BBAD4[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x20 11. " BBAD4[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x20 10. " BBAD4[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x20 9. " BBAD4[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x20 8. " BBAD4[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x20 7. " BBAD4[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 6. " BBAD4[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 5. " BBAD4[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x20 4. " BBAD4[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x20 3. " BBAD4[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 2. " BBAD4[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x20 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x20 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" line.long 0x24 "BIST5_STS_RES,BIST5_STS_RES Register" bitfld.long 0x24 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x24 19. " BBAD[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 18. " BBAD[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 17. " BBAD[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 16. " BBAD[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 15. " BBAD[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 14. " BBAD[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x24 13. " BBAD[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x24 12. " BBAD[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x24 11. " BBAD[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x24 10. " BBAD[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x24 9. " BBAD[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x24 8. " BBAD[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x24 7. " BBAD[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 6. " BBAD[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 5. " BBAD[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x24 4. " BBAD[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x24 3. " BBAD[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 2. " BBAD[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x24 1. " BBAD[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x24 0. " BBAD[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 "Diagnostic functionality" line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 21. " EXPI_EH2HS_ERR ,Expansion interface write deferred error" "No error,Error" textline " " bitfld.long 0x00 20. " EXPI_EH2HM_ERR ,Expansion interface write deferred error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXP_ERR_ENB ,Enable AHB Expansion interface write deferred error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 16.--23. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" textline " " hexmask.long.byte 0x00 8.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" hexmask.long.byte 0x00 0.--7. 1. " CUSTOM_ID ,Customization type" rgroup.long 0x3c++0x03 line.long 0x00 "SOC_USER_ID,SOC_USER_ID Register" hexmask.long.word 0x00 16.--31. 1. " Spear_magic_number ,Spear magic number" width 0xb else width 18. rgroup.long 0x00++0x03 line.long 0x00 "SOC_CFG_CTR,SOC_CFG_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 19. " BOOT_SEL ,Boot source target device" "USB,Standard" textline " " endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x0 6.--18. 1. " FIXED ,Fixed Value" textline " " endif bitfld.long 0x0 0.--5. " SOC_CFG ,SoC operating mode" "Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Dyn_cfg0_0,Dyn_cfg0_1,Dyn_cfg0_2,Reserved,Dyn_cfg1_0,Dyn_cfg1_1,Dyn_cfg1_2,Reserved,Dyn_cfg2_0,Dyn_cfg2_1,Dyn_cfg2_2,Reserved,Dyn_cfg3_0,Dyn_cfg3_1,Dyn_cfg3_2,Reserved,BSD,Top_Atpg,RAS_Atpg,BIST_MEM,USBBIST_PLL_OSCI_ADC,BIST_DLL,USB_phy,?..." group.long 0x04++0x03 line.long 0x00 "DIAG_CFG_CTR,DIAG_CFG_CTR Register" bitfld.long 0x00 15. " DEBUG_FREEZ ,Enable freeze condition when processor enters in debug mode" "Disabled,Enabled" bitfld.long 0x00 11. " SYS_ERROR ,SoC internal error" "No error,Error" textline " " bitfld.long 0x00 4.--5. " SOC_DBG6 ,Spear300 debug configuration" "Dbg_disab,Dbg_etm1,Dbg_jtag1,?..." group.long 0x08--0x23 line.long 0x0 "PLL1_CTR,PLL1_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0x0 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0x0 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0x0 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0x0 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0x0 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0x0+0x04) "PLL1_FRQ,PLL1_FRQ Register" hexmask.long.word (0x0+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0x0+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0x0+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0x0+0x08) "PLL1_MOD,PLL1_MOD Register" hexmask.long.word (0x0+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0x0+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,PLL2_CTR Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration control" "0.4,0.8,1.2,1.6,2.0,2.4,2.8,3.2,3.6,4.0,4.4,4.8,5.2,5.6,6.0,6.4,6.8,7.2,7.6,8.0,8.4,8.8,9.2,9.6,10.0,10.4,10.8,11.2,11.6,12.0,12.4,12.8" textline " " endif bitfld.long 0xC 8. " PLL_CONTROL1[8] ,External feedback enable" "Internal,External" bitfld.long 0xC 6.--7. " PLL_CONTROL1[7:6] ,Sigma Delta Order" "First,Second,?..." textline " " bitfld.long 0xC 4.--5. " PLL_CONTROL1[5:4] ,Dither mode" "Normal,Fractional-N,Dithering(double),Dithering(single)" bitfld.long 0xC 3. " PLL_CONTROL1[3] ,PLL sample program parameters" "Disabled,Enabled" textline " " bitfld.long 0xC 2. " PLL_ENABLE ,Enable Pll" "Disabled,Enabled" bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "Enabled,Disabled" textline " " bitfld.long 0xC 0. " PLL_LOCK ,Pll Lock status" "Not locked,Locked" line.long (0xC+0x04) "PLL2_FRQ,PLL2_FRQ Register" hexmask.long.word (0xC+0x04) 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long (0xC+0x04) 8.--10. " PLL_POSTDIV_P ,Pll post-divisor values" "/1,/2,/4,/8,/16,/32,/32,/32" textline " " hexmask.long.byte (0xC+0x04) 0.--7. 1. " PLL_PREDIV_N ,Pll pre-divisor programmable value" line.long (0xC+0x08) "PLL2_MOD,PLL2_MOD Register" hexmask.long.word (0xC+0x08) 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word (0xC+0x08) 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL_CLK_CFG,PLL_CLK_CFG Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Sync. mode PLL2,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,Sync. mode PLL1,?..." textline " " else bitfld.long 0x18 28.--30. " MCTR_CLK_SEL ,Memory controller core clock configuration" "Sync. mode PLL1 1:1,Sync. mode PLL1 2:1,Reserved,Async. mode PLL2,?..." bitfld.long 0x18 24.--26. " PLL2_CLK_SEL ,Auxiliary PLL2 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(3) sig.,?..." textline " " endif bitfld.long 0x18 20.--22. " PLL1_CLK_SEL ,Main PLL1 source clock configuration" "24Mhz Oscillator,Programmable PL_CLK(4) sig.,?..." bitfld.long 0x18 19. " MEM_DLL_LOCK ,Memory dll lock" "Not locked,Locked" textline " " bitfld.long 0x18 18. " VUSB_PLL_LOCK ,USB pll3 lock" "Not locked,Locked" bitfld.long 0x18 17. " SYS_PLL2_LOCK ,Auxiliary System pll2 lock" "Not locked,Locked" textline " " bitfld.long 0x18 16. " SYS_PLL1_LOCK ,Main System pll1 lock" "Not locked,Locked" bitfld.long 0x18 2. " PLL3_ENB_CLKOUT ,Enable Usb Pll3 clock output probing" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL2_ENB_CLKOUT ,Enable System Pll2 clock output probing" "Disabled,Enabled" bitfld.long 0x18 0. " PLL1_ENB_CLKOUT ,Enable System Pll1 clock output probing" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "CORE_CLK_CFG,CORE_CLK_CFG Register" bitfld.long 0x00 20.--21. " OSCI24_DIV_RATIO ,Osci30 divider ratio" "1:2,1:4,1:16,1:32" bitfld.long 0x00 19. " OSCI24_DIV_EN ,30 MHz Oscillator divider enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " RAS_SYNT34_CLKSEL ,RAS clock synthesizer Synt-3 and Synt-4 input source clock selection" "Pll1,Pll2" bitfld.long 0x00 10.--11. " HCLK_DIVSEL ,Pll1_clkout to Hclk clock ratio definition" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 8.--9. " PCLK_RATIO_LWSP ,Low speed subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" bitfld.long 0x00 4.--5. " PCLK_RATIO_BASC ,Basic subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" textline " " bitfld.long 0x00 0.--1. " PCLK_RATIO_ARM1 ,ARM1 subsystem Pclk clock ratio divider" "1:1,1:2,1:3,1:4" group.long 0x28++0x07 line.long 0x00 "PRPH_CLK_CFG,PRPH_CLK_CFG Register" bitfld.long 0x00 17. " GPTMR3_FREEZ ,General purpose timer 3 clock enable" "Enabled,Frozen" bitfld.long 0x00 16. " GPTMR2_FREEZ ,General purpose timer 2 clock enable" "Enabled,Frozen" textline " " bitfld.long 0x00 13. " GPTMR1_FREEZ ,General purpose timer 1 clock enable" "Enabled,Frozen" bitfld.long 0x00 12. " GPTMR3_CLKSEL ,General purpose timer-3 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 11. " GPTMR2_CLKSEL ,General purpose timer-2 source clock definition" "48Mhz,Clock prescaler" bitfld.long 0x00 8. " GPTMR1_CLKSEL ,General purpose timer-1 source clock definition" "48Mhz,Clock prescaler" textline " " bitfld.long 0x00 7. " RTC_DISABLE ,Real Time Clock disable" "No,Yes" bitfld.long 0x00 5.--6. " IRDA_CLKSEL ,IrDA source clock definition" "48Mhz,IrDA Clock synthesizer,Programmable PL_CLK(3) signal,?..." textline " " bitfld.long 0x00 4. " UART_CLKSEL ,Uart1/Uart2 source clock definition" "48Mhz,Uart Clock synthesizer" bitfld.long 0x00 1. " PLLTIMEEN ,Enable Pll1 timer" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XTALTIMEEN ,Enable Xtal timer" "Disabled,Enabled" line.long 0x04 "PERIP1_CLK_ENB,PERIP1_CLK_ENB Register" bitfld.long 0x04 31. " C3_CLOCK_ENB ,C3 clock enable" "Disabled,Enabled" bitfld.long 0x04 29. " DDR_CORE_ENB ,DDR memory controller core clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " DDR_CLKENB ,DDR memory controller hclk clock enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 26. " USBH_CLOCK ,Enable usb ehci host reset" "Disabled,Enabled" textline " " endif bitfld.long 0x04 25. " USBH1_CLKENB ,Enable usb1 host clock" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " USBDEV_CLKENB ,Enable usb device clock" "Disabled,Enabled" bitfld.long 0x04 23. " MAC_CLKENB ,Enable gmac ethernet clock" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SMI_CLKENB ,Enable serial flash controller clock" "Disabled,Enabled" bitfld.long 0x04 20. " ROM_CLKENB ,Enable rom controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " DMA_CLKENB ,Enable dma controller clock" "Disabled,Enabled" bitfld.long 0x04 18. " GPIO_CLKENB ,Enable gpio clock" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RTC_CLKENB ,Enable real time controller clock" "Disabled,Enabled" bitfld.long 0x04 15. " ADC_CLKENB ,Enable adc controller clock" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " GPT3_CLKENB ,Enable general purpose timer-3 clock" "Disabled,Enabled" bitfld.long 0x04 11. " GPT2_CLKENB ,Enable general purpose timer-2 clock" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " FIRDA_CLKENB ,Enable irda clock" "Disabled,Enabled" bitfld.long 0x04 8. " JPEG_CLKENB ,Enable jpeg codec clock" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " I2C_CLKENB ,Enable i2c clock" "Disabled,Enabled" bitfld.long 0x04 5. " SSP_CLKENB ,Enable ssp clock" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART_CLKENB ,Enable uart clock" "Disabled,Enabled" bitfld.long 0x04 1. " ARM_CLKENB ,Enable Arm subsystem clock" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ARM_ENB ,Enable Arm clock gating functionality" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") rgroup.long 0x30++0x03 line.long 0x00 "SOC_CORE_ID,SOC_CORE_ID Register" hexmask.long.byte 0x00 24.--31. 1. " SOC_NAME ,Chip name" hexmask.long.byte 0x00 20.--23. 1. " SOC_PLATFORM ,Soc_platform" textline " " hexmask.long.byte 0x00 16.--22. 1. " CORE_REVISION1 ,ASCII value of the first letter of revision" hexmask.long.byte 0x00 10.--15. 1. " CORE_REVISION2 ,ASCII value of the second letter of revision" textline " " hexmask.long.byte 0x00 4.--7. 1. " TECH_TYPE ,Tech Type" endif group.long 0x34++0x03 line.long 0x00 "RAS_CLK_ENB,RAS_CLK_ENB Register" bitfld.long 0x00 15. " PL_GPCK4_CLKENB ,Enable PL_CLK (4) external clock signal" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_CLKENB ,Enable PL_CLK (3) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_CLKENB ,Enable PL_CLK (2) external clock signal" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_CLKENB ,Enable PL_CLK (1) external clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_CLKENB ,Enable internal synthesizer-4 source clock" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_CLKENB ,Enable internal synthesizer-3 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_CLKENB ,Enable internal synthesizer-2 source clock" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_CLKENB ,Enable internal synthesizer-1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_CLKENB ,Enable Pll2 source clock" "Disabled,Enabled" bitfld.long 0x00 5. " CLK48M_CLKENB ,Enable 48Mhz internal source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CLK24M_CLKENB ,Enable 30Mhz external source clock signal" "Disabled,Enabled" bitfld.long 0x00 3. " CLK32K_CLKENB ,Enable 32Khz external source clock signal" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCLKAPPL_CLKENB ,Enable internal Pclk (Apb applic. Subsystem) source clock" "Disabled,Enabled" bitfld.long 0x00 1. " PLL1_CLKENB ,Enable Pll1 source clock" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HCLK_CLKENB ,Enable internal AHB Hclk source clock" "Disabled,Enabled" group.long 0x44++0x0b line.long 0x0 "PRSC1_CLK_CFG,PRSC1_CLK_CFG Register" hexmask.long.byte 0x0 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x0 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x4 "PRSC2_CLK_CFG,PRSC2_CLK_CFG Register" hexmask.long.byte 0x4 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x4 0.--11. 1. " PRESC_M ,M constant division value" line.long 0x8 "PRSC3_CLK_CFG,PRSC3_CLK_CFG Register" hexmask.long.byte 0x8 12.--15. 1. " PRESC_N ,N constant factor division value" hexmask.long.word 0x8 0.--11. 1. " PRESC_M ,M constant division value" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.long 0x50++0x03 line.long 0x00 "AMEM_CFG_CTRL,AMEM_CFG_CTRL Register" hexmask.long.byte 0x00 24.--31. 1. " AMEM_XDIV ,X(7:0) clock synthesizer constant division" hexmask.long.byte 0x00 16.--23. 1. " AMEM_YDIV ,Y(7:0) clock synthesizer constant division" textline " " bitfld.long 0x00 15. " AMEM_RST ,Memory Port-1 soft reset" "Disabled,Enabled" bitfld.long 0x00 4. " AMEM_SYNT_ENB ,Enable memory Port-1 clock synthesizer" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " AMEM_CLK_SEL ,Memory Port-1 source clock" "HCLK,PLL1,PLL2,Ras_clk,?..." bitfld.long 0x00 0. " AMEM_CLK_ENB ,Memory Port-1 clock gate" "Disabled,Enabled" endif group.long 0x60++0x1b line.long 0x0 "IRDA_CLK_SYNT,IRDA_CLK_SYNT Register" bitfld.long 0x0 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x0 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x0 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x0 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x4 "UART_CLK_SYNT,UART_CLK_SYNT Register" bitfld.long 0x4 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x4 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x4 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x4 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x8 "MAC_CLK_SYNT,MAC_CLK_SYNT Register" bitfld.long 0x8 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x8 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x8 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x8 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0xC "RAS1_CLK_SYNT,RAS1_CLK_SYNT Register" bitfld.long 0xC 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0xC 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0xC 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0xC 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x10 "RAS2_CLK_SYNT,RAS2_CLK_SYNT Register" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x14 "RAS3_CLK_SYNT,RAS3_CLK_SYNT Register" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" line.long 0x18 "RAS4_CLK_SYNT,RAS4_CLK_SYNT Register" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Enable clock synthesizer functionality" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output Clock synthesizer selection" "Fout1,Fout2" textline " " hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X (11:0) clock synthesizer constant division" hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y (11:0) clock synthesizer constant division" group.long 0x38++0x03 line.long 0x00 "PERIP1_SOF_RST,PERIP1_SOF_RST Register" bitfld.long 0x00 31. " C3_RESET ,C3 reset enable" "Disabled,Enabled" bitfld.long 0x00 29. " DDR_CORE_ENBR ,DDR memory core reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RAM_SWRST ,Active Basic subsystem ram reset command" "Disabled,Enabled" bitfld.long 0x00 27. " DDR_SWRST ,DDR memory controller reset enable" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26. " USBH1_EHCI_SWRST ,Active usb1 ehci host reset" "Disabled,Enabled" bitfld.long 0x00 25. " USBH1_OHCI_SWRST ,Active usb1 ohci host reset" "Disabled,Enabled" textline " " else bitfld.long 0x00 25. " USBH1_SWRST ,Active usb1 host reset" "Disabled,Enabled" endif bitfld.long 0x00 24. " USBDEV_SWRST ,Active usb device reset" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MAC_SWRST ,Active gmac ethernet reset" "Disabled,Enabled" bitfld.long 0x00 21. " SMI_SWRST ,Active serial flash controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ROM_SWRST ,Active rom controller reset." "Disabled,Enabled" bitfld.long 0x00 19. " DMA_SWRST ,Active dma controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " GPIO_SWRST ,Active gpio reset" "Disabled,Enabled" bitfld.long 0x00 17. " RTC_SWRST ,Active real time controller reset" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ADC_SWRST ,Active adc controller reset" "Disabled,Enabled" bitfld.long 0x00 12. " GPTM3_SWRST ,Active general purpose timer-3 reset" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " GPTM2_SWRST ,Active general purpose timer-2 reset" "Disabled,Enabled" bitfld.long 0x00 10. " FIRDA_SWRST ,Active firda reset" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " JPEG_SWRST ,Active jpeg codec reset" "Disabled,Enabled" bitfld.long 0x00 7. " I2C_SWRST ,Active i2c reset" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SSP_SWRST ,Active ssp reset" "Disabled,Enabled" bitfld.long 0x00 3. " UART1_SWRST ,Active uart reset" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARM_SWRST ,Active Arm subsystem reset" "Disabled,Enabled" bitfld.long 0x00 0. " ARM_ENBR ,Arm reset enable" "Disabled,Enabled" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0x3C++0x03 line.long 0x00 "SOC_USER_ID,SOC User ID Register" hexmask.long.byte 0x00 27.--31. 1. " USER_ID ,User Id" hexmask.long.byte 0x00 16.--23. 1. " USER_VERSION ,User Version" textline " " hexmask.long.byte 0x00 10.--15. 1. " USER_VERSION ,User Version" endif group.long 0x40++0x03 line.long 0x00 "RAS_SOF_RST,RAS_SOF_RST Register" bitfld.long 0x00 15. " PL_GPCK4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 14. " PL_GPCK3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PL_GPCK2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 12. " PL_GPCK1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RAS_SYNT4_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 10. " RAS_SYNT3_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RAS_SYNT2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 8. " RAS_SYNT1_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLL2_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 6. " CLK125M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CLK48M_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 4. " CLK24M_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CLK32K_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 2. " PCLKAPPL_SWRST ,Active reset command" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLL1_SWRST ,Active reset command" "Disabled,Enabled" bitfld.long 0x00 0. " HCLK_SWRST ,Active reset command" "Disabled,Enabled" group.long 0x7c--0x9f line.long 0x0 "ICM1_ARB_CFG,ICM1_ARB_CFG Register" bitfld.long 0x0 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x0 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x0 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x0 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x4 "ICM2_ARB_CFG,ICM2_ARB_CFG Register" bitfld.long 0x4 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x4 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x4 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x4 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x8 "ICM3_ARB_CFG,ICM3_ARB_CFG Register" bitfld.long 0x8 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x8 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x8 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x8 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0xC "ICM4_ARB_CFG,ICM4_ARB_CFG Register" bitfld.long 0xC 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0xC 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0xC 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0xC 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x10 "ICM5_ARB_CFG,ICM5_ARB_CFG Register" bitfld.long 0x10 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x10 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x10 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x10 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x14 "ICM6_ARB_CFG,ICM6_ARB_CFG Register" bitfld.long 0x14 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x14 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x14 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x14 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x18 "ICM7_ARB_CFG,ICM7_ARB_CFG Register" bitfld.long 0x18 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x18 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x18 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x18 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x1C "ICM8_ARB_CFG,ICM8_ARB_CFG Register" bitfld.long 0x1C 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x1C 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x1C 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x1C 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x20 "ICM9_ARB_CFG,ICM9_ARB_CFG Register" bitfld.long 0x20 31. " MTX_ARB_TYPE ,Interconnect matrix arbitration protocol definition" "Fixed priority,Round robin" bitfld.long 0x20 28.--30. " MXT_RNDRB_PRY_LYR ,Priority starting level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 9.--11. " MTX_FIX_PRY_LYR3 ,Master layer-3 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 6.--8. " MTX_FIX_PRY_LYR2 ,Master layer-2 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x20 3.--5. " MTX_FIX_PRY_LYR1 ,Master layer-1 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x20 0.--2. " MTX_FIX_PRY_LYR0 ,Master layer-0 fixed priority number level" "0(highest),1,2,3,4,5,6,7(lowest)" group.long 0xa0++0x0b line.long 0x00 "DMA_CHN_CFG,DMA_CHN_CFG Register" bitfld.long 0x00 30.--31. " DMA_CFG_CHAN15 ,Dma channel 15 configuration scheme" "Jpeg out,RAS_7 out,?..." bitfld.long 0x00 28.--29. " DMA_CFG_CHAN14 ,Dma channel 14 configuration scheme" "Jpeg inp,RAS_7 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "ADC,RAS_6 out,?..." else bitfld.long 0x00 26.--27. " DMA_CFG_CHAN13 ,Dma channel 13 configuration scheme" "Reserved,RAS_6 out,?..." endif bitfld.long 0x00 24.--25. " DMA_CFG_CHAN12 ,Dma channel 12 configuration scheme" "IrDA in/out,RAS_6 inp,?..." textline " " bitfld.long 0x00 22.--23. " DMA_CFG_CHAN11 ,Dma channel 11 configuration scheme" "I2C out,RAS_5 out,?..." bitfld.long 0x00 20.--21. " DMA_CFG_CHAN10 ,Dma channel 10 configuration scheme" "I2C inp,RAS_5 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SSP0 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SSP0 inp,RAS_4 inp,?..." else bitfld.long 0x00 18.--19. " DMA_CFG_CHAN09 ,Dma channel 9 configuration scheme" "SPI1 out,RAS_4 out,?..." bitfld.long 0x00 16.--17. " DMA_CFG_CHAN08 ,Dma channel 8 configuration scheme" "SPI1 inp,RAS_4 inp,?..." endif textline " " bitfld.long 0x00 14.--15. " DMA_CFG_CHAN07 ,Dma channel 7 configuration scheme" "Reserved,RAS_3 out,?..." bitfld.long 0x00 12.--13. " DMA_CFG_CHAN06 ,Dma channel 6 configuration scheme" "Reserved,RAS_3 inp,?..." textline " " bitfld.long 0x00 10.--11. " DMA_CFG_CHAN05 ,Dma channel 5 configuration scheme" "Reserved,RAS_2 out,?..." bitfld.long 0x00 8.--9. " DMA_CFG_CHAN04 ,Dma channel 4 configuration scheme" "Reserved,RAS_2 inp,?..." textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart0 out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart0 inp,RAS_1 inp,?..." textline " " else bitfld.long 0x00 6.--7. " DMA_CFG_CHAN03 ,Dma channel 3 configuration scheme" "Uart out,RAS_1 out,?..." bitfld.long 0x00 4.--5. " DMA_CFG_CHAN02 ,Dma channel 2 configuration scheme" "Uart inp,RAS_1 inp,?..." textline " " endif bitfld.long 0x00 2.--3. " DMA_CFG_CHAN01 ,Dma channel 1 configuration scheme" "Reserved,RAS_0 out,?..." bitfld.long 0x00 0.--1. " DMA_CFG_CHAN00 ,Dma channel 0 configuration scheme" "Reserved,RAS_0 inp,?..." line.long 0x04 "USB2_PHY_CFG,USB2_PHY_CFG Register" bitfld.long 0x04 3. " USBH_OVERCUR ,Usb host over-current" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 0. " PLL_PWDN ,State of PLL blocks" "Powered up,Powered down" else bitfld.long 0x04 0. " DYNAMIC_PWDN ,Dynamic power down control field" "Disabled,Enabled" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x08 "MAC_CFG_CTR,MAC_CFG_CTR Register" bitfld.long 0x08 4. " MAC_SYNT_ENB ,Mac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " MAC_CLK_SEL ,Mac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" else line.long 0x08 "GMAC_CFG_CTR,GMAC_CFG_CTR Register" bitfld.long 0x08 4. " GMAC_SYNT_ENB ,Gmac GMII/MII clock synthesizer enable" "Disabled,Enabled" bitfld.long 0x08 2.--3. " GMAC_CLK_SEL ,Gmac internal source clock definition" "MII_txclk125' signal,PLL2 output clock,24Mhz oscillator,?..." textline " " bitfld.long 0x08 0. " MII_REVERSE ,MII normal/reverse mode configuration type" "Normal,Reverse" endif sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.long 0xc0++0x03 line.long 0x0 "PRC4_LOCK_CTR,PRC4_LOCK_CTR Register" bitfld.long 0x0 31. " STS_LOC_LOCK[15] ,Local lock semaphores status 15" "Disabled,Enabled" bitfld.long 0x0 30. " STS_LOC_LOCK[14] ,Local lock semaphores status 14" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " STS_LOC_LOCK[13] ,Local lock semaphores status 13" "Disabled,Enabled" bitfld.long 0x0 28. " STS_LOC_LOCK[12] ,Local lock semaphores status 12" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " STS_LOC_LOCK[11] ,Local lock semaphores status 11" "Disabled,Enabled" bitfld.long 0x0 26. " STS_LOC_LOCK[10] ,Local lock semaphores status 10" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " STS_LOC_LOCK[9] ,Local lock semaphores status 9" "Disabled,Enabled" bitfld.long 0x0 24. " STS_LOC_LOCK[8] ,Local lock semaphores status 8" "Disabled,Enabled" textline " " bitfld.long 0x0 23. " STS_LOC_LOCK[7] ,Local lock semaphores status 7" "Disabled,Enabled" bitfld.long 0x0 22. " STS_LOC_LOCK[6] ,Local lock semaphores status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 21. " STS_LOC_LOCK[5] ,Local lock semaphores status 5" "Disabled,Enabled" bitfld.long 0x0 20. " STS_LOC_LOCK[4] ,Local lock semaphores status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " STS_LOC_LOCK[3] ,Local lock semaphores status 3" "Disabled,Enabled" bitfld.long 0x0 18. " STS_LOC_LOCK[2] ,Local lock semaphores status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " STS_LOC_LOCK[1] ,Local lock semaphores status 1" "Disabled,Enabled" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No action,Lock[1],Lock[2],Lock[3],Lock[4],Lock[5],Lock[6],Lock[7],Lock[8],Lock[9],Lock[10],Lock[11],Lock[12],Lock[13],Lock[14],Lock[15]" group.long 0xd0++0x03 line.long 0x00 "PRC4_IRQ_CTR,PRC4_IRQ_CTR Register" bitfld.long 0x00 17. " INT4_REQ_PRC1_2 ,Pending Proc-1 irq. Line-2" "Not pending,Pending" bitfld.long 0x00 16. " INT4_REQ_PRC1_1 ,Pending Proc-1 irq. Line-1" "Not pending,Pending" endif group.long 0xe0++0x07 line.long 0x00 "PWRDOWN_CFG_CTR,PWRDOWN_CFG_CTR Register" bitfld.long 0x00 0. " WAKEUP_FIQ_ENB ,Wakeup interrupt type (Firq/Irq) definition" "Irq,Firq" line.long 0x04 "COMPSSTL_1V8_CFG,COMPSSTL_1V8_CFG Register" bitfld.long 0x04 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x04 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " hexmask.long.byte 0x04 16.--22. 1. " NASRC ,Read code compensation parameter" bitfld.long 0x04 4. " COMPOK ,Valid code compensation" "Not valid,Valid" textline " " bitfld.long 0x04 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" bitfld.long 0x04 2. " FREEZE ,Freeze command" "Not frozen,Frozen" textline " " bitfld.long 0x04 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" bitfld.long 0x04 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" group.long 0xec++0x07 line.long 0x00 "COMPCOR_3V3_CFG,COMPCOR_3V3_CFG Register" bitfld.long 0x00 31. " TQ ,Compensation cell internal command parameter" "Low,High" hexmask.long.byte 0x00 24.--30. 1. " RASRC ,Writing code compensation parameter" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.byte 0x00 16.--22. 1. " NASRC ,Copy of code on compensation bus" textline " " endif bitfld.long 0x00 4. " COMPOK ,Valid code compensation" "Low,High" bitfld.long 0x00 3. " ACCURATE ,Compensation cell internal/external reference resistance definition" "Internal,External" textline " " bitfld.long 0x00 2. " FREEZE ,Freeze command" "Not frozen,Frozen" bitfld.long 0x00 1. " COMPTQ ,Compensation cell internal command parameter" "Low,High" textline " " bitfld.long 0x00 0. " COMPEN ,Compensation cell internal command parameter" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x04 "DDR_PAD,DDR_PAD Register" else line.long 0x04 "SSTLPAD_CFG_CTR,SSTLPAD_CFG_CTR Register" endif bitfld.long 0x04 15.--18. " DDR_SW_MODE ,External memory interface configuration type" "HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,SW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf.,HW memory conf." bitfld.long 0x04 14. " DDR_EN_PAD ,DDR (Low Power) or DDR2 (RO)" "DDR2,DDR low power" textline " " bitfld.long 0x04 13. " REFSSTL ,Internal/External SSTL common reference voltage definition" "Internal,External" bitfld.long 0x04 12. " GATE_OPEN_MODE ,GATE_OPEN_MODE" "Low,High" textline " " bitfld.long 0x04 10. " ENZI ,Input buffer enable" "Disabled,Enabled" bitfld.long 0x04 8.--9. " DQS_PDN/PU_SEL ,Programmable DQS0;1 Pull down/up functionality connected with PDCLK signal of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" textline " " bitfld.long 0x04 6.--7. " CLK_PDN/PU_SEL ,Programmable CLK Pull down/up functionality connected with both PDCLK and PDCLKB signals of SSTL diff pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 4.--5. " PDN/UP_SEL ,Enable active Pull Down/up for SE SSTL pads" "Pull-down,Disabled,Forbidden,Pull-up" bitfld.long 0x04 3. " S_W_MODE ,SSTL pad drive strain mode" "Strong,Weak" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "200MHz,266MHz,333MHz,?..." else bitfld.long 0x04 1.--2. " PROG_A/B ,Frequency mode selection" "Lower,Reserved,Reserved,Higher" endif bitfld.long 0x04 0. " DDR_LOW_POWER_DDR2_MODE ,SW Memory model selection" "DDR2,DDR low power" group.long 0xf4++0xf line.long 0x00 "BIST1_CFG_CTR,BIST1_CFG_CTR Register" bitfld.long 0x00 31. " BIST1_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x00 28. " BIST1_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x00 24.--27. " BIST1_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x00 14. " RBACT1[14] ,Run bist execution command(Low speed shrd mem)" "Disabled,Run" textline " " bitfld.long 0x00 13. " RBACT1[13] ,Run bist execution command(Application SubSys.)" "Disabled,Run" bitfld.long 0x00 12. " RBACT1[12] ,Run bist execution command(Jpeg HUFFENC)" "Disabled,Run" textline " " bitfld.long 0x00 11. " RBACT1[11] ,Run bist execution command(Jpeg DHTMEM)" "Disabled,Run" bitfld.long 0x00 10. " RBACT1[10] ,Run bist execution command(Jpeg QMEM)" "Disabled,Run" textline " " bitfld.long 0x00 9. " RBACT1[09] ,Run bist execution command(Jpeg ZIGRAM_2)" "Disabled,Run" bitfld.long 0x00 8. " RBACT1[08] ,Run bist execution command(Jpeg ZIGRAM_1)" "Disabled,Run" textline " " bitfld.long 0x00 7. " RBACT1[07] ,Run bist execution command(Jpeg DCTRAM)" "Disabled,Run" bitfld.long 0x00 6. " RBACT1[06] ,Run bist execution command(Jpeg CTRL TX Fifo)" "Disabled,Run" textline " " bitfld.long 0x00 5. " RBACT1[05] ,Run bist execution command(Jpeg CTRL RX Fifo)" "Disabled,Run" bitfld.long 0x00 4. " RBACT1[04] ,Run bist execution command(Mac_rxfifo)" "Disabled,Run" textline " " bitfld.long 0x00 3. " RBACT1[03] ,Run bist execution command(Mac_txfifo)" "Disabled,Run" bitfld.long 0x00 2. " RBACT1[02] ,Run bist execution command(Usb_device)" "Disabled,Run" textline " " bitfld.long 0x00 0. " RBACT1[00] ,Run bist execution command(Usb_host)" "Disabled,Run" line.long 0x04 "BIST2_CFG_CTR,BIST2_CFG_CTR Register" bitfld.long 0x04 31. " BIST2_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x04 28. " BIST2_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x04 24.--27. " BIST2_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x04 3. " RBACT2[03] ,Run bist execution command(Ras local data buffer 0)" "Disabled,Run" textline " " bitfld.long 0x04 2. " RBACT2[02] ,Run bist execution command(Ras local data buffer 1)" "Disabled,Run" bitfld.long 0x04 1. " RBACT2[01] ,Run bist execution command(Ras HWACC data buffer)" "Disabled,Run" textline " " bitfld.long 0x04 0. " RBACT2[00] ,Run bist execution command(Ras HWACC data desc.)" "Disabled,Run" line.long 0x08 "BIST3_CFG_CTR,BIST3_CFG_CTR Register" bitfld.long 0x08 31. " BIST3_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x08 28. " BIST3_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x08 24.--27. " BIST3_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x08 2. " RBACT3[02] ,Run bist execution command(Ras local data buffer 2)" "Disabled,Run" textline " " bitfld.long 0x08 1. " RBACT3[01] ,Run bist execution command(Ras local data buffer 3_0)" "Disabled,Run" bitfld.long 0x08 0. " RBACT3[00] ,Run bist execution command(Ras local data buffer 3_1)" "Disabled,Run" line.long 0x0c "BIST4_CFG_CTR,BIST4_CFG_CTR Register" bitfld.long 0x0c 31. " BIST4_RES_RST ,Reset status register result" "No reset,Reset" bitfld.long 0x0c 28. " BIST4_RST ,Reset bist engine collar" "No reset,Reset" textline " " bitfld.long 0x0c 24.--27. " BIST4_TDRI ,Memory bist interface command" "Run bist/Transparent mode,Iddq fill 0/Stable mode,Read 0 retention test,Reserved,Scan collar,Iddq fill 0,Read 1 retention test,?..." bitfld.long 0x0c 7. " RBACT4[07] ,Run bist execution command(ARM926CM_MMU)" "Disabled,Run" textline " " bitfld.long 0x0c 6. " RBACT4[06] ,Run bist execution command(ARM926CM_IValid)" "Disabled,Run" bitfld.long 0x0c 5. " RBACT4[05] ,Run bist execution command(ARM926CM_ITag)" "Disabled,Run" textline " " bitfld.long 0x0c 4. " RBACT4[04] ,Run bist execution command(ARM926CM_ICAche)" "Disabled,Run" bitfld.long 0x0c 3. " RBACT4[03] ,Run bist execution command(ARM926CM_DValid)" "Disabled,Run" textline " " bitfld.long 0x0c 2. " RBACT4[02] ,Run bist execution command(ARM926CM_DTag)" "Disabled,Run" bitfld.long 0x0c 1. " RBACT4[01] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" textline " " bitfld.long 0x0c 0. " RBACT4[00] ,Run bist execution command(ARM926CM_DCache)" "Disabled,Run" rgroup.long 0x108++0xf line.long 0x00 "BIST1_STS_RES,BIST1_STS_RES Register" bitfld.long 0x00 31. " BIST1_END ,End memory bist1 execution" "Pending,Ended" bitfld.long 0x00 14. " BBAD1[14] ,Bist execution result(Low speed shrd mem)" "Not failed,Failed" textline " " bitfld.long 0x00 13. " BBAD1[13] ,Bist execution result(Application SubSys.)" "Not failed,Failed" bitfld.long 0x00 12. " BBAD1[12] ,Bist execution result(Jpeg HUFFENC)" "Not failed,Failed" textline " " bitfld.long 0x00 11. " BBAD1[11] ,Bist execution result(Jpeg DHTMEM)" "Not failed,Failed" bitfld.long 0x00 10. " BBAD1[10] ,Bist execution result(Jpeg QMEM)" "Not failed,Failed" textline " " bitfld.long 0x00 9. " BBAD1[09] ,Bist execution result(Jpeg ZIGRAM_2)" "Not failed,Failed" bitfld.long 0x00 8. " BBAD1[08] ,Bist execution result(Jpeg ZIGRAM_1)" "Not failed,Failed" textline " " bitfld.long 0x00 7. " BBAD1[07] ,Bist execution result(Jpeg DCTRAM)" "Not failed,Failed" bitfld.long 0x00 6. " BBAD1[06] ,Bist execution result(Jpeg CTRL TX Fifo)" "Not failed,Failed" textline " " bitfld.long 0x00 5. " BBAD1[05] ,Bist execution result(Jpeg CTRL RX Fifo)" "Not failed,Failed" bitfld.long 0x00 4. " BBAD1[04] ,Bist execution result(Mac_rxfifo)" "Not failed,Failed" textline " " bitfld.long 0x00 3. " BBAD1[03] ,Bist execution result(Mac_txfifo)" "Not failed,Failed" bitfld.long 0x00 2. " BBAD1[02] ,Bist execution result(Usb_device)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD1[00] ,Bist execution result(Usb_host)" "Not failed,Failed" line.long 0x04 "BIST2_STS_RES,BIST2_STS_RES Register" bitfld.long 0x04 31. " BIST2_END ,End memory bist2 execution" "Pending,Ended" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Dp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Dp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc SpDp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc SpDp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc SpDp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc SpDp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc SpDp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc SpDp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc SpDp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc SpDp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr Dp96x128)" "Not failed,Failed" else bitfld.long 0x04 14. " BBAD2[14] ,Bist execution result(Ras buf. Sp8K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 13. " BBAD2[13] ,Bist execution result(Ras buf. Sp8K8_1)" "Not failed,Failed" bitfld.long 0x04 12. " BBAD2[12] ,Bist execution result(Ras buf. Sp4K8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 11. " BBAD2[11] ,Bist execution result(Ras buf. Sp4K8_3)" "Not failed,Failed" bitfld.long 0x04 10. " BBAD2[10] ,Bist execution result(Ras buf. Sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 9. " BBAD2[09] ,Bist execution result(Ras buf. Sp4K8_1)" "Not failed,Failed" bitfld.long 0x04 8. " BBAD2[08] ,Bist execution result(Ras hwacc dp128x8_8)" "Not failed,Failed" textline " " bitfld.long 0x04 7. " BBAD2[07] ,Bist execution result(Ras hwacc dp128x8_7)" "Not failed,Failed" bitfld.long 0x04 6. " BBAD2[06] ,Bist execution result(Ras hwacc dp128x8_6)" "Not failed,Failed" textline " " bitfld.long 0x04 5. " BBAD2[05] ,Bist execution result(Ras hwacc dp128x8_5)" "Not failed,Failed" bitfld.long 0x04 4. " BBAD2[04] ,Bist execution result(Ras hwacc dp128x8_4)" "Not failed,Failed" textline " " bitfld.long 0x04 3. " BBAD2[03] ,Bist execution result(Ras hwacc dp128x8_3)" "Not failed,Failed" bitfld.long 0x04 2. " BBAD2[02] ,Bist execution result(Ras hwacc dp128x8_2)" "Not failed,Failed" textline " " bitfld.long 0x04 1. " BBAD2[01] ,Bist execution result(Ras hwacc dp128x8_1)" "Not failed,Failed" bitfld.long 0x04 0. " BBAD2[00] ,Bist execution result(Ras hwdescr dp96x128)" "Not failed,Failed" endif line.long 0x08 "BIST3_STS_RES,BIST3_STS_RES Register" bitfld.long 0x08 31. " BIST3_END ,End memory bist3 execution" "Pending,Ended" bitfld.long 0x08 13. " BBAD3[13] ,Bist execution result(Ras buf. sp2K8_8)" "Not failed,Failed" textline " " bitfld.long 0x08 12. " BBAD3[12] ,Bist execution result(Ras buf. sp2K8_7)" "Not failed,Failed" bitfld.long 0x08 11. " BBAD3[11] ,Bist execution result(Ras buf. sp2K8_6)" "Not failed,Failed" textline " " bitfld.long 0x08 10. " BBAD3[10] ,Bist execution result(Ras buf. sp2K8_5)" "Not failed,Failed" bitfld.long 0x08 9. " BBAD3[09] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 8. " BBAD3[08] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 7. " BBAD3[07] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 6. " BBAD3[06] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" bitfld.long 0x08 5. " BBAD3[05] ,Bist execution result(Ras buf. sp4K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 4. " BBAD3[04] ,Bist execution result(Ras buf. sp4K8_1)" "Not failed,Failed" bitfld.long 0x08 3. " BBAD3[03] ,Bist execution result(Ras buf. sp2K8_4)" "Not failed,Failed" textline " " bitfld.long 0x08 2. " BBAD3[02] ,Bist execution result(Ras buf. sp2K8_3)" "Not failed,Failed" bitfld.long 0x08 1. " BBAD3[01] ,Bist execution result(Ras buf. sp2K8_2)" "Not failed,Failed" textline " " bitfld.long 0x08 0. " BBAD3[00] ,Bist execution result(Ras buf. sp2K8_1)" "Not failed,Failed" line.long 0x0c "BIST4_STS_RES,BIST4_STS_RES Register" bitfld.long 0x0c 31. " BIST4_END ,End memory bist4 execution" "Pending,Ended" bitfld.long 0x0c 13. " BBAD4[13] ,Bist execution result(Arm ddata Sp1Kx32_4)" "Not failed,Failed" textline " " bitfld.long 0x0c 12. " BBAD4[12] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" bitfld.long 0x0c 11. " BBAD4[11] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" textline " " bitfld.long 0x0c 10. " BBAD4[10] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" bitfld.long 0x0c 9. " BBAD4[09] ,Bist execution result(Arm dtag Sp256Kx22)" "Not failed,Failed" textline " " bitfld.long 0x0c 8. " BBAD4[08] ,Bist execution result(Arm dcvalid Sp32x24)" "Not failed,Failed" bitfld.long 0x0c 7. " BBAD4[07] ,Bist execution result(Arm dcdirty Sp128x8)" "Not failed,Failed" textline " " bitfld.long 0x0c 6. " BBAD4[06] ,Bist execution result(Arm iicdata Sp1kx32_4)" "Not failed,Failed" bitfld.long 0x0c 5. " BBAD4[05] ,Bist execution result(Arm iicdata Sp1kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x0c 4. " BBAD4[04] ,Bist execution result(Arm iicdata Sp1kx32_2)" "Not failed,Failed" bitfld.long 0x0c 3. " BBAD4[03] ,Bist execution result(Arm icdata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x0c 2. " BBAD4[02] ,Bist execution result(Arm itag Sp128x88)" "Not failed,Failed" bitfld.long 0x0c 1. " BBAD4[01] ,Bist execution result(Arm ivalid Sp32x24)" "Not failed,Failed" textline " " bitfld.long 0x0c 0. " BBAD4[00] ,Bist execution result(Arm mmu Sp32x112)" "Not failed,Failed" rgroup.long 0x118++0x03 sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x00 "BIST5_RSLT_REG,BIST5_RSLT_REG Register" else line.long 0x00 "BIST5_STS_RES,BIST5_STS_RES Register" endif bitfld.long 0x00 31. " BIST5_END ,End memory bist5 execution" "Pending,Ended" bitfld.long 0x00 19. " BBAD5[19] ,Bist execution result(Arm ddata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 18. " BBAD5[18] ,Bist execution result(Arm ddata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 17. " BBAD5[17] ,Bist execution result(Arm ddata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 16. " BBAD5[16] ,Bist execution result(Arm ddata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 15. " BBAD5[15] ,Bist execution result(Arm dtag Sp256Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 14. " BBAD5[14] ,Bist execution result(Arm dtag Sp256Kx22_2)" "Not failed,Failed" bitfld.long 0x00 13. " BBAD5[13] ,Bist execution result(Arm dtag Sp256Kx22_1)" "Not failed,Failed" textline " " bitfld.long 0x00 12. " BBAD5[12] ,Bist execution result(Arm dtag Sp256Kx22_0)" "Not failed,Failed" bitfld.long 0x00 11. " BBAD5[11] ,Bist execution result(Arm idata Sp1Kx32_3)" "Not failed,Failed" textline " " bitfld.long 0x00 10. " BBAD5[10] ,Bist execution result(Arm idata Sp1Kx32_2)" "Not failed,Failed" bitfld.long 0x00 9. " BBAD5[09] ,Bist execution result(Arm idata Sp1Kx32_1)" "Not failed,Failed" textline " " bitfld.long 0x00 8. " BBAD5[08] ,Bist execution result(Arm idata Sp1Kx32_0)" "Not failed,Failed" bitfld.long 0x00 7. " BBAD5[07] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 6. " BBAD5[06] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 5. " BBAD5[05] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" textline " " bitfld.long 0x00 4. " BBAD5[04] ,Bist execution result(Arm itag Sp128Kx22_3)" "Not failed,Failed" bitfld.long 0x00 3. " BBAD5[03] ,Bist execution result(Arm dvalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 2. " BBAD5[02] ,Bist execution result(Arm ddirty Sp128Kx8)" "Not failed,Failed" bitfld.long 0x00 1. " BBAD5[01] ,Bist execution result(Arm ivalid Sp32Kx24)" "Not failed,Failed" textline " " bitfld.long 0x00 0. " BBAD5[00] ,Bist execution result(ARM MMU Sp32x112)" "Not failed,Failed" group.long 0x11c++0x03 line.long 0x00 "SYSERR_CFG_CTR,SYSERR_CFG_CTR Register" bitfld.long 0x00 28. " DMA_ERR ,Dma transfer error" "No error,Error" bitfld.long 0x00 27. " MEM_ERR ,Memory transaction error" "No error,Error" textline " " bitfld.long 0x00 26. " USBH2_ERR ,USB2 PHY receiver error" "No error,Error" bitfld.long 0x00 25. " USBH1_ERR ,USB2 PHY receiver error" "No error,Error" textline " " bitfld.long 0x00 24. " USBDV_ERR ,USB2 PHY receiver error" "No error,Error" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 23. " ARM2_WDG_ERR ,Processors watch dog timeout error" "No error,Error" endif textline " " bitfld.long 0x00 22. " ARM1_WDG_ERR ,Processors watch dog timeout error" "No error,Error" bitfld.long 0x00 15. " MEM_DLL_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 14. " USB_PLL_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 13. " SYS_PLL2_ERR ,PLL/DLL unlock error" "No error,Error" textline " " bitfld.long 0x00 12. " SYS_PLL1_ERR ,PLL/DLL unlock error" "No error,Error" bitfld.long 0x00 10. " DMA_ERR_ENB ,Enable Dma transfer error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MEM_ERR_ENB ,Enable Memory transfer error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 8. " USB_ERR_ENB ,Enable USB2 PHY receive error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " WDG_ERR_ENB ,Enable Watch dog timeout error interrupt detection" "Disabled,Enabled" bitfld.long 0x00 4. " PLL_ERR_ENB ,Enable Pll/Dll unlock error interrupt detection" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT_ERROR ,SYS_ERROR interrupt request" "No interrupt,Interrupt" bitfld.long 0x00 1. " INT_ERROR_RST ,Reset error interrupt request" "No reset,Reset" textline " " bitfld.long 0x00 0. " INT_ERROR_ENB ,Enable SYS_ERROR interrupt event" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "USB0_TUN_PRM,USB0_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x124++0x03 line.long 0x00 "USB1_TUN_PRM,USB1_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x128++0x03 line.long 0x00 "USB2_TUN_PRM,USB2_TUN_PRM Register" bitfld.long 0x00 15.--17. " COMPTUNE ,COMPDISTUNE" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " SQRXTUNE ,SQRXTUNE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " TXFSLSTUNE ,TXFLSTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TXVREFTUNE ,TXVREFTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " TXPREEMPHASISTUNE ,TXPREEMPHASISTUNE" "Low,High" bitfld.long 0x00 1.--2. " TXHSXVTUNE ,TXHSXVTUNE" "0,1,2,3" textline " " bitfld.long 0x00 0. " TXRISETUNE ,TXRISETUNE" "Low,High" group.long 0x130++0x13 line.long 0x00 "PLGPIO0_PAD_PRG,PLGPIO0_PAD_PRG Register" bitfld.long 0x00 31. " PDN_UART ,Pull down control for UART lines" "No effect,Pull down" bitfld.long 0x00 30. " PUP_UART ,Pull up control for UART lines" "No effect,Pull up" textline " " bitfld.long 0x00 29. " PDN_5 ,Pull down control for pads 20,21,22,23" "No effect,Pull down" bitfld.long 0x00 28. " PUP_5 ,Pull up control for pads 20,21,22,23" "No effect,Pull up" textline " " bitfld.long 0x00 26.--27. " DRV_5 ,Drive strength control for pads 20, 21,22, 23" "0,1,2,3" bitfld.long 0x00 25. " SLEW_5 ,Slew rate control for pads 20,21,22,23" "Low,High" textline " " bitfld.long 0x00 24. " PDN_4 ,Pull down control for pads 16,17,18,19" "No effect,Pull down" bitfld.long 0x00 23. " PUP_4 ,Pull up control for pads 16,17,18,19" "No effect,Pull up" textline " " bitfld.long 0x00 21.--22. " DRV_4 ,Drive strength control for pads 16,17,18,19" "0,1,2,3" bitfld.long 0x00 20. " SLEW_4 ,Slew control for pads 16,17,18,19" "Low,High" textline " " bitfld.long 0x00 19. " PDN_3 ,Pull down control for pads 12,13,14,15" "No effect,Pull down" bitfld.long 0x00 18. " PUP_3 ,Pull up control for pads 12,13,14,15" "No effect,Pull up" textline " " bitfld.long 0x00 16.--17. " DRV_3 ,Drive strength control for pads PL-GPIO 15, 14, 13 and 12" "0,1,2,3" bitfld.long 0x00 15. " SLEW_3 ,Slew control for pads 12,13,14,15" "Low,High" textline " " bitfld.long 0x00 14. " PDN_2 ,Pull down control for pads 8,9" "No effect,Pull down" bitfld.long 0x00 13. " PUP_2 ,Pull up control for pads 8,9" "No effect,Pull up" textline " " bitfld.long 0x00 11.--12. " DRV_2 ,Drive strength control for pads 8,9,10,11" "0,1,2,3" bitfld.long 0x00 10. " SLEW_2 ,Slew control for pads 8,9,10,11" "Low,High" textline " " bitfld.long 0x00 9. " PDN_1 ,Pull down control for pads 6,7" "No effect,Pull down" bitfld.long 0x00 8. " PUP_1 ,Pull up control for pads 6,7" "No effect,Pull up" textline " " bitfld.long 0x00 6.--7. " DRV_1 ,Drive strength control for pads 4,5,6,7" "0,1,2,3" bitfld.long 0x00 5. " SLEW_1 ,Slew control for pads 4,5,6,7" "Low,High" textline " " bitfld.long 0x00 4. " PDN_0 ,Pull down control for pads 0,1" "No effect,Pull down" bitfld.long 0x00 3. " PUP_0 ,Pull up control for pads 0,1" "No effect,Pull up" textline " " bitfld.long 0x00 1.--2. " DRV_0 ,Drive strength control for pads 0,1,2,3" "0,1,2,3" bitfld.long 0x00 0. " SLEW_0 ,Slew control for pads 0,1,2,3" "Low,High" line.long 0x04 "PLGPIO1_PAD_PRG,PLGPIO1_PAD_PRG Register" bitfld.long 0x04 31. " PDN_I2C ,Pull down control for I2C lines" "No effect,Pull down" bitfld.long 0x04 30. " PUP_I2C ,Pull up control for I2C lines" "No effect,Pull up" textline " " bitfld.long 0x04 29. " PDN_11 ,Pull down control for pads 45,46,47" "No effect,Pull down" bitfld.long 0x04 28. " PUP_11 ,Pull up control for pads 45,46,47" "No effect,Pull up" textline " " bitfld.long 0x04 26.--27. " DRV_11 ,Drive strength control for pads 44,45,46,47" "0,1,2,3" bitfld.long 0x04 25. " SLEW_11 ,Slew control for pads 44,45,46,47" "Low,High" textline " " bitfld.long 0x04 24. " PDN_10 ,Pull down control for pads 40,41,42,43,44" "No effect,Pull down" bitfld.long 0x04 23. " PUP_10 ,Pull up control for pads 40,41,42,43,44" "No effect,Pull up" textline " " bitfld.long 0x04 21.--22. " DRV_10 ,Drive strength control for pads 40,41,42,43" "0,1,2,3" bitfld.long 0x04 20. " SLEW_10 ,Slew control for pads 40,41,42,43" "Low,High" textline " " bitfld.long 0x04 19. " PDN_9 ,Pull down control for pads 37,38,39" "No effect,Pull down" bitfld.long 0x04 18. " PUP_9 ,Pull up control for pads 37,38,39" "No effect,Pull up" textline " " bitfld.long 0x04 16.--17. " DRV_9 ,Drive strength control for pads 36,37,38,39" "0,1,2,3" bitfld.long 0x04 15. " SLEW_9 ,Slew control for pads 36,37,38,39" "Low,High" textline " " bitfld.long 0x04 14. " PDN_8 ,Pull down control for pads 32,33,34,35,36" "No effect,Pull down" bitfld.long 0x04 13. " PUP_8 ,Pull up control for pads 32,33,34,35,36" "No effect,Pull up" textline " " bitfld.long 0x04 11.--12. " DRV_8 ,Drive strength control for pads 32,33,34,35" "0,1,2,3" bitfld.long 0x04 10. " SLEW_8 ,Slew control for pads 32,33,34,35" "Low,High" textline " " bitfld.long 0x04 9. " PDN_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull down" bitfld.long 0x04 8. " PUP_7 ,Pull down control for pads 28,29,30,31" "No effect,Pull up" textline " " bitfld.long 0x04 6.--7. " DRV_7 ,Pull up control for pads 28,29,30,31" "0,1,2,3" bitfld.long 0x04 5. " SLEW_7 ,Drive Strength control for pads 28,29,30,31" "Low,High" textline " " bitfld.long 0x04 4. " PDN_6 ,Pull down control for pads 24,25,26,27" "No effect,Pull down" bitfld.long 0x04 3. " PUP_6 ,Pull up control for pads 24,25,26,27" "No effect,Pull up" textline " " bitfld.long 0x04 1.--2. " DRV_6 ,Drive strength control for pads 24,25,26,27" "0,1,2,3" bitfld.long 0x04 0. " SLEW_6 ,Slew rate control for PL-GPIO 27, 26, 25, and 24" "Low,High" line.long 0x08 "PLGPIO2_PAD_PRG,PLGPIO2_PAD_PRG Register" bitfld.long 0x08 31. " PDN_ETHERNET ,Pull down control for ETHERNET" "No effect,Pull down" bitfld.long 0x08 30. " PUP_ETHERNET ,Pull up control for ETHERNET" "No effect,Pull up" textline " " bitfld.long 0x08 29. " PDN_17 ,Pull down control for pads 68,69,70,71" "No effect,Pull down" bitfld.long 0x08 28. " PUP_17 ,Pull up control for pads 68,69,70,71" "No effect,Pull up" textline " " bitfld.long 0x08 26.--27. " DRV_17 ,Drive strength control for pads 68,69,70,71" "0,1,2,3" bitfld.long 0x08 25. " SLEW_17 ,Slew control for pads 68,69,70,71" "Low,High" textline " " bitfld.long 0x08 24. " PDN_16 ,Pull down control for pads 64,65,66,67" "No effect,Pull down" bitfld.long 0x08 23. " PUP_16 ,Pull up control for pads 64,65,66,67" "No effect,Pull up" textline " " bitfld.long 0x08 21.--22. " DRV_16 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 20. " SLEW_16 ,Slew control for pads 64,65,66,67" "Low,High" textline " " bitfld.long 0x08 19. " PDN_15 ,Pull down control for pads 60,61,62,63" "No effect,Pull down" bitfld.long 0x08 18. " PUP_15 ,Pull up control for pads 60,61,62,63" "No effect,Pull up" textline " " bitfld.long 0x08 16.--17. " DRV_15 ,Drive strength control for pads 60,61,62,63" "0,1,2,3" bitfld.long 0x08 15. " SLEW_15 ,Slew rate control for pads 60,61,62,63" "Low,High" textline " " bitfld.long 0x08 14. " PDN_14 ,Pull down control for pads 56,57,58,59" "No effect,Pull down" bitfld.long 0x08 13. " PUP_14 ,Pull up control for pads 56,57,58,59" "No effect,Pull up" textline " " bitfld.long 0x08 11.--12. " DRV_14 ,Drive strength control for pads 56,57,58,59" "0,1,2,3" bitfld.long 0x08 10. " SLEW_14 ,Slew control for pads 56,57,58,59" "Low,High" textline " " bitfld.long 0x08 9. " PDN_13 ,Pull down control for pads 52,53,54,55" "No effect,Pull down" bitfld.long 0x08 8. " PUP_13 ,Pull up control for pads 52,53,54,55" "No effect,Pull up" textline " " bitfld.long 0x08 6.--7. " DRV_13 ,Pull up control for pads 52,53,54,55" "0,1,2,3" bitfld.long 0x08 5. " SLEW_13 ,Drive strength control for pads 52,53,54,55" "Low,High" textline " " bitfld.long 0x08 4. " PDN_12 ,Pull down control for pads 48,49,50,51" "No effect,Pull down" bitfld.long 0x08 3. " PUP_12 ,Pull up control for pads 48,49,50,51" "No effect,Pull up" textline " " bitfld.long 0x08 1.--2. " DRV_12 ,Drive strength control for pads 48,49,50,51" "0,1,2,3" bitfld.long 0x08 0. " SLEW_12 ,Slew control for pads 48,49,50,51" "Low,High" line.long 0x0c "PLGPIO3_PAD_PRG,PLGPIO3_PAD_PRG Register" bitfld.long 0x0C 29. " PDN_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull down" bitfld.long 0x0C 28. " PUP_23 ,Pull down control for pads 92,93,94,95" "No effect,Pull up" textline " " bitfld.long 0x0C 26.--27. " DRV_23 ,Drive strength control for pad 92,93,94,95" "0,1,2,3" bitfld.long 0x0C 25. " SLEW_23 ,Slew control for pads 92,93,94,95" "Low,High" textline " " bitfld.long 0x0C 24. " PDN_22 ,Pull down control for pads 88,89,90,91" "No effect,Pull down" bitfld.long 0x0C 23. " PUP_22 ,Pull up control for pads 88,89,90,91" "No effect,Pull up" textline " " bitfld.long 0x0C 21.--22. " DRV_22 ,Drive strength control for pads 88,89,90,91" "0,1,2,3" bitfld.long 0x0C 20. " SLEW_22 ,Slew control for pads 88,89,90,91" "Low,High" textline " " bitfld.long 0x0C 19. " PDN_21 ,Pull down control for pads 84,85,86,87" "No effect,Pull down" bitfld.long 0x0C 18. " PUP_21 ,Pull up control for pads 84,85,86,87" "No effect,Pull up" textline " " bitfld.long 0x0C 16.--17. " DRV_21 ,Drive strength control for pads 84,85,86,87" "0,1,2,3" bitfld.long 0x0C 15. " SLEW_21 ,Slew rate control for pads 84,85,86,87" "Low,High" textline " " bitfld.long 0x0C 14. " PDN_20 ,Pull down control for pads 80,81,82,83" "No effect,Pull down" bitfld.long 0x0C 13. " PUP_20 ,Pull up control for pads 80,81,82,83" "No effect,Pull up" textline " " bitfld.long 0x0C 11.--12. " DRV_20 ,Drive strength control for pads 80,81,82,83" "0,1,2,3" bitfld.long 0x0C 10. " SLEW_20 ,Slew rate control for pads 80,81,82,83" "Low,High" textline " " bitfld.long 0x0C 9. " PDN_19 ,Pull down control for pads 76,77,78,79" "No effect,Pull down" bitfld.long 0x0C 8. " PUP_19 ,Pull up control for pads 76,77,78,79" "No effect,Pull up" textline " " bitfld.long 0x0C 6.--7. " DRV_19 ,Drive strength control for pads 76,77,78,79" "0,1,2,3" bitfld.long 0x0C 5. " SLEW_19 ,Slew rate control for pads 76,77,78,79" "Low,High" textline " " bitfld.long 0x0C 4. " PDN_18 ,Pull down control for pads 72,72,74,75" "No effect,Pull down" bitfld.long 0x0C 3. " PUP_18 ,Pull up control for pads 72,72,74,75" "No effect,Pull up" textline " " bitfld.long 0x0C 1.--2. " DRV_18 ,Drive strength control for pads 72,72,74,75" "0,1,2,3" bitfld.long 0x0C 0. " SLEW_18 ,Slew rate control for pads 72,72,74,75" "Low,High" line.long 0x10 "PLGPIO4_PAD_PRG,PLGPIO4_PAD_PRG Register" bitfld.long 0x10 24. " PDN_CLK4 ,Pull down control for CLK4" "No effect,Pull down" bitfld.long 0x10 23. " PUP_CLK4 ,Pull up control for pads CLK4" "No effect,Pull up" textline " " bitfld.long 0x10 21.--22. " DRV_CLK4 ,Drive strength control for pads CLK4" "0,1,2,3" bitfld.long 0x10 20. " SLEW_CLK4 ,Slew rate control for pads CLK4" "Low,High" textline " " bitfld.long 0x10 19. " PDN_CLK3 ,Pull down control for pads CLK3" "No effect,Pull down" bitfld.long 0x10 18. " PUP_CLK3 ,Pull up control for pads CLK3" "No effect,Pull up" textline " " bitfld.long 0x10 16.--17. " DRV_CLK3 ,Drive strength control for pads CLK3" "0,1,2,3" bitfld.long 0x10 15. " SLEW_CLK3 ,Slew control for pads CLK3" "Low,High" textline " " bitfld.long 0x10 14. " PDN_CLK2 ,Pull down control for pads CLK2" "No effect,Pull down" bitfld.long 0x10 13. " PUP_CLK2 ,Pull up control for pads CLK2" "No effect,Pull up" textline " " bitfld.long 0x10 11.--12. " DRV_CLK2 ,Drive strength control for pads CLK2" "0,1,2,3" bitfld.long 0x10 10. " SLEW_CLK2 ,Slew rate control for pads CLK2" "Low,High" textline " " bitfld.long 0x10 9. " PDN_CLK1 ,Pull down control for pads CLK1" "No effect,Pull down" bitfld.long 0x10 8. " PUP_CLK1 ,Pull up control for pads CLK1" "No effect,Pull up" textline " " bitfld.long 0x10 6.--7. " DRV_CLK1 ,Drive strength control for pads CLK1" "0,1,2,3" bitfld.long 0x10 5. " SLEW_CLK1 ,Slew control for CLK1 and pads 96,97" "Low,High" textline " " bitfld.long 0x10 4. " PDN_24 ,Pull down control for pads 96,97" "No effect,Pull down" bitfld.long 0x10 3. " PUP_24 ,Pull up control for pads 96,97" "No effect,Pull up" textline " " bitfld.long 0x10 1.--2. " DRV_24 ,Drive strength control for pads 96,97" "0,1,2,3" width 0xb endif tree.end endif tree.end tree.open "Global space" tree "Alias 1" base asd:0xfca88000 width 17. rgroup.long 0x00++0x07 line.long 0x00 "RAS_GPP1_IN,RAS_GPP1_IN Register" bitfld.long 0x0 31. " GPP1_IN[31] ,General purpose input 31" "Low,High" bitfld.long 0x0 30. " GPP1_IN[30] ,General purpose input 30" "Low,High" bitfld.long 0x0 29. " GPP1_IN[29] ,General purpose input 29" "Low,High" textline " " bitfld.long 0x0 28. " GPP1_IN[28] ,General purpose input 28" "Low,High" bitfld.long 0x0 27. " GPP1_IN[27] ,General purpose input 27" "Low,High" bitfld.long 0x0 26. " GPP1_IN[26] ,General purpose input 26" "Low,High" textline " " bitfld.long 0x0 25. " GPP1_IN[25] ,General purpose input 25" "Low,High" bitfld.long 0x0 24. " GPP1_IN[24] ,General purpose input 24" "Low,High" bitfld.long 0x0 23. " GPP1_IN[23] ,General purpose input 23" "Low,High" textline " " bitfld.long 0x0 22. " GPP1_IN[22] ,General purpose input 22" "Low,High" bitfld.long 0x0 21. " GPP1_IN[21] ,General purpose input 21" "Low,High" bitfld.long 0x0 20. " GPP1_IN[20] ,General purpose input 20" "Low,High" textline " " bitfld.long 0x0 19. " GPP1_IN[19] ,General purpose input 19" "Low,High" bitfld.long 0x0 18. " GPP1_IN[18] ,General purpose input 18" "Low,High" bitfld.long 0x0 17. " GPP1_IN[17] ,General purpose input 17" "Low,High" textline " " bitfld.long 0x0 16. " GPP1_IN[16] ,General purpose input 16" "Low,High" bitfld.long 0x0 15. " GPP1_IN[15] ,General purpose input 15" "Low,High" bitfld.long 0x0 14. " GPP1_IN[14] ,General purpose input 14" "Low,High" textline " " bitfld.long 0x0 13. " GPP1_IN[13] ,General purpose input 13" "Low,High" bitfld.long 0x0 12. " GPP1_IN[12] ,General purpose input 12" "Low,High" bitfld.long 0x0 11. " GPP1_IN[11] ,General purpose input 11" "Low,High" textline " " bitfld.long 0x0 10. " GPP1_IN[10] ,General purpose input 10" "Low,High" bitfld.long 0x0 9. " GPP1_IN[9] ,General purpose input 9" "Low,High" bitfld.long 0x0 8. " GPP1_IN[8] ,General purpose input 8" "Low,High" textline " " bitfld.long 0x0 7. " GPP1_IN[7] ,General purpose input 7" "Low,High" bitfld.long 0x0 6. " GPP1_IN[6] ,General purpose input 6" "Low,High" bitfld.long 0x0 5. " GPP1_IN[5] ,General purpose input 5" "Low,High" textline " " bitfld.long 0x0 4. " GPP1_IN[4] ,General purpose input 4" "Low,High" bitfld.long 0x0 3. " GPP1_IN[3] ,General purpose input 3" "Low,High" bitfld.long 0x0 2. " GPP1_IN[2] ,General purpose input 2" "Low,High" textline " " bitfld.long 0x0 1. " GPP1_IN[1] ,General purpose input 1" "Low,High" bitfld.long 0x0 0. " GPP1_IN[0] ,General purpose input 0" "Low,High" line.long 0x4 "RAS_GPP2_IN,RAS_GPP2_IN Register" bitfld.long 0x4 31. " GPP2_IN[63] ,General purpose input 63" "Low,High" bitfld.long 0x4 30. " GPP2_IN[62] ,General purpose input 62" "Low,High" bitfld.long 0x4 29. " GPP2_IN[61] ,General purpose input 61" "Low,High" textline " " bitfld.long 0x4 28. " GPP2_IN[60] ,General purpose input 60" "Low,High" bitfld.long 0x4 27. " GPP2_IN[59] ,General purpose input 59" "Low,High" bitfld.long 0x4 26. " GPP2_IN[58] ,General purpose input 58" "Low,High" textline " " bitfld.long 0x4 25. " GPP2_IN[57] ,General purpose input 57" "Low,High" bitfld.long 0x4 24. " GPP2_IN[56] ,General purpose input 56" "Low,High" bitfld.long 0x4 23. " GPP2_IN[55] ,General purpose input 55" "Low,High" textline " " bitfld.long 0x4 22. " GPP2_IN[54] ,General purpose input 54" "Low,High" bitfld.long 0x4 21. " GPP2_IN[53] ,General purpose input 53" "Low,High" bitfld.long 0x4 20. " GPP2_IN[52] ,General purpose input 52" "Low,High" textline " " bitfld.long 0x4 19. " GPP2_IN[51] ,General purpose input 51" "Low,High" bitfld.long 0x4 18. " GPP2_IN[50] ,General purpose input 50" "Low,High" bitfld.long 0x4 17. " GPP2_IN[49] ,General purpose input 49" "Low,High" textline " " bitfld.long 0x4 16. " GPP2_IN[48] ,General purpose input 48" "Low,High" bitfld.long 0x4 15. " GPP2_IN[47] ,General purpose input 47" "Low,High" bitfld.long 0x4 14. " GPP2_IN[46] ,General purpose input 46" "Low,High" textline " " bitfld.long 0x4 13. " GPP2_IN[45] ,General purpose input 45" "Low,High" bitfld.long 0x4 12. " GPP2_IN[44] ,General purpose input 44" "Low,High" bitfld.long 0x4 11. " GPP2_IN[43] ,General purpose input 43" "Low,High" textline " " bitfld.long 0x4 10. " GPP2_IN[42] ,General purpose input 42" "Low,High" bitfld.long 0x4 9. " GPP2_IN[41] ,General purpose input 41" "Low,High" bitfld.long 0x4 8. " GPP2_IN[40] ,General purpose input 40" "Low,High" textline " " bitfld.long 0x4 7. " GPP2_IN[39] ,General purpose input 39" "Low,High" bitfld.long 0x4 6. " GPP2_IN[38] ,General purpose input 38" "Low,High" bitfld.long 0x4 5. " GPP2_IN[37] ,General purpose input 37" "Low,High" textline " " bitfld.long 0x4 4. " GPP2_IN[36] ,General purpose input 36" "Low,High" bitfld.long 0x4 3. " GPP2_IN[35] ,General purpose input 35" "Low,High" bitfld.long 0x4 2. " GPP2_IN[34] ,General purpose input 34" "Low,High" textline " " bitfld.long 0x4 1. " GPP2_IN[33] ,General purpose input 33" "Low,High" bitfld.long 0x4 0. " GPP2_IN[32] ,General purpose input 32" "Low,High" group.long 0x08++0x07 line.long 0x0 "RAS_GPP1_OUT,RAS_GPP1_OUT Register" bitfld.long 0x0 31. " GPP1_OUT[31] ,General purpose output 31" "Low,High" bitfld.long 0x00 30. " GPP1_OUT[30] ,General purpose output 30" "Low,High" bitfld.long 0x00 29. " GPP1_OUT[29] ,General purpose output 29" "Low,High" textline " " bitfld.long 0x00 28. " GPP1_OUT[28] ,General purpose output 28" "Low,High" bitfld.long 0x00 27. " GPP1_OUT[27] ,General purpose output 27" "Low,High" bitfld.long 0x00 26. " GPP1_OUT[26] ,General purpose output 26" "Low,High" textline " " bitfld.long 0x00 25. " GPP1_OUT[25] ,General purpose output 25" "Low,High" bitfld.long 0x00 24. " GPP1_OUT[24] ,General purpose output 24" "Low,High" bitfld.long 0x00 23. " GPP1_OUT[23] ,General purpose output 23" "Low,High" textline " " bitfld.long 0x00 22. " GPP1_OUT[22] ,General purpose output 22" "Low,High" bitfld.long 0x00 21. " GPP1_OUT[21] ,General purpose output 21" "Low,High" bitfld.long 0x00 20. " GPP1_OUT[20] ,General purpose output 20" "Low,High" textline " " bitfld.long 0x00 19. " GPP1_OUT[19] ,General purpose output 19" "Low,High" bitfld.long 0x00 18. " GPP1_OUT[18] ,General purpose output 18" "Low,High" bitfld.long 0x00 17. " GPP1_OUT[17] ,General purpose output 17" "Low,High" textline " " bitfld.long 0x00 16. " GPP1_OUT[16] ,General purpose output 16" "Low,High" bitfld.long 0x00 15. " GPP1_OUT[15] ,General purpose output 15" "Low,High" bitfld.long 0x00 14. " GPP1_OUT[14] ,General purpose output 14" "Low,High" textline " " bitfld.long 0x00 13. " GPP1_OUT[13] ,General purpose output 13" "Low,High" bitfld.long 0x00 12. " GPP1_OUT[12] ,General purpose output 12" "Low,High" bitfld.long 0x00 11. " GPP1_OUT[11] ,General purpose output 11" "Low,High" textline " " bitfld.long 0x00 10. " GPP1_OUT[10] ,General purpose output 10" "Low,High" bitfld.long 0x00 9. " GPP1_OUT[9] ,General purpose output 9" "Low,High" bitfld.long 0x00 8. " GPP1_OUT[8] ,General purpose output 8" "Low,High" textline " " bitfld.long 0x00 7. " GPP1_OUT[7] ,General purpose output 7" "Low,High" bitfld.long 0x00 6. " GPP1_OUT[6] ,General purpose output 6" "Low,High" bitfld.long 0x00 5. " GPP1_OUT[5] ,General purpose output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP1_OUT[4] ,General purpose output 4" "Low,High" bitfld.long 0x00 3. " GPP1_OUT[3] ,General purpose output 3" "Low,High" bitfld.long 0x00 2. " GPP1_OUT[2] ,General purpose output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP1_OUT[1] ,General purpose output 1" "Low,High" bitfld.long 0x00 0. " GPP1_OUT[0] ,General purpose output 0" "Low,High" line.long 0x04 "RAS_GPP2_OUT,RAS_GPP2_OUT Register" bitfld.long 0x04 31. " GPP2_OUT[63] ,General purpose output 63" "Low,High" bitfld.long 0x04 30. " GPP2_OUT[62] ,General purpose output 62" "Low,High" bitfld.long 0x04 29. " GPP2_OUT[61] ,General purpose output 61" "Low,High" textline " " bitfld.long 0x04 28. " GPP2_OUT[60] ,General purpose output 60" "Low,High" bitfld.long 0x04 27. " GPP2_OUT[59] ,General purpose output 59" "Low,High" bitfld.long 0x04 26. " GPP2_OUT[58] ,General purpose output 58" "Low,High" textline " " bitfld.long 0x04 25. " GPP2_OUT[57] ,General purpose output 57" "Low,High" bitfld.long 0x04 24. " GPP2_OUT[56] ,General purpose output 56" "Low,High" bitfld.long 0x04 23. " GPP2_OUT[55] ,General purpose output 55" "Low,High" textline " " bitfld.long 0x04 22. " GPP2_OUT[54] ,General purpose output 54" "Low,High" bitfld.long 0x04 21. " GPP2_OUT[53] ,General purpose output 53" "Low,High" bitfld.long 0x04 20. " GPP2_OUT[52] ,General purpose output 52" "Low,High" textline " " bitfld.long 0x04 19. " GPP2_OUT[51] ,General purpose output 51" "Low,High" bitfld.long 0x04 18. " GPP2_OUT[50] ,General purpose output 50" "Low,High" bitfld.long 0x04 17. " GPP2_OUT[49] ,General purpose output 49" "Low,High" textline " " bitfld.long 0x04 16. " GPP2_OUT[48] ,General purpose output 48" "Low,High" bitfld.long 0x04 15. " GPP2_OUT[47] ,General purpose output 47" "Low,High" bitfld.long 0x04 14. " GPP2_OUT[46] ,General purpose output 46" "Low,High" textline " " bitfld.long 0x04 13. " GPP2_OUT[45] ,General purpose output 45" "Low,High" bitfld.long 0x04 12. " GPP2_OUT[44] ,General purpose output 44" "Low,High" bitfld.long 0x04 11. " GPP2_OUT[43] ,General purpose output 43" "Low,High" textline " " bitfld.long 0x04 10. " GPP2_OUT[42] ,General purpose output 42" "Low,High" bitfld.long 0x04 9. " GPP2_OUT[41] ,General purpose output 41" "Low,High" bitfld.long 0x04 8. " GPP2_OUT[40] ,General purpose output 40" "Low,High" textline " " bitfld.long 0x04 7. " GPP2_OUT[39] ,General purpose output 39" "Low,High" bitfld.long 0x04 6. " GPP2_OUT[38] ,General purpose output 38" "Low,High" bitfld.long 0x04 5. " GPP2_OUT[37] ,General purpose output 37" "Low,High" textline " " bitfld.long 0x04 4. " GPP2_OUT[36] ,General purpose output 36" "Low,High" bitfld.long 0x04 3. " GPP2_OUT[35] ,General purpose output 35" "Low,High" bitfld.long 0x04 2. " GPP2_OUT[34] ,General purpose output 34" "Low,High" textline " " bitfld.long 0x04 1. " GPP2_OUT[33] ,General purpose output 33" "Low,High" bitfld.long 0x04 0. " GPP2_OUT[32] ,General purpose output 32" "Low,High" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x10++0x03 line.long 0x00 "RAS_GPP_EXT_IN,RAS_GPP_EXT_IN Register" bitfld.long 0x00 7. " GPP_EXT_IN[7] ,General purpose external input 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_IN[6] ,General purpose external input 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_IN[5] ,General purpose external input 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_IN[4] ,General purpose external input 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_IN[3] ,General purpose external input 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_IN[2] ,General purpose external input 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_IN[1] ,General purpose external input 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_IN[0] ,General purpose external input 0" "Low,High" group.long 0x14++0x03 line.long 0x00 "RAS_GPP_EXT_OUT,RAS_GPP_EXT_OUT Register" bitfld.long 0x00 7. " GPP_EXT_OUT[7] ,General purpose external output 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_OUT[6] ,General purpose external output 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_OUT[5] ,General purpose external output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_OUT[4] ,General purpose external output 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_OUT[3] ,General purpose external output 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_OUT[2] ,General purpose external output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_OUT[1] ,General purpose external output 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_OUT[0] ,General purpose external output 0" "Low,High" endif width 0xb tree.end tree "Alias 2" base asd:0xfca98000 width 17. rgroup.long 0x00++0x07 line.long 0x00 "RAS_GPP1_IN,RAS_GPP1_IN Register" bitfld.long 0x0 31. " GPP1_IN[31] ,General purpose input 31" "Low,High" bitfld.long 0x0 30. " GPP1_IN[30] ,General purpose input 30" "Low,High" bitfld.long 0x0 29. " GPP1_IN[29] ,General purpose input 29" "Low,High" textline " " bitfld.long 0x0 28. " GPP1_IN[28] ,General purpose input 28" "Low,High" bitfld.long 0x0 27. " GPP1_IN[27] ,General purpose input 27" "Low,High" bitfld.long 0x0 26. " GPP1_IN[26] ,General purpose input 26" "Low,High" textline " " bitfld.long 0x0 25. " GPP1_IN[25] ,General purpose input 25" "Low,High" bitfld.long 0x0 24. " GPP1_IN[24] ,General purpose input 24" "Low,High" bitfld.long 0x0 23. " GPP1_IN[23] ,General purpose input 23" "Low,High" textline " " bitfld.long 0x0 22. " GPP1_IN[22] ,General purpose input 22" "Low,High" bitfld.long 0x0 21. " GPP1_IN[21] ,General purpose input 21" "Low,High" bitfld.long 0x0 20. " GPP1_IN[20] ,General purpose input 20" "Low,High" textline " " bitfld.long 0x0 19. " GPP1_IN[19] ,General purpose input 19" "Low,High" bitfld.long 0x0 18. " GPP1_IN[18] ,General purpose input 18" "Low,High" bitfld.long 0x0 17. " GPP1_IN[17] ,General purpose input 17" "Low,High" textline " " bitfld.long 0x0 16. " GPP1_IN[16] ,General purpose input 16" "Low,High" bitfld.long 0x0 15. " GPP1_IN[15] ,General purpose input 15" "Low,High" bitfld.long 0x0 14. " GPP1_IN[14] ,General purpose input 14" "Low,High" textline " " bitfld.long 0x0 13. " GPP1_IN[13] ,General purpose input 13" "Low,High" bitfld.long 0x0 12. " GPP1_IN[12] ,General purpose input 12" "Low,High" bitfld.long 0x0 11. " GPP1_IN[11] ,General purpose input 11" "Low,High" textline " " bitfld.long 0x0 10. " GPP1_IN[10] ,General purpose input 10" "Low,High" bitfld.long 0x0 9. " GPP1_IN[9] ,General purpose input 9" "Low,High" bitfld.long 0x0 8. " GPP1_IN[8] ,General purpose input 8" "Low,High" textline " " bitfld.long 0x0 7. " GPP1_IN[7] ,General purpose input 7" "Low,High" bitfld.long 0x0 6. " GPP1_IN[6] ,General purpose input 6" "Low,High" bitfld.long 0x0 5. " GPP1_IN[5] ,General purpose input 5" "Low,High" textline " " bitfld.long 0x0 4. " GPP1_IN[4] ,General purpose input 4" "Low,High" bitfld.long 0x0 3. " GPP1_IN[3] ,General purpose input 3" "Low,High" bitfld.long 0x0 2. " GPP1_IN[2] ,General purpose input 2" "Low,High" textline " " bitfld.long 0x0 1. " GPP1_IN[1] ,General purpose input 1" "Low,High" bitfld.long 0x0 0. " GPP1_IN[0] ,General purpose input 0" "Low,High" line.long 0x4 "RAS_GPP2_IN,RAS_GPP2_IN Register" bitfld.long 0x4 31. " GPP2_IN[63] ,General purpose input 63" "Low,High" bitfld.long 0x4 30. " GPP2_IN[62] ,General purpose input 62" "Low,High" bitfld.long 0x4 29. " GPP2_IN[61] ,General purpose input 61" "Low,High" textline " " bitfld.long 0x4 28. " GPP2_IN[60] ,General purpose input 60" "Low,High" bitfld.long 0x4 27. " GPP2_IN[59] ,General purpose input 59" "Low,High" bitfld.long 0x4 26. " GPP2_IN[58] ,General purpose input 58" "Low,High" textline " " bitfld.long 0x4 25. " GPP2_IN[57] ,General purpose input 57" "Low,High" bitfld.long 0x4 24. " GPP2_IN[56] ,General purpose input 56" "Low,High" bitfld.long 0x4 23. " GPP2_IN[55] ,General purpose input 55" "Low,High" textline " " bitfld.long 0x4 22. " GPP2_IN[54] ,General purpose input 54" "Low,High" bitfld.long 0x4 21. " GPP2_IN[53] ,General purpose input 53" "Low,High" bitfld.long 0x4 20. " GPP2_IN[52] ,General purpose input 52" "Low,High" textline " " bitfld.long 0x4 19. " GPP2_IN[51] ,General purpose input 51" "Low,High" bitfld.long 0x4 18. " GPP2_IN[50] ,General purpose input 50" "Low,High" bitfld.long 0x4 17. " GPP2_IN[49] ,General purpose input 49" "Low,High" textline " " bitfld.long 0x4 16. " GPP2_IN[48] ,General purpose input 48" "Low,High" bitfld.long 0x4 15. " GPP2_IN[47] ,General purpose input 47" "Low,High" bitfld.long 0x4 14. " GPP2_IN[46] ,General purpose input 46" "Low,High" textline " " bitfld.long 0x4 13. " GPP2_IN[45] ,General purpose input 45" "Low,High" bitfld.long 0x4 12. " GPP2_IN[44] ,General purpose input 44" "Low,High" bitfld.long 0x4 11. " GPP2_IN[43] ,General purpose input 43" "Low,High" textline " " bitfld.long 0x4 10. " GPP2_IN[42] ,General purpose input 42" "Low,High" bitfld.long 0x4 9. " GPP2_IN[41] ,General purpose input 41" "Low,High" bitfld.long 0x4 8. " GPP2_IN[40] ,General purpose input 40" "Low,High" textline " " bitfld.long 0x4 7. " GPP2_IN[39] ,General purpose input 39" "Low,High" bitfld.long 0x4 6. " GPP2_IN[38] ,General purpose input 38" "Low,High" bitfld.long 0x4 5. " GPP2_IN[37] ,General purpose input 37" "Low,High" textline " " bitfld.long 0x4 4. " GPP2_IN[36] ,General purpose input 36" "Low,High" bitfld.long 0x4 3. " GPP2_IN[35] ,General purpose input 35" "Low,High" bitfld.long 0x4 2. " GPP2_IN[34] ,General purpose input 34" "Low,High" textline " " bitfld.long 0x4 1. " GPP2_IN[33] ,General purpose input 33" "Low,High" bitfld.long 0x4 0. " GPP2_IN[32] ,General purpose input 32" "Low,High" group.long 0x08++0x07 line.long 0x0 "RAS_GPP1_OUT,RAS_GPP1_OUT Register" bitfld.long 0x0 31. " GPP1_OUT[31] ,General purpose output 31" "Low,High" bitfld.long 0x00 30. " GPP1_OUT[30] ,General purpose output 30" "Low,High" bitfld.long 0x00 29. " GPP1_OUT[29] ,General purpose output 29" "Low,High" textline " " bitfld.long 0x00 28. " GPP1_OUT[28] ,General purpose output 28" "Low,High" bitfld.long 0x00 27. " GPP1_OUT[27] ,General purpose output 27" "Low,High" bitfld.long 0x00 26. " GPP1_OUT[26] ,General purpose output 26" "Low,High" textline " " bitfld.long 0x00 25. " GPP1_OUT[25] ,General purpose output 25" "Low,High" bitfld.long 0x00 24. " GPP1_OUT[24] ,General purpose output 24" "Low,High" bitfld.long 0x00 23. " GPP1_OUT[23] ,General purpose output 23" "Low,High" textline " " bitfld.long 0x00 22. " GPP1_OUT[22] ,General purpose output 22" "Low,High" bitfld.long 0x00 21. " GPP1_OUT[21] ,General purpose output 21" "Low,High" bitfld.long 0x00 20. " GPP1_OUT[20] ,General purpose output 20" "Low,High" textline " " bitfld.long 0x00 19. " GPP1_OUT[19] ,General purpose output 19" "Low,High" bitfld.long 0x00 18. " GPP1_OUT[18] ,General purpose output 18" "Low,High" bitfld.long 0x00 17. " GPP1_OUT[17] ,General purpose output 17" "Low,High" textline " " bitfld.long 0x00 16. " GPP1_OUT[16] ,General purpose output 16" "Low,High" bitfld.long 0x00 15. " GPP1_OUT[15] ,General purpose output 15" "Low,High" bitfld.long 0x00 14. " GPP1_OUT[14] ,General purpose output 14" "Low,High" textline " " bitfld.long 0x00 13. " GPP1_OUT[13] ,General purpose output 13" "Low,High" bitfld.long 0x00 12. " GPP1_OUT[12] ,General purpose output 12" "Low,High" bitfld.long 0x00 11. " GPP1_OUT[11] ,General purpose output 11" "Low,High" textline " " bitfld.long 0x00 10. " GPP1_OUT[10] ,General purpose output 10" "Low,High" bitfld.long 0x00 9. " GPP1_OUT[9] ,General purpose output 9" "Low,High" bitfld.long 0x00 8. " GPP1_OUT[8] ,General purpose output 8" "Low,High" textline " " bitfld.long 0x00 7. " GPP1_OUT[7] ,General purpose output 7" "Low,High" bitfld.long 0x00 6. " GPP1_OUT[6] ,General purpose output 6" "Low,High" bitfld.long 0x00 5. " GPP1_OUT[5] ,General purpose output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP1_OUT[4] ,General purpose output 4" "Low,High" bitfld.long 0x00 3. " GPP1_OUT[3] ,General purpose output 3" "Low,High" bitfld.long 0x00 2. " GPP1_OUT[2] ,General purpose output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP1_OUT[1] ,General purpose output 1" "Low,High" bitfld.long 0x00 0. " GPP1_OUT[0] ,General purpose output 0" "Low,High" line.long 0x04 "RAS_GPP2_OUT,RAS_GPP2_OUT Register" bitfld.long 0x04 31. " GPP2_OUT[63] ,General purpose output 63" "Low,High" bitfld.long 0x04 30. " GPP2_OUT[62] ,General purpose output 62" "Low,High" bitfld.long 0x04 29. " GPP2_OUT[61] ,General purpose output 61" "Low,High" textline " " bitfld.long 0x04 28. " GPP2_OUT[60] ,General purpose output 60" "Low,High" bitfld.long 0x04 27. " GPP2_OUT[59] ,General purpose output 59" "Low,High" bitfld.long 0x04 26. " GPP2_OUT[58] ,General purpose output 58" "Low,High" textline " " bitfld.long 0x04 25. " GPP2_OUT[57] ,General purpose output 57" "Low,High" bitfld.long 0x04 24. " GPP2_OUT[56] ,General purpose output 56" "Low,High" bitfld.long 0x04 23. " GPP2_OUT[55] ,General purpose output 55" "Low,High" textline " " bitfld.long 0x04 22. " GPP2_OUT[54] ,General purpose output 54" "Low,High" bitfld.long 0x04 21. " GPP2_OUT[53] ,General purpose output 53" "Low,High" bitfld.long 0x04 20. " GPP2_OUT[52] ,General purpose output 52" "Low,High" textline " " bitfld.long 0x04 19. " GPP2_OUT[51] ,General purpose output 51" "Low,High" bitfld.long 0x04 18. " GPP2_OUT[50] ,General purpose output 50" "Low,High" bitfld.long 0x04 17. " GPP2_OUT[49] ,General purpose output 49" "Low,High" textline " " bitfld.long 0x04 16. " GPP2_OUT[48] ,General purpose output 48" "Low,High" bitfld.long 0x04 15. " GPP2_OUT[47] ,General purpose output 47" "Low,High" bitfld.long 0x04 14. " GPP2_OUT[46] ,General purpose output 46" "Low,High" textline " " bitfld.long 0x04 13. " GPP2_OUT[45] ,General purpose output 45" "Low,High" bitfld.long 0x04 12. " GPP2_OUT[44] ,General purpose output 44" "Low,High" bitfld.long 0x04 11. " GPP2_OUT[43] ,General purpose output 43" "Low,High" textline " " bitfld.long 0x04 10. " GPP2_OUT[42] ,General purpose output 42" "Low,High" bitfld.long 0x04 9. " GPP2_OUT[41] ,General purpose output 41" "Low,High" bitfld.long 0x04 8. " GPP2_OUT[40] ,General purpose output 40" "Low,High" textline " " bitfld.long 0x04 7. " GPP2_OUT[39] ,General purpose output 39" "Low,High" bitfld.long 0x04 6. " GPP2_OUT[38] ,General purpose output 38" "Low,High" bitfld.long 0x04 5. " GPP2_OUT[37] ,General purpose output 37" "Low,High" textline " " bitfld.long 0x04 4. " GPP2_OUT[36] ,General purpose output 36" "Low,High" bitfld.long 0x04 3. " GPP2_OUT[35] ,General purpose output 35" "Low,High" bitfld.long 0x04 2. " GPP2_OUT[34] ,General purpose output 34" "Low,High" textline " " bitfld.long 0x04 1. " GPP2_OUT[33] ,General purpose output 33" "Low,High" bitfld.long 0x04 0. " GPP2_OUT[32] ,General purpose output 32" "Low,High" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x10++0x03 line.long 0x00 "RAS_GPP_EXT_IN,RAS_GPP_EXT_IN Register" bitfld.long 0x00 7. " GPP_EXT_IN[7] ,General purpose external input 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_IN[6] ,General purpose external input 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_IN[5] ,General purpose external input 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_IN[4] ,General purpose external input 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_IN[3] ,General purpose external input 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_IN[2] ,General purpose external input 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_IN[1] ,General purpose external input 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_IN[0] ,General purpose external input 0" "Low,High" group.long 0x14++0x03 line.long 0x00 "RAS_GPP_EXT_OUT,RAS_GPP_EXT_OUT Register" bitfld.long 0x00 7. " GPP_EXT_OUT[7] ,General purpose external output 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_OUT[6] ,General purpose external output 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_OUT[5] ,General purpose external output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_OUT[4] ,General purpose external output 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_OUT[3] ,General purpose external output 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_OUT[2] ,General purpose external output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_OUT[1] ,General purpose external output 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_OUT[0] ,General purpose external output 0" "Low,High" endif width 0xb tree.end sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") tree "Alias 3" base asd:0xfcaa8000 width 17. rgroup.long 0x00++0x07 line.long 0x00 "RAS_GPP1_IN,RAS_GPP1_IN Register" bitfld.long 0x0 31. " GPP1_IN[31] ,General purpose input 31" "Low,High" bitfld.long 0x0 30. " GPP1_IN[30] ,General purpose input 30" "Low,High" bitfld.long 0x0 29. " GPP1_IN[29] ,General purpose input 29" "Low,High" textline " " bitfld.long 0x0 28. " GPP1_IN[28] ,General purpose input 28" "Low,High" bitfld.long 0x0 27. " GPP1_IN[27] ,General purpose input 27" "Low,High" bitfld.long 0x0 26. " GPP1_IN[26] ,General purpose input 26" "Low,High" textline " " bitfld.long 0x0 25. " GPP1_IN[25] ,General purpose input 25" "Low,High" bitfld.long 0x0 24. " GPP1_IN[24] ,General purpose input 24" "Low,High" bitfld.long 0x0 23. " GPP1_IN[23] ,General purpose input 23" "Low,High" textline " " bitfld.long 0x0 22. " GPP1_IN[22] ,General purpose input 22" "Low,High" bitfld.long 0x0 21. " GPP1_IN[21] ,General purpose input 21" "Low,High" bitfld.long 0x0 20. " GPP1_IN[20] ,General purpose input 20" "Low,High" textline " " bitfld.long 0x0 19. " GPP1_IN[19] ,General purpose input 19" "Low,High" bitfld.long 0x0 18. " GPP1_IN[18] ,General purpose input 18" "Low,High" bitfld.long 0x0 17. " GPP1_IN[17] ,General purpose input 17" "Low,High" textline " " bitfld.long 0x0 16. " GPP1_IN[16] ,General purpose input 16" "Low,High" bitfld.long 0x0 15. " GPP1_IN[15] ,General purpose input 15" "Low,High" bitfld.long 0x0 14. " GPP1_IN[14] ,General purpose input 14" "Low,High" textline " " bitfld.long 0x0 13. " GPP1_IN[13] ,General purpose input 13" "Low,High" bitfld.long 0x0 12. " GPP1_IN[12] ,General purpose input 12" "Low,High" bitfld.long 0x0 11. " GPP1_IN[11] ,General purpose input 11" "Low,High" textline " " bitfld.long 0x0 10. " GPP1_IN[10] ,General purpose input 10" "Low,High" bitfld.long 0x0 9. " GPP1_IN[9] ,General purpose input 9" "Low,High" bitfld.long 0x0 8. " GPP1_IN[8] ,General purpose input 8" "Low,High" textline " " bitfld.long 0x0 7. " GPP1_IN[7] ,General purpose input 7" "Low,High" bitfld.long 0x0 6. " GPP1_IN[6] ,General purpose input 6" "Low,High" bitfld.long 0x0 5. " GPP1_IN[5] ,General purpose input 5" "Low,High" textline " " bitfld.long 0x0 4. " GPP1_IN[4] ,General purpose input 4" "Low,High" bitfld.long 0x0 3. " GPP1_IN[3] ,General purpose input 3" "Low,High" bitfld.long 0x0 2. " GPP1_IN[2] ,General purpose input 2" "Low,High" textline " " bitfld.long 0x0 1. " GPP1_IN[1] ,General purpose input 1" "Low,High" bitfld.long 0x0 0. " GPP1_IN[0] ,General purpose input 0" "Low,High" line.long 0x4 "RAS_GPP2_IN,RAS_GPP2_IN Register" bitfld.long 0x4 31. " GPP2_IN[63] ,General purpose input 63" "Low,High" bitfld.long 0x4 30. " GPP2_IN[62] ,General purpose input 62" "Low,High" bitfld.long 0x4 29. " GPP2_IN[61] ,General purpose input 61" "Low,High" textline " " bitfld.long 0x4 28. " GPP2_IN[60] ,General purpose input 60" "Low,High" bitfld.long 0x4 27. " GPP2_IN[59] ,General purpose input 59" "Low,High" bitfld.long 0x4 26. " GPP2_IN[58] ,General purpose input 58" "Low,High" textline " " bitfld.long 0x4 25. " GPP2_IN[57] ,General purpose input 57" "Low,High" bitfld.long 0x4 24. " GPP2_IN[56] ,General purpose input 56" "Low,High" bitfld.long 0x4 23. " GPP2_IN[55] ,General purpose input 55" "Low,High" textline " " bitfld.long 0x4 22. " GPP2_IN[54] ,General purpose input 54" "Low,High" bitfld.long 0x4 21. " GPP2_IN[53] ,General purpose input 53" "Low,High" bitfld.long 0x4 20. " GPP2_IN[52] ,General purpose input 52" "Low,High" textline " " bitfld.long 0x4 19. " GPP2_IN[51] ,General purpose input 51" "Low,High" bitfld.long 0x4 18. " GPP2_IN[50] ,General purpose input 50" "Low,High" bitfld.long 0x4 17. " GPP2_IN[49] ,General purpose input 49" "Low,High" textline " " bitfld.long 0x4 16. " GPP2_IN[48] ,General purpose input 48" "Low,High" bitfld.long 0x4 15. " GPP2_IN[47] ,General purpose input 47" "Low,High" bitfld.long 0x4 14. " GPP2_IN[46] ,General purpose input 46" "Low,High" textline " " bitfld.long 0x4 13. " GPP2_IN[45] ,General purpose input 45" "Low,High" bitfld.long 0x4 12. " GPP2_IN[44] ,General purpose input 44" "Low,High" bitfld.long 0x4 11. " GPP2_IN[43] ,General purpose input 43" "Low,High" textline " " bitfld.long 0x4 10. " GPP2_IN[42] ,General purpose input 42" "Low,High" bitfld.long 0x4 9. " GPP2_IN[41] ,General purpose input 41" "Low,High" bitfld.long 0x4 8. " GPP2_IN[40] ,General purpose input 40" "Low,High" textline " " bitfld.long 0x4 7. " GPP2_IN[39] ,General purpose input 39" "Low,High" bitfld.long 0x4 6. " GPP2_IN[38] ,General purpose input 38" "Low,High" bitfld.long 0x4 5. " GPP2_IN[37] ,General purpose input 37" "Low,High" textline " " bitfld.long 0x4 4. " GPP2_IN[36] ,General purpose input 36" "Low,High" bitfld.long 0x4 3. " GPP2_IN[35] ,General purpose input 35" "Low,High" bitfld.long 0x4 2. " GPP2_IN[34] ,General purpose input 34" "Low,High" textline " " bitfld.long 0x4 1. " GPP2_IN[33] ,General purpose input 33" "Low,High" bitfld.long 0x4 0. " GPP2_IN[32] ,General purpose input 32" "Low,High" group.long 0x08++0x07 line.long 0x0 "RAS_GPP1_OUT,RAS_GPP1_OUT Register" bitfld.long 0x0 31. " GPP1_OUT[31] ,General purpose output 31" "Low,High" bitfld.long 0x00 30. " GPP1_OUT[30] ,General purpose output 30" "Low,High" bitfld.long 0x00 29. " GPP1_OUT[29] ,General purpose output 29" "Low,High" textline " " bitfld.long 0x00 28. " GPP1_OUT[28] ,General purpose output 28" "Low,High" bitfld.long 0x00 27. " GPP1_OUT[27] ,General purpose output 27" "Low,High" bitfld.long 0x00 26. " GPP1_OUT[26] ,General purpose output 26" "Low,High" textline " " bitfld.long 0x00 25. " GPP1_OUT[25] ,General purpose output 25" "Low,High" bitfld.long 0x00 24. " GPP1_OUT[24] ,General purpose output 24" "Low,High" bitfld.long 0x00 23. " GPP1_OUT[23] ,General purpose output 23" "Low,High" textline " " bitfld.long 0x00 22. " GPP1_OUT[22] ,General purpose output 22" "Low,High" bitfld.long 0x00 21. " GPP1_OUT[21] ,General purpose output 21" "Low,High" bitfld.long 0x00 20. " GPP1_OUT[20] ,General purpose output 20" "Low,High" textline " " bitfld.long 0x00 19. " GPP1_OUT[19] ,General purpose output 19" "Low,High" bitfld.long 0x00 18. " GPP1_OUT[18] ,General purpose output 18" "Low,High" bitfld.long 0x00 17. " GPP1_OUT[17] ,General purpose output 17" "Low,High" textline " " bitfld.long 0x00 16. " GPP1_OUT[16] ,General purpose output 16" "Low,High" bitfld.long 0x00 15. " GPP1_OUT[15] ,General purpose output 15" "Low,High" bitfld.long 0x00 14. " GPP1_OUT[14] ,General purpose output 14" "Low,High" textline " " bitfld.long 0x00 13. " GPP1_OUT[13] ,General purpose output 13" "Low,High" bitfld.long 0x00 12. " GPP1_OUT[12] ,General purpose output 12" "Low,High" bitfld.long 0x00 11. " GPP1_OUT[11] ,General purpose output 11" "Low,High" textline " " bitfld.long 0x00 10. " GPP1_OUT[10] ,General purpose output 10" "Low,High" bitfld.long 0x00 9. " GPP1_OUT[9] ,General purpose output 9" "Low,High" bitfld.long 0x00 8. " GPP1_OUT[8] ,General purpose output 8" "Low,High" textline " " bitfld.long 0x00 7. " GPP1_OUT[7] ,General purpose output 7" "Low,High" bitfld.long 0x00 6. " GPP1_OUT[6] ,General purpose output 6" "Low,High" bitfld.long 0x00 5. " GPP1_OUT[5] ,General purpose output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP1_OUT[4] ,General purpose output 4" "Low,High" bitfld.long 0x00 3. " GPP1_OUT[3] ,General purpose output 3" "Low,High" bitfld.long 0x00 2. " GPP1_OUT[2] ,General purpose output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP1_OUT[1] ,General purpose output 1" "Low,High" bitfld.long 0x00 0. " GPP1_OUT[0] ,General purpose output 0" "Low,High" line.long 0x04 "RAS_GPP2_OUT,RAS_GPP2_OUT Register" bitfld.long 0x04 31. " GPP2_OUT[63] ,General purpose output 63" "Low,High" bitfld.long 0x04 30. " GPP2_OUT[62] ,General purpose output 62" "Low,High" bitfld.long 0x04 29. " GPP2_OUT[61] ,General purpose output 61" "Low,High" textline " " bitfld.long 0x04 28. " GPP2_OUT[60] ,General purpose output 60" "Low,High" bitfld.long 0x04 27. " GPP2_OUT[59] ,General purpose output 59" "Low,High" bitfld.long 0x04 26. " GPP2_OUT[58] ,General purpose output 58" "Low,High" textline " " bitfld.long 0x04 25. " GPP2_OUT[57] ,General purpose output 57" "Low,High" bitfld.long 0x04 24. " GPP2_OUT[56] ,General purpose output 56" "Low,High" bitfld.long 0x04 23. " GPP2_OUT[55] ,General purpose output 55" "Low,High" textline " " bitfld.long 0x04 22. " GPP2_OUT[54] ,General purpose output 54" "Low,High" bitfld.long 0x04 21. " GPP2_OUT[53] ,General purpose output 53" "Low,High" bitfld.long 0x04 20. " GPP2_OUT[52] ,General purpose output 52" "Low,High" textline " " bitfld.long 0x04 19. " GPP2_OUT[51] ,General purpose output 51" "Low,High" bitfld.long 0x04 18. " GPP2_OUT[50] ,General purpose output 50" "Low,High" bitfld.long 0x04 17. " GPP2_OUT[49] ,General purpose output 49" "Low,High" textline " " bitfld.long 0x04 16. " GPP2_OUT[48] ,General purpose output 48" "Low,High" bitfld.long 0x04 15. " GPP2_OUT[47] ,General purpose output 47" "Low,High" bitfld.long 0x04 14. " GPP2_OUT[46] ,General purpose output 46" "Low,High" textline " " bitfld.long 0x04 13. " GPP2_OUT[45] ,General purpose output 45" "Low,High" bitfld.long 0x04 12. " GPP2_OUT[44] ,General purpose output 44" "Low,High" bitfld.long 0x04 11. " GPP2_OUT[43] ,General purpose output 43" "Low,High" textline " " bitfld.long 0x04 10. " GPP2_OUT[42] ,General purpose output 42" "Low,High" bitfld.long 0x04 9. " GPP2_OUT[41] ,General purpose output 41" "Low,High" bitfld.long 0x04 8. " GPP2_OUT[40] ,General purpose output 40" "Low,High" textline " " bitfld.long 0x04 7. " GPP2_OUT[39] ,General purpose output 39" "Low,High" bitfld.long 0x04 6. " GPP2_OUT[38] ,General purpose output 38" "Low,High" bitfld.long 0x04 5. " GPP2_OUT[37] ,General purpose output 37" "Low,High" textline " " bitfld.long 0x04 4. " GPP2_OUT[36] ,General purpose output 36" "Low,High" bitfld.long 0x04 3. " GPP2_OUT[35] ,General purpose output 35" "Low,High" bitfld.long 0x04 2. " GPP2_OUT[34] ,General purpose output 34" "Low,High" textline " " bitfld.long 0x04 1. " GPP2_OUT[33] ,General purpose output 33" "Low,High" bitfld.long 0x04 0. " GPP2_OUT[32] ,General purpose output 32" "Low,High" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x10++0x03 line.long 0x00 "RAS_GPP_EXT_IN,RAS_GPP_EXT_IN Register" bitfld.long 0x00 7. " GPP_EXT_IN[7] ,General purpose external input 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_IN[6] ,General purpose external input 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_IN[5] ,General purpose external input 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_IN[4] ,General purpose external input 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_IN[3] ,General purpose external input 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_IN[2] ,General purpose external input 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_IN[1] ,General purpose external input 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_IN[0] ,General purpose external input 0" "Low,High" group.long 0x14++0x03 line.long 0x00 "RAS_GPP_EXT_OUT,RAS_GPP_EXT_OUT Register" bitfld.long 0x00 7. " GPP_EXT_OUT[7] ,General purpose external output 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_OUT[6] ,General purpose external output 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_OUT[5] ,General purpose external output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_OUT[4] ,General purpose external output 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_OUT[3] ,General purpose external output 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_OUT[2] ,General purpose external output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_OUT[1] ,General purpose external output 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_OUT[0] ,General purpose external output 0" "Low,High" endif width 0xb tree.end tree "Alias 4" base asd:0xfcab8000 width 17. rgroup.long 0x00++0x07 line.long 0x00 "RAS_GPP1_IN,RAS_GPP1_IN Register" bitfld.long 0x0 31. " GPP1_IN[31] ,General purpose input 31" "Low,High" bitfld.long 0x0 30. " GPP1_IN[30] ,General purpose input 30" "Low,High" bitfld.long 0x0 29. " GPP1_IN[29] ,General purpose input 29" "Low,High" textline " " bitfld.long 0x0 28. " GPP1_IN[28] ,General purpose input 28" "Low,High" bitfld.long 0x0 27. " GPP1_IN[27] ,General purpose input 27" "Low,High" bitfld.long 0x0 26. " GPP1_IN[26] ,General purpose input 26" "Low,High" textline " " bitfld.long 0x0 25. " GPP1_IN[25] ,General purpose input 25" "Low,High" bitfld.long 0x0 24. " GPP1_IN[24] ,General purpose input 24" "Low,High" bitfld.long 0x0 23. " GPP1_IN[23] ,General purpose input 23" "Low,High" textline " " bitfld.long 0x0 22. " GPP1_IN[22] ,General purpose input 22" "Low,High" bitfld.long 0x0 21. " GPP1_IN[21] ,General purpose input 21" "Low,High" bitfld.long 0x0 20. " GPP1_IN[20] ,General purpose input 20" "Low,High" textline " " bitfld.long 0x0 19. " GPP1_IN[19] ,General purpose input 19" "Low,High" bitfld.long 0x0 18. " GPP1_IN[18] ,General purpose input 18" "Low,High" bitfld.long 0x0 17. " GPP1_IN[17] ,General purpose input 17" "Low,High" textline " " bitfld.long 0x0 16. " GPP1_IN[16] ,General purpose input 16" "Low,High" bitfld.long 0x0 15. " GPP1_IN[15] ,General purpose input 15" "Low,High" bitfld.long 0x0 14. " GPP1_IN[14] ,General purpose input 14" "Low,High" textline " " bitfld.long 0x0 13. " GPP1_IN[13] ,General purpose input 13" "Low,High" bitfld.long 0x0 12. " GPP1_IN[12] ,General purpose input 12" "Low,High" bitfld.long 0x0 11. " GPP1_IN[11] ,General purpose input 11" "Low,High" textline " " bitfld.long 0x0 10. " GPP1_IN[10] ,General purpose input 10" "Low,High" bitfld.long 0x0 9. " GPP1_IN[9] ,General purpose input 9" "Low,High" bitfld.long 0x0 8. " GPP1_IN[8] ,General purpose input 8" "Low,High" textline " " bitfld.long 0x0 7. " GPP1_IN[7] ,General purpose input 7" "Low,High" bitfld.long 0x0 6. " GPP1_IN[6] ,General purpose input 6" "Low,High" bitfld.long 0x0 5. " GPP1_IN[5] ,General purpose input 5" "Low,High" textline " " bitfld.long 0x0 4. " GPP1_IN[4] ,General purpose input 4" "Low,High" bitfld.long 0x0 3. " GPP1_IN[3] ,General purpose input 3" "Low,High" bitfld.long 0x0 2. " GPP1_IN[2] ,General purpose input 2" "Low,High" textline " " bitfld.long 0x0 1. " GPP1_IN[1] ,General purpose input 1" "Low,High" bitfld.long 0x0 0. " GPP1_IN[0] ,General purpose input 0" "Low,High" line.long 0x4 "RAS_GPP2_IN,RAS_GPP2_IN Register" bitfld.long 0x4 31. " GPP2_IN[63] ,General purpose input 63" "Low,High" bitfld.long 0x4 30. " GPP2_IN[62] ,General purpose input 62" "Low,High" bitfld.long 0x4 29. " GPP2_IN[61] ,General purpose input 61" "Low,High" textline " " bitfld.long 0x4 28. " GPP2_IN[60] ,General purpose input 60" "Low,High" bitfld.long 0x4 27. " GPP2_IN[59] ,General purpose input 59" "Low,High" bitfld.long 0x4 26. " GPP2_IN[58] ,General purpose input 58" "Low,High" textline " " bitfld.long 0x4 25. " GPP2_IN[57] ,General purpose input 57" "Low,High" bitfld.long 0x4 24. " GPP2_IN[56] ,General purpose input 56" "Low,High" bitfld.long 0x4 23. " GPP2_IN[55] ,General purpose input 55" "Low,High" textline " " bitfld.long 0x4 22. " GPP2_IN[54] ,General purpose input 54" "Low,High" bitfld.long 0x4 21. " GPP2_IN[53] ,General purpose input 53" "Low,High" bitfld.long 0x4 20. " GPP2_IN[52] ,General purpose input 52" "Low,High" textline " " bitfld.long 0x4 19. " GPP2_IN[51] ,General purpose input 51" "Low,High" bitfld.long 0x4 18. " GPP2_IN[50] ,General purpose input 50" "Low,High" bitfld.long 0x4 17. " GPP2_IN[49] ,General purpose input 49" "Low,High" textline " " bitfld.long 0x4 16. " GPP2_IN[48] ,General purpose input 48" "Low,High" bitfld.long 0x4 15. " GPP2_IN[47] ,General purpose input 47" "Low,High" bitfld.long 0x4 14. " GPP2_IN[46] ,General purpose input 46" "Low,High" textline " " bitfld.long 0x4 13. " GPP2_IN[45] ,General purpose input 45" "Low,High" bitfld.long 0x4 12. " GPP2_IN[44] ,General purpose input 44" "Low,High" bitfld.long 0x4 11. " GPP2_IN[43] ,General purpose input 43" "Low,High" textline " " bitfld.long 0x4 10. " GPP2_IN[42] ,General purpose input 42" "Low,High" bitfld.long 0x4 9. " GPP2_IN[41] ,General purpose input 41" "Low,High" bitfld.long 0x4 8. " GPP2_IN[40] ,General purpose input 40" "Low,High" textline " " bitfld.long 0x4 7. " GPP2_IN[39] ,General purpose input 39" "Low,High" bitfld.long 0x4 6. " GPP2_IN[38] ,General purpose input 38" "Low,High" bitfld.long 0x4 5. " GPP2_IN[37] ,General purpose input 37" "Low,High" textline " " bitfld.long 0x4 4. " GPP2_IN[36] ,General purpose input 36" "Low,High" bitfld.long 0x4 3. " GPP2_IN[35] ,General purpose input 35" "Low,High" bitfld.long 0x4 2. " GPP2_IN[34] ,General purpose input 34" "Low,High" textline " " bitfld.long 0x4 1. " GPP2_IN[33] ,General purpose input 33" "Low,High" bitfld.long 0x4 0. " GPP2_IN[32] ,General purpose input 32" "Low,High" group.long 0x08++0x07 line.long 0x0 "RAS_GPP1_OUT,RAS_GPP1_OUT Register" bitfld.long 0x0 31. " GPP1_OUT[31] ,General purpose output 31" "Low,High" bitfld.long 0x00 30. " GPP1_OUT[30] ,General purpose output 30" "Low,High" bitfld.long 0x00 29. " GPP1_OUT[29] ,General purpose output 29" "Low,High" textline " " bitfld.long 0x00 28. " GPP1_OUT[28] ,General purpose output 28" "Low,High" bitfld.long 0x00 27. " GPP1_OUT[27] ,General purpose output 27" "Low,High" bitfld.long 0x00 26. " GPP1_OUT[26] ,General purpose output 26" "Low,High" textline " " bitfld.long 0x00 25. " GPP1_OUT[25] ,General purpose output 25" "Low,High" bitfld.long 0x00 24. " GPP1_OUT[24] ,General purpose output 24" "Low,High" bitfld.long 0x00 23. " GPP1_OUT[23] ,General purpose output 23" "Low,High" textline " " bitfld.long 0x00 22. " GPP1_OUT[22] ,General purpose output 22" "Low,High" bitfld.long 0x00 21. " GPP1_OUT[21] ,General purpose output 21" "Low,High" bitfld.long 0x00 20. " GPP1_OUT[20] ,General purpose output 20" "Low,High" textline " " bitfld.long 0x00 19. " GPP1_OUT[19] ,General purpose output 19" "Low,High" bitfld.long 0x00 18. " GPP1_OUT[18] ,General purpose output 18" "Low,High" bitfld.long 0x00 17. " GPP1_OUT[17] ,General purpose output 17" "Low,High" textline " " bitfld.long 0x00 16. " GPP1_OUT[16] ,General purpose output 16" "Low,High" bitfld.long 0x00 15. " GPP1_OUT[15] ,General purpose output 15" "Low,High" bitfld.long 0x00 14. " GPP1_OUT[14] ,General purpose output 14" "Low,High" textline " " bitfld.long 0x00 13. " GPP1_OUT[13] ,General purpose output 13" "Low,High" bitfld.long 0x00 12. " GPP1_OUT[12] ,General purpose output 12" "Low,High" bitfld.long 0x00 11. " GPP1_OUT[11] ,General purpose output 11" "Low,High" textline " " bitfld.long 0x00 10. " GPP1_OUT[10] ,General purpose output 10" "Low,High" bitfld.long 0x00 9. " GPP1_OUT[9] ,General purpose output 9" "Low,High" bitfld.long 0x00 8. " GPP1_OUT[8] ,General purpose output 8" "Low,High" textline " " bitfld.long 0x00 7. " GPP1_OUT[7] ,General purpose output 7" "Low,High" bitfld.long 0x00 6. " GPP1_OUT[6] ,General purpose output 6" "Low,High" bitfld.long 0x00 5. " GPP1_OUT[5] ,General purpose output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP1_OUT[4] ,General purpose output 4" "Low,High" bitfld.long 0x00 3. " GPP1_OUT[3] ,General purpose output 3" "Low,High" bitfld.long 0x00 2. " GPP1_OUT[2] ,General purpose output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP1_OUT[1] ,General purpose output 1" "Low,High" bitfld.long 0x00 0. " GPP1_OUT[0] ,General purpose output 0" "Low,High" line.long 0x04 "RAS_GPP2_OUT,RAS_GPP2_OUT Register" bitfld.long 0x04 31. " GPP2_OUT[63] ,General purpose output 63" "Low,High" bitfld.long 0x04 30. " GPP2_OUT[62] ,General purpose output 62" "Low,High" bitfld.long 0x04 29. " GPP2_OUT[61] ,General purpose output 61" "Low,High" textline " " bitfld.long 0x04 28. " GPP2_OUT[60] ,General purpose output 60" "Low,High" bitfld.long 0x04 27. " GPP2_OUT[59] ,General purpose output 59" "Low,High" bitfld.long 0x04 26. " GPP2_OUT[58] ,General purpose output 58" "Low,High" textline " " bitfld.long 0x04 25. " GPP2_OUT[57] ,General purpose output 57" "Low,High" bitfld.long 0x04 24. " GPP2_OUT[56] ,General purpose output 56" "Low,High" bitfld.long 0x04 23. " GPP2_OUT[55] ,General purpose output 55" "Low,High" textline " " bitfld.long 0x04 22. " GPP2_OUT[54] ,General purpose output 54" "Low,High" bitfld.long 0x04 21. " GPP2_OUT[53] ,General purpose output 53" "Low,High" bitfld.long 0x04 20. " GPP2_OUT[52] ,General purpose output 52" "Low,High" textline " " bitfld.long 0x04 19. " GPP2_OUT[51] ,General purpose output 51" "Low,High" bitfld.long 0x04 18. " GPP2_OUT[50] ,General purpose output 50" "Low,High" bitfld.long 0x04 17. " GPP2_OUT[49] ,General purpose output 49" "Low,High" textline " " bitfld.long 0x04 16. " GPP2_OUT[48] ,General purpose output 48" "Low,High" bitfld.long 0x04 15. " GPP2_OUT[47] ,General purpose output 47" "Low,High" bitfld.long 0x04 14. " GPP2_OUT[46] ,General purpose output 46" "Low,High" textline " " bitfld.long 0x04 13. " GPP2_OUT[45] ,General purpose output 45" "Low,High" bitfld.long 0x04 12. " GPP2_OUT[44] ,General purpose output 44" "Low,High" bitfld.long 0x04 11. " GPP2_OUT[43] ,General purpose output 43" "Low,High" textline " " bitfld.long 0x04 10. " GPP2_OUT[42] ,General purpose output 42" "Low,High" bitfld.long 0x04 9. " GPP2_OUT[41] ,General purpose output 41" "Low,High" bitfld.long 0x04 8. " GPP2_OUT[40] ,General purpose output 40" "Low,High" textline " " bitfld.long 0x04 7. " GPP2_OUT[39] ,General purpose output 39" "Low,High" bitfld.long 0x04 6. " GPP2_OUT[38] ,General purpose output 38" "Low,High" bitfld.long 0x04 5. " GPP2_OUT[37] ,General purpose output 37" "Low,High" textline " " bitfld.long 0x04 4. " GPP2_OUT[36] ,General purpose output 36" "Low,High" bitfld.long 0x04 3. " GPP2_OUT[35] ,General purpose output 35" "Low,High" bitfld.long 0x04 2. " GPP2_OUT[34] ,General purpose output 34" "Low,High" textline " " bitfld.long 0x04 1. " GPP2_OUT[33] ,General purpose output 33" "Low,High" bitfld.long 0x04 0. " GPP2_OUT[32] ,General purpose output 32" "Low,High" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x10++0x03 line.long 0x00 "RAS_GPP_EXT_IN,RAS_GPP_EXT_IN Register" bitfld.long 0x00 7. " GPP_EXT_IN[7] ,General purpose external input 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_IN[6] ,General purpose external input 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_IN[5] ,General purpose external input 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_IN[4] ,General purpose external input 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_IN[3] ,General purpose external input 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_IN[2] ,General purpose external input 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_IN[1] ,General purpose external input 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_IN[0] ,General purpose external input 0" "Low,High" group.long 0x14++0x03 line.long 0x00 "RAS_GPP_EXT_OUT,RAS_GPP_EXT_OUT Register" bitfld.long 0x00 7. " GPP_EXT_OUT[7] ,General purpose external output 7" "Low,High" bitfld.long 0x00 6. " GPP_EXT_OUT[6] ,General purpose external output 6" "Low,High" bitfld.long 0x00 5. " GPP_EXT_OUT[5] ,General purpose external output 5" "Low,High" textline " " bitfld.long 0x00 4. " GPP_EXT_OUT[4] ,General purpose external output 4" "Low,High" bitfld.long 0x00 3. " GPP_EXT_OUT[3] ,General purpose external output 3" "Low,High" bitfld.long 0x00 2. " GPP_EXT_OUT[2] ,General purpose external output 2" "Low,High" textline " " bitfld.long 0x00 1. " GPP_EXT_OUT[1] ,General purpose external output 1" "Low,High" bitfld.long 0x00 0. " GPP_EXT_OUT[0] ,General purpose external output 0" "Low,High" endif width 0xb tree.end endif tree.end tree.end tree "SC (System controller)" base asd:0xfca00000 width 13. group.long 0x00++0x17 "System Controller control and status registers" line.long 0x00 "SCCTRL,System Control Register" bitfld.long 0x0 23. " WDOGENOV ,Watchdog enable override" "Derived,Forced high" textline " " sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x0 20. " TIMEREN2OV ,Timer enable 2 override" "Disabled,Enabled" bitfld.long 0x0 19. " TIMEREN2SEL ,Timer enable 2 timing reference select" "REFCLK,TIMCLK" textline " " bitfld.long 0x0 18. " TIMEREN1OV ,Timer enable 1 override" "Disabled,Enabled" bitfld.long 0x0 17. " TIMEREN1SEL ,Timer enable 1 timing reference select" "REFCLK,TIMCLK" textline " " bitfld.long 0x0 16. " TIMEREN0OV ,Timer enable 0 override" "Disabled,Enabled" bitfld.long 0x0 15. " TIMEREN0SEL ,Timer enable 0 timing reference select" "REFCLK,TIMCLK" textline " " bitfld.long 0x0 12.--14. " HCLKDIVSEL ,Control the HCLKDIVSEL output" "0,1,2,3,4,5,6,7" bitfld.long 0x0 9. " REMAPSTAT ,Remap status" "Not remapped,Remapped" textline " " bitfld.long 0x0 8. " REMAPCLEAR ,Remap clear request" "Not requested,Requested" textline " " endif bitfld.long 0x0 3.--6. " MODESTATUS ,Mode status" "SLEEP,DOZE,SLOW,XTAL CTL,NORMAL,Reserved,PLL CTL,Reserved,Reserved,SW from XTAL,SW from PLL,SW to XTAL,Reserved,Reserved,SW to PLL,?..." bitfld.long 0x0 0.--2. " MODECTRL ,Mode control" "SLEEP,DOZE,SLOW,SLOW,NORMAL,NORMAL,NORMAL,NORMAL" line.long 0x4 "SCSYSSTAT,System Status Register" line.long 0x8 "SCIMCTRL,Interrupt Mode Control Register" sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x8 7. " INMDTYPE ,Interrupt mode type" "FIQ,FIQ & IRQ" bitfld.long 0x8 1.--3. " ITMDCTRL ,Interrupt mode control" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. " ITMDEN ,Interrupt mode enable" "Disabled,Enabled" else bitfld.long 0x8 7. " INMDTYPE ,Interrupt mode type" "FIQ,FIQ & IRQ" bitfld.long 0x8 4.--6. " ITMDCLK ,Interrupt mode clock bits" "0,1,2,3,4,5,6,7" bitfld.long 0x8 1.--3. " ITMDCTRL ,Interrupt mode control" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 0. " ITMDEN ,Interrupt mode enable" "Disabled,Enabled" endif line.long 0xc "SCIMSTAT,Interrupt Mode Status Register" bitfld.long 0xc 0. " ITMDSTAT ,Interrupt mode status" "Disabled,Enabled" line.long 0x10 "SCXTALCTRL,Crystal Control Register" hexmask.long.word 0x10 3.--18. 1. " XTALTIME ,Crystal timeout count" bitfld.long 0x10 2. " XTALSTAT ,Crystal status" "Low,High" bitfld.long 0x10 1. " XTALEN ,Crystal enable" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " XTALOVER ,Crystal control override" "Disabled,Enabled" line.long 0x14 "SCPLLCTRL,PLL Control Register" hexmask.long 0x14 3.--27. 1. " PLLTIME ,PLL timeout count" bitfld.long 0x14 2. " PLLSTAT ,PLL status" "Low,High" bitfld.long 0x14 1. " PLLEN ,PLL enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " PLLOVER ,PLL control override" "Disabled,Enabled" sif (cpu()=="SPEAR300") group.long 0x18++0x0b line.long 0x00 "SCPLLFCTRL,PLL Frequency Control Register" bitfld.long 0x00 31. " SCPLLFCTRL[31] ,PLL frequency control 31" "Disabled,Enabled" bitfld.long 0x00 30. " SCPLLFCTRL[30] ,PLL frequency control 30" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " SCPLLFCTRL[29] ,PLL frequency control 29" "Disabled,Enabled" bitfld.long 0x00 28. " SCPLLFCTRL[28] ,PLL frequency control 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCPLLFCTRL[27] ,PLL frequency control 27" "Disabled,Enabled" bitfld.long 0x00 26. " SCPLLFCTRL[26] ,PLL frequency control 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SCPLLFCTRL[25] ,PLL frequency control 25" "Disabled,Enabled" bitfld.long 0x00 24. " SCPLLFCTRL[24] ,PLL frequency control 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SCPLLFCTRL[23] ,PLL frequency control 23" "Disabled,Enabled" bitfld.long 0x00 22. " SCPLLFCTRL[22] ,PLL frequency control 22" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SCPLLFCTRL[21] ,PLL frequency control 21" "Disabled,Enabled" bitfld.long 0x00 20. " SCPLLFCTRL[20] ,PLL frequency control 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SCPLLFCTRL[19] ,PLL frequency control 19" "Disabled,Enabled" bitfld.long 0x00 18. " SCPLLFCTRL[18] ,PLL frequency control 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SCPLLFCTRL[17] ,PLL frequency control 17" "Disabled,Enabled" bitfld.long 0x00 16. " SCPLLFCTRL[16] ,PLL frequency control 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SCPLLFCTRL[15] ,PLL frequency control 15" "Disabled,Enabled" bitfld.long 0x00 14. " SCPLLFCTRL[14] ,PLL frequency control 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SCPLLFCTRL[13] ,PLL frequency control 13" "Disabled,Enabled" bitfld.long 0x00 12. " SCPLLFCTRL[12] ,PLL frequency control 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " SCPLLFCTRL[11] ,PLL frequency control 11" "Disabled,Enabled" bitfld.long 0x00 10. " SCPLLFCTRL[10] ,PLL frequency control 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " SCPLLFCTRL[09] ,PLL frequency control 9" "Disabled,Enabled" bitfld.long 0x00 8. " SCPLLFCTRL[08] ,PLL frequency control 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SCPLLFCTRL[07] ,PLL frequency control 7" "Disabled,Enabled" bitfld.long 0x00 6. " SCPLLFCTRL[06] ,PLL frequency control 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SCPLLFCTRL[05] ,PLL frequency control 5" "Disabled,Enabled" bitfld.long 0x00 4. " SCPLLFCTRL[04] ,PLL frequency control 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SCPLLFCTRL[03] ,PLL frequency control 3" "Disabled,Enabled" bitfld.long 0x00 2. " SCPLLFCTRL[02] ,PLL frequency control 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SCPLLFCTRL[01] ,PLL frequency control 1" "Disabled,Enabled" bitfld.long 0x00 0. " SCPLLFCTRL[00] ,PLL frequency control 0" "Disabled,Enabled" line.long 0x04 "SCPERCTRL0,Peripheral Control 0 Register" bitfld.long 0x04 31. " SCPERCTRL0[31] ,Peripheral Control 31" "Disabled,Enabled" bitfld.long 0x04 30. " SCPERCTRL0[30] ,Peripheral Control 30" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " SCPERCTRL0[29] ,Peripheral Control 29" "Disabled,Enabled" bitfld.long 0x04 28. " SCPERCTRL0[28] ,Peripheral Control 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " SCPERCTRL0[27] ,Peripheral Control 27" "Disabled,Enabled" bitfld.long 0x04 26. " SCPERCTRL0[26] ,Peripheral Control 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SCPERCTRL0[25] ,Peripheral Control 25" "Disabled,Enabled" bitfld.long 0x04 24. " SCPERCTRL0[24] ,Peripheral Control 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SCPERCTRL0[23] ,Peripheral Control 23" "Disabled,Enabled" bitfld.long 0x04 22. " SCPERCTRL0[22] ,Peripheral Control 22" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SCPERCTRL0[21] ,Peripheral Control 21" "Disabled,Enabled" bitfld.long 0x04 20. " SCPERCTRL0[20] ,Peripheral Control 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " SCPERCTRL0[19] ,Peripheral Control 19" "Disabled,Enabled" bitfld.long 0x04 18. " SCPERCTRL0[18] ,Peripheral Control 18" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " SCPERCTRL0[17] ,Peripheral Control 17" "Disabled,Enabled" bitfld.long 0x04 16. " SCPERCTRL0[16] ,Peripheral Control 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " SCPERCTRL0[15] ,Peripheral Control 15" "Disabled,Enabled" bitfld.long 0x04 14. " SCPERCTRL0[14] ,Peripheral Control 14" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " SCPERCTRL0[13] ,Peripheral Control 13" "Disabled,Enabled" bitfld.long 0x04 12. " SCPERCTRL0[12] ,Peripheral Control 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " SCPERCTRL0[11] ,Peripheral Control 11" "Disabled,Enabled" bitfld.long 0x04 10. " SCPERCTRL0[10] ,Peripheral Control 10" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " SCPERCTRL0[09] ,Peripheral Control 9" "Disabled,Enabled" bitfld.long 0x04 8. " SCPERCTRL0[08] ,Peripheral Control 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " SCPERCTRL0[07] ,Peripheral Control 7" "Disabled,Enabled" bitfld.long 0x04 6. " SCPERCTRL0[06] ,Peripheral Control 6" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SCPERCTRL0[05] ,Peripheral Control 5" "Disabled,Enabled" bitfld.long 0x04 4. " SCPERCTRL0[04] ,Peripheral Control 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " SCPERCTRL0[03] ,Peripheral Control 3" "Disabled,Enabled" bitfld.long 0x04 2. " SCPERCTRL0[02] ,Peripheral Control 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SCPERCTRL0[01] ,Peripheral Control 1" "Disabled,Enabled" bitfld.long 0x04 0. " SCPERCTRL0[00] ,Peripheral Control 0" "Disabled,Enabled" line.long 0x08 "SCPERCTRL1,Peripheral Control 1 Register" bitfld.long 0x08 31. " SCPERCTRL1[31] ,Peripheral Control 31" "Disabled,Enabled" bitfld.long 0x08 30. " SCPERCTRL1[30] ,Peripheral Control 30" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " SCPERCTRL1[29] ,Peripheral Control 29" "Disabled,Enabled" bitfld.long 0x08 28. " SCPERCTRL1[28] ,Peripheral Control 28" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " SCPERCTRL1[27] ,Peripheral Control 27" "Disabled,Enabled" bitfld.long 0x08 26. " SCPERCTRL1[26] ,Peripheral Control 26" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SCPERCTRL1[25] ,Peripheral Control 25" "Disabled,Enabled" bitfld.long 0x08 24. " SCPERCTRL1[24] ,Peripheral Control 24" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " SCPERCTRL1[23] ,Peripheral Control 23" "Disabled,Enabled" bitfld.long 0x08 22. " SCPERCTRL1[22] ,Peripheral Control 22" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " SCPERCTRL1[21] ,Peripheral Control 21" "Disabled,Enabled" bitfld.long 0x08 20. " SCPERCTRL1[20] ,Peripheral Control 20" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " SCPERCTRL1[19] ,Peripheral Control 19" "Disabled,Enabled" bitfld.long 0x08 18. " SCPERCTRL1[18] ,Peripheral Control 18" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " SCPERCTRL1[17] ,Peripheral Control 17" "Disabled,Enabled" bitfld.long 0x08 16. " SCPERCTRL1[16] ,Peripheral Control 16" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " SCPERCTRL1[15] ,Peripheral Control 15" "Disabled,Enabled" bitfld.long 0x08 14. " SCPERCTRL1[14] ,Peripheral Control 14" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " SCPERCTRL1[13] ,Peripheral Control 13" "Disabled,Enabled" bitfld.long 0x08 12. " SCPERCTRL1[12] ,Peripheral Control 12" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " SCPERCTRL1[11] ,Peripheral Control 11" "Disabled,Enabled" bitfld.long 0x08 10. " SCPERCTRL1[10] ,Peripheral Control 10" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " SCPERCTRL1[09] ,Peripheral Control 9" "Disabled,Enabled" bitfld.long 0x08 8. " SCPERCTRL1[08] ,Peripheral Control 8" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SCPERCTRL1[07] ,Peripheral Control 7" "Disabled,Enabled" bitfld.long 0x08 6. " SCPERCTRL1[06] ,Peripheral Control 6" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " SCPERCTRL1[05] ,Peripheral Control 5" "Disabled,Enabled" bitfld.long 0x08 4. " SCPERCTRL1[04] ,Peripheral Control 4" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " SCPERCTRL1[03] ,Peripheral Control 3" "Disabled,Enabled" bitfld.long 0x08 2. " SCPERCTRL1[02] ,Peripheral Control 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SCPERCTRL1[01] ,Peripheral Control 1" "Disabled,Enabled" bitfld.long 0x08 0. " SCPERCTRL1[00] ,Peripheral Control 0" "Disabled,Enabled" wgroup.long 0x24++0x07 line.long 0x00 "SCPEREN,Peripheral Clock Enable Register" bitfld.long 0x00 31. " SCPEREN[31] ,Peripheral clock enable 31" "Disable,Enable" bitfld.long 0x00 30. " SCPEREN[30] ,Peripheral clock enable 30" "Disable,Enable" textline " " bitfld.long 0x00 29. " SCPEREN[29] ,Peripheral clock enable 29" "Disable,Enable" bitfld.long 0x00 28. " SCPEREN[28] ,Peripheral clock enable 28" "Disable,Enable" textline " " bitfld.long 0x00 27. " SCPEREN[27] ,Peripheral clock enable 27" "Disable,Enable" bitfld.long 0x00 26. " SCPEREN[26] ,Peripheral clock enable 26" "Disable,Enable" textline " " bitfld.long 0x00 25. " SCPEREN[25] ,Peripheral clock enable 25" "Disable,Enable" bitfld.long 0x00 24. " SCPEREN[24] ,Peripheral clock enable 24" "Disable,Enable" textline " " bitfld.long 0x00 23. " SCPEREN[23] ,Peripheral clock enable 23" "Disable,Enable" bitfld.long 0x00 22. " SCPEREN[22] ,Peripheral clock enable 22" "Disable,Enable" textline " " bitfld.long 0x00 21. " SCPEREN[21] ,Peripheral clock enable 21" "Disable,Enable" bitfld.long 0x00 20. " SCPEREN[20] ,Peripheral clock enable 20" "Disable,Enable" textline " " bitfld.long 0x00 19. " SCPEREN[19] ,Peripheral clock enable 19" "Disable,Enable" bitfld.long 0x00 18. " SCPEREN[18] ,Peripheral clock enable 18" "Disable,Enable" textline " " bitfld.long 0x00 17. " SCPEREN[17] ,Peripheral clock enable 17" "Disable,Enable" bitfld.long 0x00 16. " SCPEREN[16] ,Peripheral clock enable 16" "Disable,Enable" textline " " bitfld.long 0x00 15. " SCPEREN[15] ,Peripheral clock enable 15" "Disable,Enable" bitfld.long 0x00 14. " SCPEREN[14] ,Peripheral clock enable 14" "Disable,Enable" textline " " bitfld.long 0x00 13. " SCPEREN[13] ,Peripheral clock enable 13" "Disable,Enable" bitfld.long 0x00 12. " SCPEREN[12] ,Peripheral clock enable 12" "Disable,Enable" textline " " bitfld.long 0x00 11. " SCPEREN[11] ,Peripheral clock enable 11" "Disable,Enable" bitfld.long 0x00 10. " SCPEREN[10] ,Peripheral clock enable 10" "Disable,Enable" textline " " bitfld.long 0x00 9. " SCPEREN[09] ,Peripheral clock enable 9" "Disable,Enable" bitfld.long 0x00 8. " SCPEREN[08] ,Peripheral clock enable 8" "Disable,Enable" textline " " bitfld.long 0x00 7. " SCPEREN[07] ,Peripheral clock enable 7" "Disable,Enable" bitfld.long 0x00 6. " SCPEREN[06] ,Peripheral clock enable 6" "Disable,Enable" textline " " bitfld.long 0x00 5. " SCPEREN[05] ,Peripheral clock enable 5" "Disable,Enable" bitfld.long 0x00 4. " SCPEREN[04] ,Peripheral clock enable 4" "Disable,Enable" textline " " bitfld.long 0x00 3. " SCPEREN[03] ,Peripheral clock enable 3" "Disable,Enable" bitfld.long 0x00 2. " SCPEREN[02] ,Peripheral clock enable 2" "Disable,Enable" textline " " bitfld.long 0x00 1. " SCPEREN[01] ,Peripheral clock enable 1" "Disable,Enable" bitfld.long 0x00 0. " SCPEREN[00] ,Peripheral clock enable 0" "Disable,Enable" line.long 0x04 "SCPERDIS,Peripheral Clock Disable Register" bitfld.long 0x04 31. " SCPERDIS[31] ,Peripheral clock disable 31" "Enable,Disable" bitfld.long 0x04 30. " SCPERDIS[30] ,Peripheral clock disable 30" "Enable,Disable" textline " " bitfld.long 0x04 29. " SCPERDIS[29] ,Peripheral clock disable 29" "Enable,Disable" bitfld.long 0x04 28. " SCPERDIS[28] ,Peripheral clock disable 28" "Enable,Disable" textline " " bitfld.long 0x04 27. " SCPERDIS[27] ,Peripheral clock disable 27" "Enable,Disable" bitfld.long 0x04 26. " SCPERDIS[26] ,Peripheral clock disable 26" "Enable,Disable" textline " " bitfld.long 0x04 25. " SCPERDIS[25] ,Peripheral clock disable 25" "Enable,Disable" bitfld.long 0x04 24. " SCPERDIS[24] ,Peripheral clock disable 24" "Enable,Disable" textline " " bitfld.long 0x04 23. " SCPERDIS[23] ,Peripheral clock disable 23" "Enable,Disable" bitfld.long 0x04 22. " SCPERDIS[22] ,Peripheral clock disable 22" "Enable,Disable" textline " " bitfld.long 0x04 21. " SCPERDIS[21] ,Peripheral clock disable 21" "Enable,Disable" bitfld.long 0x04 20. " SCPERDIS[20] ,Peripheral clock disable 20" "Enable,Disable" textline " " bitfld.long 0x04 19. " SCPERDIS[19] ,Peripheral clock disable 19" "Enable,Disable" bitfld.long 0x04 18. " SCPERDIS[18] ,Peripheral clock disable 18" "Enable,Disable" textline " " bitfld.long 0x04 17. " SCPERDIS[17] ,Peripheral clock disable 17" "Enable,Disable" bitfld.long 0x04 16. " SCPERDIS[16] ,Peripheral clock disable 16" "Enable,Disable" textline " " bitfld.long 0x04 15. " SCPERDIS[15] ,Peripheral clock disable 15" "Enable,Disable" bitfld.long 0x04 14. " SCPERDIS[14] ,Peripheral clock disable 14" "Enable,Disable" textline " " bitfld.long 0x04 13. " SCPERDIS[13] ,Peripheral clock disable 13" "Enable,Disable" bitfld.long 0x04 12. " SCPERDIS[12] ,Peripheral clock disable 12" "Enable,Disable" textline " " bitfld.long 0x04 11. " SCPERDIS[11] ,Peripheral clock disable 11" "Enable,Disable" bitfld.long 0x04 10. " SCPERDIS[10] ,Peripheral clock disable 10" "Enable,Disable" textline " " bitfld.long 0x04 9. " SCPERDIS[09] ,Peripheral clock disable 9" "Enable,Disable" bitfld.long 0x04 8. " SCPERDIS[08] ,Peripheral clock disable 8" "Enable,Disable" textline " " bitfld.long 0x04 7. " SCPERDIS[07] ,Peripheral clock disable 7" "Enable,Disable" bitfld.long 0x04 6. " SCPERDIS[06] ,Peripheral clock disable 6" "Enable,Disable" textline " " bitfld.long 0x04 5. " SCPERDIS[05] ,Peripheral clock disable 5" "Enable,Disable" bitfld.long 0x04 4. " SCPERDIS[04] ,Peripheral clock disable 4" "Enable,Disable" textline " " bitfld.long 0x04 3. " SCPERDIS[03] ,Peripheral clock disable 3" "Enable,Disable" bitfld.long 0x04 2. " SCPERDIS[02] ,Peripheral clock disable 2" "Enable,Disable" textline " " bitfld.long 0x04 1. " SCPERDIS[01] ,Peripheral clock disable 1" "Enable,Disable" bitfld.long 0x04 0. " SCPERDIS[00] ,Peripheral clock disable 0" "Enable,Disable" rgroup.long 0x2c++0x07 line.long 0x00 "SCPERCLKEN,Peripheral Clock Enable Status Register" bitfld.long 0x00 31. " SCPERCLKEN[31] ,Peripheral clock enable status 31" "Disabled,Enabled" bitfld.long 0x00 30. " SCPERCLKEN[30] ,Peripheral clock enable status 30" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " SCPERCLKEN[29] ,Peripheral clock enable status 29" "Disabled,Enabled" bitfld.long 0x00 28. " SCPERCLKEN[28] ,Peripheral clock enable status 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCPERCLKEN[27] ,Peripheral clock enable status 27" "Disabled,Enabled" bitfld.long 0x00 26. " SCPERCLKEN[26] ,Peripheral clock enable status 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SCPERCLKEN[25] ,Peripheral clock enable status 25" "Disabled,Enabled" bitfld.long 0x00 24. " SCPERCLKEN[24] ,Peripheral clock enable status 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SCPERCLKEN[23] ,Peripheral clock enable status 23" "Disabled,Enabled" bitfld.long 0x00 22. " SCPERCLKEN[22] ,Peripheral clock enable status 22" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SCPERCLKEN[21] ,Peripheral clock enable status 21" "Disabled,Enabled" bitfld.long 0x00 20. " SCPERCLKEN[20] ,Peripheral clock enable status 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SCPERCLKEN[19] ,Peripheral clock enable status 19" "Disabled,Enabled" bitfld.long 0x00 18. " SCPERCLKEN[18] ,Peripheral clock enable status 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SCPERCLKEN[17] ,Peripheral clock enable status 17" "Disabled,Enabled" bitfld.long 0x00 16. " SCPERCLKEN[16] ,Peripheral clock enable status 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SCPERCLKEN[15] ,Peripheral clock enable status 15" "Disabled,Enabled" bitfld.long 0x00 14. " SCPERCLKEN[14] ,Peripheral clock enable status 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SCPERCLKEN[13] ,Peripheral clock enable status 13" "Disabled,Enabled" bitfld.long 0x00 12. " SCPERCLKEN[12] ,Peripheral clock enable status 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " SCPERCLKEN[11] ,Peripheral clock enable status 11" "Disabled,Enabled" bitfld.long 0x00 10. " SCPERCLKEN[10] ,Peripheral clock enable status 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " SCPERCLKEN[09] ,Peripheral clock enable status 9" "Disabled,Enabled" bitfld.long 0x00 8. " SCPERCLKEN[08] ,Peripheral clock enable status 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SCPERCLKEN[07] ,Peripheral clock enable status 7" "Disabled,Enabled" bitfld.long 0x00 6. " SCPERCLKEN[06] ,Peripheral clock enable status 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SCPERCLKEN[05] ,Peripheral clock enable status 5" "Disabled,Enabled" bitfld.long 0x00 4. " SCPERCLKEN[04] ,Peripheral clock enable status 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SCPERCLKEN[03] ,Peripheral clock enable status 3" "Disabled,Enabled" bitfld.long 0x00 2. " SCPERCLKEN[02] ,Peripheral clock enable status 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SCPERCLKEN[01] ,Peripheral clock enable status 1" "Disabled,Enabled" bitfld.long 0x00 0. " SCPERCLKEN[00] ,Peripheral clock enable status 0" "Disabled,Enabled" line.long 0x04 "SCPERSTAT,Peripheral Clock Status Register" bitfld.long 0x04 31. " SCPERSTAT[31] ,Peripheral clock status 31" "Disabled,Enabled" bitfld.long 0x04 30. " SCPERSTAT[30] ,Peripheral clock status 30" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " SCPERSTAT[29] ,Peripheral clock status 29" "Disabled,Enabled" bitfld.long 0x04 28. " SCPERSTAT[28] ,Peripheral clock status 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " SCPERSTAT[27] ,Peripheral clock status 27" "Disabled,Enabled" bitfld.long 0x04 26. " SCPERSTAT[26] ,Peripheral clock status 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SCPERSTAT[25] ,Peripheral clock status 25" "Disabled,Enabled" bitfld.long 0x04 24. " SCPERSTAT[24] ,Peripheral clock status 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SCPERSTAT[23] ,Peripheral clock status 23" "Disabled,Enabled" bitfld.long 0x04 22. " SCPERSTAT[22] ,Peripheral clock status 22" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SCPERSTAT[21] ,Peripheral clock status 21" "Disabled,Enabled" bitfld.long 0x04 20. " SCPERSTAT[20] ,Peripheral clock status 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " SCPERSTAT[19] ,Peripheral clock status 19" "Disabled,Enabled" bitfld.long 0x04 18. " SCPERSTAT[18] ,Peripheral clock status 18" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " SCPERSTAT[17] ,Peripheral clock status 17" "Disabled,Enabled" bitfld.long 0x04 16. " SCPERSTAT[16] ,Peripheral clock status 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " SCPERSTAT[15] ,Peripheral clock status 15" "Disabled,Enabled" bitfld.long 0x04 14. " SCPERSTAT[14] ,Peripheral clock status 14" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " SCPERSTAT[13] ,Peripheral clock status 13" "Disabled,Enabled" bitfld.long 0x04 12. " SCPERSTAT[12] ,Peripheral clock status 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " SCPERSTAT[11] ,Peripheral clock status 11" "Disabled,Enabled" bitfld.long 0x04 10. " SCPERSTAT[10] ,Peripheral clock status 10" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " SCPERSTAT[09] ,Peripheral clock status 9" "Disabled,Enabled" bitfld.long 0x04 8. " SCPERSTAT[08] ,Peripheral clock status 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " SCPERSTAT[07] ,Peripheral clock status 7" "Disabled,Enabled" bitfld.long 0x04 6. " SCPERSTAT[06] ,Peripheral clock status 6" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SCPERSTAT[05] ,Peripheral clock status 5" "Disabled,Enabled" bitfld.long 0x04 4. " SCPERSTAT[04] ,Peripheral clock status 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " SCPERSTAT[03] ,Peripheral clock status 3" "Disabled,Enabled" bitfld.long 0x04 2. " SCPERSTAT[02] ,Peripheral clock status 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SCPERSTAT[01] ,Peripheral clock status 1" "Disabled,Enabled" bitfld.long 0x04 0. " SCPERSTAT[00] ,Peripheral clock status 0" "Disabled,Enabled" endif rgroup.byte 0xee0++0x00 "System Controller identification registers" line.byte 0x00 "SCSYSID0,System Identification Register 0" rgroup.byte 0xee4++0x00 line.byte 0x00 "SCSYSID1,System Identification Register 1" rgroup.byte 0xee8++0x00 line.byte 0x00 "SCSYSID2,System Identification Register 2" rgroup.byte 0xeec++0x00 line.byte 0x00 "SCSYSID3,System Identification Register 3" rgroup.byte 0xfe0++0x00 line.byte 0x00 "SCPERIPHID0,Peripheral Identification Register 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "SCPERIPHID1,Peripheral Identification Register 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "SCPERIPHID2,Peripheral Identification Register 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "SCPERIPHID3,Peripheral Identification Register 3" rgroup.byte 0xff0++0x00 line.byte 0x00 "SCPCELLID0,PrimeCell Identification Register 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "SCPCELLID1,PrimeCell Identification Register 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "SCPCELLID2,PrimeCell Identification Register 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "SCPCELLID3,PrimeCell Identification Register 3" width 0xb tree.end tree "VIC (Vectored interrupt controller)" base asd:0xF1100000 sif (cpu()=="SPEAR600") width 15. tree "Primary" rgroup.long 0x00++0x0b "VIC Interrupt Control Registers" line.long 0x00 "VICIRQSTATUS,Irq Status Register" bitfld.long 0x00 31. " IRQSTATUS[31] ,IRQ Status 31 (Generic Interrupt RAS-11)" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQSTATUS[30] ,IRQ Status 30 (Generic Interrupt RAS-10)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " IRQSTATUS[29] ,IRQ Status 29 (Generic Interrupt RAS-9)" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQSTATUS[28] ,IRQ Status 28 (Low Speed-I2C)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQSTATUS[27] ,IRQ Status 27 (Low Speed-SPI2)" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQSTATUS[26] ,IRQ Status 26 (Low Speed-SPI1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQSTATUS[25] ,IRQ Status 25 (Low Speed-UART2)" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQSTATUS[24] ,IRQ Status 24 (Low Speed-UART1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " IRQSTATUS[22] ,IRQ Status 22 (Low Speed-IrDA)" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQSTATUS[21] ,IRQ Status 21 (Wakeup_Rcg_fiq (Cpu1 only))" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " IRQSTATUS[20] ,IRQ Status 20 (Low speed-JPEG)" "No interrupt,Interrupt" bitfld.long 0x00 19. " IRQSTATUS[19] ,IRQ Status 19 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 18. " IRQSTATUS[18] ,IRQ Status 18 (ARM subsystem1/2-GPIO)" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQSTATUS[17] ,IRQ Status 17 (ARM subsystem1/2-Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " IRQSTATUS[16] ,IRQ Status 16 (ARM subsystem1/2-Timer 1)" "No interrupt,Interrupt" bitfld.long 0x00 15. " IRQSTATUS[15] ,IRQ Status 15 (Generic Interrupt RAS-8)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " IRQSTATUS[14] ,IRQ Status 14 (Generic Interrupt RAS-7)" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQSTATUS[13] ,IRQ Status 13 (Generic Interrupt RAS-6)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " IRQSTATUS[12] ,IRQ Status 12 (Generic Interrupt RAS-5)" "No interrupt,Interrupt" bitfld.long 0x00 11. " IRQSTATUS[11] ,IRQ Status 11 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " IRQSTATUS[10] ,IRQ Status 10 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQSTATUS[9] ,IRQ Status 9 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " IRQSTATUS[8] ,IRQ Status 8 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" bitfld.long 0x00 7. " IRQSTATUS[7] ,IRQ Status 7 (Generic Interrupt RAS-0)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " IRQSTATUS[6] ,IRQ Status 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQSTATUS[5] ,IRQ Status 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " IRQSTATUS[4] ,IRQ Status 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x00 3. " IRQSTATUS[3] ,IRQ Status 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " IRQSTATUS[2] ,IRQ Status 2 (Processor intercommunication ARM1/2 _2)" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQSTATUS[1] ,IRQ Status 1 (Processor intercommunication ARM1/2 _1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " IRQSTATUS[0] ,IRQ Status 0 (SW Interrupt)" "No interrupt,Interrupt" line.long 0x04 "VICFIQSTATUS,Fiq Status Register" bitfld.long 0x04 31. " FIQSTATUS[31] ,FIQ Status 31 (Generic Interrupt RAS-11)" "No interrupt,Interrupt" bitfld.long 0x04 30. " FIQSTATUS[30] ,FIQ Status 30 (Generic Interrupt RAS-10)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " FIQSTATUS[29] ,FIQ Status 29 (Generic Interrupt RAS-9)" "No interrupt,Interrupt" bitfld.long 0x04 28. " FIQSTATUS[28] ,FIQ Status 28 (Low Speed-I2C)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " FIQSTATUS[27] ,FIQ Status 27 (Low Speed-SPI2)" "No interrupt,Interrupt" bitfld.long 0x04 26. " FIQSTATUS[26] ,FIQ Status 26 (Low Speed-SPI1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " FIQSTATUS[25] ,FIQ Status 25 (Low Speed-UART2)" "No interrupt,Interrupt" bitfld.long 0x04 24. " FIQSTATUS[24] ,FIQ Status 24 (Low Speed-UART1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " FIQSTATUS[22] ,FIQ Status 22 (Low Speed-IrDA)" "No interrupt,Interrupt" bitfld.long 0x04 21. " FIQSTATUS[21] ,FIQ Status 21 (Wakeup_Rcg_fiq (Cpu1 only))" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " FIQSTATUS[20] ,FIQ Status 20 (Low speed-JPEG)" "No interrupt,Interrupt" bitfld.long 0x04 19. " FIQSTATUS[19] ,FIQ Status 19 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 18. " FIQSTATUS[18] ,FIQ Status 18 (ARM subsystem1/2-GPIO)" "No interrupt,Interrupt" bitfld.long 0x04 17. " FIQSTATUS[17] ,FIQ Status 17 (ARM subsystem1/2-Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " FIQSTATUS[16] ,FIQ Status 16 (ARM subsystem1/2-Timer 1)" "No interrupt,Interrupt" bitfld.long 0x04 15. " FIQSTATUS[15] ,FIQ Status 15 (Generic Interrupt RAS-8)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " FIQSTATUS[14] ,FIQ Status 14 (Generic Interrupt RAS-7)" "No interrupt,Interrupt" bitfld.long 0x04 13. " FIQSTATUS[13] ,FIQ Status 13 (Generic Interrupt RAS-6)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " FIQSTATUS[12] ,FIQ Status 12 (Generic Interrupt RAS-5)" "No interrupt,Interrupt" bitfld.long 0x04 11. " FIQSTATUS[11] ,FIQ Status 11 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " FIQSTATUS[10] ,FIQ Status 10 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" bitfld.long 0x04 9. " FIQSTATUS[9] ,FIQ Status 9 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " FIQSTATUS[8] ,FIQ Status 8 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" bitfld.long 0x04 7. " FIQSTATUS[7] ,FIQ Status 7 (Generic Interrupt RAS-0)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " FIQSTATUS[6] ,FIQ Status 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x04 5. " FIQSTATUS[5] ,FIQ Status 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " FIQSTATUS[4] ,FIQ Status 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x04 3. " FIQSTATUS[3] ,FIQ Status 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " FIQSTATUS[2] ,FIQ Status 2 (Processor intercommunication ARM1/2 _2)" "No interrupt,Interrupt" bitfld.long 0x04 1. " FIQSTATUS[1] ,FIQ Status 1 (Processor intercommunication ARM1/2 _1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " FIQSTATUS[0] ,FIQ Status 0 (SW Interrupt)" "No interrupt,Interrupt" line.long 0x08 "VICRAWINTR,Raw Interrupt Status Register" bitfld.long 0x08 31. " RAWINTERRUPT[31] ,Raw Interrupt Status 31 (Generic Interrupt RAS-11)" "No interrupt,Interrupt" bitfld.long 0x08 30. " RAWINTERRUPT[30] ,Raw Interrupt Status 30 (Generic Interrupt RAS-10)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 29. " RAWINTERRUPT[29] ,Raw Interrupt Status 29 (Generic Interrupt RAS-9)" "No interrupt,Interrupt" bitfld.long 0x08 28. " RAWINTERRUPT[28] ,Raw Interrupt Status 28 (Low Speed-I2C)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 27. " RAWINTERRUPT[27] ,Raw Interrupt Status 27 (Low Speed-SPI2)" "No interrupt,Interrupt" bitfld.long 0x08 26. " RAWINTERRUPT[26] ,Raw Interrupt Status 26 (Low Speed-SPI1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " RAWINTERRUPT[25] ,Raw Interrupt Status 25 (Low Speed-UART2)" "No interrupt,Interrupt" bitfld.long 0x08 24. " RAWINTERRUPT[24] ,Raw Interrupt Status 24 (Low Speed-UART1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 22. " RAWINTERRUPT[22] ,Raw Interrupt Status 22 (Low Speed-IrDA)" "No interrupt,Interrupt" bitfld.long 0x08 21. " RAWINTERRUPT[21] ,Raw Interrupt Status 21 (Wakeup_Rcg_fiq (Cpu1 only))" "No interrupt,Interrupt" textline " " bitfld.long 0x08 20. " RAWINTERRUPT[20] ,Raw Interrupt Status 20 (Low speed-JPEG)" "No interrupt,Interrupt" bitfld.long 0x08 19. " RAWINTERRUPT[19] ,Raw Interrupt Status 19 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 18. " RAWINTERRUPT[18] ,Raw Interrupt Status 18 (ARM subsystem1/2-GPIO)" "No interrupt,Interrupt" bitfld.long 0x08 17. " RAWINTERRUPT[17] ,Raw Interrupt Status 17 (ARM subsystem1/2-Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " RAWINTERRUPT[16] ,Raw Interrupt Status 16 (ARM subsystem1/2-Timer 1)" "No interrupt,Interrupt" bitfld.long 0x08 15. " RAWINTERRUPT[15] ,Raw Interrupt Status 15 (Generic Interrupt RAS-8)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 14. " RAWINTERRUPT[14] ,Raw Interrupt Status 14 (Generic Interrupt RAS-7)" "No interrupt,Interrupt" bitfld.long 0x08 13. " RAWINTERRUPT[13] ,Raw Interrupt Status 13 (Generic Interrupt RAS-6)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 12. " RAWINTERRUPT[12] ,Raw Interrupt Status 12 (Generic Interrupt RAS-5)" "No interrupt,Interrupt" bitfld.long 0x08 11. " RAWINTERRUPT[11] ,Raw Interrupt Status 11 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " RAWINTERRUPT[10] ,Raw Interrupt Status 10 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" bitfld.long 0x08 9. " RAWINTERRUPT[9] ,Raw Interrupt Status 9 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 8. " RAWINTERRUPT[8] ,Raw Interrupt Status 8 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" bitfld.long 0x08 7. " RAWINTERRUPT[7] ,Raw Interrupt Status 7 (Generic Interrupt RAS-0)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " RAWINTERRUPT[6] ,Raw Interrupt Status 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x08 5. " RAWINTERRUPT[5] ,Raw Interrupt Status 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " RAWINTERRUPT[4] ,Raw Interrupt Status 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x08 3. " RAWINTERRUPT[3] ,Raw Interrupt Status 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 2. " RAWINTERRUPT[2] ,Raw Interrupt Status 2 (Processor intercommunication ARM1/2 _2)" "No interrupt,Interrupt" bitfld.long 0x08 1. " RAWINTERRUPT[1] ,Raw Interrupt Status 1 (Processor intercommunication ARM1/2 _1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " RAWINTERRUPT[0] ,Raw Interrupt Status 0 (SW Interrupt)" "No interrupt,Interrupt" group.long 0x0c++0x07 line.long 0x00 "VICINTSELECT,Interrupt Select Register" bitfld.long 0x00 31. " INTSELECT[31] ,Interrupt Select 31 (Generic Interrupt RAS-11)" "IRQ,FIQ" bitfld.long 0x00 30. " INTSELECT[30] ,Interrupt Select 30 (Generic Interrupt RAS-10)" "IRQ,FIQ" bitfld.long 0x00 29. " INTSELECT[29] ,Interrupt Select 29 (Generic Interrupt RAS-9)" "IRQ,FIQ" textline " " bitfld.long 0x00 28. " INTSELECT[28] ,Interrupt Select 28 (Low Speed-I2C)" "IRQ,FIQ" bitfld.long 0x00 27. " INTSELECT[27] ,Interrupt Select 27 (Low Speed-SPI2)" "IRQ,FIQ" bitfld.long 0x00 26. " INTSELECT[26] ,Interrupt Select 26 (Low Speed-SPI1)" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " INTSELECT[25] ,Interrupt Select 25 (Low Speed-UART2)" "IRQ,FIQ" bitfld.long 0x00 24. " INTSELECT[24] ,Interrupt Select 24 (Low Speed-UART1)" "IRQ,FIQ" bitfld.long 0x00 22. " INTSELECT[22] ,Interrupt Select 22 (Low Speed-IrDA)" "IRQ,FIQ" textline " " bitfld.long 0x00 21. " INTSELECT[21] ,Interrupt Select 21 (Wakeup_Rcg_fiq (Cpu1 only))" "IRQ,FIQ" bitfld.long 0x00 20. " INTSELECT[20] ,Interrupt Select 20 (Low speed-JPEG)" "IRQ,FIQ" bitfld.long 0x00 19. " INTSELECT[19] ,Interrupt Select 19 (System Error)" "IRQ,FIQ" textline " " bitfld.long 0x00 18. " INTSELECT[18] ,Interrupt Select 18 (ARM subsystem1/2-GPIO)" "IRQ,FIQ" bitfld.long 0x00 17. " INTSELECT[17] ,Interrupt Select 17 (ARM subsystem1/2-Timer 2)" "IRQ,FIQ" bitfld.long 0x00 16. " INTSELECT[16] ,Interrupt Select 16 (ARM subsystem1/2-Timer 1)" "IRQ,FIQ" textline " " bitfld.long 0x00 15. " INTSELECT[15] ,Interrupt Select 15 (Generic Interrupt RAS-8)" "IRQ,FIQ" bitfld.long 0x00 14. " INTSELECT[14] ,Interrupt Select 14 (Generic Interrupt RAS-7)" "IRQ,FIQ" bitfld.long 0x00 13. " INTSELECT[13] ,Interrupt Select 13 (Generic Interrupt RAS-6)" "IRQ,FIQ" textline " " bitfld.long 0x00 12. " INTSELECT[12] ,Interrupt Select 12 (Generic Interrupt RAS-5)" "IRQ,FIQ" bitfld.long 0x00 11. " INTSELECT[11] ,Interrupt Select 11 (Generic Interrupt RAS-4)" "IRQ,FIQ" bitfld.long 0x00 10. " INTSELECT[10] ,Interrupt Select 10 (Generic Interrupt RAS-3)" "IRQ,FIQ" textline " " bitfld.long 0x00 9. " INTSELECT[9] ,Interrupt Select 9 (Generic Interrupt RAS-2)" "IRQ,FIQ" bitfld.long 0x00 8. " INTSELECT[8] ,Interrupt Select 8 (Generic Interrupt RAS-1)" "IRQ,FIQ" bitfld.long 0x00 7. " INTSELECT[7] ,Interrupt Select 7 (Generic Interrupt RAS-0)" "IRQ,FIQ" textline " " bitfld.long 0x00 6. " INTSELECT[6] ,Interrupt Select 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "IRQ,FIQ" bitfld.long 0x00 5. " INTSELECT[5] ,Interrupt Select 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "IRQ,FIQ" bitfld.long 0x00 4. " INTSELECT[4] ,Interrupt Select 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "IRQ,FIQ" textline " " bitfld.long 0x00 3. " INTSELECT[3] ,Interrupt Select 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "IRQ,FIQ" bitfld.long 0x00 2. " INTSELECT[2] ,Interrupt Select 2 (Processor intercommunication ARM1/2 _2)" "IRQ,FIQ" bitfld.long 0x00 1. " INTSELECT[1] ,Interrupt Select 1 (Processor intercommunication ARM1/2 _1)" "IRQ,FIQ" textline " " bitfld.long 0x00 0. " INTSELECT[0] ,Interrupt Select 0 (SW Interrupt)" "IRQ,FIQ" line.long 0x04 "VICINTENABLE,Interrupt Enable Register" bitfld.long 0x04 31. " INTENABLE[31] ,Interrupt Enable 31 (Generic Interrupt RAS-11)" "Disabled,Enabled" bitfld.long 0x04 30. " INTENABLE[30] ,Interrupt Enable 30 (Generic Interrupt RAS-10)" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " INTENABLE[29] ,Interrupt Enable 29 (Generic Interrupt RAS-9)" "Disabled,Enabled" bitfld.long 0x04 28. " INTENABLE[28] ,Interrupt Enable 28 (Low Speed-I2C)" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " INTENABLE[27] ,Interrupt Enable 27 (Low Speed-SPI2)" "Disabled,Enabled" bitfld.long 0x04 26. " INTENABLE[26] ,Interrupt Enable 26 (Low Speed-SPI1)" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " INTENABLE[25] ,Interrupt Enable 25 (Low Speed-UART2)" "Disabled,Enabled" bitfld.long 0x04 24. " INTENABLE[24] ,Interrupt Enable 24 (Low Speed-UART1)" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " INTENABLE[22] ,Interrupt Enable 22 (Low Speed-IrDA)" "Disabled,Enabled" bitfld.long 0x04 21. " INTENABLE[21] ,Interrupt Enable 21 (Wakeup_Rcg_fiq (Cpu1 only))" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " INTENABLE[20] ,Interrupt Enable 20 (Low speed-JPEG)" "Disabled,Enabled" bitfld.long 0x04 19. " INTENABLE[19] ,Interrupt Enable 19 (System Error)" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " INTENABLE[18] ,Interrupt Enable 18 (ARM subsystem1/2-GPIO)" "Disabled,Enabled" bitfld.long 0x04 17. " INTENABLE[17] ,Interrupt Enable 17 (ARM subsystem1/2-Timer 2)" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " INTENABLE[16] ,Interrupt Enable 16 (ARM subsystem1/2-Timer 1)" "Disabled,Enabled" bitfld.long 0x04 15. " INTENABLE[15] ,Interrupt Enable 15 (Generic Interrupt RAS-8)" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " INTENABLE[14] ,Interrupt Enable 14 (Generic Interrupt RAS-7)" "Disabled,Enabled" bitfld.long 0x04 13. " INTENABLE[13] ,Interrupt Enable 13 (Generic Interrupt RAS-6)" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " INTENABLE[12] ,Interrupt Enable 12 (Generic Interrupt RAS-5)" "Disabled,Enabled" bitfld.long 0x04 11. " INTENABLE[11] ,Interrupt Enable 11 (Generic Interrupt RAS-4)" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " INTENABLE[10] ,Interrupt Enable 10 (Generic Interrupt RAS-3)" "Disabled,Enabled" bitfld.long 0x04 9. " INTENABLE[9] ,Interrupt Enable 9 (Generic Interrupt RAS-2)" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " INTENABLE[8] ,Interrupt Enable 8 (Generic Interrupt RAS-1)" "Disabled,Enabled" bitfld.long 0x04 7. " INTENABLE[7] ,Interrupt Enable 7 (Generic Interrupt RAS-0)" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " INTENABLE[6] ,Interrupt Enable 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "Disabled,Enabled" bitfld.long 0x04 5. " INTENABLE[5] ,Interrupt Enable 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " INTENABLE[4] ,Interrupt Enable 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "Disabled,Enabled" bitfld.long 0x04 3. " INTENABLE[3] ,Interrupt Enable 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " INTENABLE[2] ,Interrupt Enable 2 (Processor intercommunication ARM1/2 _2)" "Disabled,Enabled" bitfld.long 0x04 1. " INTENABLE[1] ,Interrupt Enable 1 (Processor intercommunication ARM1/2 _1)" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " INTENABLE[0] ,Interrupt Enable 0 (SW Interrupt)" "Disabled,Enabled" wgroup.long 0x14++0x03 line.long 0x00 "VICINTENCLEAR,Interrupt Enable Clear Register" bitfld.long 0x00 31. " INTENABLECLEAR[31] ,Interrupt Enable Clear 31 (Generic Interrupt RAS-11)" "No effect,Clear" bitfld.long 0x00 30. " INTENABLECLEAR[30] ,Interrupt Enable Clear 30 (Generic Interrupt RAS-10)" "No effect,Clear" textline " " bitfld.long 0x00 29. " INTENABLECLEAR[29] ,Interrupt Enable Clear 29 (Generic Interrupt RAS-9)" "No effect,Clear" bitfld.long 0x00 28. " INTENABLECLEAR[28] ,Interrupt Enable Clear 28 (Low Speed-I2C)" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTENABLECLEAR[27] ,Interrupt Enable Clear 27 (Low Speed-SPI2)" "No effect,Clear" bitfld.long 0x00 26. " INTENABLECLEAR[26] ,Interrupt Enable Clear 26 (Low Speed-SPI1)" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTENABLECLEAR[25] ,Interrupt Enable Clear 25 (Low Speed-UART2)" "No effect,Clear" bitfld.long 0x00 24. " INTENABLECLEAR[24] ,Interrupt Enable Clear 24 (Low Speed-UART1)" "No effect,Clear" textline " " bitfld.long 0x00 22. " INTENABLECLEAR[22] ,Interrupt Enable Clear 22 (Low Speed-IrDA)" "No effect,Clear" bitfld.long 0x00 21. " INTENABLECLEAR[21] ,Interrupt Enable Clear 21 (Wakeup_Rcg_fiq (Cpu1 only))" "No effect,Clear" textline " " bitfld.long 0x00 20. " INTENABLECLEAR[20] ,Interrupt Enable Clear 20 (Low speed-JPEG)" "No effect,Clear" bitfld.long 0x00 19. " INTENABLECLEAR[19] ,Interrupt Enable Clear 19 (System Error)" "No effect,Clear" textline " " bitfld.long 0x00 18. " INTENABLECLEAR[18] ,Interrupt Enable Clear 18 (ARM subsystem1/2-GPIO)" "No effect,Clear" bitfld.long 0x00 17. " INTENABLECLEAR[17] ,Interrupt Enable Clear 17 (ARM subsystem1/2-Timer 2)" "No effect,Clear" textline " " bitfld.long 0x00 16. " INTENABLECLEAR[16] ,Interrupt Enable Clear 16 (ARM subsystem1/2-Timer 1)" "No effect,Clear" bitfld.long 0x00 15. " INTENABLECLEAR[15] ,Interrupt Enable Clear 15 (Generic Interrupt RAS-8)" "No effect,Clear" textline " " bitfld.long 0x00 14. " INTENABLECLEAR[14] ,Interrupt Enable Clear 14 (Generic Interrupt RAS-7)" "No effect,Clear" bitfld.long 0x00 13. " INTENABLECLEAR[13] ,Interrupt Enable Clear 13 (Generic Interrupt RAS-6)" "No effect,Clear" textline " " bitfld.long 0x00 12. " INTENABLECLEAR[12] ,Interrupt Enable Clear 12 (Generic Interrupt RAS-5)" "No effect,Clear" bitfld.long 0x00 11. " INTENABLECLEAR[11] ,Interrupt Enable Clear 11 (Generic Interrupt RAS-4)" "No effect,Clear" textline " " bitfld.long 0x00 10. " INTENABLECLEAR[10] ,Interrupt Enable Clear 10 (Generic Interrupt RAS-3)" "No effect,Clear" bitfld.long 0x00 9. " INTENABLECLEAR[9] ,Interrupt Enable Clear 9 (Generic Interrupt RAS-2)" "No effect,Clear" textline " " bitfld.long 0x00 8. " INTENABLECLEAR[8] ,Interrupt Enable Clear 8 (Generic Interrupt RAS-1)" "No effect,Clear" bitfld.long 0x00 7. " INTENABLECLEAR[7] ,Interrupt Enable Clear 7 (Generic Interrupt RAS-0)" "No effect,Clear" textline " " bitfld.long 0x00 6. " INTENABLECLEAR[6] ,Interrupt Enable Clear 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "No effect,Clear" bitfld.long 0x00 5. " INTENABLECLEAR[5] ,Interrupt Enable Clear 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "No effect,Clear" textline " " bitfld.long 0x00 4. " INTENABLECLEAR[4] ,Interrupt Enable Clear 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "No effect,Clear" bitfld.long 0x00 3. " INTENABLECLEAR[3] ,Interrupt Enable Clear 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "No effect,Clear" textline " " bitfld.long 0x00 2. " INTENABLECLEAR[2] ,Interrupt Enable Clear 2 (Processor intercommunication ARM1/2 _2)" "No effect,Clear" bitfld.long 0x00 1. " INTENABLECLEAR[1] ,Interrupt Enable Clear 1 (Processor intercommunication ARM1/2 _1)" "No effect,Clear" textline " " bitfld.long 0x00 0. " INTENABLECLEAR[0] ,Interrupt Enable Clear 0 (SW Interrupt)" "No effect,Clear" group.long 0x18++0x03 line.long 0x00 "VICSOFTINT,Software Interrupt Register" bitfld.long 0x00 31. " SOFTINT[31] ,Software Interrupt 31 (Generic Interrupt RAS-11)" "No interrupt,Interrupt" bitfld.long 0x00 30. " SOFTINT[30] ,Software Interrupt 30 (Generic Interrupt RAS-10)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " SOFTINT[29] ,Software Interrupt 29 (Generic Interrupt RAS-9)" "No interrupt,Interrupt" bitfld.long 0x00 28. " SOFTINT[28] ,Software Interrupt 28 (Low Speed-I2C)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SOFTINT[27] ,Software Interrupt 27 (Low Speed-SPI2)" "No interrupt,Interrupt" bitfld.long 0x00 26. " SOFTINT[26] ,Software Interrupt 26 (Low Speed-SPI1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " SOFTINT[25] ,Software Interrupt 25 (Low Speed-UART2)" "No interrupt,Interrupt" bitfld.long 0x00 24. " SOFTINT[24] ,Software Interrupt 24 (Low Speed-UART1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SOFTINT[22] ,Software Interrupt 22 (Low Speed-IrDA)" "No interrupt,Interrupt" bitfld.long 0x00 21. " SOFTINT[21] ,Software Interrupt 21 (Wakeup_Rcg_fiq (Cpu1 only))" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " SOFTINT[20] ,Software Interrupt 20 (Low speed-JPEG)" "No interrupt,Interrupt" bitfld.long 0x00 19. " SOFTINT[19] ,Software Interrupt 19 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 18. " SOFTINT[18] ,Software Interrupt 18 (ARM subsystem1/2-GPIO)" "No interrupt,Interrupt" bitfld.long 0x00 17. " SOFTINT[17] ,Software Interrupt 17 (ARM subsystem1/2-Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " SOFTINT[16] ,Software Interrupt 16 (ARM subsystem1/2-Timer 1)" "No interrupt,Interrupt" bitfld.long 0x00 15. " SOFTINT[15] ,Software Interrupt 15 (Generic Interrupt RAS-8)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " SOFTINT[14] ,Software Interrupt 14 (Generic Interrupt RAS-7)" "No interrupt,Interrupt" bitfld.long 0x00 13. " SOFTINT[13] ,Software Interrupt 13 (Generic Interrupt RAS-6)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " SOFTINT[12] ,Software Interrupt 12 (Generic Interrupt RAS-5)" "No interrupt,Interrupt" bitfld.long 0x00 11. " SOFTINT[11] ,Software Interrupt 11 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " SOFTINT[10] ,Software Interrupt 10 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" bitfld.long 0x00 9. " SOFTINT[9] ,Software Interrupt 9 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " SOFTINT[8] ,Software Interrupt 8 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" bitfld.long 0x00 7. " SOFTINT[7] ,Software Interrupt 7 (Generic Interrupt RAS-0)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " SOFTINT[6] ,Software Interrupt 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x00 5. " SOFTINT[5] ,Software Interrupt 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " SOFTINT[4] ,Software Interrupt 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "No interrupt,Interrupt" bitfld.long 0x00 3. " SOFTINT[3] ,Software Interrupt 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " SOFTINT[2] ,Software Interrupt 2 (Processor intercommunication ARM1/2 _2)" "No interrupt,Interrupt" bitfld.long 0x00 1. " SOFTINT[1] ,Software Interrupt 1 (Processor intercommunication ARM1/2 _1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " SOFTINT[0] ,Software Interrupt 0 (SW Interrupt)" "No interrupt,Interrupt" wgroup.long 0x1c++0x03 line.long 0x00 "VICSOFTINTCLEAR,Software Interrupt Clear Register" bitfld.long 0x00 31. " SOFTINTCLEAR[31] ,Software Interrupt Clear 31 (Generic Interrupt RAS-11)" "No effect,Clear" bitfld.long 0x00 30. " SOFTINTCLEAR[30] ,Software Interrupt Clear 30 (Generic Interrupt RAS-10)" "No effect,Clear" textline " " bitfld.long 0x00 29. " SOFTINTCLEAR[29] ,Software Interrupt Clear 29 (Generic Interrupt RAS-9)" "No effect,Clear" bitfld.long 0x00 28. " SOFTINTCLEAR[28] ,Software Interrupt Clear 28 (Low Speed-I2C)" "No effect,Clear" textline " " bitfld.long 0x00 27. " SOFTINTCLEAR[27] ,Software Interrupt Clear 27 (Low Speed-SPI2)" "No effect,Clear" bitfld.long 0x00 26. " SOFTINTCLEAR[26] ,Software Interrupt Clear 26 (Low Speed-SPI1)" "No effect,Clear" textline " " bitfld.long 0x00 25. " SOFTINTCLEAR[25] ,Software Interrupt Clear 25 (Low Speed-UART2)" "No effect,Clear" bitfld.long 0x00 24. " SOFTINTCLEAR[24] ,Software Interrupt Clear 24 (Low Speed-UART1)" "No effect,Clear" textline " " bitfld.long 0x00 22. " SOFTINTCLEAR[22] ,Software Interrupt Clear 22 (Low Speed-IrDA)" "No effect,Clear" bitfld.long 0x00 21. " SOFTINTCLEAR[21] ,Software Interrupt Clear 21 (Wakeup_Rcg_fiq (Cpu1 only))" "No effect,Clear" textline " " bitfld.long 0x00 20. " SOFTINTCLEAR[20] ,Software Interrupt Clear 20 (Low speed-JPEG)" "No effect,Clear" bitfld.long 0x00 19. " SOFTINTCLEAR[19] ,Software Interrupt Clear 19 (System Error)" "No effect,Clear" textline " " bitfld.long 0x00 18. " SOFTINTCLEAR[18] ,Software Interrupt Clear 18 (ARM subsystem1/2-GPIO)" "No effect,Clear" bitfld.long 0x00 17. " SOFTINTCLEAR[17] ,Software Interrupt Clear 17 (ARM subsystem1/2-Timer 2)" "No effect,Clear" textline " " bitfld.long 0x00 16. " SOFTINTCLEAR[16] ,Software Interrupt Clear 16 (ARM subsystem1/2-Timer 1)" "No effect,Clear" bitfld.long 0x00 15. " SOFTINTCLEAR[15] ,Software Interrupt Clear 15 (Generic Interrupt RAS-8)" "No effect,Clear" textline " " bitfld.long 0x00 14. " SOFTINTCLEAR[14] ,Software Interrupt Clear 14 (Generic Interrupt RAS-7)" "No effect,Clear" bitfld.long 0x00 13. " SOFTINTCLEAR[13] ,Software Interrupt Clear 13 (Generic Interrupt RAS-6)" "No effect,Clear" textline " " bitfld.long 0x00 12. " SOFTINTCLEAR[12] ,Software Interrupt Clear 12 (Generic Interrupt RAS-5)" "No effect,Clear" bitfld.long 0x00 11. " SOFTINTCLEAR[11] ,Software Interrupt Clear 11 (Generic Interrupt RAS-4)" "No effect,Clear" textline " " bitfld.long 0x00 10. " SOFTINTCLEAR[10] ,Software Interrupt Clear 10 (Generic Interrupt RAS-3)" "No effect,Clear" bitfld.long 0x00 9. " SOFTINTCLEAR[9] ,Software Interrupt Clear 9 (Generic Interrupt RAS-2)" "No effect,Clear" textline " " bitfld.long 0x00 8. " SOFTINTCLEAR[8] ,Software Interrupt Clear 8 (Generic Interrupt RAS-1)" "No effect,Clear" bitfld.long 0x00 7. " SOFTINTCLEAR[7] ,Software Interrupt Clear 7 (Generic Interrupt RAS-0)" "No effect,Clear" textline " " bitfld.long 0x00 6. " SOFTINTCLEAR[6] ,Software Interrupt Clear 6 (Processor intercommunication RAS2_ARM1/2-2_4)" "No effect,Clear" bitfld.long 0x00 5. " SOFTINTCLEAR[5] ,Software Interrupt Clear 5 (Processor intercommunication RAS2_ARM1/2-1_3)" "No effect,Clear" textline " " bitfld.long 0x00 4. " SOFTINTCLEAR[4] ,Software Interrupt Clear 4 (Processor intercommunication RAS1_ARM1/2-2_4)" "No effect,Clear" bitfld.long 0x00 3. " SOFTINTCLEAR[3] ,Software Interrupt Clear 3 (Processor intercommunication RAS1_ARM1/2-1_3)" "No effect,Clear" textline " " bitfld.long 0x00 2. " SOFTINTCLEAR[2] ,Software Interrupt Clear 2 (Processor intercommunication ARM1/2 _2)" "No effect,Clear" bitfld.long 0x00 1. " SOFTINTCLEAR[1] ,Software Interrupt Clear 1 (Processor intercommunication ARM1/2 _1)" "No effect,Clear" textline " " bitfld.long 0x00 0. " SOFTINTCLEAR[0] ,Software Interrupt Clear 0 (SW Interrupt)" "No effect,Clear" group.long 0x20++0x03 line.long 0x00 "VICPROTECTION,Protection Enable Register" bitfld.long 0x00 0. " PROTECTION ,Enable/disable protected register access" "Disabled,Enabled" width 16. group.long 0x30++0x07 "VIC Vector Address Registers" line.long 0x00 "VICVECTADDR,Vector Address Register" line.long 0x4 "VICDEFVECTADDR,Default Vector Address Register" group.long 0x100--0x13f line.long 0x0 "VICVECTADDR0,Vector Address Register 0" line.long 0x4 "VICVECTADDR1,Vector Address Register 1" line.long 0x8 "VICVECTADDR2,Vector Address Register 2" line.long 0xC "VICVECTADDR3,Vector Address Register 3" line.long 0x10 "VICVECTADDR4,Vector Address Register 4" line.long 0x14 "VICVECTADDR5,Vector Address Register 5" line.long 0x18 "VICVECTADDR6,Vector Address Register 6" line.long 0x1C "VICVECTADDR7,Vector Address Register 7" line.long 0x20 "VICVECTADDR8,Vector Address Register 8" line.long 0x24 "VICVECTADDR9,Vector Address Register 9" line.long 0x28 "VICVECTADDR10,Vector Address Register 10" line.long 0x2C "VICVECTADDR11,Vector Address Register 11" line.long 0x30 "VICVECTADDR12,Vector Address Register 12" line.long 0x34 "VICVECTADDR13,Vector Address Register 13" line.long 0x38 "VICVECTADDR14,Vector Address Register 14" line.long 0x3C "VICVECTADDR15,Vector Address Register 15" group.long 0x200--0x23f "VIC Interrupt Vector Control Registers" line.long 0x0 "VICVECTCNTL0,Vector Control Register 0" bitfld.long 0x0 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x0 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4 "VICVECTCNTL1,Vector Control Register 1" bitfld.long 0x4 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x4 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8 "VICVECTCNTL2,Vector Control Register 2" bitfld.long 0x8 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x8 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC "VICVECTCNTL3,Vector Control Register 3" bitfld.long 0xC 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0xC 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "VICVECTCNTL4,Vector Control Register 4" bitfld.long 0x10 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x10 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "VICVECTCNTL5,Vector Control Register 5" bitfld.long 0x14 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x14 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "VICVECTCNTL6,Vector Control Register 6" bitfld.long 0x18 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x18 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "VICVECTCNTL7,Vector Control Register 7" bitfld.long 0x1C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x1C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "VICVECTCNTL8,Vector Control Register 8" bitfld.long 0x20 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x20 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "VICVECTCNTL9,Vector Control Register 9" bitfld.long 0x24 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x24 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "VICVECTCNTL10,Vector Control Register 10" bitfld.long 0x28 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x28 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "VICVECTCNTL11,Vector Control Register 11" bitfld.long 0x2C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x2C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "VICVECTCNTL12,Vector Control Register 12" bitfld.long 0x30 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x30 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "VICVECTCNTL13,Vector Control Register 13" bitfld.long 0x34 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x34 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "VICVECTCNTL14,Vector Control Register 14" bitfld.long 0x38 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x38 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "VICVECTCNTL15,Vector Control Register 15" bitfld.long 0x3C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x3C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0xFE0++0x0F line.byte 0x00 "VICPERIPHID0,Peripheral Identification Register 0" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0" line.byte 0x04 "VICPERIPHID1,Peripheral Identification Register 1" hexmask.byte 0x04 4.--7. 1. " DESIGNER0 ,Identification of the designer 0" hexmask.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part number 1" line.byte 0x08 "VICPERIPHID2,Peripheral Identification Register 2" hexmask.byte 0x08 4.--7. 1. " REVISION ,Revision number" hexmask.byte 0x08 0.--3. 1. " DESIGNER1 ,Identification of the designer 1" line.byte 0x0C "VICPERIPHID3,Peripheral Identification Register 3" hexmask.byte 0x0C 0.--7. 1. " CONFIGURATION ,Configuration option of the peripheral" else rgroup.byte 0xFE0++0x00 line.byte 0x00 "VICPERIPHID0,Peripheral Identification Register 0" rgroup.byte 0xFE4++0x00 line.byte 0x00 "VICPERIPHID1,Peripheral Identification Register 1" rgroup.byte 0xFE8++0x00 line.byte 0x00 "VICPERIPHID2,Peripheral Identification Register 2" rgroup.byte 0xFEC++0x00 line.byte 0x00 "VICPERIPHID3,Peripheral Identification Register 3" endif rgroup.byte 0xFF0++0x00 line.byte 0x00 "VICPCELLID0,Prime Cell Identification 0" rgroup.byte 0xFF4++0x00 line.byte 0x00 "VICPCELLID1,Prime Cell Identification 1" rgroup.byte 0xFF8++0x00 line.byte 0x00 "VICPCELLID2,Prime Cell Identification 2" rgroup.byte 0xFFC++0x00 line.byte 0x00 "VICPCELLID3,Prime Cell Identification 3" width 0xb tree.end width 15. base asd:0xF1000000 tree "Secondary" rgroup.long 0x00++0x0b "VIC Interrupt Control Registers" line.long 0x00 "VICIRQSTATUS,Irq Status Register" bitfld.long 0x00 31. " IRQSTATUS[63] ,IRQ Status 63 (EXP_AHB_4)" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQSTATUS[62] ,IRQ Status 62 (EXP_AHB_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " IRQSTATUS[61] ,IRQ Status 61 (High Speed USB2 Host ctrl2-EHCI)" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQSTATUS[60] ,IRQ Status 60 (High Speed USB2 Host ctrl2-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQSTATUS[59] ,IRQ Status 59 (High Speed USB2 Host ctrl1-EHCI)" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQSTATUS[58] ,IRQ Status 58 (High Speed USB2 Host ctrl1-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQSTATUS[57] ,IRQ Status 57 (High Speed USB2 Device controller)" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQSTATUS[56] ,IRQ Status 56 (High Speed GMAC-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQSTATUS[55] ,IRQ Status 55 (High Speed GMAC-1_pmt)" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQSTATUS[54] ,IRQ Status 54 (AHB_EXP Slave)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " IRQSTATUS[52] ,IRQ Status 52 (Basic Sub-sys. Watchdog)" "No interrupt,Interrupt" bitfld.long 0x00 19. " IRQSTATUS[51] ,IRQ Status 51 (Basic Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 18. " IRQSTATUS[50] ,IRQ Status 50 (Basic Sub-sys. RTC)" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQSTATUS[49] ,IRQ Status 49 (Basic Sub-sys. Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " IRQSTATUS[48] ,IRQ Status 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "No interrupt,Interrupt" bitfld.long 0x00 15. " IRQSTATUS[47] ,IRQ Status 47 (EXP_AHB_2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " IRQSTATUS[46] ,IRQ Status 46 (EXP_AHB_1)" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQSTATUS[45] ,IRQ Status 45 (Basic Sub-sys. LCD controller)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " IRQSTATUS[44] ,IRQ Status 44 (Basic Sub-sys. SMI)" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQSTATUS[42] ,IRQ Status 42 (Basic Sub-sys. DMA-INTR)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " IRQSTATUS[41] ,IRQ Status 41 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQSTATUS[40] ,IRQ Status 40 (AHB_EXP Master)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQSTATUS[39] ,IRQ Status 39 (Application Reserved)" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQSTATUS[38] ,IRQ Status 38 (Application Sub-sys. ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " IRQSTATUS[37] ,IRQ Status 37 (Application Sub-sys. SPI3)" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQSTATUS[36] ,IRQ Status 36 (Application Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQSTATUS[35] ,IRQ Status 35 (Application Sub-sys. Timer2_2)" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQSTATUS[34] ,IRQ Status 34 (Application Sub-sys. Timer2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " IRQSTATUS[33] ,IRQ Status 33 (Application Sub-sys. Timer1_2)" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQSTATUS[32] ,IRQ Status 32 (Application Sub-sys. Timer1_1)" "No interrupt,Interrupt" line.long 0x04 "VICFIQSTATUS,Fiq Status Register" bitfld.long 0x04 31. " FIQSTATUS[63] ,FIQ Status 63 (EXP_AHB_4)" "No interrupt,Interrupt" bitfld.long 0x04 30. " FIQSTATUS[62] ,FIQ Status 62 (EXP_AHB_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " FIQSTATUS[61] ,FIQ Status 61 (High Speed USB2 Host ctrl2-EHCI)" "No interrupt,Interrupt" bitfld.long 0x04 28. " FIQSTATUS[60] ,FIQ Status 60 (High Speed USB2 Host ctrl2-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " FIQSTATUS[59] ,FIQ Status 59 (High Speed USB2 Host ctrl1-EHCI)" "No interrupt,Interrupt" bitfld.long 0x04 26. " FIQSTATUS[58] ,FIQ Status 58 (High Speed USB2 Host ctrl1-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " FIQSTATUS[57] ,FIQ Status 57 (High Speed USB2 Device controller)" "No interrupt,Interrupt" bitfld.long 0x04 24. " FIQSTATUS[56] ,FIQ Status 56 (High Speed GMAC-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " FIQSTATUS[55] ,FIQ Status 55 (High Speed GMAC-1_pmt)" "No interrupt,Interrupt" bitfld.long 0x04 22. " FIQSTATUS[54] ,FIQ Status 54 (AHB_EXP Slave)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " FIQSTATUS[52] ,FIQ Status 52 (Basic Sub-sys. Watchdog)" "No interrupt,Interrupt" bitfld.long 0x04 19. " FIQSTATUS[51] ,FIQ Status 51 (Basic Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 18. " FIQSTATUS[50] ,FIQ Status 50 (Basic Sub-sys. RTC)" "No interrupt,Interrupt" bitfld.long 0x04 17. " FIQSTATUS[49] ,FIQ Status 49 (Basic Sub-sys. Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " FIQSTATUS[48] ,FIQ Status 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "No interrupt,Interrupt" bitfld.long 0x04 15. " FIQSTATUS[47] ,FIQ Status 47 (EXP_AHB_2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " FIQSTATUS[46] ,FIQ Status 46 (EXP_AHB_1)" "No interrupt,Interrupt" bitfld.long 0x04 13. " FIQSTATUS[45] ,FIQ Status 45 (Basic Sub-sys. LCD controller)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " FIQSTATUS[44] ,FIQ Status 44 (Basic Sub-sys. SMI)" "No interrupt,Interrupt" bitfld.long 0x04 10. " FIQSTATUS[42] ,FIQ Status 42 (Basic Sub-sys. DMA-INTR)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " FIQSTATUS[41] ,FIQ Status 41 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x04 8. " FIQSTATUS[40] ,FIQ Status 40 (AHB_EXP Master)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " FIQSTATUS[39] ,FIQ Status 39 (Application Reserved)" "No interrupt,Interrupt" bitfld.long 0x04 6. " FIQSTATUS[38] ,FIQ Status 38 (Application Sub-sys. ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " FIQSTATUS[37] ,FIQ Status 37 (Application Sub-sys. SPI3)" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIQSTATUS[36] ,FIQ Status 36 (Application Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " FIQSTATUS[35] ,FIQ Status 35 (Application Sub-sys. Timer2_2)" "No interrupt,Interrupt" bitfld.long 0x04 2. " FIQSTATUS[34] ,FIQ Status 34 (Application Sub-sys. Timer2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " FIQSTATUS[33] ,FIQ Status 33 (Application Sub-sys. Timer1_2)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FIQSTATUS[32] ,FIQ Status 32 (Application Sub-sys. Timer1_1)" "No interrupt,Interrupt" line.long 0x08 "VICRAWINTR,Raw Interrupt Status Register" bitfld.long 0x08 31. " RAWINTERRUPT[63] ,Raw Interrupt Status 63 (EXP_AHB_4)" "No interrupt,Interrupt" bitfld.long 0x08 30. " RAWINTERRUPT[62] ,Raw Interrupt Status 62 (EXP_AHB_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 29. " RAWINTERRUPT[61] ,Raw Interrupt Status 61 (High Speed USB2 Host ctrl2-EHCI)" "No interrupt,Interrupt" bitfld.long 0x08 28. " RAWINTERRUPT[60] ,Raw Interrupt Status 60 (High Speed USB2 Host ctrl2-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 27. " RAWINTERRUPT[59] ,Raw Interrupt Status 59 (High Speed USB2 Host ctrl1-EHCI)" "No interrupt,Interrupt" bitfld.long 0x08 26. " RAWINTERRUPT[58] ,Raw Interrupt Status 58 (High Speed USB2 Host ctrl1-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " RAWINTERRUPT[57] ,Raw Interrupt Status 57 (High Speed USB2 Device controller)" "No interrupt,Interrupt" bitfld.long 0x08 24. " RAWINTERRUPT[56] ,Raw Interrupt Status 56 (High Speed GMAC-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 23. " RAWINTERRUPT[55] ,Raw Interrupt Status 55 (High Speed GMAC-1_pmt)" "No interrupt,Interrupt" bitfld.long 0x08 22. " RAWINTERRUPT[54] ,Raw Interrupt Status 54 (AHB_EXP Slave)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 20. " RAWINTERRUPT[52] ,Raw Interrupt Status 52 (Basic Sub-sys. Watchdog)" "No interrupt,Interrupt" bitfld.long 0x08 19. " RAWINTERRUPT[51] ,Raw Interrupt Status 51 (Basic Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 18. " RAWINTERRUPT[50] ,Raw Interrupt Status 50 (Basic Sub-sys. RTC)" "No interrupt,Interrupt" bitfld.long 0x08 17. " RAWINTERRUPT[49] ,Raw Interrupt Status 49 (Basic Sub-sys. Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " RAWINTERRUPT[48] ,Raw Interrupt Status 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "No interrupt,Interrupt" bitfld.long 0x08 15. " RAWINTERRUPT[47] ,Raw Interrupt Status 47 (EXP_AHB_2)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 14. " RAWINTERRUPT[46] ,Raw Interrupt Status 46 (EXP_AHB_1)" "No interrupt,Interrupt" bitfld.long 0x08 13. " RAWINTERRUPT[45] ,Raw Interrupt Status 45 (Basic Sub-sys. LCD controller)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 12. " RAWINTERRUPT[44] ,Raw Interrupt Status 44 (Basic Sub-sys. SMI)" "No interrupt,Interrupt" bitfld.long 0x08 10. " RAWINTERRUPT[42] ,Raw Interrupt Status 42 (Basic Sub-sys. DMA-INTR)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 9. " RAWINTERRUPT[41] ,Raw Interrupt Status 41 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x08 8. " RAWINTERRUPT[40] ,Raw Interrupt Status 40 (AHB_EXP Master)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " RAWINTERRUPT[39] ,Raw Interrupt Status 39 (Application Reserved)" "No interrupt,Interrupt" bitfld.long 0x08 6. " RAWINTERRUPT[38] ,Raw Interrupt Status 38 (Application Sub-sys. ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 5. " RAWINTERRUPT[37] ,Raw Interrupt Status 37 (Application Sub-sys. SPI3)" "No interrupt,Interrupt" bitfld.long 0x08 4. " RAWINTERRUPT[36] ,Raw Interrupt Status 36 (Application Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 3. " RAWINTERRUPT[35] ,Raw Interrupt Status 35 (Application Sub-sys. Timer2_2)" "No interrupt,Interrupt" bitfld.long 0x08 2. " RAWINTERRUPT[34] ,Raw Interrupt Status 34 (Application Sub-sys. Timer2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " RAWINTERRUPT[33] ,Raw Interrupt Status 33 (Application Sub-sys. Timer1_2)" "No interrupt,Interrupt" bitfld.long 0x08 0. " RAWINTERRUPT[32] ,Raw Interrupt Status 32 (Application Sub-sys. Timer1_1)" "No interrupt,Interrupt" group.long 0x0c++0x07 line.long 0x00 "VICINTSELECT,Interrupt Select Register" bitfld.long 0x00 31. " INTSELECT[63] ,Interrupt Select 63 (EXP_AHB_4)" "IRQ,FIQ" bitfld.long 0x00 30. " INTSELECT[62] ,Interrupt Select 62 (EXP_AHB_3)" "IRQ,FIQ" bitfld.long 0x00 29. " INTSELECT[61] ,Interrupt Select 61 (High Speed USB2 Host ctrl2-EHCI)" "IRQ,FIQ" textline " " bitfld.long 0x00 28. " INTSELECT[60] ,Interrupt Select 60 (High Speed USB2 Host ctrl2-OHCI)" "IRQ,FIQ" bitfld.long 0x00 27. " INTSELECT[59] ,Interrupt Select 59 (High Speed USB2 Host ctrl1-EHCI)" "IRQ,FIQ" bitfld.long 0x00 26. " INTSELECT[58] ,Interrupt Select 58 (High Speed USB2 Host ctrl1-OHCI)" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " INTSELECT[57] ,Interrupt Select 57 (High Speed USB2 Device controller)" "IRQ,FIQ" bitfld.long 0x00 24. " INTSELECT[56] ,Interrupt Select 56 (High Speed GMAC-2)" "IRQ,FIQ" bitfld.long 0x00 23. " INTSELECT[55] ,Interrupt Select 55 (High Speed GMAC-1_pmt)" "IRQ,FIQ" textline " " bitfld.long 0x00 22. " INTSELECT[54] ,Interrupt Select 54 (AHB_EXP Slave)" "IRQ,FIQ" bitfld.long 0x00 20. " INTSELECT[52] ,Interrupt Select 52 (Basic Sub-sys. Watchdog)" "IRQ,FIQ" bitfld.long 0x00 19. " INTSELECT[51] ,Interrupt Select 51 (Basic Sub-sys. GPIO)" "IRQ,FIQ" textline " " bitfld.long 0x00 18. " INTSELECT[50] ,Interrupt Select 50 (Basic Sub-sys. RTC)" "IRQ,FIQ" bitfld.long 0x00 17. " INTSELECT[49] ,Interrupt Select 49 (Basic Sub-sys. Timer 2)" "IRQ,FIQ" bitfld.long 0x00 16. " INTSELECT[48] ,Interrupt Select 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "IRQ,FIQ" textline " " bitfld.long 0x00 15. " INTSELECT[47] ,Interrupt Select 47 (EXP_AHB_2)" "IRQ,FIQ" bitfld.long 0x00 14. " INTSELECT[46] ,Interrupt Select 46 (EXP_AHB_1)" "IRQ,FIQ" bitfld.long 0x00 13. " INTSELECT[45] ,Interrupt Select 45 (Basic Sub-sys. LCD controller)" "IRQ,FIQ" textline " " bitfld.long 0x00 12. " INTSELECT[44] ,Interrupt Select 44 (Basic Sub-sys. SMI)" "IRQ,FIQ" bitfld.long 0x00 10. " INTSELECT[42] ,Interrupt Select 42 (Basic Sub-sys. DMA-INTR)" "IRQ,FIQ" bitfld.long 0x00 9. " INTSELECT[41] ,Interrupt Select 41 (DDR Controller)" "IRQ,FIQ" textline " " bitfld.long 0x00 8. " INTSELECT[40] ,Interrupt Select 40 (AHB_EXP Master)" "IRQ,FIQ" bitfld.long 0x00 7. " INTSELECT[39] ,Interrupt Select 39 (Application Reserved)" "IRQ,FIQ" bitfld.long 0x00 6. " INTSELECT[38] ,Interrupt Select 38 (Application Sub-sys. ADC)" "IRQ,FIQ" textline " " bitfld.long 0x00 5. " INTSELECT[37] ,Interrupt Select 37 (Application Sub-sys. SPI3)" "IRQ,FIQ" bitfld.long 0x00 4. " INTSELECT[36] ,Interrupt Select 36 (Application Sub-sys. GPIO)" "IRQ,FIQ" bitfld.long 0x00 3. " INTSELECT[35] ,Interrupt Select 35 (Application Sub-sys. Timer2_2)" "IRQ,FIQ" textline " " bitfld.long 0x00 2. " INTSELECT[34] ,Interrupt Select 34 (Application Sub-sys. Timer2_1)" "IRQ,FIQ" bitfld.long 0x00 1. " INTSELECT[33] ,Interrupt Select 33 (Application Sub-sys. Timer1_2)" "IRQ,FIQ" bitfld.long 0x00 0. " INTSELECT[32] ,Interrupt Select 32 (Application Sub-sys. Timer1_1)" "IRQ,FIQ" line.long 0x04 "VICINTENABLE,Interrupt Enable Register" bitfld.long 0x04 31. " INTENABLE[63] ,Interrupt Enable 63 (EXP_AHB_4)" "Disabled,Enabled" bitfld.long 0x04 30. " INTENABLE[62] ,Interrupt Enable 62 (EXP_AHB_3)" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " INTENABLE[61] ,Interrupt Enable 61 (High Speed USB2 Host ctrl2-EHCI)" "Disabled,Enabled" bitfld.long 0x04 28. " INTENABLE[60] ,Interrupt Enable 60 (High Speed USB2 Host ctrl2-OHCI)" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " INTENABLE[59] ,Interrupt Enable 59 (High Speed USB2 Host ctrl1-EHCI)" "Disabled,Enabled" bitfld.long 0x04 26. " INTENABLE[58] ,Interrupt Enable 58 (High Speed USB2 Host ctrl1-OHCI)" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " INTENABLE[57] ,Interrupt Enable 57 (High Speed USB2 Device controller)" "Disabled,Enabled" bitfld.long 0x04 24. " INTENABLE[56] ,Interrupt Enable 56 (High Speed GMAC-2)" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " INTENABLE[55] ,Interrupt Enable 55 (High Speed GMAC-1_pmt)" "Disabled,Enabled" bitfld.long 0x04 22. " INTENABLE[54] ,Interrupt Enable 54 (AHB_EXP Slave)" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " INTENABLE[52] ,Interrupt Enable 52 (Basic Sub-sys. Watchdog)" "Disabled,Enabled" bitfld.long 0x04 19. " INTENABLE[51] ,Interrupt Enable 51 (Basic Sub-sys. GPIO)" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " INTENABLE[50] ,Interrupt Enable 50 (Basic Sub-sys. RTC)" "Disabled,Enabled" bitfld.long 0x04 17. " INTENABLE[49] ,Interrupt Enable 49 (Basic Sub-sys. Timer 2)" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " INTENABLE[48] ,Interrupt Enable 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "Disabled,Enabled" bitfld.long 0x04 15. " INTENABLE[47] ,Interrupt Enable 47 (EXP_AHB_2)" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " INTENABLE[46] ,Interrupt Enable 46 (EXP_AHB_1)" "Disabled,Enabled" bitfld.long 0x04 13. " INTENABLE[45] ,Interrupt Enable 45 (Basic Sub-sys. LCD controller)" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " INTENABLE[44] ,Interrupt Enable 44 (Basic Sub-sys. SMI)" "Disabled,Enabled" bitfld.long 0x04 10. " INTENABLE[42] ,Interrupt Enable 42 (Basic Sub-sys. DMA-INTR)" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " INTENABLE[41] ,Interrupt Enable 41 (DDR Controller)" "Disabled,Enabled" bitfld.long 0x04 8. " INTENABLE[40] ,Interrupt Enable 40 (AHB_EXP Master)" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " INTENABLE[39] ,Interrupt Enable 39 (Application Reserved)" "Disabled,Enabled" bitfld.long 0x04 6. " INTENABLE[38] ,Interrupt Enable 38 (Application Sub-sys. ADC)" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INTENABLE[37] ,Interrupt Enable 37 (Application Sub-sys. SPI3)" "Disabled,Enabled" bitfld.long 0x04 4. " INTENABLE[36] ,Interrupt Enable 36 (Application Sub-sys. GPIO)" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " INTENABLE[35] ,Interrupt Enable 35 (Application Sub-sys. Timer2_2)" "Disabled,Enabled" bitfld.long 0x04 2. " INTENABLE[34] ,Interrupt Enable 34 (Application Sub-sys. Timer2_1)" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " INTENABLE[33] ,Interrupt Enable 33 (Application Sub-sys. Timer1_2)" "Disabled,Enabled" bitfld.long 0x04 0. " INTENABLE[32] ,Interrupt Enable 32 (Application Sub-sys. Timer1_1)" "Disabled,Enabled" wgroup.long 0x14++0x03 line.long 0x00 "VICINTENCLEAR,Interrupt Enable Clear Register" bitfld.long 0x00 31. " INTENABLECLEAR[63] ,Interrupt Enable Clear 63 (EXP_AHB_4)" "No effect,Clear" bitfld.long 0x00 30. " INTENABLECLEAR[62] ,Interrupt Enable Clear 62 (EXP_AHB_3)" "No effect,Clear" textline " " bitfld.long 0x00 29. " INTENABLECLEAR[61] ,Interrupt Enable Clear 61 (High Speed USB2 Host ctrl2-EHCI)" "No effect,Clear" bitfld.long 0x00 28. " INTENABLECLEAR[60] ,Interrupt Enable Clear 60 (High Speed USB2 Host ctrl2-OHCI)" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTENABLECLEAR[59] ,Interrupt Enable Clear 59 (High Speed USB2 Host ctrl1-EHCI)" "No effect,Clear" bitfld.long 0x00 26. " INTENABLECLEAR[58] ,Interrupt Enable Clear 58 (High Speed USB2 Host ctrl1-OHCI)" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTENABLECLEAR[57] ,Interrupt Enable Clear 57 (High Speed USB2 Device controller)" "No effect,Clear" bitfld.long 0x00 24. " INTENABLECLEAR[56] ,Interrupt Enable Clear 56 (High Speed GMAC-2)" "No effect,Clear" textline " " bitfld.long 0x00 23. " INTENABLECLEAR[55] ,Interrupt Enable Clear 55 (High Speed GMAC-1_pmt)" "No effect,Clear" bitfld.long 0x00 22. " INTENABLECLEAR[54] ,Interrupt Enable Clear 54 (AHB_EXP Slave)" "No effect,Clear" textline " " bitfld.long 0x00 20. " INTENABLECLEAR[52] ,Interrupt Enable Clear 52 (Basic Sub-sys. Watchdog)" "No effect,Clear" bitfld.long 0x00 19. " INTENABLECLEAR[51] ,Interrupt Enable Clear 51 (Basic Sub-sys. GPIO)" "No effect,Clear" textline " " bitfld.long 0x00 18. " INTENABLECLEAR[50] ,Interrupt Enable Clear 50 (Basic Sub-sys. RTC)" "No effect,Clear" bitfld.long 0x00 17. " INTENABLECLEAR[49] ,Interrupt Enable Clear 49 (Basic Sub-sys. Timer 2)" "No effect,Clear" textline " " bitfld.long 0x00 16. " INTENABLECLEAR[48] ,Interrupt Enable Clear 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "No effect,Clear" bitfld.long 0x00 15. " INTENABLECLEAR[47] ,Interrupt Enable Clear 47 (EXP_AHB_2)" "No effect,Clear" textline " " bitfld.long 0x00 14. " INTENABLECLEAR[46] ,Interrupt Enable Clear 46 (EXP_AHB_1)" "No effect,Clear" bitfld.long 0x00 13. " INTENABLECLEAR[45] ,Interrupt Enable Clear 45 (Basic Sub-sys. LCD controller)" "No effect,Clear" textline " " bitfld.long 0x00 12. " INTENABLECLEAR[44] ,Interrupt Enable Clear 44 (Basic Sub-sys. SMI)" "No effect,Clear" bitfld.long 0x00 10. " INTENABLECLEAR[42] ,Interrupt Enable Clear 42 (Basic Sub-sys. DMA-INTR)" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTENABLECLEAR[41] ,Interrupt Enable Clear 41 (DDR Controller)" "No effect,Clear" bitfld.long 0x00 8. " INTENABLECLEAR[40] ,Interrupt Enable Clear 40 (AHB_EXP Master)" "No effect,Clear" textline " " bitfld.long 0x00 7. " INTENABLECLEAR[39] ,Interrupt Enable Clear 39 (Application Reserved)" "No effect,Clear" bitfld.long 0x00 6. " INTENABLECLEAR[38] ,Interrupt Enable Clear 38 (Application Sub-sys. ADC)" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTENABLECLEAR[37] ,Interrupt Enable Clear 37 (Application Sub-sys. SPI3)" "No effect,Clear" bitfld.long 0x00 4. " INTENABLECLEAR[36] ,Interrupt Enable Clear 36 (Application Sub-sys. GPIO)" "No effect,Clear" textline " " bitfld.long 0x00 3. " INTENABLECLEAR[35] ,Interrupt Enable Clear 35 (Application Sub-sys. Timer2_2)" "No effect,Clear" bitfld.long 0x00 2. " INTENABLECLEAR[34] ,Interrupt Enable Clear 34 (Application Sub-sys. Timer2_1)" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTENABLECLEAR[33] ,Interrupt Enable Clear 33 (Application Sub-sys. Timer1_2)" "No effect,Clear" bitfld.long 0x00 0. " INTENABLECLEAR[32] ,Interrupt Enable Clear 32 (Application Sub-sys. Timer1_1)" "No effect,Clear" group.long 0x18++0x03 line.long 0x00 "VICSOFTINT,Software Interrupt Register" bitfld.long 0x00 31. " SOFTINT[63] ,Software Interrupt 63 (EXP_AHB_4)" "No interrupt,Interrupt" bitfld.long 0x00 30. " SOFTINT[62] ,Software Interrupt 62 (EXP_AHB_3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " SOFTINT[61] ,Software Interrupt 61 (High Speed USB2 Host ctrl2-EHCI)" "No interrupt,Interrupt" bitfld.long 0x00 28. " SOFTINT[60] ,Software Interrupt 60 (High Speed USB2 Host ctrl2-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SOFTINT[59] ,Software Interrupt 59 (High Speed USB2 Host ctrl1-EHCI)" "No interrupt,Interrupt" bitfld.long 0x00 26. " SOFTINT[58] ,Software Interrupt 58 (High Speed USB2 Host ctrl1-OHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " SOFTINT[57] ,Software Interrupt 57 (High Speed USB2 Device controller)" "No interrupt,Interrupt" bitfld.long 0x00 24. " SOFTINT[56] ,Software Interrupt 56 (High Speed GMAC-2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SOFTINT[55] ,Software Interrupt 55 (High Speed GMAC-1_pmt)" "No interrupt,Interrupt" bitfld.long 0x00 22. " SOFTINT[54] ,Software Interrupt 54 (AHB_EXP Slave)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " SOFTINT[52] ,Software Interrupt 52 (Basic Sub-sys. Watchdog)" "No interrupt,Interrupt" bitfld.long 0x00 19. " SOFTINT[51] ,Software Interrupt 51 (Basic Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 18. " SOFTINT[50] ,Software Interrupt 50 (Basic Sub-sys. RTC)" "No interrupt,Interrupt" bitfld.long 0x00 17. " SOFTINT[49] ,Software Interrupt 49 (Basic Sub-sys. Timer 2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " SOFTINT[48] ,Software Interrupt 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "No interrupt,Interrupt" bitfld.long 0x00 15. " SOFTINT[47] ,Software Interrupt 47 (EXP_AHB_2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " SOFTINT[46] ,Software Interrupt 46 (EXP_AHB_1)" "No interrupt,Interrupt" bitfld.long 0x00 13. " SOFTINT[45] ,Software Interrupt 45 (Basic Sub-sys. LCD controller)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " SOFTINT[44] ,Software Interrupt 44 (Basic Sub-sys. SMI)" "No interrupt,Interrupt" bitfld.long 0x00 10. " SOFTINT[42] ,Software Interrupt 42 (Basic Sub-sys. DMA-INTR)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " SOFTINT[41] ,Software Interrupt 41 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x00 8. " SOFTINT[40] ,Software Interrupt 40 (AHB_EXP Master)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " SOFTINT[39] ,Software Interrupt 39 (Application Reserved)" "No interrupt,Interrupt" bitfld.long 0x00 6. " SOFTINT[38] ,Software Interrupt 38 (Application Sub-sys. ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SOFTINT[37] ,Software Interrupt 37 (Application Sub-sys. SPI3)" "No interrupt,Interrupt" bitfld.long 0x00 4. " SOFTINT[36] ,Software Interrupt 36 (Application Sub-sys. GPIO)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " SOFTINT[35] ,Software Interrupt 35 (Application Sub-sys. Timer2_2)" "No interrupt,Interrupt" bitfld.long 0x00 2. " SOFTINT[34] ,Software Interrupt 34 (Application Sub-sys. Timer2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SOFTINT[33] ,Software Interrupt 33 (Application Sub-sys. Timer1_2)" "No interrupt,Interrupt" bitfld.long 0x00 0. " SOFTINT[32] ,Software Interrupt 32 (Application Sub-sys. Timer1_1)" "No interrupt,Interrupt" wgroup.long 0x1c++0x03 line.long 0x00 "VICSOFTINTCLEAR,Software Interrupt Clear Register" bitfld.long 0x00 31. " SOFTINTCLEAR[63] ,Software Interrupt Clear 63 (EXP_AHB_4)" "No effect,Clear" bitfld.long 0x00 30. " SOFTINTCLEAR[62] ,Software Interrupt Clear 62 (EXP_AHB_3)" "No effect,Clear" textline " " bitfld.long 0x00 29. " SOFTINTCLEAR[61] ,Software Interrupt Clear 61 (High Speed USB2 Host ctrl2-EHCI)" "No effect,Clear" bitfld.long 0x00 28. " SOFTINTCLEAR[60] ,Software Interrupt Clear 60 (High Speed USB2 Host ctrl2-OHCI)" "No effect,Clear" textline " " bitfld.long 0x00 27. " SOFTINTCLEAR[59] ,Software Interrupt Clear 59 (High Speed USB2 Host ctrl1-EHCI)" "No effect,Clear" bitfld.long 0x00 26. " SOFTINTCLEAR[58] ,Software Interrupt Clear 58 (High Speed USB2 Host ctrl1-OHCI)" "No effect,Clear" textline " " bitfld.long 0x00 25. " SOFTINTCLEAR[57] ,Software Interrupt Clear 57 (High Speed USB2 Device controller)" "No effect,Clear" bitfld.long 0x00 24. " SOFTINTCLEAR[56] ,Software Interrupt Clear 56 (High Speed GMAC-2)" "No effect,Clear" textline " " bitfld.long 0x00 23. " SOFTINTCLEAR[55] ,Software Interrupt Clear 55 (High Speed GMAC-1_pmt)" "No effect,Clear" bitfld.long 0x00 22. " SOFTINTCLEAR[54] ,Software Interrupt Clear 54 (AHB_EXP Slave)" "No effect,Clear" textline " " bitfld.long 0x00 20. " SOFTINTCLEAR[52] ,Software Interrupt Clear 52 (Basic Sub-sys. Watchdog)" "No effect,Clear" bitfld.long 0x00 19. " SOFTINTCLEAR[51] ,Software Interrupt Clear 51 (Basic Sub-sys. GPIO)" "No effect,Clear" textline " " bitfld.long 0x00 18. " SOFTINTCLEAR[50] ,Software Interrupt Clear 50 (Basic Sub-sys. RTC)" "No effect,Clear" bitfld.long 0x00 17. " SOFTINTCLEAR[49] ,Software Interrupt Clear 49 (Basic Sub-sys. Timer 2)" "No effect,Clear" textline " " bitfld.long 0x00 16. " SOFTINTCLEAR[48] ,Software Interrupt Clear 48 (Basic Sub-sys. Timer 1 (Opt.Wdog ARM2))" "No effect,Clear" bitfld.long 0x00 15. " SOFTINTCLEAR[47] ,Software Interrupt Clear 47 (EXP_AHB_2)" "No effect,Clear" textline " " bitfld.long 0x00 14. " SOFTINTCLEAR[46] ,Software Interrupt Clear 46 (EXP_AHB_1)" "No effect,Clear" bitfld.long 0x00 13. " SOFTINTCLEAR[45] ,Software Interrupt Clear 45 (Basic Sub-sys. LCD controller)" "No effect,Clear" textline " " bitfld.long 0x00 12. " SOFTINTCLEAR[44] ,Software Interrupt Clear 44 (Basic Sub-sys. SMI)" "No effect,Clear" bitfld.long 0x00 10. " SOFTINTCLEAR[42] ,Software Interrupt Clear 42 (Basic Sub-sys. DMA-INTR)" "No effect,Clear" textline " " bitfld.long 0x00 9. " SOFTINTCLEAR[41] ,Software Interrupt Clear 41 (DDR Controller)" "No effect,Clear" bitfld.long 0x00 8. " SOFTINTCLEAR[40] ,Software Interrupt Clear 40 (AHB_EXP Master)" "No effect,Clear" textline " " bitfld.long 0x00 7. " SOFTINTCLEAR[39] ,Software Interrupt Clear 39 (Application Reserved)" "No effect,Clear" bitfld.long 0x00 6. " SOFTINTCLEAR[38] ,Software Interrupt Clear 38 (Application Sub-sys. ADC)" "No effect,Clear" textline " " bitfld.long 0x00 5. " SOFTINTCLEAR[37] ,Software Interrupt Clear 37 (Application Sub-sys. SPI3)" "No effect,Clear" bitfld.long 0x00 4. " SOFTINTCLEAR[36] ,Software Interrupt Clear 36 (Application Sub-sys. GPIO)" "No effect,Clear" textline " " bitfld.long 0x00 3. " SOFTINTCLEAR[35] ,Software Interrupt Clear 35 (Application Sub-sys. Timer2_2)" "No effect,Clear" bitfld.long 0x00 2. " SOFTINTCLEAR[34] ,Software Interrupt Clear 34 (Application Sub-sys. Timer2_1)" "No effect,Clear" textline " " bitfld.long 0x00 1. " SOFTINTCLEAR[33] ,Software Interrupt Clear 33 (Application Sub-sys. Timer1_2)" "No effect,Clear" bitfld.long 0x00 0. " SOFTINTCLEAR[32] ,Software Interrupt Clear 32 (Application Sub-sys. Timer1_1)" "No effect,Clear" group.long 0x20++0x03 line.long 0x00 "VICPROTECTION,Protection Enable Register" bitfld.long 0x00 0. " Protection ,Enable/disable protected register access" "Disabled,Enabled" width 16. group.long 0x30++0x07 "VIC Vector Address Registers" line.long 0x00 "VICVECTADDR,Vector Address Register" line.long 0x4 "VICDEFVECTADDR,Default Vector Address Register" group.long 0x100--0x13f line.long 0x0 "VICVECTADDR0,Vector Address Register 0" line.long 0x4 "VICVECTADDR1,Vector Address Register 1" line.long 0x8 "VICVECTADDR2,Vector Address Register 2" line.long 0xC "VICVECTADDR3,Vector Address Register 3" line.long 0x10 "VICVECTADDR4,Vector Address Register 4" line.long 0x14 "VICVECTADDR5,Vector Address Register 5" line.long 0x18 "VICVECTADDR6,Vector Address Register 6" line.long 0x1C "VICVECTADDR7,Vector Address Register 7" line.long 0x20 "VICVECTADDR8,Vector Address Register 8" line.long 0x24 "VICVECTADDR9,Vector Address Register 9" line.long 0x28 "VICVECTADDR10,Vector Address Register 10" line.long 0x2C "VICVECTADDR11,Vector Address Register 11" line.long 0x30 "VICVECTADDR12,Vector Address Register 12" line.long 0x34 "VICVECTADDR13,Vector Address Register 13" line.long 0x38 "VICVECTADDR14,Vector Address Register 14" line.long 0x3C "VICVECTADDR15,Vector Address Register 15" group.long 0x200--0x23f "VIC Interrupt Vector Control Registers" line.long 0x0 "VICVECTCNTL0,Vector Control Register 0" bitfld.long 0x0 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x0 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4 "VICVECTCNTL1,Vector Control Register 1" bitfld.long 0x4 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x4 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8 "VICVECTCNTL2,Vector Control Register 2" bitfld.long 0x8 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x8 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC "VICVECTCNTL3,Vector Control Register 3" bitfld.long 0xC 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0xC 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "VICVECTCNTL4,Vector Control Register 4" bitfld.long 0x10 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x10 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "VICVECTCNTL5,Vector Control Register 5" bitfld.long 0x14 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x14 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "VICVECTCNTL6,Vector Control Register 6" bitfld.long 0x18 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x18 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "VICVECTCNTL7,Vector Control Register 7" bitfld.long 0x1C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x1C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "VICVECTCNTL8,Vector Control Register 8" bitfld.long 0x20 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x20 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "VICVECTCNTL9,Vector Control Register 9" bitfld.long 0x24 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x24 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "VICVECTCNTL10,Vector Control Register 10" bitfld.long 0x28 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x28 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "VICVECTCNTL11,Vector Control Register 11" bitfld.long 0x2C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x2C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "VICVECTCNTL12,Vector Control Register 12" bitfld.long 0x30 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x30 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "VICVECTCNTL13,Vector Control Register 13" bitfld.long 0x34 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x34 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "VICVECTCNTL14,Vector Control Register 14" bitfld.long 0x38 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x38 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "VICVECTCNTL15,Vector Control Register 15" bitfld.long 0x3C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x3C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0xFE0++0x0F line.byte 0x00 "VICPERIPHID0,Peripheral Identification Register 0" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0" line.byte 0x04 "VICPERIPHID1,Peripheral Identification Register 1" hexmask.byte 0x04 4.--7. 1. " DESIGNER0 ,Identification of the designer 0" hexmask.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part number 1" line.byte 0x08 "VICPERIPHID2,Peripheral Identification Register 2" hexmask.byte 0x08 4.--7. 1. " REVISION ,Revision number" hexmask.byte 0x08 0.--3. 1. " DESIGNER1 ,Identification of the designer 1" line.byte 0x0C "VICPERIPHID3,Peripheral Identification Register 3" hexmask.byte 0x0C 0.--7. 1. " CONFIGURATION ,Configuration option of the peripheral" else rgroup.byte 0xFE0++0x00 line.byte 0x00 "VICPERIPHID0,Peripheral Identification Register 0" rgroup.byte 0xFE4++0x00 line.byte 0x00 "VICPERIPHID1,Peripheral Identification Register 1" rgroup.byte 0xFE8++0x00 line.byte 0x00 "VICPERIPHID2,Peripheral Identification Register 2" rgroup.byte 0xFEC++0x00 line.byte 0x00 "VICPERIPHID3,Peripheral Identification Register 3" endif rgroup.byte 0xFF0++0x00 line.byte 0x00 "VICPCELLID0,Prime Cell Identification 0" rgroup.byte 0xFF4++0x00 line.byte 0x00 "VICPCELLID1,Prime Cell Identification 1" rgroup.byte 0xFF8++0x00 line.byte 0x00 "VICPCELLID2,Prime Cell Identification 2" rgroup.byte 0xFFC++0x00 line.byte 0x00 "VICPCELLID3,Prime Cell Identification 3" width 0xb tree.end width 0xb else width 17. rgroup.long 0x00++0x0b "VIC Interrupt Control Registers" line.long 0x00 "VICIRQSTATUS,Irq Status Register" bitfld.long 0x00 31. " IRQSTATUS[31] ,IRQ Status 31 (Application Subsystem C3 (Channel Control Coprocessor))" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQSTATUS[30] ,IRQ Status 30 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " IRQSTATUS[29] ,IRQ Status 29 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQSTATUS[28] ,IRQ Status 28 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQSTATUS[27] ,IRQ Status 27 (High Speed Subsystem USB Host 2 OHCI)" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQSTATUS[26] ,IRQ Status 26 (High Speed Subsystem USB Host EHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQSTATUS[25] ,IRQ Status 25 (High Speed Subsystem USB Host 1 OHCI)" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQSTATUS[24] ,IRQ Status 24 (High Speed Subsystem USB Device)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQSTATUS[23] ,IRQ Status 23 (High Speed Subsystem Ethernet MAC)" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQSTATUS[22] ,IRQ Status 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " IRQSTATUS[21] ,IRQ Status 21 (Low Speed Subsystem I2C)" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQSTATUS[20] ,IRQ Status 20 (Low Speed Subsystem SPI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQSTATUS[19] ,IRQ Status 19 (Low Speed Subsystem UART)" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQSTATUS[18] ,IRQ Status 18 (Low Speed Subsystem ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " IRQSTATUS[17] ,IRQ Status 17 (Low Speed Subsystem IrDA)" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQSTATUS[16] ,IRQ Status 16 (Low Speed Subsystem JPEG)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQSTATUS[15] ,IRQ Status 15 (Walk-up FIQ from RCG)" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQSTATUS[14] ,IRQ Status 14 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " IRQSTATUS[13] ,IRQ Status 13 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQSTATUS[12] ,IRQ Status 12 (Basic Subsystem WD)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQSTATUS[11] ,IRQ Status 11 (Basic Subsystem GPIO)" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQSTATUS[10] ,IRQ Status 10 (Basic Subsystem RTC)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " IRQSTATUS[9] ,IRQ Status 9 (Basic Subsystem SMI)" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQSTATUS[8] ,IRQ Status 8 (Basic Subsystem DMA)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQSTATUS[7] ,IRQ Status 7 (Basic Subsystem Timer 2_2)" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQSTATUS[6] ,IRQ Status 6 (Basic Subsystem Timer 2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " IRQSTATUS[5] ,IRQ Status 5 (Basic Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQSTATUS[4] ,IRQ Status 4 (Basic Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQSTATUS[3] ,IRQ Status 3 (CPU Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQSTATUS[2] ,IRQ Status 2 (CPU Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " IRQSTATUS[1] ,IRQ Status 1 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" width 15. line.long 0x04 "VICFIQSTATUS,Fiq Status Register" bitfld.long 0x04 31. " FIQSTATUS[31] ,FIQ Status 31 (Application Subsystem C3 (Channel Control Coprocessor))" "No interrupt,Interrupt" bitfld.long 0x04 30. " FIQSTATUS[30] ,FIQ Status 30 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " FIQSTATUS[29] ,FIQ Status 29 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" bitfld.long 0x04 28. " FIQSTATUS[28] ,FIQ Status 28 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " FIQSTATUS[27] ,FIQ Status 27 (High Speed Subsystem USB Host 2 OHCI)" "No interrupt,Interrupt" bitfld.long 0x04 26. " FIQSTATUS[26] ,FIQ Status 26 (High Speed Subsystem USB Host EHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " FIQSTATUS[25] ,FIQ Status 25 (High Speed Subsystem USB Host 1 OHCI)" "No interrupt,Interrupt" bitfld.long 0x04 24. " FIQSTATUS[24] ,FIQ Status 24 (High Speed Subsystem USB Device)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " FIQSTATUS[23] ,FIQ Status 23 (High Speed Subsystem Ethernet MAC)" "No interrupt,Interrupt" bitfld.long 0x04 22. " FIQSTATUS[22] ,FIQ Status 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " FIQSTATUS[21] ,FIQ Status 21 (Low Speed Subsystem I2C)" "No interrupt,Interrupt" bitfld.long 0x04 20. " FIQSTATUS[20] ,FIQ Status 20 (Low Speed Subsystem SPI)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " FIQSTATUS[19] ,FIQ Status 19 (Low Speed Subsystem UART)" "No interrupt,Interrupt" bitfld.long 0x04 18. " FIQSTATUS[18] ,FIQ Status 18 (Low Speed Subsystem ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " FIQSTATUS[17] ,FIQ Status 17 (Low Speed Subsystem IrDA)" "No interrupt,Interrupt" bitfld.long 0x04 16. " FIQSTATUS[16] ,FIQ Status 16 (Low Speed Subsystem JPEG)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " FIQSTATUS[15] ,FIQ Status 15 (Walk-up FIQ from RCG)" "No interrupt,Interrupt" bitfld.long 0x04 14. " FIQSTATUS[14] ,FIQ Status 14 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " FIQSTATUS[13] ,FIQ Status 13 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x04 12. " FIQSTATUS[12] ,FIQ Status 12 (Basic Subsystem WD)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " FIQSTATUS[11] ,FIQ Status 11 (Basic Subsystem GPIO)" "No interrupt,Interrupt" bitfld.long 0x04 10. " FIQSTATUS[10] ,FIQ Status 10 (Basic Subsystem RTC)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " FIQSTATUS[9] ,FIQ Status 9 (Basic Subsystem SMI)" "No interrupt,Interrupt" bitfld.long 0x04 8. " FIQSTATUS[8] ,FIQ Status 8 (Basic Subsystem DMA)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " FIQSTATUS[7] ,FIQ Status 7 (Basic Subsystem Timer 2_2)" "No interrupt,Interrupt" bitfld.long 0x04 6. " FIQSTATUS[6] ,FIQ Status 6 (Basic Subsystem Timer 2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " FIQSTATUS[5] ,FIQ Status 5 (Basic Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIQSTATUS[4] ,FIQ Status 4 (Basic Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " FIQSTATUS[3] ,FIQ Status 3 (CPU Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x04 2. " FIQSTATUS[2] ,FIQ Status 2 (CPU Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " FIQSTATUS[1] ,FIQ Status 1 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" width 15. line.long 0x08 "VICRAWINTR,Raw Interrupt Status Register" bitfld.long 0x08 31. " RAWINTERRUPT[31] ,Raw Interrupt Status 31 (Application Subsystem C3 (Channel Control Coprocessor))" "No interrupt,Interrupt" bitfld.long 0x08 30. " RAWINTERRUPT[30] ,Raw Interrupt Status 30 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 29. " RAWINTERRUPT[29] ,Raw Interrupt Status 29 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" bitfld.long 0x08 28. " RAWINTERRUPT[28] ,Raw Interrupt Status 28 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 27. " RAWINTERRUPT[27] ,Raw Interrupt Status 27 (High Speed Subsystem USB Host 2 OHCI)" "No interrupt,Interrupt" bitfld.long 0x08 26. " RAWINTERRUPT[26] ,Raw Interrupt Status 26 (High Speed Subsystem USB Host EHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " RAWINTERRUPT[25] ,Raw Interrupt Status 25 (High Speed Subsystem USB Host 1 OHCI)" "No interrupt,Interrupt" bitfld.long 0x08 24. " RAWINTERRUPT[24] ,Raw Interrupt Status 24 (High Speed Subsystem USB Device)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 23. " RAWINTERRUPT[23] ,Raw Interrupt Status 23 (High Speed Subsystem Ethernet MAC)" "No interrupt,Interrupt" bitfld.long 0x08 22. " RAWINTERRUPT[22] ,Raw Interrupt Status 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 21. " RAWINTERRUPT[21] ,Raw Interrupt Status 21 (Low Speed Subsystem I2C)" "No interrupt,Interrupt" bitfld.long 0x08 20. " RAWINTERRUPT[20] ,Raw Interrupt Status 20 (Low Speed Subsystem SPI)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " RAWINTERRUPT[19] ,Raw Interrupt Status 19 (Low Speed Subsystem UART)" "No interrupt,Interrupt" bitfld.long 0x08 18. " RAWINTERRUPT[18] ,Raw Interrupt Status 18 (Low Speed Subsystem ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 17. " RAWINTERRUPT[17] ,Raw Interrupt Status 17 (Low Speed Subsystem IrDA)" "No interrupt,Interrupt" bitfld.long 0x08 16. " RAWINTERRUPT[16] ,Raw Interrupt Status 16 (Low Speed Subsystem JPEG)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 15. " RAWINTERRUPT[15] ,Raw Interrupt Status 15 (Walk-up FIQ from RCG)" "No interrupt,Interrupt" bitfld.long 0x08 14. " RAWINTERRUPT[14] ,Raw Interrupt Status 14 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " RAWINTERRUPT[13] ,Raw Interrupt Status 13 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x08 12. " RAWINTERRUPT[12] ,Raw Interrupt Status 12 (Basic Subsystem WD)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 11. " RAWINTERRUPT[11] ,Raw Interrupt Status 11 (Basic Subsystem GPIO)" "No interrupt,Interrupt" bitfld.long 0x08 10. " RAWINTERRUPT[10] ,Raw Interrupt Status 10 (Basic Subsystem RTC)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 9. " RAWINTERRUPT[9] ,Raw Interrupt Status 9 (Basic Subsystem SMI)" "No interrupt,Interrupt" bitfld.long 0x08 8. " RAWINTERRUPT[8] ,Raw Interrupt Status 8 (Basic Subsystem DMA)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " RAWINTERRUPT[7] ,Raw Interrupt Status 7 (Basic Subsystem Timer 2_2)" "No interrupt,Interrupt" bitfld.long 0x08 6. " RAWINTERRUPT[6] ,Raw Interrupt Status 6 (Basic Subsystem Timer 2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 5. " RAWINTERRUPT[5] ,Raw Interrupt Status 5 (Basic Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x08 4. " RAWINTERRUPT[4] ,Raw Interrupt Status 4 (Basic Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 3. " RAWINTERRUPT[3] ,Raw Interrupt Status 3 (CPU Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x08 2. " RAWINTERRUPT[2] ,Raw Interrupt Status 2 (CPU Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " RAWINTERRUPT[1] ,Raw Interrupt Status 1 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" width 15. group.long 0x0c++0x07 line.long 0x00 "VICINTSELECT,Interrupt Select Register" bitfld.long 0x00 31. " INTSELECT[31] ,Interrupt Select 31 (Application Subsystem C3 (Channel Control Coprocessor))" "IRQ,FIQ" bitfld.long 0x00 30. " INTSELECT[30] ,Interrupt Select 30 (Generic Interrupt RAS-3)" "IRQ,FIQ" bitfld.long 0x00 29. " INTSELECT[29] ,Interrupt Select 29 (Generic Interrupt RAS-2)" "IRQ,FIQ" textline " " bitfld.long 0x00 28. " INTSELECT[28] ,Interrupt Select 28 (Generic Interrupt RAS-1)" "IRQ,FIQ" bitfld.long 0x00 27. " INTSELECT[27] ,Interrupt Select 27 (High Speed Subsystem USB Host 2 OHCI)" "IRQ,FIQ" bitfld.long 0x00 26. " INTSELECT[26] ,Interrupt Select 26 (High Speed Subsystem USB Host EHCI)" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " INTSELECT[25] ,Interrupt Select 25 (High Speed Subsystem USB Host 1 OHCI)" "IRQ,FIQ" bitfld.long 0x00 24. " INTSELECT[24] ,Interrupt Select 24 (High Speed Subsystem USB Device)" "IRQ,FIQ" bitfld.long 0x00 23. " INTSELECT[23] ,Interrupt Select 23 (High Speed Subsystem Ethernet MAC)" "IRQ,FIQ" textline " " bitfld.long 0x00 22. " INTSELECT[22] ,Interrupt Select 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "IRQ,FIQ" bitfld.long 0x00 21. " INTSELECT[21] ,Interrupt Select 21 (Low Speed Subsystem I2C)" "IRQ,FIQ" bitfld.long 0x00 20. " INTSELECT[20] ,Interrupt Select 20 (Low Speed Subsystem SPI)" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " INTSELECT[19] ,Interrupt Select 19 (Low Speed Subsystem UART)" "IRQ,FIQ" bitfld.long 0x00 18. " INTSELECT[18] ,Interrupt Select 18 (Low Speed Subsystem ADC)" "IRQ,FIQ" bitfld.long 0x00 17. " INTSELECT[17] ,Interrupt Select 17 (Low Speed Subsystem IrDA)" "IRQ,FIQ" textline " " bitfld.long 0x00 16. " INTSELECT[16] ,Interrupt Select 16 (Low Speed Subsystem JPEG)" "IRQ,FIQ" bitfld.long 0x00 15. " INTSELECT[15] ,Interrupt Select 15 (Walk-up FIQ from RCG)" "IRQ,FIQ" bitfld.long 0x00 14. " INTSELECT[14] ,Interrupt Select 14 (System Error)" "IRQ,FIQ" textline " " bitfld.long 0x00 13. " INTSELECT[13] ,Interrupt Select 13 (DDR Controller)" "IRQ,FIQ" bitfld.long 0x00 12. " INTSELECT[12] ,Interrupt Select 12 (Basic Subsystem WD)" "IRQ,FIQ" bitfld.long 0x00 11. " INTSELECT[11] ,Interrupt Select 11 (Basic Subsystem GPIO)" "IRQ,FIQ" textline " " bitfld.long 0x00 10. " INTSELECT[10] ,Interrupt Select 10 (Basic Subsystem RTC)" "IRQ,FIQ" bitfld.long 0x00 9. " INTSELECT[9] ,Interrupt Select 9 (Basic Subsystem SMI)" "IRQ,FIQ" bitfld.long 0x00 8. " INTSELECT[8] ,Interrupt Select 8 (Basic Subsystem DMA)" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " INTSELECT[7] ,Interrupt Select 7 (Basic Subsystem Timer 2_2)" "IRQ,FIQ" bitfld.long 0x00 6. " INTSELECT[6] ,Interrupt Select 6 (Basic Subsystem Timer 2_1)" "IRQ,FIQ" bitfld.long 0x00 5. " INTSELECT[5] ,Interrupt Select 5 (Basic Subsystem Timer 1_2)" "IRQ,FIQ" textline " " bitfld.long 0x00 4. " INTSELECT[4] ,Interrupt Select 4 (Basic Subsystem Timer 1_1)" "IRQ,FIQ" bitfld.long 0x00 3. " INTSELECT[3] ,Interrupt Select 3 (CPU Subsystem Timer 1_2)" "IRQ,FIQ" bitfld.long 0x00 2. " INTSELECT[2] ,Interrupt Select 2 (CPU Subsystem Timer 1_1)" "IRQ,FIQ" textline " " bitfld.long 0x00 1. " INTSELECT[1] ,Interrupt Select 1 (Generic Interrupt RAS-4)" "IRQ,FIQ" width 15. line.long 0x04 "VICINTENABLE,Interrupt Enable Register" bitfld.long 0x04 31. " INTENABLE[31] ,Interrupt Enable 31 (Application Subsystem C3 (Channel Control Coprocessor))" "Disabled,Enabled" bitfld.long 0x04 30. " INTENABLE[30] ,Interrupt Enable 30 (Generic Interrupt RAS-3)" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " INTENABLE[29] ,Interrupt Enable 29 (Generic Interrupt RAS-2)" "Disabled,Enabled" bitfld.long 0x04 28. " INTENABLE[28] ,Interrupt Enable 28 (Generic Interrupt RAS-1)" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " INTENABLE[27] ,Interrupt Enable 27 (High Speed Subsystem USB Host 2 OHCI)" "Disabled,Enabled" bitfld.long 0x04 26. " INTENABLE[26] ,Interrupt Enable 26 (High Speed Subsystem USB Host EHCI)" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " INTENABLE[25] ,Interrupt Enable 25 (High Speed Subsystem USB Host 1 OHCI)" "Disabled,Enabled" bitfld.long 0x04 24. " INTENABLE[24] ,Interrupt Enable 24 (High Speed Subsystem USB Device)" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " INTENABLE[23] ,Interrupt Enable 23 (High Speed Subsystem Ethernet MAC)" "Disabled,Enabled" bitfld.long 0x04 22. " INTENABLE[22] ,Interrupt Enable 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " INTENABLE[21] ,Interrupt Enable 21 (Low Speed Subsystem I2C)" "Disabled,Enabled" bitfld.long 0x04 20. " INTENABLE[20] ,Interrupt Enable 20 (Low Speed Subsystem SPI)" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " INTENABLE[19] ,Interrupt Enable 19 (Low Speed Subsystem UART)" "Disabled,Enabled" bitfld.long 0x04 18. " INTENABLE[18] ,Interrupt Enable 18 (Low Speed Subsystem ADC)" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " INTENABLE[17] ,Interrupt Enable 17 (Low Speed Subsystem IrDA)" "Disabled,Enabled" bitfld.long 0x04 16. " INTENABLE[16] ,Interrupt Enable 16 (Low Speed Subsystem JPEG)" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " INTENABLE[15] ,Interrupt Enable 15 (Walk-up FIQ from RCG)" "Disabled,Enabled" bitfld.long 0x04 14. " INTENABLE[14] ,Interrupt Enable 14 (System Error)" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " INTENABLE[13] ,Interrupt Enable 13 (DDR Controller)" "Disabled,Enabled" bitfld.long 0x04 12. " INTENABLE[12] ,Interrupt Enable 12 (Basic Subsystem WD)" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " INTENABLE[11] ,Interrupt Enable 11 (Basic Subsystem GPIO)" "Disabled,Enabled" bitfld.long 0x04 10. " INTENABLE[10] ,Interrupt Enable 10 (Basic Subsystem RTC)" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " INTENABLE[9] ,Interrupt Enable 9 (Basic Subsystem SMI)" "Disabled,Enabled" bitfld.long 0x04 8. " INTENABLE[8] ,Interrupt Enable 8 (Basic Subsystem DMA)" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " INTENABLE[7] ,Interrupt Enable 7 (Basic Subsystem Timer 2_2)" "Disabled,Enabled" bitfld.long 0x04 6. " INTENABLE[6] ,Interrupt Enable 6 (Basic Subsystem Timer 2_1)" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INTENABLE[5] ,Interrupt Enable 5 (Basic Subsystem Timer 1_2)" "Disabled,Enabled" bitfld.long 0x04 4. " INTENABLE[4] ,Interrupt Enable 4 (Basic Subsystem Timer 1_1)" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " INTENABLE[3] ,Interrupt Enable 3 (CPU Subsystem Timer 1_2)" "Disabled,Enabled" bitfld.long 0x04 2. " INTENABLE[2] ,Interrupt Enable 2 (CPU Subsystem Timer 1_1)" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " INTENABLE[1] ,Interrupt Enable 1 (Generic Interrupt RAS-4)" "Disabled,Enabled" width 15. wgroup.long 0x14++0x03 line.long 0x00 "VICINTENCLEAR,Interrupt Enable Clear Register" bitfld.long 0x00 31. " INTENABLECLEAR[31] ,Interrupt Enable Clear 31 (Application Subsystem C3 (Channel Control Coprocessor))" "No effect,Clear" bitfld.long 0x00 30. " INTENABLECLEAR[30] ,Interrupt Enable Clear 30 (Generic Interrupt RAS-3)" "No effect,Clear" textline " " bitfld.long 0x00 29. " INTENABLECLEAR[29] ,Interrupt Enable Clear 29 (Generic Interrupt RAS-2)" "No effect,Clear" bitfld.long 0x00 28. " INTENABLECLEAR[28] ,Interrupt Enable Clear 28 (Generic Interrupt RAS-1)" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTENABLECLEAR[27] ,Interrupt Enable Clear 27 (High Speed Subsystem USB Host 2 OHCI)" "No effect,Clear" bitfld.long 0x00 26. " INTENABLECLEAR[26] ,Interrupt Enable Clear 26 (High Speed Subsystem USB Host EHCI)" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTENABLECLEAR[25] ,Interrupt Enable Clear 25 (High Speed Subsystem USB Host 1 OHCI)" "No effect,Clear" bitfld.long 0x00 24. " INTENABLECLEAR[24] ,Interrupt Enable Clear 24 (High Speed Subsystem USB Device)" "No effect,Clear" textline " " bitfld.long 0x00 23. " INTENABLECLEAR[23] ,Interrupt Enable Clear 23 (High Speed Subsystem Ethernet MAC)" "No effect,Clear" bitfld.long 0x00 22. " INTENABLECLEAR[22] ,Interrupt Enable Clear 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTENABLECLEAR[21] ,Interrupt Enable Clear 21 (Low Speed Subsystem I2C)" "No effect,Clear" bitfld.long 0x00 20. " INTENABLECLEAR[20] ,Interrupt Enable Clear 20 (Low Speed Subsystem SPI)" "No effect,Clear" textline " " bitfld.long 0x00 19. " INTENABLECLEAR[19] ,Interrupt Enable Clear 19 (Low Speed Subsystem UART)" "No effect,Clear" bitfld.long 0x00 18. " INTENABLECLEAR[18] ,Interrupt Enable Clear 18 (Low Speed Subsystem ADC)" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTENABLECLEAR[17] ,Interrupt Enable Clear 17 (Low Speed Subsystem IrDA)" "No effect,Clear" bitfld.long 0x00 16. " INTENABLECLEAR[16] ,Interrupt Enable Clear 16 (Low Speed Subsystem JPEG)" "No effect,Clear" textline " " bitfld.long 0x00 15. " INTENABLECLEAR[15] ,Interrupt Enable Clear 15 (Walk-up FIQ from RCG)" "No effect,Clear" bitfld.long 0x00 14. " INTENABLECLEAR[14] ,Interrupt Enable Clear 14 (System Error)" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTENABLECLEAR[13] ,Interrupt Enable Clear 13 (DDR Controller)" "No effect,Clear" bitfld.long 0x00 12. " INTENABLECLEAR[12] ,Interrupt Enable Clear 12 (Basic Subsystem WD)" "No effect,Clear" textline " " bitfld.long 0x00 11. " INTENABLECLEAR[11] ,Interrupt Enable Clear 11 (Basic Subsystem GPIO)" "No effect,Clear" bitfld.long 0x00 10. " INTENABLECLEAR[10] ,Interrupt Enable Clear 10 (Basic Subsystem RTC)" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTENABLECLEAR[9] ,Interrupt Enable Clear 9 (Basic Subsystem SMI)" "No effect,Clear" bitfld.long 0x00 8. " INTENABLECLEAR[8] ,Interrupt Enable Clear 8 (Basic Subsystem DMA)" "No effect,Clear" textline " " bitfld.long 0x00 7. " INTENABLECLEAR[7] ,Interrupt Enable Clear 7 (Basic Subsystem Timer 2_2)" "No effect,Clear" bitfld.long 0x00 6. " INTENABLECLEAR[6] ,Interrupt Enable Clear 6 (Basic Subsystem Timer 2_1)" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTENABLECLEAR[5] ,Interrupt Enable Clear 5 (Basic Subsystem Timer 1_2)" "No effect,Clear" bitfld.long 0x00 4. " INTENABLECLEAR[4] ,Interrupt Enable Clear 4 (Basic Subsystem Timer 1_1)" "No effect,Clear" textline " " bitfld.long 0x00 3. " INTENABLECLEAR[3] ,Interrupt Enable Clear 3 (CPU Subsystem Timer 1_2)" "No effect,Clear" bitfld.long 0x00 2. " INTENABLECLEAR[2] ,Interrupt Enable Clear 2 (CPU Subsystem Timer 1_1)" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTENABLECLEAR[1] ,Interrupt Enable Clear 1 (Generic Interrupt RAS-4)" "No effect,Clear" width 15. group.long 0x18++0x03 line.long 0x00 "VICSOFTINT,Software Interrupt Register" bitfld.long 0x00 31. " SOFTINT[31] ,Software Interrupt 31 (Application Subsystem C3 (Channel Control Coprocessor))" "No interrupt,Interrupt" bitfld.long 0x00 30. " SOFTINT[30] ,Software Interrupt 30 (Generic Interrupt RAS-3)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " SOFTINT[29] ,Software Interrupt 29 (Generic Interrupt RAS-2)" "No interrupt,Interrupt" bitfld.long 0x00 28. " SOFTINT[28] ,Software Interrupt 28 (Generic Interrupt RAS-1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SOFTINT[27] ,Software Interrupt 27 (High Speed Subsystem USB Host 2 OHCI)" "No interrupt,Interrupt" bitfld.long 0x00 26. " SOFTINT[26] ,Software Interrupt 26 (High Speed Subsystem USB Host EHCI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " SOFTINT[25] ,Software Interrupt 25 (High Speed Subsystem USB Host 1 OHCI)" "No interrupt,Interrupt" bitfld.long 0x00 24. " SOFTINT[24] ,Software Interrupt 24 (High Speed Subsystem USB Device)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SOFTINT[23] ,Software Interrupt 23 (High Speed Subsystem Ethernet MAC)" "No interrupt,Interrupt" bitfld.long 0x00 22. " SOFTINT[22] ,Software Interrupt 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " SOFTINT[21] ,Software Interrupt 21 (Low Speed Subsystem I2C)" "No interrupt,Interrupt" bitfld.long 0x00 20. " SOFTINT[20] ,Software Interrupt 20 (Low Speed Subsystem SPI)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SOFTINT[19] ,Software Interrupt 19 (Low Speed Subsystem UART)" "No interrupt,Interrupt" bitfld.long 0x00 18. " SOFTINT[18] ,Software Interrupt 18 (Low Speed Subsystem ADC)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " SOFTINT[17] ,Software Interrupt 17 (Low Speed Subsystem IrDA)" "No interrupt,Interrupt" bitfld.long 0x00 16. " SOFTINT[16] ,Software Interrupt 16 (Low Speed Subsystem JPEG)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SOFTINT[15] ,Software Interrupt 15 (Walk-up FIQ from RCG)" "No interrupt,Interrupt" bitfld.long 0x00 14. " SOFTINT[14] ,Software Interrupt 14 (System Error)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " SOFTINT[13] ,Software Interrupt 13 (DDR Controller)" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOFTINT[12] ,Software Interrupt 12 (Basic Subsystem WD)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " SOFTINT[11] ,Software Interrupt 11 (Basic Subsystem GPIO)" "No interrupt,Interrupt" bitfld.long 0x00 10. " SOFTINT[10] ,Software Interrupt 10 (Basic Subsystem RTC)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " SOFTINT[9] ,Software Interrupt 9 (Basic Subsystem SMI)" "No interrupt,Interrupt" bitfld.long 0x00 8. " SOFTINT[8] ,Software Interrupt 8 (Basic Subsystem DMA)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " SOFTINT[7] ,Software Interrupt 7 (Basic Subsystem Timer 2_2)" "No interrupt,Interrupt" bitfld.long 0x00 6. " SOFTINT[6] ,Software Interrupt 6 (Basic Subsystem Timer 2_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SOFTINT[5] ,Software Interrupt 5 (Basic Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x00 4. " SOFTINT[4] ,Software Interrupt 4 (Basic Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " SOFTINT[3] ,Software Interrupt 3 (CPU Subsystem Timer 1_2)" "No interrupt,Interrupt" bitfld.long 0x00 2. " SOFTINT[2] ,Software Interrupt 2 (CPU Subsystem Timer 1_1)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SOFTINT[1] ,Software Interrupt 1 (Generic Interrupt RAS-4)" "No interrupt,Interrupt" width 15. wgroup.long 0x1c++0x03 line.long 0x00 "VICSOFTINTCLEAR,Software Interrupt Clear Register" bitfld.long 0x00 31. " SOFTINTCLEAR[31] ,Software Interrupt Clear 31 (Application Subsystem C3 (Channel Control Coprocessor))" "No effect,Clear" bitfld.long 0x00 30. " SOFTINTCLEAR[30] ,Software Interrupt Clear 30 (Generic Interrupt RAS-3)" "No effect,Clear" textline " " bitfld.long 0x00 29. " SOFTINTCLEAR[29] ,Software Interrupt Clear 29 (Generic Interrupt RAS-2)" "No effect,Clear" bitfld.long 0x00 28. " SOFTINTCLEAR[28] ,Software Interrupt Clear 28 (Generic Interrupt RAS-1)" "No effect,Clear" textline " " bitfld.long 0x00 27. " SOFTINTCLEAR[27] ,Software Interrupt Clear 27 (High Speed Subsystem USB Host 2 OHCI)" "No effect,Clear" bitfld.long 0x00 26. " SOFTINTCLEAR[26] ,Software Interrupt Clear 26 (High Speed Subsystem USB Host EHCI)" "No effect,Clear" textline " " bitfld.long 0x00 25. " SOFTINTCLEAR[25] ,Software Interrupt Clear 25 (High Speed Subsystem USB Host 1 OHCI)" "No effect,Clear" bitfld.long 0x00 24. " SOFTINTCLEAR[24] ,Software Interrupt Clear 24 (High Speed Subsystem USB Device)" "No effect,Clear" textline " " bitfld.long 0x00 23. " SOFTINTCLEAR[23] ,Software Interrupt Clear 23 (High Speed Subsystem Ethernet MAC)" "No effect,Clear" bitfld.long 0x00 22. " SOFTINTCLEAR[22] ,Software Interrupt Clear 22 (High Speed Subsystem Ethernet MAC/Power Management Event)" "No effect,Clear" textline " " bitfld.long 0x00 21. " SOFTINTCLEAR[21] ,Software Interrupt Clear 21 (Low Speed Subsystem I2C)" "No effect,Clear" bitfld.long 0x00 20. " SOFTINTCLEAR[20] ,Software Interrupt Clear 20 (Low Speed Subsystem SPI)" "No effect,Clear" textline " " bitfld.long 0x00 19. " SOFTINTCLEAR[19] ,Software Interrupt Clear 19 (Low Speed Subsystem UART)" "No effect,Clear" bitfld.long 0x00 18. " SOFTINTCLEAR[18] ,Software Interrupt Clear 18 (Low Speed Subsystem ADC)" "No effect,Clear" textline " " bitfld.long 0x00 17. " SOFTINTCLEAR[17] ,Software Interrupt Clear 17 (Low Speed Subsystem IrDA)" "No effect,Clear" bitfld.long 0x00 16. " SOFTINTCLEAR[16] ,Software Interrupt Clear 16 (Low Speed Subsystem JPEG)" "No effect,Clear" textline " " bitfld.long 0x00 15. " SOFTINTCLEAR[15] ,Software Interrupt Clear 15 (Walk-up FIQ from RCG)" "No effect,Clear" bitfld.long 0x00 14. " SOFTINTCLEAR[14] ,Software Interrupt Clear 14 (System Error)" "No effect,Clear" textline " " bitfld.long 0x00 13. " SOFTINTCLEAR[13] ,Software Interrupt Clear 13 (DDR Controller)" "No effect,Clear" bitfld.long 0x00 12. " SOFTINTCLEAR[12] ,Software Interrupt Clear 12 (Basic Subsystem WD)" "No effect,Clear" textline " " bitfld.long 0x00 11. " SOFTINTCLEAR[11] ,Software Interrupt Clear 11 (Basic Subsystem GPIO)" "No effect,Clear" bitfld.long 0x00 10. " SOFTINTCLEAR[10] ,Software Interrupt Clear 10 (Basic Subsystem RTC)" "No effect,Clear" textline " " bitfld.long 0x00 9. " SOFTINTCLEAR[9] ,Software Interrupt Clear 9 (Basic Subsystem SMI)" "No effect,Clear" bitfld.long 0x00 8. " SOFTINTCLEAR[8] ,Software Interrupt Clear 8 (Basic Subsystem DMA)" "No effect,Clear" textline " " bitfld.long 0x00 7. " SOFTINTCLEAR[7] ,Software Interrupt Clear 7 (Basic Subsystem Timer 2_2)" "No effect,Clear" bitfld.long 0x00 6. " SOFTINTCLEAR[6] ,Software Interrupt Clear 6 (Basic Subsystem Timer 2_1)" "No effect,Clear" textline " " bitfld.long 0x00 5. " SOFTINTCLEAR[5] ,Software Interrupt Clear 5 (Basic Subsystem Timer 1_2)" "No effect,Clear" bitfld.long 0x00 4. " SOFTINTCLEAR[4] ,Software Interrupt Clear 4 (Basic Subsystem Timer 1_1)" "No effect,Clear" textline " " bitfld.long 0x00 3. " SOFTINTCLEAR[3] ,Software Interrupt Clear 3 (CPU Subsystem Timer 1_2)" "No effect,Clear" bitfld.long 0x00 2. " SOFTINTCLEAR[2] ,Software Interrupt Clear 2 (CPU Subsystem Timer 1_1)" "No effect,Clear" textline " " bitfld.long 0x00 1. " SOFTINTCLEAR[1] ,Software Interrupt Clear 1 (Generic Interrupt RAS-4)" "No effect,Clear" group.long 0x20++0x03 line.long 0x00 "VICPROTECTION,Protection Enable Register" bitfld.long 0x00 0. " PROTECTION ,Enable/disable protected register access" "Disabled,Enabled" width 16. group.long 0x30++0x07 "VIC Vector Address Registers" line.long 0x00 "VICVECTADDR,Vector Address Register" line.long 0x4 "VICDEFVECTADDR,Default Vector Address Register" group.long 0x100--0x13f line.long 0x0 "VICVECTADDR0,Vector Address Register 0" line.long 0x4 "VICVECTADDR1,Vector Address Register 1" line.long 0x8 "VICVECTADDR2,Vector Address Register 2" line.long 0xC "VICVECTADDR3,Vector Address Register 3" line.long 0x10 "VICVECTADDR4,Vector Address Register 4" line.long 0x14 "VICVECTADDR5,Vector Address Register 5" line.long 0x18 "VICVECTADDR6,Vector Address Register 6" line.long 0x1C "VICVECTADDR7,Vector Address Register 7" line.long 0x20 "VICVECTADDR8,Vector Address Register 8" line.long 0x24 "VICVECTADDR9,Vector Address Register 9" line.long 0x28 "VICVECTADDR10,Vector Address Register 10" line.long 0x2C "VICVECTADDR11,Vector Address Register 11" line.long 0x30 "VICVECTADDR12,Vector Address Register 12" line.long 0x34 "VICVECTADDR13,Vector Address Register 13" line.long 0x38 "VICVECTADDR14,Vector Address Register 14" line.long 0x3C "VICVECTADDR15,Vector Address Register 15" group.long 0x200--0x23f "VIC Interrupt Vector Control Registers" line.long 0x0 "VICVECTCNTL0,Vector Control Register 0" bitfld.long 0x0 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x0 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4 "VICVECTCNTL1,Vector Control Register 1" bitfld.long 0x4 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x4 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8 "VICVECTCNTL2,Vector Control Register 2" bitfld.long 0x8 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x8 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC "VICVECTCNTL3,Vector Control Register 3" bitfld.long 0xC 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0xC 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "VICVECTCNTL4,Vector Control Register 4" bitfld.long 0x10 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x10 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "VICVECTCNTL5,Vector Control Register 5" bitfld.long 0x14 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x14 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "VICVECTCNTL6,Vector Control Register 6" bitfld.long 0x18 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x18 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "VICVECTCNTL7,Vector Control Register 7" bitfld.long 0x1C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x1C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "VICVECTCNTL8,Vector Control Register 8" bitfld.long 0x20 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x20 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "VICVECTCNTL9,Vector Control Register 9" bitfld.long 0x24 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x24 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "VICVECTCNTL10,Vector Control Register 10" bitfld.long 0x28 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x28 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "VICVECTCNTL11,Vector Control Register 11" bitfld.long 0x2C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x2C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "VICVECTCNTL12,Vector Control Register 12" bitfld.long 0x30 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x30 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "VICVECTCNTL13,Vector Control Register 13" bitfld.long 0x34 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x34 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "VICVECTCNTL14,Vector Control Register 14" bitfld.long 0x38 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x38 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "VICVECTCNTL15,Vector Control Register 15" bitfld.long 0x3C 5. " E ,Enable vector interrupt" "Disabled,Enabled" bitfld.long 0x3C 0.--4. " INTSOURCE ,Allows selecting any of the 32 interrupt sources" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0xFE0++0x0F line.byte 0x00 "VICPERIPHID0,Peripheral Identification Register 0" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0" line.byte 0x04 "VICPERIPHID1,Peripheral Identification Register 1" hexmask.byte 0x04 4.--7. 1. " DESIGNER0 ,Identification of the designer 0" hexmask.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part number 1" line.byte 0x08 "VICPERIPHID2,Peripheral Identification Register 2" hexmask.byte 0x08 4.--7. 1. " REVISION ,Revision number" hexmask.byte 0x08 0.--3. 1. " DESIGNER1 ,Identification of the designer 1" line.byte 0x0C "VICPERIPHID3,Peripheral Identification Register 3" hexmask.byte 0x0C 0.--7. 1. " CONFIGURATION ,Configuration option of the peripheral" else rgroup.byte 0xFE0++0x00 line.byte 0x00 "VICPERIPHID0,Peripheral Identification Register 0" rgroup.byte 0xFE4++0x00 line.byte 0x00 "VICPERIPHID1,Peripheral Identification Register 1" rgroup.byte 0xFE8++0x00 line.byte 0x00 "VICPERIPHID2,Peripheral Identification Register 2" rgroup.byte 0xFEC++0x00 line.byte 0x00 "VICPERIPHID3,Peripheral Identification Register 3" endif rgroup.byte 0xFF0++0x00 line.byte 0x00 "VICPCELLID0,Prime Cell Identification 0" rgroup.byte 0xFF4++0x00 line.byte 0x00 "VICPCELLID1,Prime Cell Identification 1" rgroup.byte 0xFF8++0x00 line.byte 0x00 "VICPCELLID2,Prime Cell Identification 2" rgroup.byte 0xFFC++0x00 line.byte 0x00 "VICPCELLID3,Prime Cell Identification 3" width 0xb width 0xb endif tree.end tree "WDT (Watchdog timer)" base asd:0xfc880000 width 16. group.long 0x00++0x03 line.long 0x00 "WDOGLOAD,Watchdog Load Register" rgroup.long 0x04++0x03 line.long 0x00 "WDOGVALUE,Watchdog Value Register" group.long 0x08++0x03 line.long 0x00 "WDOGCONTROL,Watchdog Control Register" bitfld.long 0x00 1. " RESEN ,Enable Watchdog module reset output" "Disabled,Enabled" bitfld.long 0x00 0. " INTEN ,Enable the interrupt event" "Disabled,Enabled" wgroup.long 0x0C++0x03 line.long 0x00 "WDOGINTCLR,Watchdog Interrupt Clear Register" rgroup.long 0x10++0x07 line.long 0x00 "WDOGRIS,Watchdog Raw Interrupt Status Register" bitfld.long 0x00 0. " WDOGRIS ,Watchdog raise" "No interrupt,Interrupt" line.long 0x04 "WDOGMIS,Watchdog Masked Interrupt Status Register" bitfld.long 0x04 0. " WDOGMIS ,Masked interrupt status" "No interrupt,Interrupt" sif cpuis("SPEAR600")||cpuis("ARNIE-ARM7")||cpuis("ARNIE-ARM9") group.long 0xC00++0x03 line.long 0x00 "WDOGLOCK,Watchdog Lock Register" sif cpuis("ARNIE-ARM7")||cpuis("ARNIE-ARM9") group.long 0xF00++0x07 line.long 0x00 "WDOGITCR,Watchdog Integration Test Control Register" bitfld.long 0x00 0. " ITEN ,Integration test enable" "Disabled,Enabled" line.long 0x04 "WDOGITOP,Watchdog Integration Test Output Set Register" bitfld.long 0x04 1. " WDOGINT ,Value output on WDOGINT" "0,1" bitfld.long 0x04 0. " WDOGRES ,Value output on WDOGRES" "0,1" endif else group.long 0xC00++0x03 line.long 0x00 "WDOGLOCK,Watchdog Lock Register" hexmask.long 0x00 1.--31. 1. " WDOGLOCK ,Write access enable" endif sif cpuis("SPEAR310")||cpuis("SPEAR320")||cpuis("SPEAR320S") rgroup.long 0xFE0++0x03 line.long 0x00 "WDOGPERIPHID0,Watchdog Peripheral Identification Register 0" rgroup.long 0xFE4++0x03 line.long 0x00 "WDOGPERIPHID1,Watchdog Peripheral Identification Register 1" rgroup.long 0xFE8++0x03 line.long 0x00 "WDOGPERIPHID2,Watchdog Peripheral Identification Register 2" rgroup.long 0xFEC++0x03 line.long 0x00 "WDOGPERIPHID3,Watchdog Peripheral Identification Register 3" elif cpuis("ARNIE-ARM7")||cpuis("ARNIE-ARM9") rgroup.long 0xFE0++0x0F "Watchdog Identification Registers" line.long 0x00 "WDOGPERIPHID0,Watchdog Peripheral Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0" line.long 0x04 "WDOGPERIPHID1,Watchdog Peripheral Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0" hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1" line.long 0x08 "WDOGPERIPHID2,Watchdog Peripheral Identification Register 2" hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision" hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1" line.long 0x0C "WDOGPERIPHID3,Watchdog Peripheral Identification Register 3" hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION ,Configuration" else rgroup.long 0xFE0++0x0F "Watchdog Identification Registers" line.long 0x00 "WDOGPERIPHID0,Watchdog Peripheral Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " CONFIGURATION ,Configuration option of the peripheral" line.long 0x04 "WDOGPERIPHID1,Watchdog Peripheral Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " REVISION ,Revision number" hexmask.long.byte 0x04 0.--3. 1. " DESIGNER0 ,Designer 0" line.long 0x08 "WDOGPERIPHID2,Watchdog Peripheral Identification Register 2" hexmask.long.byte 0x08 4.--7. 1. " DESIGNER1 ,Designer 1" hexmask.long.byte 0x08 0.--3. 1. " PARTNUMBER0 ,Part Number 0" line.long 0x0C "WDOGPERIPHID3,Watchdog Peripheral Identification Register 3" hexmask.long.byte 0x0C 0.--7. 1. " PARTNUMBER1 ,Part Number 1" endif sif cpuis("ARNIE-ARM7")||cpuis("ARNIE-ARM9") rgroup.long 0xFF0++0x03 line.long 0x00 "WDOGPCELLID0,Watchdog Prime Cell Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " WDOGPCELLID0 ,Prime cell ID 0" rgroup.long 0xFF4++0x03 line.long 0x00 "WDOGPCELLID1,Watchdog Prime Cell Identification Register 1" hexmask.long.byte 0x00 0.--7. 1. " WDOGPCELLID1 ,Prime cell ID 1" rgroup.long 0xFF8++0x03 line.long 0x00 "WDOGPCELLID2,Watchdog Prime Cell Identification Register 2" hexmask.long.byte 0x00 0.--7. 1. " WDOGPCELLID2 ,Prime cell ID 2" rgroup.long 0xFFC++0x03 line.long 0x00 "WDOGPCELLID3,Watchdog Prime Cell Identification Register 3" hexmask.long.byte 0x00 0.--7. 1. " WDOGPCELLID3 ,Prime cell ID 3" else rgroup.long 0xFF0++0x03 line.long 0x00 "WDOGPCELLID0,Watchdog Prime Cell Identification Register 0" rgroup.long 0xFF4++0x03 line.long 0x00 "WDOGPCELLID1,Watchdog Prime Cell Identification Register 1" rgroup.long 0xFF8++0x03 line.long 0x00 "WDOGPCELLID2,Watchdog Prime Cell Identification Register 2" rgroup.long 0xFFC++0x03 line.long 0x00 "WDOGPCELLID3,Watchdog Prime Cell Identification Register 3" endif width 0x0B tree.end tree.open "GPT (General Purpose timer)" tree "Local Timer" base asd:0xf0000000 width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end tree "Timer 1" sif (cpu()=="SPEAR600") base asd:0xd8000000 else base asd:0xfc800000 endif width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end tree "Timer 2" sif (cpu()=="SPEAR600") base asd:0xd8080000 else base asd:0xfcb00000 endif width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end sif (cpu()=="SPEAR600") tree "Basic Subsystem Timer" base asd:0xfc800000 width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end endif tree.end sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "MPMC (DDR Memory Controller)" base asd:0xfc600000 width 12. group.long 0x00++0x3F line.long 0x00 "MEM0_CTL,Memory Control Register 0" bitfld.long 0x00 24.--27. " AHB2_FIFO_TYPE ,AHB Port-2 configurable clock relation respect to the core controller clock" "Asynchronous,Reserved,Sync. 1:2,Sync. 1:1,?..." bitfld.long 0x00 16.--19. " AHB1_FIFO_TYP_REG ,AHB Port-1 configurable clock relation respect to the core controller clock" "Asynchronous,Reserved,Sync. 1:2,Sync. 1:1,?..." textline " " bitfld.long 0x00 8.--11. " AHB0_FIFO_TYP_REG ,AHB Port-0 configurable clock relation respect to the core controller clock" "Asynchronous,Reserved,Sync. 1:2,Sync. 1:1,?..." bitfld.long 0x00 0.--3. " ADD_CMP_EN ,Enables address collision/data coherency detection" "Disabled,Enabled,?..." line.long 0x04 "MEM1_CTL,Memory Control Register 1" bitfld.long 0x04 8.--9. " AHB4_FIFO_TYP_REG ,AHB Port-4 configurable clock relation respect to the core controller clock" "Asynchronous,Reserved,Sync. 1:2,Sync. 1:1" bitfld.long 0x04 0.--1. " AHB3_FIFO_TYP_REG ,AHB Port-3 configurable clock relation respect to the core controller clock" "Asynchronous,Reserved,Sync. 1:2,Sync. 1:1" line.long 0x08 "MEM2_CTL,Memory Control Register 2" bitfld.long 0x08 24. " BANK_SPLIT_EN ,Enables bank splitting" "Disabled,Enabled" bitfld.long 0x08 16. " AUTO_RESFREH_MOD ,Auto Refresh Mode" "DRAM burst boundary,Command boundary" textline " " bitfld.long 0x08 8. " AREFRESH ,Rutomatic refresh" "No action,Issued" bitfld.long 0x08 0. " AP ,Enables auto pre-charge mode" "Disabled,Enabled" line.long 0x0c "MEM3_CTL,Memory Control Register 3" bitfld.long 0x0C 24. " DLL_BYPASS_MODE ,Dll Bypass Mode" "Normal,Bypass" rbitfld.long 0x0C 16. " DLL_LOCKREG ,DLL lock/unlock" "Not locked,Locked" textline " " bitfld.long 0x0C 8. " DDR2_DDR1_MODE ,DDR2/1 memory model definition" "DDRI,DDRII" bitfld.long 0x0C 0. " CONCURRENTAP ,Enables concurrent auto pre-charge" "Disabled,Enabled" line.long 0x10 "MEM4_CTL,Memory Control Register 4" bitfld.long 0x10 24. " INTRPTAPBURST ,Enables interrupting an auto pre-charge command" "Disabled,Enabled" bitfld.long 0x10 16. " FAST_WRITE ,Fast write" "Enough data,First word of the write data" textline " " bitfld.long 0x10 8. " EIGHT_BANK_MODE ,Eight bank mode" "4,8" bitfld.long 0x10 0. " DQS_N_EN ,Enables differential data strobe signals from the DRAM" "Single-ended,Differential" line.long 0x14 "MEM5_CTL,Memory Control Register 5" bitfld.long 0x14 24. " ODT_AD_TURN_CLKEN ,Odt additional turn clock enable" "Not required,Added" bitfld.long 0x14 16. " NO_CMD_INIT ,Disables DRAM commands" "Issued,Not issued" textline " " bitfld.long 0x14 8. " INTRPTWRITEA ,Enables interrupting of a combined write" "Disabled,Enabled" bitfld.long 0x14 0. " INTRPTREADA ,Enables interrupting of a combined read" "Disabled,Enabled" line.long 0x18 "MEM6_CTL,Memory Control Register 6" bitfld.long 0x18 24. " REDUCE ,Controls the width of the memory data path" "Standard,Half of max" bitfld.long 0x18 16. " PRIORITY_EN ,Enables priority" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " POWER_DOWN ,Power down" "Enabled,Disabled" bitfld.long 0x18 0. " PLACEMENT_EN ,Enables using the placement logic to fill the command queue" "Disabled,Enabled" line.long 0x1c "MEM7_CTL,Memory Control Register 7" bitfld.long 0x1C 24. " START ,Start" "Not active,Active" bitfld.long 0x1C 16. " SREFRESH ,Self-refresh mode" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " RW_SAME_EN ,Enables read/write grouping" "Disabled,Enabled" bitfld.long 0x1C 0. " REG_DIMM_ENABLE ,Nables registered DIMM operations" "Disabled,Enabled" line.long 0x20 "MEM8_CTL,Memory Control Register 8" bitfld.long 0x20 24. " WRITE_MODEREG ,Mode register write" "Not written,Written" bitfld.long 0x20 16. " WRITEINTERP ,Write Interrupt" "Not supported,Supported" textline " " bitfld.long 0x20 8. " WGTH_RRB_LAT_CTRL ,Controls the weighted round-robin latency option" "When processed,Always run" bitfld.long 0x20 0. " TRAS_LOCKOU ,TRAS lockout setting" "Not supported,Supported" line.long 0x24 "MEM9_CTL,Memory Control Register 9" bitfld.long 0x24 24.--25. " ODT_RD_MAP_CS1 ,Sets up which chip will have their ODT termination active while a read" "None,CS1,CS2,CS1/CS2" bitfld.long 0x24 16.--17. " ODT_RD_MAP_CS0 ,Sets up which chip will have their ODT termination active while a read" "None,CS1,CS2,CS1/CS2" textline " " rbitfld.long 0x24 8.--9. " MAX_CS_REG ,Maximum number of chip selects" "0,1,2,3" bitfld.long 0x24 0.--1. " CS_MAP ,Chip select map" "1,2,4,8" line.long 0x28 "MEM10_CTL,Memory Control Register 10" bitfld.long 0x28 24.--25. " RTT_0 ,Defines the On-Die termination resistance for all DRAM devices" "Disabled,75 Ohm,150 Ohm,?..." rbitfld.long 0x28 16.--17. " OUT_OF_RANGE_TYPE ,Holds the type of command that caused an out-of-range interrupt request to the memory devices" "0,1,2,3" textline " " bitfld.long 0x28 8.--9. " ODT_WR_MAP_CS1 ,Sets up which chip will have their ODT termination active" "None,CS1,CS2,CS1/CS2" bitfld.long 0x28 0.--1. " ODT_WR_MAP_CS0 ,Sets up which chip will have their ODT termination active" "None,CS1,CS2,CS1/CS2" line.long 0x2c "MEM11_CTL,Memory Control Register 11" bitfld.long 0x2c 24.--26. " AHB0_R_PRIORITY ,Priority of read commands from AHB port 0" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x2c 16.--18. " AHB0_PRT_ORDERING ,Ahb0 port ordering" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2c 8.--10. " ADDR_PINS ,Address Pins" "0,1,2,3,4,5,6,7" bitfld.long 0x2c 0.--1. " RTT_PAD_TERMINAT ,Termination resistance in the memory controller pads" "Disabled,75 Ohm,150 Ohm,?..." line.long 0x30 "MEM12_CTL,Memory Control Register 12" bitfld.long 0x30 24.--26. " AHB1_W_PRIORITY ,Priority of write commands from AHB port 1" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x30 16.--18. " AHB1_R_PRIORITY ,Priority of read commands from AHB port 1" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x30 8.--10. " AHB1_PRT_ORDERING ,Ahb1 port ordering" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. " AHB0_W_PRIORITY ,Priority of write commands from AHB port 0" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x34 "MEM13_CTL,Memory Control Register 13" bitfld.long 0x34 24.--26. " AHB3_PRT_ORDERING ,Ahb3 port ordering" "0,1,2,3,4,5,6,7" bitfld.long 0x34 16.--18. " AHB2_W_PRIORITY ,Priority of write commands from AHB port 2" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x34 8.--10. " AHB2_R_PRIORITY ,Priority of read commands from AHB port 2" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x34 0.--2. " AHB2_PRT_ORDERING ,Ahb2 port ordering" "0,1,2,3,4,5,6,7" line.long 0x38 "MEM14_CTL,Memory Control Register 14" bitfld.long 0x38 24.--26. " AHB4_R_PRIORITY ,Priority of read commands from AHB port 4" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x38 16.--18. " AHB4_PRT_ORDERING ,Ahb4 port ordering" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x38 8.--10. " AHB3_W_PRIORITY ,Priority of write commands from AHB port 3" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x38 0.--2. " AHB3_R_PRIORITY ,Priority of read commands from AHB port 3" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x3c "MEM15_CTL,Memory Control Register 15" bitfld.long 0x3c 0.--2. " AHB4_W_PRIORITY ,Priority of write commands from AHB port 4" "0(highest),1,2,3,4,5,6,7(lowest)" hgroup.long 0x40++0x03 hide.long 0x00 "MEM16_CTL,Memory Control Register 16" group.long 0x44++0x37 line.long 0x00 "MEM17_CTL,Memory Control Register 17" bitfld.long 0x00 24.--26. " TCKE ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 16.--18. " OUT_OF_RNG_SRC_ID ,Out of Range Source Id" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--10. " COLUMN_SIZE ,Column Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " CASLAT ,CAS (Column Address Strobe) latency" "0,1,2,3,4,5,6,7" line.long 0x04 "MEM18_CTL,Memory Control Register 18" bitfld.long 0x04 24.--26. " TRTP ,DRAM tRTP (read to pre-charge time) parameter" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. " TRRD ,DRAM activate to activate delay for different banks" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0.--2. " TEMRS ,DRAM extended mode parameter set time" "0,1,2,3,4,5,6,7" line.long 0x08 "MEM19_CTL,Memory Control Register 19" bitfld.long 0x08 24.--26. " WRLAT ,Write latency" "0,1,2,3,4,5,6,7" bitfld.long 0x08 16.--17. " WGT_RRB_WGT_SHAR ,Weighted round robin weight sharing ports 2/3" "Independently(Port0/1),Tied together(Port0/1),Independently(Port2/3),Tied together(Port0/1)" textline " " bitfld.long 0x08 8.--10. " TWTR ,Number of cycles needed to switch from a write to a read operation" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " TWR_INT ,DRAM write recovery time" "0,1,2,3,4,5,6,7" line.long 0x0C "MEM20_CTL,Memory Control Register 20" bitfld.long 0x0C 24.--27. " AHB0_PRY2_REL_PRY ,Ahb0 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. " AHB0_PRY1_REL_PRY ,Ahb0 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 8.--11. " AHB0_PRY0_REL_PRY ,Ahb0 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--5. " AGE_COUNT ,Initial value of the master aging-rate counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "MEM21_CTL,Memory Control Register 21" bitfld.long 0x10 24.--27. " AHB0_PRY6_REL_PRY ,Ahb0 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--19. " AHB0_PRY5_REL_PRY ,Ahb0_priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 8.--11. " AHB0_PRY4_REL_PRY ,Ahb0_priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AHB0_PRY3_REL_PRY ,Ahb0_priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "MEM22_CTL,Memory Control Register 22" bitfld.long 0x14 24.--27. " AHB1_PRY2_REL_PRY ,Ahb1 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. " AHB1_PRY1_REL_PRY ,Ahb1 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 8.--11. " AHB1_PRY0_REL_PRY ,Ahb1 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " AHB0_PRY7_REL_PRY ,Ahb0 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "MEM23_CTL,Memory Control Register 23" bitfld.long 0x18 24.--27. " AHB1_PRY6_REL_PRY ,Ahb1 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. " AHB1_PRY5_REL_PRY ,Ahb1 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 8.--11. " AHB1_PRY4_REL_PRY ,Ahb1 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AHB1_PRY3_REL_PRY ,Ahb1 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "MEM24_CTL,Memory Control Register 24" bitfld.long 0x1C 24.--27. " AHB2_PRY2_REL_PRY ,Ahb2 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " AHB2_PRY1_REL_PRY ,Ahb2 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " AHB2_PRY0_REL_PRY ,Ahb2 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " AHB1_PRY7_REL_PRY ,Ahb1 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "MEM25_CTL,Memory Control Register 25" bitfld.long 0x20 24.--27. " AHB2_PRY6_REL_PRY ,Ahb2_priority6_relative_priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 16.--19. " AHB2_PRY5_REL_PRY ,Ahb2 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 8.--11. " AHB2_PRY4_REL_PRY ,Ahb2 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 0.--3. " AHB2_PRY3_REL_PRY ,Ahb2 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "MEM26_CTL,Memory Control Register 26" bitfld.long 0x24 24.--27. " AHB3_PRY2_REL_PRY ,Ahb3 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 16.--19. " AHB3_PRY1_REL_PRY ,Ahb3 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x24 8.--11. " AHB3_PRY0_REL_PRY ,Ahb3 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 0.--3. " AHB2_PRY7_REL_PRY ,Ahb2 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "MEM27_CTL,Memory Control Register 27" bitfld.long 0x28 24.--27. " AHB3_PRY6_REL_PRY ,Ahb3 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 16.--19. " AHB3_PRY5_REL_PRY ,Ahb3 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 8.--11. " AHB3_PRY4_REL_PRY ,Ahb3 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 0.--3. " AHB3_PRY3_REL_PRY ,Ahb3 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "MEM28_CTL,Memory Control Register 28" bitfld.long 0x2C 24.--27. " AHB4_PRY2_REL_PRY ,Ahb4 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 16.--19. " AHB4_PRY1_REL_PRY ,Ahb4 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x2C 8.--11. " AHB4_PRY0_REL_PRY ,Ahb4 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 0.--3. " AHB3_PRY7_REL_PRY ,Ahb3 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "MEM29_CTL,Memory Control Register 29" bitfld.long 0x30 24.--27. " AHB4_PRY6_REL_PRY ,Ahb4 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 16.--19. " AHB4_PRY5_REL_PRY ,Ahb4 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 8.--11. " AHB4_PRY4_REL_PRY ,Ahb4 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AHB4_PRY3_REL_PRY ,Ahb4 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "MEM30_CTL,Memory Control Register 30" bitfld.long 0x34 0.--3. " AHB4_PRY7_REL_PRY ,Ahb4 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hgroup.long 0x7c++0x0B hide.long 0x00 "MEM31_CTL,Memory Control Register 31" hide.long 0x04 "MEM32_CTL,Memory Control Register 32" hide.long 0x08 "MEM33_CTL,Memory Control Register 33" group.long 0x88++0x2F line.long 0x00 "MEM34_CTL,Memory Control Register 34" bitfld.long 0x00 24.--27. " CASLAT_LIN_GATE ,Adjusts the data capture gate open time by 1/2 cycle increments" "Reserved,Reserved,1 cycles,1.5 cycles,2 cycles,2.5 cycles,3 cycles,3.5 cycles,4 cycles,4.5 cycles,5 cycles,5.5 cycles,6 cycles,6.5 cycles,7 cycles,7.5 cycles" bitfld.long 0x00 16.--19. " CASLAT_LIN ,CAS latency linear value in 1/2 cycle increments" "Reserved,Reserved,1 cycles,1.5 cycles,2 cycles,2.5 cycles,3 cycles,3.5 cycles,4 cycles,4.5 cycles,5 cycles,5.5 cycles,6 cycles,6.5 cycles,7 cycles,7.5 cycles" textline " " bitfld.long 0x00 8.--11. " APREBIT ,Location of the auto pre-charge bit in the DRAM address in decimal encoding" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MEM35_CTL,Memory Control Register 35" rbitfld.long 0x04 24.--27. " MAX_ROW_REG ,Maximum width of the memory address bus for the memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x04 16.--19. " MAX_COL_REG ,Maximum width of column address in the DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..." textline " " bitfld.long 0x04 8.--11. " INITAREF ,Number of auto-refresh commands" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--5. " COMD_AGE_COUNT ,Command age count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "MEM36_CTL,Memory Control Register 36" rbitfld.long 0x08 24.--27. " WRR_PRM_VAL_ERR ,Weighted round-robin arbitration errors/ warnings" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " TRP ,DRAM pre-charge command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 8.--11. " TDAL ,Auto pre-charge write recovery time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " Q_FULLNESS ,Quantity of data that will be considered full for the command queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "MEM37_CTL,Memory Control Register 37" bitfld.long 0x0C 24.--28. " TFAW ,DRAM tFAW parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 16.--20. " OCD_ADJ_PUP_CS0 ,Number of OCD adjustment commands to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 8.--12. " OCD_ADJ_PDN_CS0 ,Number of OCD adjustment commands to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 5. " INT_ACK5 ,Clearing of the int_status5 parameter control" "No effect,Clear" textline " " bitfld.long 0x0C 4. " INT_ACK4 ,Clearing of the int_status4 parameter control" "No effect,Clear" bitfld.long 0x0C 3. " INT_ACK3 ,Clearing of the int_status3 parameter control" "No effect,Clear" textline " " bitfld.long 0x0C 2. " INT_ACK2 ,Clearing of the int_status2 parameter control" "No effect,Clear" bitfld.long 0x0C 1. " INT_ACK1 ,Clearing of the int_status1 parameter control" "No effect,Clear" textline " " bitfld.long 0x0C 0. " INT_ACK0 ,Clearing of the int_status0 parameter control" "No effect,Clear" line.long 0x10 "MEM38_CTL,Memory Control Register 38" rbitfld.long 0x10 30. " INT_STATUS6 ,Logical OR of all lower bits" "0,1" rbitfld.long 0x10 29. " INT_STATUS5 ,DLL unlock condition detected" "Not detected,Detected" textline " " rbitfld.long 0x10 28. " INT_STATUS4 ,Address cross page boundary detected" "Not detected,Detected" rbitfld.long 0x10 27. " INT_STATUS3 ,DRAM initialization complete" "Not completed,Completed" textline " " rbitfld.long 0x10 26. " INT_STATUS2 ,Port address range error detected" "Not detected,Detected" rbitfld.long 0x10 25. " INT_STATUS1 ,Multiple accesses outside the defined PHYSICAL memory space detected" "Not detected,Detected" textline " " rbitfld.long 0x10 24. " INT_STATUS0 ,A single access outside the defined PHYSI-CAL memory space detected" "Not detected,Detected" bitfld.long 0x10 22. " INT_MASK6 ,Interrupt 6 mask" "Not masked,Masked" textline " " bitfld.long 0x10 21. " INT_MASK5 ,Interrupt 5 mask" "Not masked,Masked" bitfld.long 0x10 20. " INT_MASK4 ,Interrupt 4 mask" "Not masked,Masked" textline " " bitfld.long 0x10 19. " INT_MASK3 ,Interrupt 3 mask" "Not masked,Masked" bitfld.long 0x10 18. " INT_MASK2 ,Interrupt 2 mask" "Not masked,Masked" textline " " bitfld.long 0x10 17. " INT_MASK1 ,Interrupt 1 mask" "Not masked,Masked" bitfld.long 0x10 16. " INT_MASK0 ,Interrupt 0 mask" "Not masked,Masked" textline " " bitfld.long 0x10 8.--12. " TRC ,DRAM period between active commands for the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. " TMRD ,DRAM mode register set command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "MEM39_CTL,Memory Control Register 39" hexmask.long.byte 0x14 8.--14. 1. " DLL_DQS_DELAY_1 ,Delay for the read_dqs signal from the DDR SDRAM devices for dll_rd_dqs_slice 1" hexmask.long.byte 0x14 0.--6. 1. " DLL_DQS_DELAY_0 ,Delay for the read_dqs signal from the DDR SDRAM devices for dll_rd_dqs_slice 0" line.long 0x18 "MEM40_CTL,Memory Control Register 40" hexmask.long.byte 0x18 24.--30. 1. " DQS_OUT_SHIFT ,Delay to ensure correct data capture in the I/ O logic" line.long 0x1C "MEM41_CTL,Memory Control Register 41" hexmask.long.byte 0x1C 16.--22. 1. " WR_DQS_SHIFT ,Delay for the clk_wr signal to ensure correct data capture in the I/O logic" line.long 0x20 "MEM42_CTL,Memory Control Register 42" hexmask.long.byte 0x20 24.--31. 1. " TRFC ,DRAM refresh command time" hexmask.long.byte 0x20 16.--23. 1. " TRCD_INT ,DRAM RAS to CAS delay" textline " " hexmask.long.byte 0x20 8.--15. 1. " TRAS_MIN ,DRAM minimum row activate time" line.long 0x24 "MEM43_CTL,Memory Control Register 43" hexmask.long.word 0x24 16.--25. 1. " AHB1_PRY_RELAX ,Ahb1 priority relax" hexmask.long.word 0x24 0.--9. 1. " AHB0_PRY_RELAX ,Ahb0 pryority relax" line.long 0x28 "MEM44_CTL,Memory Control Register 44" hexmask.long.word 0x28 16.--25. 1. " AHB3_PRY_RELAX ,Ahb3 priority relax" hexmask.long.word 0x28 0.--9. 1. " AHB2_PRY_RELAX ,Ahb2 pryority relax" line.long 0x2C "MEM45_CTL,Memory Control Register 45" hexmask.long.word 0x2C 0.--9. 1. " AHB4_PRY_RELAX ,Ahb4 pryority relax" rgroup.long 0xB8++0x03 line.long 0x00 "MEM46_CTL,Memory Control Register 46" hexmask.long.word 0x00 16.--25. 1. " OUT_OF_RNG_LENGTH ,Out of range length" group.long 0xBc++0x13 line.long 0x00 "MEM47_CTL,Memory Control Register 47" hexmask.long.word 0x00 16.--25. 1. " AHB0_WRCNT ,AHB port 0 INCR WRITE AHB counter" hexmask.long.word 0x00 0.--10. 1. " AHB0_RDCNT ,AHB port 0 INCR READ AHB counter" line.long 0x04 "MEM48_CTL,Memory Control Register 48" hexmask.long.word 0x04 16.--25. 1. " AHB1_WRCNT ,AHB port 1 INCR WRITE AHB counter" hexmask.long.word 0x04 0.--10. 1. " AHB1_RDCNT ,AHB port 1 INCR READ AHB counter" line.long 0x08 "MEM49_CTL,Memory Control Register 49" hexmask.long.word 0x08 16.--25. 1. " AHB2_WRCNT ,AHB port 2 INCR WRITE AHB counter" hexmask.long.word 0x08 0.--10. 1. " AHB2_RDCNT ,AHB port 2 INCR READ AHB counter" line.long 0x0C "MEM50_CTL,Memory Control Register 50" hexmask.long.word 0x0C 16.--25. 1. " AHB3_WRCNT ,AHB port 3 INCR WRITE AHB counter" hexmask.long.word 0x0C 0.--10. 1. " AHB3_RDCNT ,AHB port 3 INCR READ AHB counter" line.long 0x10 "MEM51_CTL,Memory Control Register 51" hexmask.long.word 0x10 16.--25. 1. " AHB4_WRCNT ,AHB port 4 INCR WRITE AHB counter" hexmask.long.word 0x10 0.--10. 1. " AHB4_RDCNT ,AHB port 4 INCR READ AHB counter" hgroup.long 0xd0++0x07 hide.long 0x00 "MEM52_CTL,Memory Control Register 52" hide.long 0x04 "MEM53_CTL,Memory Control Register 53" group.long 0xd8++0x0F line.long 0x00 "MEM54_CTL,Memory Control Register 54" hexmask.long.word 0x00 0.--13. 1. " TREF ,DRAM cycles between refresh commands" line.long 0x04 "MEM55_CTL,Memory Control Register 55" hexmask.long.word 0x04 0.--14. 1. " EMRS3_DATA ,EMRS3 data written during DDRII initialization" line.long 0x08 "MEM56_CTL,Memory Control Register 56" hexmask.long.word 0x08 16.--31. 1. " TRAS_MAX ,DRAM maximum row active time" hexmask.long.word 0x08 0.--15. 1. " TDLL ,DRAM DLL lock time" line.long 0x0C "MEM57_CTL,Memory Control Register 57" hexmask.long.word 0x0C 16.--31. 1. " TXSR ,DRAM self-refresh exit time" hexmask.long.word 0x0C 0.--15. 1. " TXSNR ,DRAM tXSNR parameter" rgroup.long 0xE8++0x03 line.long 0x00 "MEM58_CTL,Memory Control Register 58" hexmask.long.word 0x00 0.--15. 1. " VERSION ,Memory controller version number" group.long 0xEC++0x03 line.long 0x00 "MEM59_CTL,Memory Control Register 59" hexmask.long.tbyte 0x00 0.--23. 1. " TINIT ,DRAM initialization time" rgroup.long 0xF0++0x07 line.long 0x00 "MEM60_CTL,Memory Control Register 60" line.long 0x04 "MEM61_CTL,Memory Control Register 61" hexmask.long.byte 0x04 0.--1. 1. " OUT_RNG_ADDR ,Out of range address" hgroup.long 0xF8++0x0B hide.long 0x00 "MEM62_CTL,Memory Control Register 62" hide.long 0x04 "MEM63_CTL,Memory Control Register 63" hide.long 0x08 "MEM64_CTL,Memory Control Register 64" group.long 0x104++0x0F line.long 0x00 "MEM65_CTL,Memory Control Register 65" hexmask.long.word 0x00 16.--25. 1. " DLL_DQS_DLY_BYPS0 ,Dll dqs delay bypass 0" line.long 0x04 "MEM66_CTL,Memory Control Register 66" hexmask.long.word 0x04 16.--25. 1. " DLL_INCREMENT ,Number of delay elements to recursively increment the dll_start_point parameter" hexmask.long.word 0x04 0.--9. 1. " DLL_DQS_DLY_BYPS1 ,Dll dqs delay bypass1" line.long 0x08 "MEM67_CTL,Memory Control Register 67" hexmask.long.word 0x08 16.--25. 1. " DLL_START_POINT ,Dll start pointer" hexmask.long.word 0x08 0.--9. 1. " DLL_LOCK ,Actual number of delay elements used to capture one full clock cycle" line.long 0x0C "MEM68_CTL,Memory Control Register 68" hexmask.long.word 0x0C 16.--25. 1. " WR_DQS_SHFT_BYPS ,Wr dqs shift bypass" hexmask.long.word 0x0C 0.--9. 1. " DQS_OUT_SHFT_BYPS ,Dqs out shift bypass" hgroup.long 0x114++0x6F hide.long 0x0 "MEM69_CTL,Memory Control Register 69" hide.long 0x4 "MEM70_CTL,Memory Control Register 70" hide.long 0x8 "MEM71_CTL,Memory Control Register 71" hide.long 0xC "MEM72_CTL,Memory Control Register 72" hide.long 0x10 "MEM73_CTL,Memory Control Register 73" hide.long 0x14 "MEM74_CTL,Memory Control Register 74" hide.long 0x18 "MEM75_CTL,Memory Control Register 75" hide.long 0x1C "MEM76_CTL,Memory Control Register 76" hide.long 0x20 "MEM77_CTL,Memory Control Register 77" hide.long 0x24 "MEM78_CTL,Memory Control Register 78" hide.long 0x28 "MEM79_CTL,Memory Control Register 79" hide.long 0x2C "MEM80_CTL,Memory Control Register 80" hide.long 0x30 "MEM81_CTL,Memory Control Register 81" hide.long 0x34 "MEM82_CTL,Memory Control Register 82" hide.long 0x38 "MEM83_CTL,Memory Control Register 83" hide.long 0x3C "MEM84_CTL,Memory Control Register 84" hide.long 0x40 "MEM85_CTL,Memory Control Register 85" hide.long 0x44 "MEM86_CTL,Memory Control Register 86" hide.long 0x48 "MEM87_CTL,Memory Control Register 87" hide.long 0x4C "MEM88_CTL,Memory Control Register 88" hide.long 0x50 "MEM89_CTL,Memory Control Register 89" hide.long 0x54 "MEM90_CTL,Memory Control Register 90" hide.long 0x58 "MEM91_CTL,Memory Control Register 91" hide.long 0x5C "MEM92_CTL,Memory Control Register 92" hide.long 0x60 "MEM93_CTL,Memory Control Register 93" hide.long 0x64 "MEM94_CTL,Memory Control Register 94" hide.long 0x68 "MEM95_CTL,Memory Control Register 95" hide.long 0x6C "MEM96_CTL,Memory Control Register 96" hide.long 0x70 "MEM97_CTL,Memory Control Register 97" group.long 0x188++0x07 line.long 0x00 "MEM98_CTL,Memory Control Register 98" hide.long 0x04 "MEM99_CTL,Memory Control Register 99" group.long 0x190++0x23 line.long 0x00 "MEM100_CTL,Memory Control Register 100" bitfld.long 0x00 24. " ENABLE_QUICK_SREF_RESH ,Memory initialization sequence" "Continues,Self-refresh mode" bitfld.long 0x00 16. " DRIVE_DQ_DQS ,DQ/DQS output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " BIG_ENDIAN_ENABLE ,Byte ordering" "Little Endian,Big Endian" bitfld.long 0x00 0. " ACTIVE_AGING ,Enable aging" "Disabled,Enabled" line.long 0x04 "MEM101_CTL,Memory Control Register 101" bitfld.long 0x04 24. " SWAP_ENABLE ,Ennable swapping logic" "Disabled,Enabled" bitfld.long 0x04 16. " RD2RD_TURN ,Enable additional clock between back-to-back READ operations to different chip selects" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " PWRUP_SREFRESH_EXIT ,Enable powerup via self-refresh instead of full memory initialization" "Disabled,Enabled" bitfld.long 0x04 0. " EN_LOWPOWER_MODE ,Enable low power mode" "Disabled,Enabled" line.long 0x08 "MEM102_CTL,Memory Control Register 102" bitfld.long 0x08 24.--28. " LOWPOWER_AUTO_EN ,Enable automatic low power mode" "Disabled,Mode 5,Mode 4,Reserved,Mode 3,Reserved,Reserved,Reserved,Mode 2,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Mode 1,?..." bitfld.long 0x08 16.--18. " CKE_DELAY ,Additional cycles to delay CKE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 8.--9. " LOWPOWER_REFRESH_EN ,Enable refreshes during power down" "Disabled,Enabled,?..." bitfld.long 0x08 0. " TREF_EN ,Enables internal refresh commands" "Disabled,Enabled" line.long 0x0C "MEM103_CTL,Memory Control Register 103" hexmask.long.word 0x0C 8.--22. 1. " EMRS1_DATA ,Emrs1 data" bitfld.long 0x0C 0.--4. " LOWPOWER_CONTROL ,Individual low power mode" "Disabled,Mode 5,Mode 4,Reserved,Mode 3,Reserved,Reserved,Reserved,Mode 2,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Mode 1,?..." line.long 0x10 "MEM104_CTL,Memory Control Register 104" hexmask.long.word 0x10 16.--30. 1. " EMRS2_DATA1 ,Emrs2 data for chips select 1" hexmask.long.word 0x10 0.--14. 1. " EMRS1_DATA0 , Emrs2 data for chips select 1" line.long 0x14 "MEM105_CTL,Memory Control Register 105" hexmask.long.word 0x14 16.--31. 1. " LOWPOWER_INT_CNT ,Idle cycles counter" hexmask.long.word 0x14 0.--15. 1. " LOWPOWER_EXT_CNT ,Idle cycles counter" line.long 0x18 "MEM106_CTL,Memory Control Register 106" hexmask.long.word 0x18 16.--31. 1. " LOWPOWER_RFSH_HOLD ,Re-Sync counter for DLL in Clock Gate Mode" hexmask.long.word 0x18 0.--15. 1. " LOWPOWER_PWDWN_CNT ,Memory powerdown cycles counter" line.long 0x1C "MEM107_CTL,Memory Control Register 107" hexmask.long.word 0x1C 16.--31. 1. " TCPD ,DRAM TCPD parameter" hexmask.long.word 0x1C 0.--15. 1. " LOWPOWER_SRFSH_CNT ,Memory self refresh cycles counter" line.long 0x20 "MEM108_CTL,Memory Control Register 108" hexmask.long.word 0x20 0.--15. 1. " TPDEX ,DRAM TPDEX parameter" width 0xb tree.end else tree "MC (Memory Controller)" base asd:0xfc600000 sif (cpu()=="SPEAR600") width 0xb group.long 0x00--0x18f line.long 0x00 "MEM0_CTL,Memory Control Register 0" bitfld.long 0x00 24.--25. " AHB2_FIFO_TYP_REG ,AHB Port-2 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" bitfld.long 0x00 16.--17. " AHB1_FIFO_TYP_REG ,AHB Port-1 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" textline " " bitfld.long 0x00 8.--9. " AHB0_FIFO_TYP_REG ,AHB Port-0 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" bitfld.long 0x00 0. " ADD_CMP_EN ,Enables address collision/data coherency detection" "Disabled,Enabled" line.long 0x04 "MEM1_CTL,Memory Control Register 1" bitfld.long 0x04 24.--25. " AHB6_FIFO_TYP_REG ,AHB Port-6 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" bitfld.long 0x04 16.--17. " AHB5_FIFO_TYP_REG ,AHB Port-5 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" textline " " bitfld.long 0x04 8.--9. " AHB4_FIFO_TYP_REG ,AHB Port-4 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" bitfld.long 0x04 0.--1. " AHB3_FIFO_TYP_REG ,AHB Port-3 configurable clock relation respect to the core controller clock" "Async.,Reserved,Sync. 1:2,Sync. 1:1" line.long 0x08 "MEM2_CTL,Memory Control Register 2" bitfld.long 0x08 24. " BANK_SPLIT_EN ,Enables bank splitting" "Disabled,Enabled" bitfld.long 0x08 16. " AUTO_RESFREH_MOD ,Auto Refresh Mode" "DRAM burst boundary,Command boundary" textline " " bitfld.long 0x08 8. " AREFRESH ,Rutomatic refresh" "No action,Issued" bitfld.long 0x08 0. " AP ,Enables auto pre-charge mode" "Disabled,Enabled" line.long 0x0c "MEM3_CTL,Memory Control Register 3" bitfld.long 0x0C 24. " DLL_BYPASS_MODE ,Dll Bypass Mode" "Normal,Bypass" bitfld.long 0x0C 16. " DLL_LOCKREG ,DLL lock/unlock" "Not locked,Locked" textline " " bitfld.long 0x0C 8. " DDR2_DDR1_MODE ,DDR2/1 memory model definition" "DDRI,DDRII" bitfld.long 0x0C 0. " CONCURRENTAP ,Enables concurrent auto pre-charge" "Disabled,Enabled" line.long 0x10 "MEM4_CTL,Memory Control Register 4" bitfld.long 0x10 24. " INTRPTAPBURST ,Enables interrupting an auto pre-charge command" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " FAST_WRITE ,Fast write" "Enough data,First word of the write data" textline " " bitfld.long 0x10 8. " EIGHT_BANK_MODE ,Eight bank mode" "4,8" textline " " bitfld.long 0x10 0. " DQS_N_EN ,Enables differential data strobe signals from the DRAM" "Single-ended,Differential" line.long 0x14 "MEM5_CTL,Memory Control Register 5" bitfld.long 0x14 24. " ODT_AD_TURN_CLKEN ,Odt additional turn clock enable" "Not required,Added" bitfld.long 0x14 16. " NO_CMD_INIT ,Disables DRAM commands" "Issued,Not issued" textline " " bitfld.long 0x14 8. " INTRPTWRITEA ,Enables interrupting of a combined write" "Disabled,Enabled" bitfld.long 0x14 0. " INTRPTREADA ,Enables interrupting of a combined read" "Disabled,Enabled" line.long 0x18 "MEM6_CTL,Memory Control Register 6" bitfld.long 0x18 24. " REDUCE ,Controls the width of the memory data path" "Standard,Half of max" bitfld.long 0x18 16. " PRIORITY_EN ,Enables priority" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " POWER_DOWN ,Power down" "Enabled,Disabled" bitfld.long 0x18 0. " PLACEMENT_EN ,Enables using the placement logic to fill the command queue" "Disabled,Enabled" line.long 0x1c "MEM7_CTL,Memory Control Register 7" bitfld.long 0x1C 24. " START ,Start" "Not active,Active" bitfld.long 0x1C 16. " SREFRESH ,Self-refresh mode" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " RW_SAME_EN ,Enables read/write grouping" "Disabled,Enabled" bitfld.long 0x1C 0. " REG_DIMM_ENABLE ,nables registered DIMM operations" "Disabled,Enabled" line.long 0x20 "MEM8_CTL,Memory Control Register 8" bitfld.long 0x20 24. " WRITE_MODEREG ,Mode register write" "Not written,Written" bitfld.long 0x20 16. " WRITEINTERP ,Write Interrupt" "Not supported,Supported" textline " " bitfld.long 0x20 8. " WGTH_RRB_LAT_CTRL ,Controls the weighted round-robin latency option" "When processed,Always run" bitfld.long 0x20 0. " TRAS_LOCKOU ,tRAS lockout setting" "Not supported,Supported" line.long 0x24 "MEM9_CTL,Memory Control Register 9" bitfld.long 0x24 8.--9. " MAX_CS_REG ,Maximum number of chip selects" "0,1,2,3" bitfld.long 0x24 0.--1. " CS_MAP ,Chip select map" "1,2,4,8" line.long 0x28 "MEM10_CTL,Memory Control Register 10" bitfld.long 0x28 24.--25. " RTT_0 ,Defines the On-Die termination resistance for all DRAM devices" "Disabled,75 Ohm,150 Ohm,?..." bitfld.long 0x28 16.--17. " OUT_OF_RANGE_TYPE ,Holds the type of command that caused an out-of-range interrupt request to the memory devices" "0,1,2,3" textline " " bitfld.long 0x28 8.--9. " ODT_WR_MAP_CS1 ,Sets up which chip will have their ODT termination active" "CS0,CS1,CS2,CS3" bitfld.long 0x28 0.--1. " ODT_WR_MAP_CS0 ,Sets up which chip will have their ODT termination active" "CS0,CS1,CS2,CS3" line.long 0x2c "MEM11_CTL,Memory Control Register 11" bitfld.long 0x2C 24.--26. " AHB0_R_PRIORITY ,Priority of read commands from AHB port 0" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x2C 16.--18. " AHB0_PRT_ORDERING ,Ahb0 port ordering" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x2C 8.--10. " ADDR_PINS ,Address Pins" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0.--1. " RTT_PAD_TERMINAT ,Termination resistance in the memory controller pads" "Disabled,75 Ohm,150 Ohm,?..." line.long 0x30 "MEM12_CTL,Memory Control Register 12" bitfld.long 0x30 24.--26. " AHB1_W_PRIORITY ,Priority of write commands from AHB port 1" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x30 16.--18. " AHB1_R_PRIORITY ,Priority of read commands from AHB port 1" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x30 8.--10. " AHB1_PRT_ORDERING ,Ahb1 port ordering" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. " AHB0_W_PRIORITY ,Priority of write commands from AHB port 0" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x34 "MEM13_CTL,Memory Control Register 13" bitfld.long 0x34 24.--26. " AHB3_PRT_ORDERING ,Ahb3 port ordering" "0,1,2,3,4,5,6,7" bitfld.long 0x34 16.--18. " AHB2_W_PRIORITY ,Priority of write commands from AHB port 2" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x34 8.--10. " AHB2_R_PRIORITY ,Priority of read commands from AHB port 2" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x34 0.--2. " AHB2_PRT_ORDERING ,Ahb2 port ordering" "0,1,2,3,4,5,6,7" line.long 0x38 "MEM14_CTL,Memory Control Register 14" bitfld.long 0x38 24.--26. " AHB4_R_PRIORITY ,Priority of read commands from AHB port 4" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x38 16.--18. " AHB4_PRT_ORDERING ,Ahb4 port ordering" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x38 8.--10. " AHB3_W_PRIORITY ,Priority of write commands from AHB port 3" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x38 0.--2. " AHB3_R_PRIORITY ,Priority of read commands from AHB port 3" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x3c "MEM15_CTL,Memory Control Register 15" bitfld.long 0x3C 24.--26. " AHB5_W_PRIORITY ,Priority of write commands from AHB port 5" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x3C 16.--18. " AHB5_R_PRIORITY ,Priority of read commands from AHB port 5" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x3C 8.--10. " AHB5_PRT_ORDERING ,Ahb5 port ordering port" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0.--2. " AHB4_W_PRIORITY ,Priority of write commands from AHB port 4" "0(highest),1,2,3,4,5,6,7(lowest)" line.long 0x40 "MEM16_CTL,Memory Control Register 16" bitfld.long 0x40 24.--26. " BSTLEN ,Burst length" "Reserved,2 words,4 words,8 words,?..." bitfld.long 0x40 16.--18. " AHB6_W_PRIORITY ,Priority of write commands from AHB port 6" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x40 8.--10. " AHB6_R_PRIORITY ,Priority of read commands from AHB port 6" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x40 0.--2. " AHB6_R_PRIORITY ,Ahb6 port ordering" "0,1,2,3,4,5,6,7" line.long 0x44 "MEM17_CTL,Memory Control Register 17" bitfld.long 0x44 24.--26. " TCKE ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7" bitfld.long 0x44 16.--18. " OUT_OF_RNG_SRC_ID ,Out of Range Source Id" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x44 8.--10. " COLUMN_SIZE ,Column Size" "0,1,2,3,4,5,6,7" bitfld.long 0x44 0.--2. " CASLAT ,CAS (Column Address Strobe) latency" "0,1,2,3,4,5,6,7" line.long 0x48 "MEM18_CTL,Memory Control Register 18" bitfld.long 0x48 24.--26. " TRTP ,DRAM tRTP (read to pre-charge time) parameter" "0,1,2,3,4,5,6,7" bitfld.long 0x48 16.--18. " TRRD ,DRAM activate to activate delay for different banks" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x48 8.--10. " TPDEX ,DRAM power-down exit command period" "0,1,2,3,4,5,6,7" bitfld.long 0x48 0.--2. " TEMRS ,DRAM extended mode parameter set time" "0,1,2,3,4,5,6,7" line.long 0x4c "MEM19_CTL,Memory Control Register 19" bitfld.long 0x4c 24.--26. " WRLAT ,Write latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4c 18. " WGT_RRB_WGT_SHAR[4:5] ,Weighted round robin weight sharing ports 4/5" "Independently,Tied together" textline " " bitfld.long 0x4c 17. " WGT_RRB_WGT_SHAR[2:3] ,Weighted round robin weight sharing ports 2/3" "Independently,Tied together" textline " " bitfld.long 0x4c 16. " WGT_RRB_WGT_SHAR[0:1] ,Weighted round robin weight sharing ports 0/1" "Independently,Tied together" textline " " bitfld.long 0x4c 8.--10. " TWTR ,Number of cycles needed to switch from a write to a read operation" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4c 0.--2. " TWR_INT ,DRAM write recovery time" "0,1,2,3,4,5,6,7" line.long 0x50 "MEM20_CTL,Memory Control Register 20" bitfld.long 0x50 24.--28. " AHB0_PRY2_REL_PRY ,Ahb0 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 16.--20. " AHB0_PRY1_REL_PRY ,Ahb0 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x50 8.--12. " AHB0_PRY0_REL_PRY ,Ahb0 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 0.--5. " AGE_COUNT ,Initial value of the master aging-rate counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x54 "MEM21_CTL,Memory Control Register 21" bitfld.long 0x54 24.--28. " AHB0_PRY6_REL_PRY ,Ahb0 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 16.--20. " AHB0_PRY5_REL_PRY ,Ahb0_priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x54 8.--12. " AHB0_PRY4_REL_PRY ,Ahb0_priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 0.--4. " AHB0_PRY3_REL_PRY ,Ahb0_priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "MEM22_CTL,Memory Control Register 22" bitfld.long 0x58 24.--28. " AHB1_PRY2_REL_PRY ,Ahb1 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 16.--20. " AHB1_PRY1_REL_PRY ,Ahb1 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x58 8.--12. " AHB1_PRY0_REL_PRY ,Ahb1 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 0.--4. " AHB0_PRY7_REL_PRY ,Ahb0 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x5c "MEM23_CTL,Memory Control Register 23" bitfld.long 0x5c 24.--28. " AHB1_PRY6_REL_PRY ,Ahb1 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x5c 16.--20. " AHB1_PRY5_REL_PRY ,Ahb1 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x5c 8.--12. " AHB1_PRY4_REL_PRY ,Ahb1 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x5c 0.--4. " AHB1_PRY3_REL_PRY ,Ahb1 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x60 "MEM24_CTL,Memory Control Register 24" bitfld.long 0x60 24.--28. " AHB2_PRY2_REL_PRY ,Ahb2 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x60 16.--20. " AHB2_PRY1_REL_PRY ,Ahb2 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x60 8.--12. " AHB2_PRY0_REL_PRY ,Ahb2 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x60 0.--4. " AHB1_PRY7_REL_PRY ,Ahb1 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x64 "MEM25_CTL,Memory Control Register 25" bitfld.long 0x64 24.--28. " AHB2_PRY6_REL_PRY ,Ahb2_priority6_relative_priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x64 16.--20. " AHB2_PRY5_REL_PRY ,Ahb2 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x64 8.--12. " AHB2_PRY4_REL_PRY ,Ahb2 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x64 0.--4. " AHB2_PRY3_REL_PRY ,Ahb2 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x68 "MEM26_CTL,Memory Control Register 26" bitfld.long 0x68 24.--28. " AHB3_PRY2_REL_PRY ,Ahb3 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 16.--20. " AHB3_PRY1_REL_PRY ,Ahb3 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x68 8.--12. " AHB3_PRY0_REL_PRY ,Ahb3 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 0.--4. " AHB2_PRY7_REL_PRY ,Ahb2 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x6c "MEM27_CTL,Memory Control Register 27" bitfld.long 0x6c 24.--28. " AHB3_PRY6_REL_PRY ,Ahb3 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x6c 16.--20. " AHB3_PRY5_REL_PRY ,Ahb3 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x6c 8.--12. " AHB3_PRY4_REL_PRY ,Ahb3 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x6c 0.--4. " AHB3_PRY3_REL_PRY ,Ahb3 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x70 "MEM28_CTL,Memory Control Register 28" bitfld.long 0x70 24.--28. " AHB4_PRY2_REL_PRY ,Ahb4 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x70 16.--20. " AHB4_PRY1_REL_PRY ,Ahb4 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x70 8.--12. " AHB4_PRY0_REL_PRY ,Ahb4 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x70 0.--4. " AHB3_PRY7_REL_PRY ,Ahb3 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x74 "MEM29_CTL,Memory Control Register 29" bitfld.long 0x74 24.--28. " AHB4_PRY6_REL_PRY ,Ahb4 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x74 16.--20. " AHB4_PRY5_REL_PRY ,Ahb4 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x74 8.--12. " AHB4_PRY4_REL_PRY ,Ahb4 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x74 0.--4. " AHB4_PRY3_REL_PRY ,Ahb4 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x78 "MEM30_CTL,Memory Control Register 30" bitfld.long 0x78 24.--28. " AHB5_PRY2_REL_PRY ,Ahb5 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x78 16.--20. " AHB5_PRY1_REL_PRY ,Ahb5 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x78 8.--12. " AHB5_PRY0_REL_PRY ,Ahb5 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x78 0.--4. " AHB4_PRY7_REL_PRY ,Ahb4 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x7c "MEM31_CTL,Memory Control Register 31" bitfld.long 0x7c 24.--28. " AHB5_PRY6_REL_PRY ,Ahb6 priority6 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x7c 16.--20. " AHB5_PRY5_REL_PRY ,Ahb5 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x7c 8.--12. " AHB5_PRY4_REL_PRY ,Ahb5 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x7c 0.--4. " AHB5_PRY3_REL_PRY ,Ahb5 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x80 "MEM32_CTL,Memory Control Register 32" bitfld.long 0x80 24.--28. " AHB6_PRY2_REL_PRY ,Ahb6 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x80 16.--20. " AHB6_PRY1_REL_PRY ,Ahb6 priority1 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x80 8.--12. " AHB6_PRY0_REL_PRY ,Ahb6 priority0 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x80 0.--4. " AHB5_PRY7_REL_PRY ,Ahb5 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x84 "MEM33_CTL,Memory Control Register 33" bitfld.long 0x84 24.--28. " AHB6_PRY6_REL_PRY ,Ahb6 priority2 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x84 16.--20. " AHB6_PRY5_REL_PRY ,Ahb6 priority5 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x84 8.--12. " AHB6_PRY4_REL_PRY ,Ahb6 priority4 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x84 0.--4. " AHB6_PRY3_REL_PRY ,Ahb6 priority3 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x88 "MEM34_CTL,Memory Control Register 34" bitfld.long 0x88 24.--28. " CASLAT_LIN_GATE ,Adjusts the data capture gate open time by 1/2 cycle increments" "Reserved,Reserved,Reserved,1.5 cycles,2 cycles,2.5 cycles,3 cycles,3.5 cycles,4 cycles,Reserved,5 cycles,?..." bitfld.long 0x88 16.--20. " CASLAT_LIN ,CAS latency linear value in 1/2 cycle increments" "Reserved,Reserved,Reserved,1.5 cycles,2 cycles,2.5 cycles,3 cycles,3.5 cycles,4 cycles,Reserved,5 cycles,?..." textline " " bitfld.long 0x88 8.--11. " APREBIT ,Location of the auto pre-charge bit in the DRAM address in decimal encoding" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 0.--4. " AHB6_PRY7_REL_PRY ,Ahb6 priority7 relative priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8c "MEM35_CTL,Memory Control Register 35" bitfld.long 0x8c 24.--27. " MAX_ROW_REG ,Maximum width of the memory address bus for the memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8c 16.--19. " MAX_COL_REG , 1,518 bytes and with CRC error" in hgroup.long 0x1a4++0x03 hide.long 0x00 "RXUNDERSIZE_G,Number of frames received with length < 64 bytes; without any errors" in hgroup.long 0x1a8++0x03 hide.long 0x00 "RXOVERSIZE_G,Number of frames received with length > maxsize without errors" in hgroup.long 0x1ac++0x03 hide.long 0x00 "RX64OCTECTS_GB,Number of good and bad frames received with length 64 bytes" in hgroup.long 0x1b0++0x03 hide.long 0x00 "RX65TO127OCTECTS_GB,Number of good and bad frames received with length 127-255 bytes" in hgroup.long 0x1b4++0x03 hide.long 0x00 "RX128TO255OCTECTS_GB,Number of good and bad frames transmitted with length 127-255 bytes" in hgroup.long 0x1b8++0x03 hide.long 0x00 "RX256TO511OCTECTS_GB,Number of good and bad frames transmitted with length 256-511 bytes" in hgroup.long 0x1bc++0x03 hide.long 0x00 "RX512TO1023OCTECTS_GB,Number of good and bad frames transmitted with length 512-1023 bytes" in hgroup.long 0x1c0++0x03 hide.long 0x00 "RX1023TOMAXOCTECTS_GB,Number of good and bad frames transmitted with length 1023-maxsize bytes" in hgroup.long 0x1c4++0x03 hide.long 0x00 "RXUNICASTFRAMES_G,Number of good unicast frames received" in hgroup.long 0x1c8++0x03 hide.long 0x00 "RXLENGTHERROR,Number of frames received with length error" in hgroup.long 0x1cc++0x03 hide.long 0x00 "RXOUTOFRANGETYPE,number of frames receivedwwith length field not equal to the valid frame size" in hgroup.long 0x1d0++0x03 hide.long 0x00 "RXPAUSEFRAMES,Number of good and valid PAUSE frames received" in hgroup.long 0x1d4++0x03 hide.long 0x00 "RXFIFOOVERFLOW,Number of missed received frames due to FIFO overflow" in hgroup.long 0x1d8++0x03 hide.long 0x00 "RXVLANFRAMES_GB,Number of good and bad VLAN frames received" in hgroup.long 0x1dc++0x03 hide.long 0x00 "RXWATCHDOGERROR,Number of frames received with error due to watchdog timeout error" in endif width 0xb tree.end else tree "MAC-Univ (Ether MAC 10/100)" base asd:0xE0800000 width 21. sif (cpu()=="SPEAR600") group.long 0x1000++0x23 "GMAC-UNIV DMA registers" else group.long 0x1000++0x23 "MAC-UNIV DMA registers" endif line.long 0x00 "BMR,Bus Mode Register" bitfld.long 0x0 16. " FB ,Fixed Burst" "SINGLE & INCR burst,Fixed burst" bitfld.long 0x0 14.--15. " PR ,Rx: Tx Priority Ratio" "1:1,2:1,3:1,4:1" textline " " bitfld.long 0x0 8.--13. " PBL ,Programmable Burst Length" "Reserved,1,2,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32,?..." bitfld.long 0x0 2.--6. " DSL ,Descriptor Skip Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0 1. " DA ,DMA Arbitration scheme" "Round robin with Rx,Rx has priority over Tx" bitfld.long 0x0 0. " SWR ,Software Reset" "No reset,Reset" line.long 0x4 "TXPDR,Transmit Poll Demand Register" line.long 0x8 "RXPDR,Receive Poll Demand Register" line.long 0xc "RXDLAR,Receive Descriptor List Address Register" line.long 0x10 "TXDLAR,Transmit Descriptor List Address Register" line.long 0x14 "STATR,Status Register" sif (cpu()=="SPEAR600") rbitfld.long 0x14 28. " GPI ,GMAC PMT Interrupt" "No interrupt,Interrupt" rbitfld.long 0x14 27. " GMI ,GMAC MMC Interrupt" "No interrupt,Interrupt" else rbitfld.long 0x14 28. " GPI ,MAC PMT Interrupt" "No interrupt,Interrupt" rbitfld.long 0x14 27. " GMI ,MAC MMC Interrupt" "No interrupt,Interrupt" endif textline " " rbitfld.long 0x14 25. " EB[25] ,Error during data buffer/descriptor access" "Data buffer,Descriptor" rbitfld.long 0x14 24. " EB[24] ,Error during read/write transfer" "Write,Read" textline " " rbitfld.long 0x14 23. " EB[23] ,Error during data transferby RxDMA/TxDMA" "RxDMA,TxDMA" rbitfld.long 0x14 20.--22. " TS ,Transmit Process State" "Reset /stop Tx issued,Fetching Tx transfer descriptor,Waiting for status,Reading data & queuing it to Tx buf.,Reserved,Reserved,Tx descriptor unavailable or Tx buf. underflow,Closing Tx descriptor" textline " " rbitfld.long 0x14 17.--19. " RS ,Receive Process State" "Reset/stop Rx issued,Fetching Rx transfer descriptor,Reserved,Waiting for Rx packet,Rx descriptor unavailable,Closing Rx descriptor,Reserved,Transf. Rx packet data from Rx buffer to host mem." eventfld.long 0x14 16. " NIS ,Normal Interrupt Summary" "0,1" textline " " eventfld.long 0x14 15. " AIS ,Abnormal Interrupt Summary" "0,1" eventfld.long 0x14 14. " ERI ,Early Receive Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x14 13. " FBI ,Fatal Bus Error Interrupt" "No interrupt,Interrupt" eventfld.long 0x14 10. " ETI ,Early Transmit Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x14 9. " RWT ,Receive Watchdog Timeout" "Not received,Received" eventfld.long 0x14 8. " RPS ,Receive Process Stopped" "Not stopped,Stopped" textline " " eventfld.long 0x14 7. " RU ,Receive Buffer Unavailable" "Not owned,Owned" eventfld.long 0x14 6. " RI ,Receive Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x14 5. " UNF ,Transmit Underflow" "No underflow,Underflow" eventfld.long 0x14 4. " OVF ,Receive Overflow" "No overflow,Overflow" textline " " eventfld.long 0x14 3. " TJT ,Transmit Jabber Timeout" "Not active,Active" eventfld.long 0x14 2. " TU ,Transmit Buffer Unavailable" "Not owned,Owned" textline " " eventfld.long 0x14 1. " TPS ,Transmit Process Stopped" "Not stopped,Stopped" eventfld.long 0x14 0. " TI ,Transmit Interrupt" "No interrupt,Interrupt" line.long 0x18 "OMR,Operation Mode Register" bitfld.long 0x18 21. " SF ,Store and Forward" "Not full,Full" bitfld.long 0x18 20. " FTF ,Flush Transmit FIFO" "Not flushed,Flushed" textline " " bitfld.long 0x18 14.--16. " TTC ,Transmit Threshold Control" "64,128,192,256,40,32,24,16" bitfld.long 0x18 13. " ST ,Start/Stop Transmission Command" "Stop,Start" textline " " bitfld.long 0x18 11.--12. " RFD ,Threshold for De-activating Flow Control" "(Full-1K) bytes,(Full-2K) bytes,(Full-3K) bytes,(Full-4K) bytes" bitfld.long 0x18 9.--10. " RFA ,Threshold for Activating Flow Control" "(Full-1K) bytes,(Full-2K) bytes,(Full-3K) bytes,(Full-4K) bytes" textline " " bitfld.long 0x18 8. " EFC ,Enable HW Flow Control" "Disabled,Enabled" bitfld.long 0x18 7. " FEF ,Forward Error Frames" "Dropped,Forwarded" textline " " bitfld.long 0x18 6. " FUF ,Forward Undersized Good Frames" "Dropped,Forwarded" bitfld.long 0x18 3.--4. " RTC ,Receive Threshold Control" "64,32,96,128" textline " " bitfld.long 0x18 2. " OSF ,Operate on Second Frame" "Not operated,Operated" bitfld.long 0x18 1. " SR ,Start/Stop Receive" "Stopped,Started" line.long 0x1c "IER,Interrupt Enable Register" bitfld.long 0x1c 16. " NIE ,Normal Interrupt Summary Enable" "Disabled,Enabled" bitfld.long 0x1c 15. " AIE ,Abnormal Interrupt Summary Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 14. " ERE ,Early Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1c 13. " FBE ,Fatal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 10. " ETE ,Early Transmit Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1c 9. " RWE ,Receive Watchdog Timeout Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 8. " RSE ,Receive Stopped Enable" "Disabled,Enabled" bitfld.long 0x1c 7. " RUE ,Receive Buffer Unavailable Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1c 5. " UNE ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 4. " OVE ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1c 3. " TJE ,Transmit Jabber Timeout Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 2. " TUE ,Transmit Buffer Unavailable Enable" "Disabled,Enabled" bitfld.long 0x1c 1. " TSE ,Transmit Stopped Enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 0. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" line.long 0x20 "MFBOCR,Missed Frame and Buffer Overflow Counter Register" bitfld.long 0x20 28. " OFOC ,Overflow for FIFO Overflow Counter" "No overflow,Overflow" hexmask.long.word 0x20 17.--27. 1. " NFMA ,Number of frames missed by the application" textline " " bitfld.long 0x20 16. " OMFC ,Overflow for Missed Frame Counter" "No overflow,Overflow" hexmask.long.word 0x20 0.--15. 1. " NFMC ,Number of frames missed by the controller" rgroup.long 0x1048++0x0f line.long 0x00 "CHTXDR,Current Host Transmit Descriptor Register" line.long 0x04 "CHRXDR,Current Host Receive Descriptor Register" sif (cpu()=="SPEAR300") bitfld.long 0x04 13. " DO ,Disable Receive Own" "No,Yes" bitfld.long 0x04 12. " LM ,Loop-back Mode" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " DM ,Duplex Mode" "Disabled,Enabled" bitfld.long 0x04 10. " IPC ,Checksum Offload" "Low,High" textline " " bitfld.long 0x04 9. " DR ,Disable Retry" "No,Yes" bitfld.long 0x04 7. " ACS ,Automatic Pad/CRC Stripping" "Disabled,Enabled" textline " " bitfld.long 0x04 5.--6. " BL ,Back-off Limit" "0,1,2,3" bitfld.long 0x04 4. " DC ,Deferral Check" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " TE ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x04 2. " RE ,Receiver enable" "Disabled,Enabled" endif line.long 0x08 "CHTBAR,Current Host Transmit Buffer Address Register" line.long 0x0c "CHRBAR,Current Host Receive Buffer Address Register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") if (((data.long(asd:0xE0800000))&0x800)==0x00) group.long 0x00++0x03 "MAC-UNIV MAC global registers" line.long 0x00 "MCR,MAC Configuration Register" bitfld.long 0x00 23. " WD ,Watchdog Disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber Disable" "No,Yes" textline " " bitfld.long 0x00 20. " JE ,Jumbo Frame Enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter Frame Gap" "96,88,80,72,64,56,48,40" textline " " bitfld.long 0x00 16. " DCRS ,Disable Carrier Sense During Transmission" "No,Yes" bitfld.long 0x00 13. " DO ,Disable Receive Own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loop-back Mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex Mode" "Half-duplex,Full-duplex" textline " " bitfld.long 0x00 10. " IPC ,Checksum Offload" "Not offloaded,Offloaded" bitfld.long 0x00 9. " DR ,Disable Retry" "No,Yes" textline " " bitfld.long 0x00 7. " ACS ,Automatic Pad/CRC Stripping" "Not stripped,Stripped" bitfld.long 0x00 5.--6. " BL ,Back-off Limit" "Min(n;10),Min(n;8),Min(n;4),Min(n;1)" textline " " bitfld.long 0x00 4. " DC ,Deferral Check" "Disabled,Enabled" bitfld.long 0x00 3. " TE ,Transmitter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RE ,Receiver Enable" "Disabled,Enabled" else group.long 0x00++0x03 "MAC-UNIV MAC global registers" line.long 0x00 "MCR,MAC Configuration Register" bitfld.long 0x00 23. " WD ,Watchdog Disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber Disable" "No,Yes" textline " " bitfld.long 0x00 20. " JE ,Jumbo Frame Enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter Frame Gap" "96,88,80,72,64,56,48,40" textline " " bitfld.long 0x00 16. " DCRS ,Disable Carrier Sense During Transmission" "No,Yes" rbitfld.long 0x00 13. " DO ,Disable Receive Own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loop-back Mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex Mode" "Half-duplex,Full-duplex" textline " " bitfld.long 0x00 10. " IPC ,Checksum Offload" "Not offloaded,Offloaded" bitfld.long 0x00 7. " ACS ,Automatic Pad/CRC Stripping" "Not stripped,Stripped" textline " " bitfld.long 0x00 3. " TE ,Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver Enable" "Disabled,Enabled" endif else sif (cpu()=="SPEAR600") group.long 0x00++0x03 "GMAC-UNIV GMAC global registers" else group.long 0x00++0x03 "MAC-UNIV MAC global registers" endif line.long 0x00 "MCR,MAC Configuration Register" bitfld.long 0x00 23. " WD ,Watchdog Disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber Disable" "No,Yes" textline " " sif (cpu()=="SPEAR600") bitfld.long 0x00 21. " BE ,Frame Burst Enable" "Disabled,Enabled" bitfld.long 0x00 20. " JE ,Jumbo Frame Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--19. " IFG ,Inter Frame Gap" "96,88,80,72,64,56,48,40" bitfld.long 0x00 15. " PS ,Port Select" "GMII (1000 Mbps),MII (10/100 Mbps)" else bitfld.long 0x00 20. " JE ,Jumbo Frame Enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter Frame Gap" "96,88,80,72,64,56,48,40" endif textline " " bitfld.long 0x00 14. " FES ,Speed (in Fast Ethernet mode)" "10 Mbps,100 Mbps" bitfld.long 0x00 13. " DO ,Disable Receive Own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loop-back Mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex Mode" "Half-duplex,Full-duplex" textline " " bitfld.long 0x00 10. " IPC ,Checksum Offload" "Not offloaded,Offloaded" bitfld.long 0x00 9. " DR ,Disable Retry" "No,Yes" textline " " bitfld.long 0x00 7. " ACS ,Automatic Pad/CRC Stripping" "Not stripped,Stripped" bitfld.long 0x00 5.--6. " BL ,Back-off Limit" "Min(n;10),Min(n;8),Min(n;4),Min(n;1)" textline " " bitfld.long 0x00 4. " DC ,Deferral Check" "Disabled,Enabled" bitfld.long 0x00 3. " TE ,Transmitter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RE ,Receiver Enable" "Disabled,Enabled" endif group.long 0x04++0x13 line.long 0x00 "MFFR,MAC Frame Filter Register" bitfld.long 0x00 31. " RA ,Receive All" "Not received,Received" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 10. " HPF ,Hash or Perfect Filter" "Hash,Perfect" textline " " endif bitfld.long 0x00 9. " SAF ,Source Address Filter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " SAIF ,SA Inverse Filtering" "Not matched,Matched" bitfld.long 0x00 6.--7. " PCF ,Pass Control Frames" "From reaching application,From reaching application,Even if they fail the address filter,Pass the address filter" textline " " bitfld.long 0x00 5. " DBF ,Disable Broadcast Frames" "No,Yes" bitfld.long 0x00 4. " PM ,Pass All Multicasts" "Not passed,Pass" textline " " bitfld.long 0x00 3. " DAIF ,DA Inverse Filtering" "Not matched,Matched" bitfld.long 0x00 2. " HMC ,Hash MultiCast" "Perfect,Hash" textline " " bitfld.long 0x00 1. " HUC ,Hash UniCast" "Perfect,Hash" bitfld.long 0x00 0. " PR ,Promiscuous Mode" "Disabled,Enabled" line.long 0x04 "HTHR,Hash Table High Register" line.long 0x08 "HTLR,Hash Table Low Register" sif (cpu()=="SPEAR600") line.long 0x0C "RGAR,GMII Address Register" else line.long 0x0C "RGAR,MII Address Register" endif bitfld.long 0x0C 11.--15. " PA ,Physical Layer Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " sif (cpu()=="SPEAR600") bitfld.long 0x0C 6.--10. " GR ,GMII Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else bitfld.long 0x0C 6.--10. " GR ,MII Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif textline " " bitfld.long 0x0C 2.--4. " CR ,CSR Clock Range" "60-100 MHz,100-150 MHz,20-35 MHz,35-60 MHz,150-250 MHz,250-300 MHz,?..." textline " " sif (cpu()=="SPEAR600") bitfld.long 0x0C 1. " GW ,GMII Write" "Read,Write" textline " " bitfld.long 0x0C 0. " GB ,GMII Busy" "Not busy,Busy" line.long 0x10 "GDR,GMII Data Register" hexmask.long.word 0x10 0.--15. 1. " GD ,GMII Data" else bitfld.long 0x0C 1. " GW ,MII Write" "Read,Write" textline " " bitfld.long 0x0C 0. " GB ,MII Busy" "Not busy,Busy" line.long 0x10 "GDR,MII Data Register" hexmask.long.word 0x10 0.--15. 1. " GD ,MII Data" endif if (((data.long(asd:0xE0800000))&0x800)==0x00) group.long 0x18++0x03 line.long 0x00 "FCR,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause Time" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 7. " DZPQ ,Disable Zero-Quanta Pause" "No,Yes" endif textline " " bitfld.long 0x00 4.--5. " PLT ,Pause Low Threshold" "4,28,144,256" textline " " bitfld.long 0x00 3. " UP ,Unicast Pause Frame Detect" "Not detected,Detected" bitfld.long 0x00 2. " RFE ,Receive Flow Control Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TFE ,Transmit Flow Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " BPA ,Back-Pressure Activate" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FCL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause Time" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 7. " DZPQ ,Disable Zero-Quanta Pause" "No,Yes" endif bitfld.long 0x00 4.--5. " PLT ,Pause Low Threshold" "4,28,144,256" textline " " bitfld.long 0x00 3. " UP ,Unicast Pause Frame Detect" "Not detected,Detected" bitfld.long 0x00 2. " RFE ,Receive Flow Control Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TFE ,Transmit Flow Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow Control Busy" "Not busy,Busy" endif group.long 0x1c++0x03 line.long 0x00 "VTR,VLAN Tag Register" hexmask.long.word 0x00 0.--15. 1. " VL ,VLAN Tag Identifier" rgroup.long 0x20++0x03 line.long 0x00 "VER,Version Register" group.long 0x28++0x03 line.long 0x00 "WFFR,Wake-up Frame Filter Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") base ((data.long(asd:0xE0800000+0x28))&0xffffffff) group.long 0x00++0x1f line.long 0x00 "WKUPFMFILTER_REG0,Wake-up Frame Filter register 0" bitfld.long 0x00 31. " FBM0[31] ,Filter 0 Byte Mask bit 31" "Not wake-up,Wake-up" bitfld.long 0x00 30. " FBM0[30] ,Filter 0 Byte Mask bit 30" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 29. " FBM0[29] ,Filter 0 Byte Mask bit 29" "Not wake-up,Wake-up" bitfld.long 0x00 28. " FBM0[28] ,Filter 0 Byte Mask bit 28" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 27. " FBM0[27] ,Filter 0 Byte Mask bit 27" "Not wake-up,Wake-up" bitfld.long 0x00 26. " FBM0[26] ,Filter 0 Byte Mask bit 26" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 25. " FBM0[25] ,Filter 0 Byte Mask bit 25" "Not wake-up,Wake-up" bitfld.long 0x00 24. " FBM0[24] ,Filter 0 Byte Mask bit 24" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 23. " FBM0[23] ,Filter 0 Byte Mask bit 23" "Not wake-up,Wake-up" bitfld.long 0x00 22. " FBM0[22] ,Filter 0 Byte Mask bit 22" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 21. " FBM0[21] ,Filter 0 Byte Mask bit 21" "Not wake-up,Wake-up" bitfld.long 0x00 20. " FBM0[20] ,Filter 0 Byte Mask bit 20" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 19. " FBM0[19] ,Filter 0 Byte Mask bit 19" "Not wake-up,Wake-up" bitfld.long 0x00 18. " FBM0[18] ,Filter 0 Byte Mask bit 18" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 17. " FBM0[17] ,Filter 0 Byte Mask bit 17" "Not wake-up,Wake-up" bitfld.long 0x00 16. " FBM0[16] ,Filter 0 Byte Mask bit 16" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 15. " FBM0[15] ,Filter 0 Byte Mask bit 15" "Not wake-up,Wake-up" bitfld.long 0x00 14. " FBM0[14] ,Filter 0 Byte Mask bit 14" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 13. " FBM0[13] ,Filter 0 Byte Mask bit 13" "Not wake-up,Wake-up" bitfld.long 0x00 12. " FBM0[12] ,Filter 0 Byte Mask bit 12" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 11. " FBM0[11] ,Filter 0 Byte Mask bit 11" "Not wake-up,Wake-up" bitfld.long 0x00 10. " FBM0[10] ,Filter 0 Byte Mask bit 10" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 9. " FBM0[9] ,Filter 0 Byte Mask bit 9" "Not wake-up,Wake-up" bitfld.long 0x00 8. " FBM0[8] ,Filter 0 Byte Mask bit 8" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 7. " FBM0[7] ,Filter 0 Byte Mask bit 7" "Not wake-up,Wake-up" bitfld.long 0x00 6. " FBM0[6] ,Filter 0 Byte Mask bit 6" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 5. " FBM0[5] ,Filter 0 Byte Mask bit 5" "Not wake-up,Wake-up" bitfld.long 0x00 4. " FBM0[4] ,Filter 0 Byte Mask bit 4" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 3. " FBM0[3] ,Filter 0 Byte Mask bit 3" "Not wake-up,Wake-up" bitfld.long 0x00 2. " FBM0[2] ,Filter 0 Byte Mask bit 2" "Not wake-up,Wake-up" textline " " bitfld.long 0x00 1. " FBM0[1] ,Filter 0 Byte Mask bit 1" "Not wake-up,Wake-up" bitfld.long 0x00 0. " FBM0[0] ,Filter 0 Byte Mask bit 0" "Not wake-up,Wake-up" line.long 0x04 "WKUPFMFILTER_REG1,Wake-up Frame Filter register 1" bitfld.long 0x04 31. " FBM1[31] ,Filter 1 Byte Mask bit 31" "Not wake-up,Wake-up" bitfld.long 0x04 30. " FBM1[30] ,Filter 1 Byte Mask bit 30" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 29. " FBM1[29] ,Filter 1 Byte Mask bit 29" "Not wake-up,Wake-up" bitfld.long 0x04 28. " FBM1[28] ,Filter 1 Byte Mask bit 28" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 27. " FBM1[27] ,Filter 1 Byte Mask bit 27" "Not wake-up,Wake-up" bitfld.long 0x04 26. " FBM1[26] ,Filter 1 Byte Mask bit 26" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 25. " FBM1[25] ,Filter 1 Byte Mask bit 25" "Not wake-up,Wake-up" bitfld.long 0x04 24. " FBM1[24] ,Filter 1 Byte Mask bit 24" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 23. " FBM1[23] ,Filter 1 Byte Mask bit 23" "Not wake-up,Wake-up" bitfld.long 0x04 22. " FBM1[22] ,Filter 1 Byte Mask bit 22" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 21. " FBM1[21] ,Filter 1 Byte Mask bit 21" "Not wake-up,Wake-up" bitfld.long 0x04 20. " FBM1[20] ,Filter 1 Byte Mask bit 20" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 19. " FBM1[19] ,Filter 1 Byte Mask bit 19" "Not wake-up,Wake-up" bitfld.long 0x04 18. " FBM1[18] ,Filter 1 Byte Mask bit 18" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 17. " FBM1[17] ,Filter 1 Byte Mask bit 17" "Not wake-up,Wake-up" bitfld.long 0x04 16. " FBM1[16] ,Filter 1 Byte Mask bit 16" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 15. " FBM1[15] ,Filter 1 Byte Mask bit 15" "Not wake-up,Wake-up" bitfld.long 0x04 14. " FBM1[14] ,Filter 1 Byte Mask bit 14" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 13. " FBM1[13] ,Filter 1 Byte Mask bit 13" "Not wake-up,Wake-up" bitfld.long 0x04 12. " FBM1[12] ,Filter 1 Byte Mask bit 12" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 11. " FBM1[11] ,Filter 1 Byte Mask bit 11" "Not wake-up,Wake-up" bitfld.long 0x04 10. " FBM1[10] ,Filter 1 Byte Mask bit 10" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 9. " FBM1[9] ,Filter 1 Byte Mask bit 9" "Not wake-up,Wake-up" bitfld.long 0x04 8. " FBM1[8] ,Filter 1 Byte Mask bit 8" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 7. " FBM1[7] ,Filter 1 Byte Mask bit 7" "Not wake-up,Wake-up" bitfld.long 0x04 6. " FBM1[6] ,Filter 1 Byte Mask bit 6" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 5. " FBM1[5] ,Filter 1 Byte Mask bit 5" "Not wake-up,Wake-up" bitfld.long 0x04 4. " FBM1[4] ,Filter 1 Byte Mask bit 4" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 3. " FBM1[3] ,Filter 1 Byte Mask bit 3" "Not wake-up,Wake-up" bitfld.long 0x04 2. " FBM1[2] ,Filter 1 Byte Mask bit 2" "Not wake-up,Wake-up" textline " " bitfld.long 0x04 1. " FBM1[1] ,Filter 1 Byte Mask bit 1" "Not wake-up,Wake-up" bitfld.long 0x04 0. " FBM1[0] ,Filter 1 Byte Mask bit 0" "Not wake-up,Wake-up" line.long 0x08 "WKUPFMFILTER_REG2,Wake-up Frame Filter register 2" bitfld.long 0x08 31. " FBM2[31] ,Filter 2 Byte Mask bit 31" "Not wake-up,Wake-up" bitfld.long 0x08 30. " FBM2[30] ,Filter 2 Byte Mask bit 30" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 29. " FBM2[29] ,Filter 2 Byte Mask bit 29" "Not wake-up,Wake-up" bitfld.long 0x08 28. " FBM2[28] ,Filter 2 Byte Mask bit 28" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 27. " FBM2[27] ,Filter 2 Byte Mask bit 27" "Not wake-up,Wake-up" bitfld.long 0x08 26. " FBM2[26] ,Filter 2 Byte Mask bit 26" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 25. " FBM2[25] ,Filter 2 Byte Mask bit 25" "Not wake-up,Wake-up" bitfld.long 0x08 24. " FBM2[24] ,Filter 2 Byte Mask bit 24" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 23. " FBM2[23] ,Filter 2 Byte Mask bit 23" "Not wake-up,Wake-up" bitfld.long 0x08 22. " FBM2[22] ,Filter 2 Byte Mask bit 22" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 21. " FBM2[21] ,Filter 2 Byte Mask bit 21" "Not wake-up,Wake-up" bitfld.long 0x08 20. " FBM2[20] ,Filter 2 Byte Mask bit 20" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 19. " FBM2[19] ,Filter 2 Byte Mask bit 19" "Not wake-up,Wake-up" bitfld.long 0x08 18. " FBM2[18] ,Filter 2 Byte Mask bit 18" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 17. " FBM2[17] ,Filter 2 Byte Mask bit 17" "Not wake-up,Wake-up" bitfld.long 0x08 16. " FBM2[16] ,Filter 2 Byte Mask bit 16" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 15. " FBM2[15] ,Filter 2 Byte Mask bit 15" "Not wake-up,Wake-up" bitfld.long 0x08 14. " FBM2[14] ,Filter 2 Byte Mask bit 14" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 13. " FBM2[13] ,Filter 2 Byte Mask bit 13" "Not wake-up,Wake-up" bitfld.long 0x08 12. " FBM2[12] ,Filter 2 Byte Mask bit 12" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 11. " FBM2[11] ,Filter 2 Byte Mask bit 11" "Not wake-up,Wake-up" bitfld.long 0x08 10. " FBM2[10] ,Filter 2 Byte Mask bit 10" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 9. " FBM2[9] ,Filter 2 Byte Mask bit 9" "Not wake-up,Wake-up" bitfld.long 0x08 8. " FBM2[8] ,Filter 2 Byte Mask bit 8" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 7. " FBM2[7] ,Filter 2 Byte Mask bit 7" "Not wake-up,Wake-up" bitfld.long 0x08 6. " FBM2[6] ,Filter 2 Byte Mask bit 6" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 5. " FBM2[5] ,Filter 2 Byte Mask bit 5" "Not wake-up,Wake-up" bitfld.long 0x08 4. " FBM2[4] ,Filter 2 Byte Mask bit 4" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 3. " FBM2[3] ,Filter 2 Byte Mask bit 3" "Not wake-up,Wake-up" bitfld.long 0x08 2. " FBM2[2] ,Filter 2 Byte Mask bit 2" "Not wake-up,Wake-up" textline " " bitfld.long 0x08 1. " FBM2[1] ,Filter 2 Byte Mask bit 1" "Not wake-up,Wake-up" bitfld.long 0x08 0. " FBM2[0] ,Filter 2 Byte Mask bit 0" "Not wake-up,Wake-up" line.long 0x0c "WKUPFMFILTER_REG3,Wake-up Frame Filter register 3" bitfld.long 0x0c 31. " FBM3[31] ,Filter 3 Byte Mask bit 31" "Not wake-up,Wake-up" bitfld.long 0x0c 30. " FBM3[30] ,Filter 3 Byte Mask bit 30" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 29. " FBM3[29] ,Filter 3 Byte Mask bit 29" "Not wake-up,Wake-up" bitfld.long 0x0c 28. " FBM3[28] ,Filter 3 Byte Mask bit 28" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 27. " FBM3[27] ,Filter 3 Byte Mask bit 27" "Not wake-up,Wake-up" bitfld.long 0x0c 26. " FBM3[26] ,Filter 3 Byte Mask bit 26" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 25. " FBM3[25] ,Filter 3 Byte Mask bit 25" "Not wake-up,Wake-up" bitfld.long 0x0c 24. " FBM3[24] ,Filter 3 Byte Mask bit 24" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 23. " FBM3[23] ,Filter 3 Byte Mask bit 23" "Not wake-up,Wake-up" bitfld.long 0x0c 22. " FBM3[22] ,Filter 3 Byte Mask bit 22" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 21. " FBM3[21] ,Filter 3 Byte Mask bit 21" "Not wake-up,Wake-up" bitfld.long 0x0c 20. " FBM3[20] ,Filter 3 Byte Mask bit 20" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 19. " FBM3[19] ,Filter 3 Byte Mask bit 19" "Not wake-up,Wake-up" bitfld.long 0x0c 18. " FBM3[18] ,Filter 3 Byte Mask bit 18" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 17. " FBM3[17] ,Filter 3 Byte Mask bit 17" "Not wake-up,Wake-up" bitfld.long 0x0c 16. " FBM3[16] ,Filter 3 Byte Mask bit 16" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 15. " FBM3[15] ,Filter 3 Byte Mask bit 15" "Not wake-up,Wake-up" bitfld.long 0x0c 14. " FBM3[14] ,Filter 3 Byte Mask bit 14" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 13. " FBM3[13] ,Filter 3 Byte Mask bit 13" "Not wake-up,Wake-up" bitfld.long 0x0c 12. " FBM3[12] ,Filter 3 Byte Mask bit 12" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 11. " FBM3[11] ,Filter 3 Byte Mask bit 11" "Not wake-up,Wake-up" bitfld.long 0x0c 10. " FBM3[10] ,Filter 3 Byte Mask bit 10" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 9. " FBM3[9] ,Filter 3 Byte Mask bit 9" "Not wake-up,Wake-up" bitfld.long 0x0c 8. " FBM3[8] ,Filter 3 Byte Mask bit 8" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 7. " FBM3[7] ,Filter 3 Byte Mask bit 7" "Not wake-up,Wake-up" bitfld.long 0x0c 6. " FBM3[6] ,Filter 3 Byte Mask bit 6" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 5. " FBM3[5] ,Filter 3 Byte Mask bit 5" "Not wake-up,Wake-up" bitfld.long 0x0c 4. " FBM3[4] ,Filter 3 Byte Mask bit 4" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 3. " FBM3[3] ,Filter 3 Byte Mask bit 3" "Not wake-up,Wake-up" bitfld.long 0x0c 2. " FBM3[2] ,Filter 3 Byte Mask bit 2" "Not wake-up,Wake-up" textline " " bitfld.long 0x0c 1. " FBM3[1] ,Filter 3 Byte Mask bit 1" "Not wake-up,Wake-up" bitfld.long 0x0c 0. " FBM3[0] ,Filter 3 Byte Mask bit 0" "Not wake-up,Wake-up" line.long 0x10 "WKUPFMFILTER_REG4,Wake-up Frame Filter register 4" bitfld.long 0x10 27. " FC3[3] ,Filter 3 multicast/unicast frame" "Unicast,Multicast" bitfld.long 0x10 24. " FC3[0] ,Filter 3 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " FC2[3] ,Filter 2 multicast/unicast frame" "Unicast,Multicast" bitfld.long 0x10 16. " FC2[0] ,Filter 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " FC1[3] ,Filter 1 multicast/unicast frame" "Unicast,Multicast" bitfld.long 0x10 8. " FC1[0] ,Filter 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " FC0[3] ,Filter 0 multicast/unicast frame" "Unicast,Multicast" bitfld.long 0x10 0. " FC0[0] ,Filter 0 enable" "Disabled,Enabled" line.long 0x14 "WKUPFMFILTER_REG5,Wake-up Frame Filter register 5" hexmask.long.byte 0x14 24.--31. 1. " FO3 ,Filter 3 Offset" hexmask.long.byte 0x14 16.--23. 1. " FO2 ,Filter 2 Offset" textline " " hexmask.long.byte 0x14 8.--15. 1. " FO1 ,Filter 1 Offset" hexmask.long.byte 0x14 0.--7. 1. " FO0 ,Filter 0 Offset" line.long 0x18 "WKUPFMFILTER_REG6,Wake-up Frame Filter register 6" hexmask.long.word 0x18 16.--31. 1. " FCRC1 ,Filter 1 CRC value" hexmask.long.word 0x18 0.--15. 1. " FCRC0 ,Filter 0 CRC value" line.long 0x1c "WKUPFMFILTER_REG7,Wake-up Frame Filter register 7" hexmask.long.word 0x1c 16.--31. 1. " FCRC3 ,Filter 1 CRC value" hexmask.long.word 0x1c 0.--15. 1. " FCRC2 ,Filter 0 CRC value" base asd:0xE0800000 endif hgroup.long 0x2c++0x03 hide.long 0x00 "PCSR,PMT Control and Status Register" in sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x38++0x03 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 4. " INTSTAT[4] ,MMC interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " INTSTAT[3] ,PMT interrupt status" "No interrupt,Interrupt" group.long 0x3c++0x03 line.long 0x00 "IMR,Interrupt Mask Register" bitfld.long 0x00 3. " INTMASK[3] ,PMT interrupt mask" "Not masked,Masked" endif group.long 0x40++0x7f sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") line.long 0x00 "MAHR0,MAC Address0 High Register" rbitfld.long 0x00 31. " MO ,MO" "0,1" hexmask.long.word 0x00 0.--15. 1. " A[47:32] ,MAC Address0 [47:32]" line.long 0x04 "MALR0,MAC Address0 Low Register" hexmask.long.byte 0x04 0.--31. 1. " A[31:0] ,MAC Address0 [31:0]" else line.long 0x00 "MAHR0,MAC Address0 High Register" bitfld.long 0x00 31. " MO ,MO" "0,1" hexmask.long.byte 0x00 8.--15. 1. " A[47:40] ,MAC Address0 [47:40]" textline " " hexmask.long.byte 0x00 0.--7. 1. " A[39:32] ,MAC Address0 [39:32]" line.long 0x04 "MALR0,MAC Address0 Low Register" hexmask.long.byte 0x04 24.--31. 1. " A[31:24] ,MAC Address0 [31:24]" hexmask.long.byte 0x04 16.--23. 1. " A[23:16] ,MAC Address0 [23:16]" textline " " hexmask.long.byte 0x04 8.--15. 1. " A[15:8] ,MAC Address0 [15:8]" hexmask.long.byte 0x04 0.--7. 1. " A[7:0] ,MAC Address0 [7:0]" endif line.long 0x8 "MAHR1,MAC Address1 High Register" bitfld.long 0x8 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x8 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x8 29. " MBC[29] ,Mask Byte Control (Register1[15:8])" "Not masked,Masked" bitfld.long 0x8 28. " MBC[28] ,Mask Byte Control (Register1[7:0])" "Not masked,Masked" textline " " bitfld.long 0x8 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x8 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x8 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x8 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x8 0.--15. 1. " A[47:32] ,MAC Address1 [47:32]" else hexmask.long.byte 0x8 8.--15. 1. " A[47:40] ,MAC Address1 [47:40]" textline " " hexmask.long.byte 0x8 0.--7. 1. " A[39:32] ,MAC Address1 [39:32]" endif line.long (0x8+0x04) "MALR1,MAC Address1 Low Register" hexmask.long.byte (0x8+0x04) 24.--31. 1. " A[31:24] ,MAC Address1 [31:24]" hexmask.long.byte (0x8+0x04) 16.--23. 1. " A[23:16] ,MAC Address1 [23:16]" textline " " hexmask.long.byte (0x8+0x04) 8.--15. 1. " A[15:8] ,MAC Address1 [15:8]" hexmask.long.byte (0x8+0x04) 0.--7. 1. " A[7:0] ,MAC Address1 [7:0]" line.long 0x10 "MAHR2,MAC Address2 High Register" bitfld.long 0x10 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x10 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x10 29. " MBC[29] ,Mask Byte Control (Register2[15:8])" "Not masked,Masked" bitfld.long 0x10 28. " MBC[28] ,Mask Byte Control (Register2[7:0])" "Not masked,Masked" textline " " bitfld.long 0x10 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x10 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x10 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x10 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x10 0.--15. 1. " A[47:32] ,MAC Address2 [47:32]" else hexmask.long.byte 0x10 8.--15. 1. " A[47:40] ,MAC Address2 [47:40]" textline " " hexmask.long.byte 0x10 0.--7. 1. " A[39:32] ,MAC Address2 [39:32]" endif line.long (0x10+0x04) "MALR2,MAC Address2 Low Register" hexmask.long.byte (0x10+0x04) 24.--31. 1. " A[31:24] ,MAC Address2 [31:24]" hexmask.long.byte (0x10+0x04) 16.--23. 1. " A[23:16] ,MAC Address2 [23:16]" textline " " hexmask.long.byte (0x10+0x04) 8.--15. 1. " A[15:8] ,MAC Address2 [15:8]" hexmask.long.byte (0x10+0x04) 0.--7. 1. " A[7:0] ,MAC Address2 [7:0]" line.long 0x18 "MAHR3,MAC Address3 High Register" bitfld.long 0x18 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x18 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x18 29. " MBC[29] ,Mask Byte Control (Register3[15:8])" "Not masked,Masked" bitfld.long 0x18 28. " MBC[28] ,Mask Byte Control (Register3[7:0])" "Not masked,Masked" textline " " bitfld.long 0x18 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x18 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x18 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x18 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x18 0.--15. 1. " A[47:32] ,MAC Address3 [47:32]" else hexmask.long.byte 0x18 8.--15. 1. " A[47:40] ,MAC Address3 [47:40]" textline " " hexmask.long.byte 0x18 0.--7. 1. " A[39:32] ,MAC Address3 [39:32]" endif line.long (0x18+0x04) "MALR3,MAC Address3 Low Register" hexmask.long.byte (0x18+0x04) 24.--31. 1. " A[31:24] ,MAC Address3 [31:24]" hexmask.long.byte (0x18+0x04) 16.--23. 1. " A[23:16] ,MAC Address3 [23:16]" textline " " hexmask.long.byte (0x18+0x04) 8.--15. 1. " A[15:8] ,MAC Address3 [15:8]" hexmask.long.byte (0x18+0x04) 0.--7. 1. " A[7:0] ,MAC Address3 [7:0]" line.long 0x20 "MAHR4,MAC Address4 High Register" bitfld.long 0x20 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x20 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x20 29. " MBC[29] ,Mask Byte Control (Register4[15:8])" "Not masked,Masked" bitfld.long 0x20 28. " MBC[28] ,Mask Byte Control (Register4[7:0])" "Not masked,Masked" textline " " bitfld.long 0x20 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x20 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x20 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x20 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x20 0.--15. 1. " A[47:32] ,MAC Address4 [47:32]" else hexmask.long.byte 0x20 8.--15. 1. " A[47:40] ,MAC Address4 [47:40]" textline " " hexmask.long.byte 0x20 0.--7. 1. " A[39:32] ,MAC Address4 [39:32]" endif line.long (0x20+0x04) "MALR4,MAC Address4 Low Register" hexmask.long.byte (0x20+0x04) 24.--31. 1. " A[31:24] ,MAC Address4 [31:24]" hexmask.long.byte (0x20+0x04) 16.--23. 1. " A[23:16] ,MAC Address4 [23:16]" textline " " hexmask.long.byte (0x20+0x04) 8.--15. 1. " A[15:8] ,MAC Address4 [15:8]" hexmask.long.byte (0x20+0x04) 0.--7. 1. " A[7:0] ,MAC Address4 [7:0]" line.long 0x28 "MAHR5,MAC Address5 High Register" bitfld.long 0x28 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x28 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x28 29. " MBC[29] ,Mask Byte Control (Register5[15:8])" "Not masked,Masked" bitfld.long 0x28 28. " MBC[28] ,Mask Byte Control (Register5[7:0])" "Not masked,Masked" textline " " bitfld.long 0x28 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x28 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x28 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x28 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x28 0.--15. 1. " A[47:32] ,MAC Address5 [47:32]" else hexmask.long.byte 0x28 8.--15. 1. " A[47:40] ,MAC Address5 [47:40]" textline " " hexmask.long.byte 0x28 0.--7. 1. " A[39:32] ,MAC Address5 [39:32]" endif line.long (0x28+0x04) "MALR5,MAC Address5 Low Register" hexmask.long.byte (0x28+0x04) 24.--31. 1. " A[31:24] ,MAC Address5 [31:24]" hexmask.long.byte (0x28+0x04) 16.--23. 1. " A[23:16] ,MAC Address5 [23:16]" textline " " hexmask.long.byte (0x28+0x04) 8.--15. 1. " A[15:8] ,MAC Address5 [15:8]" hexmask.long.byte (0x28+0x04) 0.--7. 1. " A[7:0] ,MAC Address5 [7:0]" line.long 0x30 "MAHR6,MAC Address6 High Register" bitfld.long 0x30 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x30 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x30 29. " MBC[29] ,Mask Byte Control (Register6[15:8])" "Not masked,Masked" bitfld.long 0x30 28. " MBC[28] ,Mask Byte Control (Register6[7:0])" "Not masked,Masked" textline " " bitfld.long 0x30 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x30 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x30 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x30 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x30 0.--15. 1. " A[47:32] ,MAC Address6 [47:32]" else hexmask.long.byte 0x30 8.--15. 1. " A[47:40] ,MAC Address6 [47:40]" textline " " hexmask.long.byte 0x30 0.--7. 1. " A[39:32] ,MAC Address6 [39:32]" endif line.long (0x30+0x04) "MALR6,MAC Address6 Low Register" hexmask.long.byte (0x30+0x04) 24.--31. 1. " A[31:24] ,MAC Address6 [31:24]" hexmask.long.byte (0x30+0x04) 16.--23. 1. " A[23:16] ,MAC Address6 [23:16]" textline " " hexmask.long.byte (0x30+0x04) 8.--15. 1. " A[15:8] ,MAC Address6 [15:8]" hexmask.long.byte (0x30+0x04) 0.--7. 1. " A[7:0] ,MAC Address6 [7:0]" line.long 0x38 "MAHR7,MAC Address7 High Register" bitfld.long 0x38 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x38 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x38 29. " MBC[29] ,Mask Byte Control (Register7[15:8])" "Not masked,Masked" bitfld.long 0x38 28. " MBC[28] ,Mask Byte Control (Register7[7:0])" "Not masked,Masked" textline " " bitfld.long 0x38 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x38 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x38 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x38 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x38 0.--15. 1. " A[47:32] ,MAC Address7 [47:32]" else hexmask.long.byte 0x38 8.--15. 1. " A[47:40] ,MAC Address7 [47:40]" textline " " hexmask.long.byte 0x38 0.--7. 1. " A[39:32] ,MAC Address7 [39:32]" endif line.long (0x38+0x04) "MALR7,MAC Address7 Low Register" hexmask.long.byte (0x38+0x04) 24.--31. 1. " A[31:24] ,MAC Address7 [31:24]" hexmask.long.byte (0x38+0x04) 16.--23. 1. " A[23:16] ,MAC Address7 [23:16]" textline " " hexmask.long.byte (0x38+0x04) 8.--15. 1. " A[15:8] ,MAC Address7 [15:8]" hexmask.long.byte (0x38+0x04) 0.--7. 1. " A[7:0] ,MAC Address7 [7:0]" line.long 0x40 "MAHR8,MAC Address8 High Register" bitfld.long 0x40 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x40 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x40 29. " MBC[29] ,Mask Byte Control (Register8[15:8])" "Not masked,Masked" bitfld.long 0x40 28. " MBC[28] ,Mask Byte Control (Register8[7:0])" "Not masked,Masked" textline " " bitfld.long 0x40 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x40 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x40 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x40 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x40 0.--15. 1. " A[47:32] ,MAC Address8 [47:32]" else hexmask.long.byte 0x40 8.--15. 1. " A[47:40] ,MAC Address8 [47:40]" textline " " hexmask.long.byte 0x40 0.--7. 1. " A[39:32] ,MAC Address8 [39:32]" endif line.long (0x40+0x04) "MALR8,MAC Address8 Low Register" hexmask.long.byte (0x40+0x04) 24.--31. 1. " A[31:24] ,MAC Address8 [31:24]" hexmask.long.byte (0x40+0x04) 16.--23. 1. " A[23:16] ,MAC Address8 [23:16]" textline " " hexmask.long.byte (0x40+0x04) 8.--15. 1. " A[15:8] ,MAC Address8 [15:8]" hexmask.long.byte (0x40+0x04) 0.--7. 1. " A[7:0] ,MAC Address8 [7:0]" line.long 0x48 "MAHR9,MAC Address9 High Register" bitfld.long 0x48 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x48 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x48 29. " MBC[29] ,Mask Byte Control (Register9[15:8])" "Not masked,Masked" bitfld.long 0x48 28. " MBC[28] ,Mask Byte Control (Register9[7:0])" "Not masked,Masked" textline " " bitfld.long 0x48 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x48 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x48 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x48 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x48 0.--15. 1. " A[47:32] ,MAC Address9 [47:32]" else hexmask.long.byte 0x48 8.--15. 1. " A[47:40] ,MAC Address9 [47:40]" textline " " hexmask.long.byte 0x48 0.--7. 1. " A[39:32] ,MAC Address9 [39:32]" endif line.long (0x48+0x04) "MALR9,MAC Address9 Low Register" hexmask.long.byte (0x48+0x04) 24.--31. 1. " A[31:24] ,MAC Address9 [31:24]" hexmask.long.byte (0x48+0x04) 16.--23. 1. " A[23:16] ,MAC Address9 [23:16]" textline " " hexmask.long.byte (0x48+0x04) 8.--15. 1. " A[15:8] ,MAC Address9 [15:8]" hexmask.long.byte (0x48+0x04) 0.--7. 1. " A[7:0] ,MAC Address9 [7:0]" line.long 0x50 "MAHR10,MAC Address10 High Register" bitfld.long 0x50 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x50 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x50 29. " MBC[29] ,Mask Byte Control (Register10[15:8])" "Not masked,Masked" bitfld.long 0x50 28. " MBC[28] ,Mask Byte Control (Register10[7:0])" "Not masked,Masked" textline " " bitfld.long 0x50 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x50 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x50 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x50 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x50 0.--15. 1. " A[47:32] ,MAC Address10 [47:32]" else hexmask.long.byte 0x50 8.--15. 1. " A[47:40] ,MAC Address10 [47:40]" textline " " hexmask.long.byte 0x50 0.--7. 1. " A[39:32] ,MAC Address10 [39:32]" endif line.long (0x50+0x04) "MALR10,MAC Address10 Low Register" hexmask.long.byte (0x50+0x04) 24.--31. 1. " A[31:24] ,MAC Address10 [31:24]" hexmask.long.byte (0x50+0x04) 16.--23. 1. " A[23:16] ,MAC Address10 [23:16]" textline " " hexmask.long.byte (0x50+0x04) 8.--15. 1. " A[15:8] ,MAC Address10 [15:8]" hexmask.long.byte (0x50+0x04) 0.--7. 1. " A[7:0] ,MAC Address10 [7:0]" line.long 0x58 "MAHR11,MAC Address11 High Register" bitfld.long 0x58 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x58 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x58 29. " MBC[29] ,Mask Byte Control (Register11[15:8])" "Not masked,Masked" bitfld.long 0x58 28. " MBC[28] ,Mask Byte Control (Register11[7:0])" "Not masked,Masked" textline " " bitfld.long 0x58 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x58 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x58 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x58 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x58 0.--15. 1. " A[47:32] ,MAC Address11 [47:32]" else hexmask.long.byte 0x58 8.--15. 1. " A[47:40] ,MAC Address11 [47:40]" textline " " hexmask.long.byte 0x58 0.--7. 1. " A[39:32] ,MAC Address11 [39:32]" endif line.long (0x58+0x04) "MALR11,MAC Address11 Low Register" hexmask.long.byte (0x58+0x04) 24.--31. 1. " A[31:24] ,MAC Address11 [31:24]" hexmask.long.byte (0x58+0x04) 16.--23. 1. " A[23:16] ,MAC Address11 [23:16]" textline " " hexmask.long.byte (0x58+0x04) 8.--15. 1. " A[15:8] ,MAC Address11 [15:8]" hexmask.long.byte (0x58+0x04) 0.--7. 1. " A[7:0] ,MAC Address11 [7:0]" line.long 0x60 "MAHR12,MAC Address12 High Register" bitfld.long 0x60 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x60 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x60 29. " MBC[29] ,Mask Byte Control (Register12[15:8])" "Not masked,Masked" bitfld.long 0x60 28. " MBC[28] ,Mask Byte Control (Register12[7:0])" "Not masked,Masked" textline " " bitfld.long 0x60 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x60 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x60 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x60 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x60 0.--15. 1. " A[47:32] ,MAC Address12 [47:32]" else hexmask.long.byte 0x60 8.--15. 1. " A[47:40] ,MAC Address12 [47:40]" textline " " hexmask.long.byte 0x60 0.--7. 1. " A[39:32] ,MAC Address12 [39:32]" endif line.long (0x60+0x04) "MALR12,MAC Address12 Low Register" hexmask.long.byte (0x60+0x04) 24.--31. 1. " A[31:24] ,MAC Address12 [31:24]" hexmask.long.byte (0x60+0x04) 16.--23. 1. " A[23:16] ,MAC Address12 [23:16]" textline " " hexmask.long.byte (0x60+0x04) 8.--15. 1. " A[15:8] ,MAC Address12 [15:8]" hexmask.long.byte (0x60+0x04) 0.--7. 1. " A[7:0] ,MAC Address12 [7:0]" line.long 0x68 "MAHR13,MAC Address13 High Register" bitfld.long 0x68 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x68 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x68 29. " MBC[29] ,Mask Byte Control (Register13[15:8])" "Not masked,Masked" bitfld.long 0x68 28. " MBC[28] ,Mask Byte Control (Register13[7:0])" "Not masked,Masked" textline " " bitfld.long 0x68 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x68 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x68 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x68 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x68 0.--15. 1. " A[47:32] ,MAC Address13 [47:32]" else hexmask.long.byte 0x68 8.--15. 1. " A[47:40] ,MAC Address13 [47:40]" textline " " hexmask.long.byte 0x68 0.--7. 1. " A[39:32] ,MAC Address13 [39:32]" endif line.long (0x68+0x04) "MALR13,MAC Address13 Low Register" hexmask.long.byte (0x68+0x04) 24.--31. 1. " A[31:24] ,MAC Address13 [31:24]" hexmask.long.byte (0x68+0x04) 16.--23. 1. " A[23:16] ,MAC Address13 [23:16]" textline " " hexmask.long.byte (0x68+0x04) 8.--15. 1. " A[15:8] ,MAC Address13 [15:8]" hexmask.long.byte (0x68+0x04) 0.--7. 1. " A[7:0] ,MAC Address13 [7:0]" line.long 0x70 "MAHR14,MAC Address14 High Register" bitfld.long 0x70 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x70 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x70 29. " MBC[29] ,Mask Byte Control (Register14[15:8])" "Not masked,Masked" bitfld.long 0x70 28. " MBC[28] ,Mask Byte Control (Register14[7:0])" "Not masked,Masked" textline " " bitfld.long 0x70 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x70 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x70 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x70 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x70 0.--15. 1. " A[47:32] ,MAC Address14 [47:32]" else hexmask.long.byte 0x70 8.--15. 1. " A[47:40] ,MAC Address14 [47:40]" textline " " hexmask.long.byte 0x70 0.--7. 1. " A[39:32] ,MAC Address14 [39:32]" endif line.long (0x70+0x04) "MALR14,MAC Address14 Low Register" hexmask.long.byte (0x70+0x04) 24.--31. 1. " A[31:24] ,MAC Address14 [31:24]" hexmask.long.byte (0x70+0x04) 16.--23. 1. " A[23:16] ,MAC Address14 [23:16]" textline " " hexmask.long.byte (0x70+0x04) 8.--15. 1. " A[15:8] ,MAC Address14 [15:8]" hexmask.long.byte (0x70+0x04) 0.--7. 1. " A[7:0] ,MAC Address14 [7:0]" line.long 0x78 "MAHR15,MAC Address15 High Register" bitfld.long 0x78 31. " AE ,Address Enable" "Disabled,Enabled" bitfld.long 0x78 30. " SA ,Source Address" "DA,SA" textline " " bitfld.long 0x78 29. " MBC[29] ,Mask Byte Control (Register15[15:8])" "Not masked,Masked" bitfld.long 0x78 28. " MBC[28] ,Mask Byte Control (Register15[7:0])" "Not masked,Masked" textline " " bitfld.long 0x78 27. " MBC[27] ,Mask Byte Control (Register$3[31:24])" "Not masked,Masked" bitfld.long 0x78 26. " MBC[26] ,Mask Byte Control (Register$3[23:16])" "Not masked,Masked" textline " " bitfld.long 0x78 25. " MBC[25] ,Mask Byte Control (Register$3[15:8])" "Not masked,Masked" bitfld.long 0x78 24. " MBC[24] ,Mask Byte Control (Register$3[7:0])" "Not masked,Masked" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x78 0.--15. 1. " A[47:32] ,MAC Address15 [47:32]" else hexmask.long.byte 0x78 8.--15. 1. " A[47:40] ,MAC Address15 [47:40]" textline " " hexmask.long.byte 0x78 0.--7. 1. " A[39:32] ,MAC Address15 [39:32]" endif line.long (0x78+0x04) "MALR15,MAC Address15 Low Register" hexmask.long.byte (0x78+0x04) 24.--31. 1. " A[31:24] ,MAC Address15 [31:24]" hexmask.long.byte (0x78+0x04) 16.--23. 1. " A[23:16] ,MAC Address15 [23:16]" textline " " hexmask.long.byte (0x78+0x04) 8.--15. 1. " A[15:8] ,MAC Address15 [15:8]" hexmask.long.byte (0x78+0x04) 0.--7. 1. " A[7:0] ,MAC Address15 [7:0]" sif (cpu()=="SPEAR600") group.long 0xc0++0x03 line.long 0x00 "ACR,AN Control Register" bitfld.long 0x00 12. " ANE ,Auto-Negotiation Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RAN ,Restart Auto-Negotiation" "Not restarted,Restarted" rgroup.long 0xc4++0x03 line.long 0x00 "ASR,AN Status Register" bitfld.long 0x00 5. " ANC ,Auto-Negotiation Complete" "Not completed,Completed" bitfld.long 0x00 3. " ANA ,Auto-Negotiation Ability" "Not supported,Supported" textline " " bitfld.long 0x00 2. " LS ,Link Status" "Down,Up" group.long 0xc8++0x07 line.long 0x00 "AAR,AN Advertisement Register" bitfld.long 0x00 15. " NP ,Next Page Support" "Not supported,Supported" bitfld.long 0x00 12.--13. " RFE ,Remote Fault Encoding" "0,1,2,3" textline " " bitfld.long 0x00 7.--8. " PSE ,Pause Encoding" "0,1,2,3" bitfld.long 0x00 6. " HD ,Half-Duplex" "Not supported,Supported" bitfld.long 0x00 5. " FD ,Full-Duplex" "Not supported,Supported" textline " " line.long 0x04 "ALPAR,AN Link Partner Ability Register" bitfld.long 0x04 15. " NP ,Next Page Support" "Not supported,Supported" bitfld.long 0x04 14. " ACK ,Acknowledge" "Not achieved,Received" textline " " bitfld.long 0x04 12.--13. " RFE ,Remote Fault Encoding" "0,1,2,3" bitfld.long 0x04 7.--8. " PSE ,Pause Encoding" "0,1,2,3" bitfld.long 0x04 6. " HD ,Half-Duplex" "Not supported,Supported" textline " " bitfld.long 0x04 5. " FD ,Full-Duplex" "Not supported,Supported" rgroup.long 0xd0++0x03 line.long 0x00 "AER,AN Expansion Register" bitfld.long 0x00 2. " NPA ,Next Page Ability" "Not supported,Supported" bitfld.long 0x00 1. " NPR ,New Page Received" "Not received,Received" endif rgroup.long 0x100++0x03 "MMC Registers" line.long 0x00 "MCTRR,MMC Control Register" bitfld.long 0x00 2. " ROR ,Reset On Read" "No reset,Reset" bitfld.long 0x00 1. " CSR ,Counter Stop Rollover" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " CR ,Counters Reset" "No reset,Reset" group.long 0x104++0x0f line.long 0x00 "MRXIR,MMC Receive Interrupt Register" bitfld.long 0x00 23. " RX_INT[23] ,Rxwatchdog error counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 22. " RX_INT[22] ,Rxvlanframes_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " RX_INT[21] ,Rxfifooverflow counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 20. " RX_INT[20] ,Rxpauseframes counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " RX_INT[19] ,Rxoutofrangetype counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 18. " RX_INT[18] ,Rxlengtherror counter reaches half the maximum" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " RX_INT[17] ,Rxunicastframes_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 16. " RX_INT[16] ,Rx1024tomaxoctects_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " RX_INT[15] ,Rx512to1023octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 14. " RX_INT[14] ,Rx216to511octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " RX_INT[13] ,Rx128to255octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 12. " RX_INT[12] ,Rx64to127octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " RX_INT[11] ,Rx64octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 10. " RX_INT[10] ,Rxoversize_g counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RX_INT[9] ,Rxundersize_g counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 8. " RX_INT[8] ,Rxjabbererror counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RX_INT[7] ,Rxrunterror counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 6. " RX_INT[6] ,Rxalignmenterror counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RX_INT[5] ,Rxcrcerror counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 4. " RX_INT[4] ,Rxmulticastframes_g counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RX_INT[3] ,Rxbroadcastframes_g counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX_INT[2] ,Rxoctectcount_g counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RX_INT[1] ,Rxoctectcount_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x00 0. " RX_INT[0] ,Rxframecount_gb counter reaches half the maximum value" "No interrupt,Interrupt" line.long 0x04 "MTXIR,MMC Transmit Interrupt Register" bitfld.long 0x04 24. " TX_INT[24] ,Txvlanframes_g counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 23. " TX_INT[23] ,Txpauseframes error counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " TX_INT[22] ,Txoexcessdef counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 21. " TX_INT[21] ,Txframecount_g counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " TX_INT[20] ,Txoctectcount_g counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 19. " TX_INT[19] ,Txcarriererror counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 18. " TX_INT[18] ,Txexesscol counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 17. " TX_INT[17] ,Txlatecol counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TX_INT[16] ,Txdeferred counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 15. " TX_INT[15] ,Txmulticol_g counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " TX_INT[14] ,The txsinglecol_g counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 13. " TX_INT[13] ,Txunderflowerror counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " TX_INT[12] ,Txbroadcastframes_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 11. " TX_INT[11] ,Txmulticastframes_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TX_INT[10] ,Txunicastframes_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 9. " TX_INT[9] ,Tx1024tomaxoctects_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " TX_INT[8] ,Tx512to1023octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 7. " TX_INT[7] ,Tx256to511octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " TX_INT[6] ,Tx128to255octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 5. " TX_INT[5] ,Tx65to127octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " TX_INT[4] ,Tx64to127octects_gb counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 3. " TX_INT[3] ,Txmulticastframes_g counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " TX_INT[2] ,Txbroadcastframes_g counter reaches half the maximum value" "No interrupt,Interrupt" bitfld.long 0x04 1. " TX_INT[1] ,Txframecount_gb counter reaches half the maximum value" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " TX_INT[0] ,Txoctectcount_gb counter reaches half the maximum value" "No interrupt,Interrupt" line.long 0x08 "MRXIR,MMC Receive Interrupt Mask Register" bitfld.long 0x08 23. " RX_MASK[23] ,Masks when rxwatchdog counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 22. " RX_MASK[22] ,Masks when Rxvlanframes_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 21. " RX_MASK[21] ,Masks when Rxfifooverflow counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 20. " RX_MASK[20] ,Masks when Rxpauseframes counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 19. " RX_MASK[19] ,Masks when Rxoutofrangetype counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 18. " RX_MASK[18] ,Masks when Rxlengtherror counter reaches half the maximum" "Not masked,Masked" textline " " bitfld.long 0x08 17. " RX_MASK[17] ,Masks when Rxunicastframes_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 16. " RX_MASK[16] ,Masks when Rx1024tomaxoctects_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 15. " RX_MASK[15] ,Masks when Rx512to1023octects_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 14. " RX_MASK[14] ,Masks when Rx216to511octects_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 13. " RX_MASK[13] ,Masks when Rx128to255octects_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 12. " RX_MASK[12] ,Masks when Rx64to127octects_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 11. " RX_MASK[11] ,Masks when Rx64octects_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 10. " RX_MASK[10] ,Masks when Rxoversize_g counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 9. " RX_MASK[9] ,Masks when Rxundersize_g counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 8. " RX_MASK[8] ,Masks when Rxjabbererror counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 7. " RX_MASK[7] ,Masks when Rxrunterror counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 6. " RX_MASK[6] ,VRxalignmenterror counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 5. " RX_MASK[5] ,Masks when Rxcrcerror counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 4. " RX_MASK[4] ,Masks when Rxmulticastframes_g counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 3. " RX_MASK[3] ,Masks when Rxbroadcastframes_g counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 2. " RX_MASK[2] ,Masks when Rxoctectcount_g counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x08 1. " RX_MASK[1] ,Masks when Rxoctectcount_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x08 0. " RX_MASK[0] ,Masks when Rxframecount_gb counter reaches half the maximum value" "Not masked,Masked" line.long 0x0c "MTIMR,MMC Transmit Interrupt Mask Register" bitfld.long 0x0c 24. " TX_MASK[24] ,Masks when Txvlanframes_g counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 23. " TX_MASK[23] ,Masks when Txpauseframes error counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 22. " TX_MASK[22] ,Masks when Txoexcessdef counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 21. " TX_MASK[21] ,Masks when Txframecount_g counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 20. " TX_MASK[20] ,Masks when Txoctectcount_g counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 19. " TX_MASK[19] ,Masks when Txcarriererror counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 18. " TX_MASK[18] ,Masks when Txexesscol counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 17. " TX_MASK[17] ,Masks when Txlatecol counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 16. " TX_MASK[16] ,Masks when Txdeferred counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 15. " TX_MASK[15] ,Masks when Txmulticol_g counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 14. " TX_MASK[14] ,Masks when The txsinglecol_g counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 13. " TX_MASK[13] ,Masks when Txunderflowerror counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 12. " TX_MASK[12] ,Masks when Txbroadcastframes_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 11. " TX_MASK[11] ,Masks when Txmulticastframes_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 10. " TX_MASK[10] ,Masks when Txunicastframes_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 9. " TX_MASK[9] ,Masks when Tx1024tomaxoctects_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 8. " TX_MASK[8] ,Masks when Tx512to1023octects_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 7. " TX_MASK[7] ,Masks when Tx256to511octects_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 6. " TX_MASK[6] ,Masks when Tx128to255octects_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 5. " TX_MASK[5] ,Masks when Tx65to127octects_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 4. " TX_MASK[4] ,Masks when Tx64to127octects_gb counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 3. " TX_MASK[3] ,Masks when Txmulticastframes_g counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 2. " TX_MASK[2] ,Masks when Txbroadcastframes_g counter reaches half the maximum value" "Not masked,Masked" bitfld.long 0x0c 1. " TX_MASK[1] ,Masks when Txframecount_gb counter reaches half the maximum value" "Not masked,Masked" textline " " bitfld.long 0x0c 0. " TX_MASK[0] ,Masks when Txoctectcount_gb counter reaches half the maximum value" "Not masked,Masked" sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hgroup.long 0x114++0x03 hide.long 0x00 "TXOCTETCOUNT_GB,Number of bytes" in hgroup.long 0x118++0x03 hide.long 0x00 "TXFRAMECOUNT_GB,Number of good and bad frames transmitted" in hgroup.long 0x11c++0x03 hide.long 0x00 "TXBROADCASTFRAMES_G,Number of good broadcast frames transmitted" in hgroup.long 0x120++0x03 hide.long 0x00 "TXMULTICASTFRAMES_G,Number of good multicast frames transmitted" in hgroup.long 0x124++0x03 hide.long 0x00 "TX64OCTECTS_GB,Number of good and bad frames transmitted with length 64 bytes" in hgroup.long 0x128++0x03 hide.long 0x00 "TX65TO127OCTECTS_GB,Number of good and bad frames transmitted with length 65-127 bytes" in hgroup.long 0x12c++0x03 hide.long 0x00 "TX128TO255OCTECTS_GB,Number of good and bad frames transmitted with length between 127-255 bytes" in hgroup.long 0x130++0x03 hide.long 0x00 "TX256TO511OCTECTS_GB,Number of good and bad frames transmitted with length between 256-511 bytes" in hgroup.long 0x134++0x03 hide.long 0x00 "TX512TO1023OCTECTS_GB,Number of good and bad frames transmitted with length between 512-1023 bytes" in hgroup.long 0x138++0x03 hide.long 0x00 "TX1024TOMAXOCTECTS_GB,Number of good and bad frames transmitted with length between 1024-mqaxsize bytes" in hgroup.long 0x13c++0x03 hide.long 0x00 "TXUNICASTFRAMES_GB,Number of good and bad unicast frames transmitted" in hgroup.long 0x140++0x03 hide.long 0x00 "TXMULTICASTFRAMES_GB,Number of good and bad multicast frames transmitted" in hgroup.long 0x144++0x03 hide.long 0x00 "TXBROADCASTFRAMES_GB,Number of good and bad broadcast frames transmitted" in hgroup.long 0x148++0x03 hide.long 0x00 "TXUNDERFLOWERROR,Number of frames aborted due to frame underflow error" in hgroup.long 0x14c++0x03 hide.long 0x00 "TXSINGLECOL_G,Number of successfully transmitted frames after a single collision in Halfduplex mode" in hgroup.long 0x150++0x03 hide.long 0x00 "TXMULTICOL_G,Number of successfully transmitted frames after more than a single collision in Half-duplex mode" in hgroup.long 0x154++0x03 hide.long 0x00 "TXDEFERRED,Number of successfully transmitted frames after a deferral in Half-duplex mode" in hgroup.long 0x158++0x03 hide.long 0x00 "TXLATECOL,Number of frames aborted due to late collision error" in hgroup.long 0x15c++0x03 hide.long 0x00 "TXEXESSCOL,Number of frames aborted due to exessive (16) collision errors" in hgroup.long 0x160++0x03 hide.long 0x00 "TXCARRIERERROR,Number of frames aborted due to carrier sense error" in hgroup.long 0x164++0x03 hide.long 0x00 "TXOCTETCOUNT_G,Number of bytes transmitted in good frames only" in hgroup.long 0x168++0x03 hide.long 0x00 "TXFRAMECOUNT_G,Number of good frames transmitted" in hgroup.long 0x16c++0x03 hide.long 0x00 "TXEXCESSDEF,Number of frames aborted due to excessive deferral error" in hgroup.long 0x170++0x03 hide.long 0x00 "TXPAUSEFRAMES,Number of good PAUSE frames transmitted" in hgroup.long 0x174++0x03 hide.long 0x00 "TXVLANFRAMES_G,Number of good VLAN frames transmitted" in hgroup.long 0x180++0x03 hide.long 0x00 "RXFRAMECOUNT_GB,Number of good and bad frames received" in hgroup.long 0x184++0x03 hide.long 0x00 "RXOCTETCOUNT_GB,Number of bytes received exclusive of preamble" in hgroup.long 0x188++0x03 hide.long 0x00 "RXOCTETCOUNT_G,Number of bytes received exclusive of preamble" in hgroup.long 0x18c++0x03 hide.long 0x00 "RXBROADCASTFRAMES_G,Number of good broadcast frames received" in hgroup.long 0x190++0x03 hide.long 0x00 "RXMULTICASTFRAMES_G,Number of good multicast frames received" in hgroup.long 0x194++0x03 hide.long 0x00 "RXCRCERROR,Number of frames received with CRC error" in hgroup.long 0x198++0x03 hide.long 0x00 "RXALIGNMENTERROR,Number of frames received with alignment (dribble) error" in hgroup.long 0x19c++0x03 hide.long 0x00 "RXRUNTERROR,Number of frames received with runt (<64 bytes and CRC error) error" in hgroup.long 0x1a0++0x03 hide.long 0x00 "RXJABBERERROR,Number of giant frames received with length > 1,518 bytes and with CRC error" in hgroup.long 0x1a4++0x03 hide.long 0x00 "RXUNDERSIZE_G,Number of frames received with length < 64 bytes; without any errors" in hgroup.long 0x1a8++0x03 hide.long 0x00 "RXOVERSIZE_G,Number of frames received with length > maxsize without errors" in hgroup.long 0x1ac++0x03 hide.long 0x00 "RX64OCTECTS_GB,Number of good and bad frames received with length 64 bytes" in hgroup.long 0x1b0++0x03 hide.long 0x00 "RX65TO127OCTECTS_GB,Number of good and bad frames received with length 127-255 bytes" in hgroup.long 0x1b4++0x03 hide.long 0x00 "RX128TO255OCTECTS_GB,Number of good and bad frames transmitted with length 127-255 bytes" in hgroup.long 0x1b8++0x03 hide.long 0x00 "RX256TO511OCTECTS_GB,Number of good and bad frames transmitted with length 256-511 bytes" in hgroup.long 0x1bc++0x03 hide.long 0x00 "RX512TO1023OCTECTS_GB,Number of good and bad frames transmitted with length 512-1023 bytes" in hgroup.long 0x1c0++0x03 hide.long 0x00 "RX1023TOMAXOCTECTS_GB,Number of good and bad frames transmitted with length 1023-maxsize bytes" in hgroup.long 0x1c4++0x03 hide.long 0x00 "RXUNICASTFRAMES_G,Number of good unicast frames received" in hgroup.long 0x1c8++0x03 hide.long 0x00 "RXLENGTHERROR,Number of frames received with length error" in hgroup.long 0x1cc++0x03 hide.long 0x00 "RXOUTOFRANGETYPE,number of frames receivedwwith length field not equal to the valid frame size" in hgroup.long 0x1d0++0x03 hide.long 0x00 "RXPAUSEFRAMES,Number of good and valid PAUSE frames received" in hgroup.long 0x1d4++0x03 hide.long 0x00 "RXFIFOOVERFLOW,Number of missed received frames due to FIFO overflow" in hgroup.long 0x1d8++0x03 hide.long 0x00 "RXVLANFRAMES_GB,Number of good and bad VLAN frames received" in hgroup.long 0x1dc++0x03 hide.long 0x00 "RXWATCHDOGERROR,Number of frames received with error due to watchdog timeout error" in endif width 0xb tree.end endif sif (cpu()=="SPEAR310") tree.open "SMII" tree "Common" base asd:0xB3000000 width 13. group.long 0x18++0x03 line.long 0x00 "CCR,Common configuration register" bitfld.long 0x0 5. " CCR[5] ,Endianness of SMII4 DMA interface towards AHB bus" "Little Endian,Big Endian" bitfld.long 0x0 4. " CCR[4] ,Endianness of SMII3 DMA interface towards AHB bus" "Little Endian,Big Endian" textline " " bitfld.long 0x0 3. " CCR[3] ,Endianness of SMII2 DMA interface towards AHB bus" "Little Endian,Big Endian" bitfld.long 0x0 2. " CCR[2] ,Endianness of SMII1 DMA interface towards AHB bus" "Little Endian,Big Endian" textline " " bitfld.long 0x0 0.--1. " CCR[01:00] ,Enable PMS from SMII" "PMS from SMII1,PMS from SMII2,PMS from SMII3,PMS from SMII4" rgroup.long 0x1C++0x03 line.long 0x00 "CISR,Common interrupt status register" bitfld.long 0x0 7. " CISR[7] ,Status of Wake-Up on LAN interrupt from SMII4" "Disabled,Enabled" bitfld.long 0x0 6. " CISR[6] ,Status of Wake-Up on LAN interrupt from SMII3" "Disabled,Enabled" textline " " bitfld.long 0x0 5. " CISR[5] ,Status of Wake-Up on LAN interrupt from SMII2" "Disabled,Enabled" bitfld.long 0x0 4. " CISR[4] ,Status of Wake-Up on LAN interrupt from SMII1" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " CISR[3] ,Status of common interrupt from SMII4" "Disabled,Enabled" bitfld.long 0x0 2. " CISR[2] ,Status of common interrupt from SMII3" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " CISR[1] ,Status of common interrupt from SMII2" "Disabled,Enabled" bitfld.long 0x0 0. " CISR[0] ,Status of common interrupt from SMII1" "Disabled,Enabled" width 0x0b tree.end tree "SMII1" base asd:0xB0000000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xB0000000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xB0000000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree "SMII2" base asd:0xB0800000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xB0800000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xB0800000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree "SMII3" base asd:0xB1000000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xB1000000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xB1000000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree "SMII4" base asd:0xB1800000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xB1800000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xB1800000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree.end endif sif (cpu()=="SPEAR320") tree.open "SMII (Serial Media Independent Interface)" tree "SMII0" base asd:0xAA000000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xAA000000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xAA000000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree "SMII1/MII1" base asd:0xAB000000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xAB000000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xAB000000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree.end endif sif (cpu()=="SPEAR320S") tree.open "RMII (Fast Ethernet Ports)" tree "RMII0" base asd:0xAA000000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xAA000000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xAA000000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree "RMII1/MII1" base asd:0xAB000000 width 13. group.long 0x00++0x07 line.long 0x00 "NCTRL,Network control register" bitfld.long 0x0 12. " NCTRL[12] ,Transmit zero quantum pause frame" "Disabled,Enabled" bitfld.long 0x0 11. " NCTRL[11] ,Transmit pause frame" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " NCTRL[10] ,Transmit halt" "Disabled,Enabled" bitfld.long 0x0 9. " NCTRL[9] ,Start transmission" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " NCTRL[8] ,Back presure" "No set,Set" bitfld.long 0x0 7. " NCTRL[7] ,Write enable for statistic registers" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " NCTRL[6] ,Increment statistics registers" "Disabled,Enabled" bitfld.long 0x0 5. " NCTRL[5] ,Clear statistics registers" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " NCTRL[4] ,Management port enable" "Disabled,Enabled" bitfld.long 0x0 3. " NCTRL[3] ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NCTRL[2] ,Receive enable" "Disabled,Enabled" bitfld.long 0x0 1. " NCTRL[1] ,Loopback local" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " NCTRL[0] ,Loopback" "Disabled,Enabled" line.long 0x4 "NCFG,Network configuration register" bitfld.long 0x4 22. " NCFG[22] ,PCLK divide" "Disabled,Enabled" bitfld.long 0x4 21. " NCFG[21] ,Copy pause frames" "Enabled,Disabled" textline " " bitfld.long 0x4 20. " NCFG[20] ,Recive bad preamble" "Disabled,Enabled" bitfld.long 0x4 19. " NCFG[19] ,Ignore RX FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 18. " NCFG[18] ,Enable receive in half-duplex mode" "Disabled,Enabled" bitfld.long 0x4 17. " NCFG[17] ,Discard receive FCS" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " NCFG[16] ,Receive length field checking enable" "Disabled,Enabled" bitfld.long 0x4 14.--15. " NCFG[15:14] ,Receive buffer offset" "0,1,2,3" textline " " bitfld.long 0x4 13. " NCFG[13] ,Pause enable" "Disabled,Enabled" bitfld.long 0x4 12. " NCFG[12] ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x4 10.--11. " NCFG[11:10] ,PCLK speeed" "Pclk/8,Pclk/16,Pclk/32,Pclk/64" bitfld.long 0x4 9. " NCFG[9] ,External address match enable" "Disabled,Enabled" textline " " bitfld.long 0x4 8. " NCFG[8] ,Receive 1536 byte frames" "Disabled,Enabled" bitfld.long 0x4 7. " NCFG[7] ,Unicast hash enable" "Disabled,Enabled" textline " " bitfld.long 0x4 6. " NCFG[6] ,Multicast hash enable" "Disabled,Enabled" bitfld.long 0x4 5. " NCFG[5] ,Broadcast address" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " NCFG[4] ,Copy all frames" "Disabled,Enabled" bitfld.long 0x4 3. " NCFG[3] ,Jumbo frames" "Disabled,Enabled" textline " " bitfld.long 0x4 2. " NCFG[2] ,Bit rate-interface for werial operation" "Disabled,Enabled" bitfld.long 0x4 1. " NCFG[1] ,Full duplex" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " NCFG[0] ,Speed" "10Mbit/s,100Mbit/s" rgroup.long 0x08++0x03 line.long 0x00 "NSTAT,Network status register" bitfld.long 0x00 2. " NSTAT[2] ,PHY idle state" "0,1" bitfld.long 0x00 1. " NSTAT[1] ,Status of mdio_in pin" "0,1" textline " " bitfld.long 0x00 0. " NSTAT[0] ,Status of link pin" "0,1" group.long 0x14++0x0f line.long 0x00 "TSTAT,Transmit status register" eventfld.long 0x00 6. " TSTAT[6] ,Transmit underrun" "Disabled,Enabled" eventfld.long 0x00 5. " TSTAT[5] ,Transmit complete" "Not completed,Completed" textline " " eventfld.long 0x00 4. " TSTAT[4] ,Buffers exhausted mid frame" "0,1" bitfld.long 0x00 3. " TSTAT[3] ,Transmit go" "No active,Active" textline " " eventfld.long 0x00 2. " TSTAT[2] ,Retry limit exceeded" "0,1" eventfld.long 0x00 1. " TSTAT[1] ,Collision occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 0. " TSTAT[0] ,Use bit read" "Not used,Used" line.long 0x04 "RBQP,Receive buffer queue pointer" hexmask.long 0x04 2.--31. 1. " RBQP[31:02] ,Receive buffer queue pointer" line.long 0x08 "TBQP,Transmit buffer queue pointer" hexmask.long 0x08 2.--31. 1. " TBQP[31:02] ,Transmit buffer queue pointer" line.long 0x0C "RSTAT,Receive status register" eventfld.long 0x0C 2. " RSTAT[2] ,Receive overrun" "Disabled,Enabled" eventfld.long 0x0C 1. " RSTAT[1] ,Frame received" "Not received,Received" textline " " eventfld.long 0x0C 0. " RSTAT[0] ,Buffer available" "No available,Available" hgroup.long 0x10++0x03 hide.long 0x00 "IRQSTAT,Interrupt status register" in wgroup.long 0x28++0x07 line.long 0x00 "IRQEN,Interrupt enable register" bitfld.long 0x00 13. " IRQEN[13] ,Enable pause time zero" "Disable,Enable" bitfld.long 0x00 12. " IRQEN[12] ,Enable pause frame received" "Disable,Enable" textline " " bitfld.long 0x00 11. " IRQEN[11] ,Enable HRESP error" "Disable,Enable" bitfld.long 0x00 10. " IRQEN[10] ,Enable receive overrun" "Disable,Enable" textline " " bitfld.long 0x00 9. " IRQEN[9] ,Enable link change" "Disable,Enable" bitfld.long 0x00 7. " IRQEN[7] ,Enable transmit complete" "Disable,Enable" textline " " bitfld.long 0x00 6. " IRQEN[6] ,Enable transmit buffers exhausted in mid-frame" "Disable,Enable" bitfld.long 0x00 5. " IRQEN[5] ,Enable retry limit exceeded" "Disable,Enable" textline " " bitfld.long 0x00 4. " IRQEN[4] ,Enable ethernet transmit buffer underrun" "Disable,Enable" bitfld.long 0x00 3. " IRQEN[3] ,Enable TX used bit read" "Disable,Enable" textline " " bitfld.long 0x00 2. " IRQEN[2] ,Enable RX used bit read" "Disable,Enable" bitfld.long 0x00 1. " IRQEN[1] ,Enable receive complete" "Disable,Enable" textline " " bitfld.long 0x00 0. " IRQEN[0] ,Enable management frame sent" "Disable,Enable" line.long 0x04 "IRQDS,Interrupt disable register" bitfld.long 0x04 13. " IRQDS[13] ,Disable pause time zero" "No,Yes" bitfld.long 0x04 12. " IRQDS[12] ,Disable pause frame received" "No,Yes" textline " " bitfld.long 0x04 11. " IRQDS[11] ,Disable HRESP error" "No,Yes" bitfld.long 0x04 10. " IRQDS[10] ,Disable receive overrun" "No,Yes" textline " " bitfld.long 0x04 9. " IRQDS[9] ,Disable link change" "No,Yes" bitfld.long 0x04 7. " IRQDS[7] ,Disable transmit complete" "No,Yes" textline " " bitfld.long 0x04 6. " IRQDS[6] ,Disable transmit buffers exhausted in mid-frame" "No,Yes" bitfld.long 0x04 5. " IRQDS[5] ,Disable retry limit exceeded" "No,Yes" textline " " bitfld.long 0x04 4. " IRQDS[4] ,Disable ethernet transmit buffer underrun" "No,Yes" bitfld.long 0x04 3. " IRQDS[3] ,Disable TX used bit read" "No,Yes" textline " " bitfld.long 0x04 2. " IRQDS[2] ,Disable RX used bit read" "No,Yes" bitfld.long 0x04 1. " IRQDS[1] ,Disable receive complete" "No,Yes" textline " " bitfld.long 0x04 0. " IRQDS[0] ,Disable management frame sent" "No,Yes" rgroup.long 0x30++0x03 line.long 0x00 "IRQMSK,Interrupt mask register" bitfld.long 0x00 13. " IRQMSK[13] ,Pause time zero" "No set,Set" bitfld.long 0x00 12. " IRQMSK[12] ,Pause frame received" "No set,Set" textline " " bitfld.long 0x00 11. " IRQMSK[11] ,HRESP error" "No set,Set" bitfld.long 0x00 10. " IRQMSK[10] ,Receive overrun" "No set,Set" textline " " bitfld.long 0x00 9. " IRQMSK[9] ,Link change" "No set,Set" bitfld.long 0x00 7. " IRQMSK[7] ,Transmit complete" "No set,Set" textline " " bitfld.long 0x00 6. " IRQMSK[6] ,Transmit buffers exhausted in mid-frame" "No set,Set" bitfld.long 0x00 5. " IRQMSK[5] ,Retry limit exceeded" "No set,Set" textline " " bitfld.long 0x00 4. " IRQMSK[4] ,Ethernet transmit buffer underrun" "No set,Set" bitfld.long 0x00 3. " IRQMSK[3] ,TX used bit read" "No set,Set" textline " " bitfld.long 0x00 2. " IRQMSK[2] ,RX used bit read" "No set,Set" bitfld.long 0x00 1. " IRQMSK[1] ,Receive complete" "No set,Set" textline " " bitfld.long 0x00 0. " IRQMSK[0] ,Management frame sent" "No set,Set" if (((d.l(asd:0xAB000000+0x34))&0xC0000000)==0x00000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Address frame,Reserved,Post read,Read" textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" elif (((d.l(asd:0xAB000000+0x34))&0xC0000000)==0x40000000) group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." bitfld.long 0x00 28.--29. " PHYM[29:28] ,Operation" "Reserved,Write,Read,?..." textline " " hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" else group.long 0x34++0x03 line.long 0x00 "PHYM,PHY maintenance register" bitfld.long 0x00 30.--31. " PHYM[31:30] ,Start of frame" "45 frame,22frame,?..." hexmask.long.byte 0x00 23.--27. 1. " PHYM[27:23] ,PHY address" hexmask.long.byte 0x00 18.--22. 1. " PHYM[22:18] ,Register address" textline " " bitfld.long 0x00 16.--17. " PHYM[17:16] ,PHY maintenance register[17:16]" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. " PHYM[15:00] ,Data write to/read from PHY" endif rgroup.long 0x38++0x03 line.long 0x00 "PTIME,Pause time register" hexmask.long.word 0x00 0.--15. 1. " PTIME[15:00] ,Pause time" group.long 0x3C++0x83 line.long 0x00 "PFR,Pause frames received" hexmask.long.word 0x00 0.--15. 1. " PFR[15:00] ,Pause frames received" line.long 0x04 "FTOK,Frames transmited OK" hexmask.long.tbyte 0x04 0.--23. 1. " FTOK[23:00] ,Frames transmited OK" line.long 0x08 "SCOLF,Single collision frames" hexmask.long.word 0x08 0.--15. 1. " SCOLF[15:00] ,Single collision frames" line.long 0x0C "MCOLF,Multiple collision frames" hexmask.long.word 0x0C 0.--15. 1. " MCOLF[15:00] ,Multiple collision frames" line.long 0x10 "FROK,Frames received OK" hexmask.long.tbyte 0x10 0.--23. 1. " FROK[23:00] ,Frames received OK" line.long 0x14 "FCSERR,Frame check sequence errors" hexmask.long.byte 0x14 0.--7. 1. " FCSERR[07:00] ,Frame check sequence errors" line.long 0x18 "AERR,Alignment errors" hexmask.long.byte 0x18 0.--7. 1. " AERR[07:00] ,Alignment errors" line.long 0x1C "DTFR,Deferred transmission frames" hexmask.long.word 0x1C 0.--15. 1. " DTFR[15:00] ,Deferred transmission frames" line.long 0x20 "LATECOL,Late collisions" hexmask.long.byte 0x20 0.--7. 1. " LATECOL[07:00] ,Late collisions" line.long 0x24 "EXCOL,Excessive collisions" hexmask.long.byte 0x24 0.--7. 1. " EXCOL[07:00] ,Excessive collisions" line.long 0x28 "TUNERR,Transmit underrun errors" hexmask.long.byte 0x28 0.--7. 1. " TUNERR[07:00] ,Transmit underrun errors" line.long 0x2C "CSENERR,Carrier sense errors" hexmask.long.byte 0x2C 0.--7. 1. " CSENERR[07:00] ,Carrier sense errors" line.long 0x30 "RRESERR,Receive resource errors" hexmask.long.word 0x30 0.--15. 1. " RRESERR[15:00] ,Receive resource errors" line.long 0x34 "ROVRERR,Receive overrun errors" hexmask.long.byte 0x34 0.--7. 1. " ROVRERR[07:00] ,Receive overrun errors" line.long 0x38 "RSYMERR,Receive symbol errors" hexmask.long.byte 0x38 0.--7. 1. " RSYMERR[07:00] ,Receive symbol errors" line.long 0x3C "EXLENERR,Excessive length errors" hexmask.long.byte 0x3C 0.--7. 1. " EXLENERR[07:00] ,Excessive length errors" line.long 0x40 "RJAB,Receive jabbers" hexmask.long.byte 0x40 0.--7. 1. " RJAB[07:00] ,Receive jabbers" line.long 0x44 "UNSIZEF,Undersize frames" hexmask.long.byte 0x44 0.--7. 1. " UNSIZEF[07:00] ,Undersize frames" line.long 0x48 "SQETESTERR,SQE test errors" hexmask.long.byte 0x48 0.--7. 1. " SQETESTERR[07:00] ,SQE test errors" line.long 0x4C "RLENFLDMS,Received length field mismatch" hexmask.long.byte 0x4C 0.--7. 1. " RLENFLDMS[07:00] ,Received length field mismatch" line.long 0x50 "TPAUSEF,Transmitted pause frames" hexmask.long.word 0x50 0.--15. 1. " TPAUSEF[15:00] ,Transmitted pause frames" line.long 0x54 "HASHBOTTOM0,Hash register bottom [31:0]" line.long 0x58 "HASHBOTTOM1,Hash register bottom [63:32]" line.long 0x5C "SADR1BOTTOM,Specific address 1 bottom" line.long 0x60 "SADR1TOP,Specific address 1 top" hexmask.long.word 0x60 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x64 "SADR2BOTTOM,Specific address 2 bottom" line.long 0x68 "SADR2TOP,Specific address 2 top" hexmask.long.word 0x68 0.--15. 1. " SADR2TOP[15:00] ,Specific address 2 top" line.long 0x6C "SADR3BOTTOM,Specific address 3 bottom" line.long 0x70 "SADR3TOP,Specific address 3 top" hexmask.long.word 0x70 0.--15. 1. " SADR3TOP[15:00] ,Specific address 3 top" line.long 0x74 "SADR4BOTTOM,Specific address 4 bottom" line.long 0x78 "SADR4TOP,Specific address 4 top" hexmask.long.word 0x78 0.--15. 1. " SADR4TOP[15:00] ,Specific address 4 top" line.long 0x7C "IDCHECK,Type ID checking" hexmask.long.word 0x7C 0.--15. 1. " SADR1TOP[15:00] ,Specific address 1 top" line.long 0x80 "TPAUSEQ,Transmit pause quantum" hexmask.long.word 0x80 0.--15. 1. " IDCHECK[15:00] ,Type ID checking" group.long 0xC4++0x03 line.long 0x00 "WONLAN,Wake on LAN" bitfld.long 0x00 19. " WONLAN[19] ,Wake-on LAN multicast hash event enable" "Disabled,Enabled" bitfld.long 0x00 18. " WONLAN[18] ,Wake-on LAN specific address 1 event enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WONLAN[17] ,Wake-on LAN ARP request event enable" "Disabled,Enabled" bitfld.long 0x00 16. " WONLAN[16] ,Wake-on LAN magic packet event enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " WONLAN[15:00] ,Wake-on LAN ARP request IP address" rgroup.long 0xFC++0x03 line.long 0x00 "REV,Revision Register" hexmask.long.word 0x00 16.--31. 1. " PARTR ,Part reference" hexmask.long.word 0x00 0.--15. 1. " REVR ,Revision reference" width 0x0b tree.end tree.end endif tree.open "USB 2.0 Host" tree "OHCI 1" base asd:0xe1900000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "HCREVISION,HcRevision Register" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision" group.long 0x04++0x53 line.long 0x00 "HCCONTROL,HcControl Register" bitfld.long 0x00 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected" textline " " bitfld.long 0x00 8. " IR ,Interrupt Routing" "No interrupt,Interrupt" bitfld.long 0x00 6.--7. " HCFS ,Host Controller Functional State for USB" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND" textline " " bitfld.long 0x00 5. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x00 4. " CLE ,Control List Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PLE ,Periodic List Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" line.long 0x04 "HCCOMMANDSTATUS,HcCommandStatus Register" bitfld.long 0x04 16.--17. " SOC ,Schedulling overrun count" "0,1,2,3" bitfld.long 0x04 3. " OCR ,Ownership change request" "Not requested,Requested" textline " " bitfld.long 0x04 2. " BLF ,Bulk list filled" "Not filled,Filled" bitfld.long 0x04 1. " CLF ,Control list filled" "Not filled,Filled" textline " " bitfld.long 0x04 0. " HCR ,Host controller reset" "No reset,Reset" line.long 0x08 "HCINTERRUPTSTATUS,HcInterruptStatus Register" bitfld.long 0x08 30. " OC ,Ownership change" "Not changed,Changed" bitfld.long 0x08 6. " RHSC ,Root hub status change" "Not changed,Changed" textline " " bitfld.long 0x08 5. " FNO ,Frame number overflow" "No overflow,Overflow" bitfld.long 0x08 4. " UE ,Unrecoverable error" "No error,Error" textline " " bitfld.long 0x08 3. " RD ,Resume detected" "Not detected,Detected" bitfld.long 0x08 2. " SF ,Start to frame" "No effect,Started" textline " " bitfld.long 0x08 1. " WDH ,Writeback done head" "Not done,Done" bitfld.long 0x08 0. " SO ,Scheduling overrun" "No overrun,Overrun" line.long 0x0c "HCINTERRUPTENABLE,HcInterruptEnable Register" bitfld.long 0x0c 31. " MIE ,Master interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 30. " OC ,Ownership change interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 6. " RHSC ,Root hub status change interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 5. " FNO ,Frame number overflow interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 4. " UE ,Unrecoverable error interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 3. " RD ,Resume detect interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 2. " SF ,Start of frame interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 1. " WDH ,HcDoneHead Writeback interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 0. " SO ,Scheduling overrun interrupt enable" "Ignored,Enabled" line.long 0x10 "HCINTERRUPTDISABLE,HcInterruptDisable Register" bitfld.long 0x10 31. " MIE ,Master interrupt disable" "Ignored,Disabled" bitfld.long 0x10 30. " OC ,Ownership change interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 6. " RHSC ,Root hub status change interrupt disable" "Ignored,Disabled" bitfld.long 0x10 5. " FNO ,Frame number overflow interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 4. " UE ,Unrecoverable error interrupt disable" "Ignored,Disabled" bitfld.long 0x10 3. " RD ,Resume detect interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 2. " SF ,Start of frame interrupt disable" "Ignored,Disabled" bitfld.long 0x10 1. " WDH ,HcDoneHead Writeback interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 0. " SO ,Scheduling overrun interrupt disable" "Ignored,Disabled" line.long 0x14 "HCHCCA,HcHCCA Register" hexmask.long.tbyte 0x14 8.--31. 0x100 " HCCA ,Base address of the Host Controller Communication Area" line.long 0x18 "HCPERIODCURRENTED,HcPeriodCurrentED Register" hexmask.long 0x18 4.--31. 1. " PCED ,Period Current ED" line.long 0x1c "HCCONTROLHEADED,HcControlHeadED Register" hexmask.long 0x1C 4.--31. 1. " CHED ,Control head endpoint descriptor" line.long 0x20 "HCCONTROLCURRENTED,HcControlCurrentED Register" hexmask.long 0x20 4.--31. 1. " CCED ,Control current endpoint descriptor" line.long 0x24 "HCBULKHEADED,HcBulkHeadED Register" hexmask.long 0x24 4.--31. 1. " BHED ,Bulk head endpoint descriptor" line.long 0x28 "HCBULKCURRENTED,HcBulkCurrentED Register" hexmask.long 0x28 4.--31. 1. " BCED ,Bulk current endpoint descriptor" line.long 0x2c "HCDONEHEAD,HcDoneHead Register" hexmask.long 0x2c 4.--31. 1. " DH ,Done head" line.long 0x30 "HCFMINTERVAL,HcFmInterval Register" bitfld.long 0x30 31. " FIT ,Frame interval toggle" "0,1" hexmask.long.word 0x30 16.--30. 1. " FSMPS ,FS largest data packet" textline " " hexmask.long.word 0x30 0.--13. 1. " FI ,Frame interval" line.long 0x34 "HCFMREMAINING,HcFmRemaining Register" bitfld.long 0x34 31. " FRT ,Frame remaining toggle" "0,1" hexmask.long.word 0x34 0.--13. 1. " FR ,Frame remaining" line.long 0x38 "HCFMNUMBER,HcFmNumber Register" hexmask.long.word 0x38 0.--15. 1. " FN ,Frame number" line.long 0x3c "HCPERIODICSTART,HcPeriodicStart Register" hexmask.long.word 0x3c 0.--13. 1. " PS ,Periodic start" line.long 0x40 "HCLSTHRESHOLD,HcLSThreshold Register" hexmask.long.word 0x40 0.--11. 1. " LST ,Lo speed threshold" line.long 0x44 "HCRHDESCRIPTORA,HcRhDescriptorA Register" hexmask.long.byte 0x44 24.--31. 1. " POTPGT ,Power on to power goot time" bitfld.long 0x44 12. " NOCP ,No overcurrent protection" "Protected,Not protected" textline " " bitfld.long 0x44 11. " OCPM ,Overcurrent protection mode" "All,Individual" bitfld.long 0x44 10. " DT ,Device type" "Not compound,Compound" textline " " bitfld.long 0x44 9. " NPS ,No power switching" "Switched,Always on" bitfld.long 0x44 8. " PSM ,Power switching mode" "All,Individual" textline " " hexmask.long.byte 0x44 0.--7. 1. " NDP ,Number downstrem ports" line.long 0x48 "HCRHDESCRIPTORB,HcRhDescriptorB Register" bitfld.long 0x48 31. " PPCM15 ,Port 15 power control mask" "Global,Individual" bitfld.long 0x48 30. " PPCM14 ,Port 14 power control mask" "Global,Individual" textline " " bitfld.long 0x48 29. " PPCM13 ,Port 13 power control mask" "Global,Individual" bitfld.long 0x48 28. " PPCM12 ,Port 12 power control mask" "Global,Individual" textline " " bitfld.long 0x48 27. " PPCM11 ,Port 11 power control mask" "Global,Individual" bitfld.long 0x48 26. " PPCM10 ,Port 10 power control mask" "Global,Individual" textline " " bitfld.long 0x48 25. " PPCM9 ,Port 9 power control mask" "Global,Individual" bitfld.long 0x48 24. " PPCM8 ,Port 8 power control mask" "Global,Individual" textline " " bitfld.long 0x48 23. " PPCM7 ,Port 7 power control mask" "Global,Individual" bitfld.long 0x48 22. " PPCM6 ,Port 6 power control mask" "Global,Individual" textline " " bitfld.long 0x48 21. " PPCM5 ,Port 5 power control mask" "Global,Individual" bitfld.long 0x48 20. " PPCM4 ,Port 4 power control mask" "Global,Individual" textline " " bitfld.long 0x48 19. " PPCM3 ,Port 3 power control mask" "Global,Individual" bitfld.long 0x48 18. " PPCM2 ,Port 2 power control mask" "Global,Individual" textline " " bitfld.long 0x48 17. " PPCM1 ,Port 1 power control mask" "Global,Individual" bitfld.long 0x48 15. " DR15 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 14. " DR14 ,Device removable" "Removable,Not removable" bitfld.long 0x48 13. " DR13 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 12. " DR12 ,Device removable" "Removable,Not removable" bitfld.long 0x48 11. " DR11 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 10. " DR10 ,Device removable" "Removable,Not removable" bitfld.long 0x48 9. " DR9 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 8. " DR8 ,Device removable" "Removable,Not removable" bitfld.long 0x48 7. " DR7 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 6. " DR6 ,Device removable" "Removable,Not removable" bitfld.long 0x48 5. " DR5 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 4. " DR4 ,Device removable" "Removable,Not removable" bitfld.long 0x48 3. " DR3 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 2. " DR2 ,Device removable" "Removable,Not removable" bitfld.long 0x48 1. " DR1 ,Device removable" "Removable,Not removable" line.long 0x4c "HCRHSTATUS,HcRhStatus Register" bitfld.long 0x4c 31. " CRWE ,Clear remote wakeup enable" "No effect,Cleared" bitfld.long 0x4c 17. " OCIC ,Overcurrent indicator change" "Not changed,Changed" textline " " bitfld.long 0x4c 16. " LPSC ,Set global power" "Individual,Global" bitfld.long 0x4c 15. " DRWE ,Device remote wakeup enable" "Disabled,Enabled" textline " " bitfld.long 0x4c 1. " OCI ,Overcurrent indicator" "No overcurrent,Overcurrent" bitfld.long 0x4c 0. " LPS ,Clear global power" "No effect,Cleared" line.long 0x50 "HCRHPORTSTATUS,HcRhPortStatus Register" bitfld.long 0x50 20. " PRSC ,Port reset status change" "Not complete,Complete" bitfld.long 0x50 19. " OCIC ,Port overcurrent indicator change" "Not complete,Complete" textline " " bitfld.long 0x50 18. " PSSC ,Port suspend status change" "Not complete,Complete" bitfld.long 0x50 17. " PESC ,Port enable status change" "Not changed,Changed" textline " " bitfld.long 0x50 16. " CSC ,Connect status change" "Not changed,Changed" textline " " bitfld.long 0x50 9. " LSDA ,Low speed device attached (read) / Clear port power (write)" "Full speed/No effect,Low speed/Cleared" textline " " bitfld.long 0x50 8. " PPS ,Port power status/set" "Off,On" bitfld.long 0x50 4. " PRS ,Port reset status/set" "No reset,Reset" textline " " bitfld.long 0x50 3. " POCI ,Port overcurrent indicator (read) / Clear suspend status (write)" "No overcurrent/No effect,Overcurrent/Cleared" textline " " bitfld.long 0x50 2. " PSS ,Port suspend status/set" "Not suspended,Suspended" textline " " bitfld.long 0x50 1. " PES ,Port enable status/set" "Disabled,Enabled" textline " " bitfld.long 0x50 0. " CCS ,Current connect status (read) / Clear port enable (write)" "Not connected/No effect,Connected/Cleared" width 0xb tree.end tree "OHCI 2" base asd:0xe2100000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "HCREVISION,HcRevision Register" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision" group.long 0x04++0x53 line.long 0x00 "HCCONTROL,HcControl Register" bitfld.long 0x00 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected" textline " " bitfld.long 0x00 8. " IR ,Interrupt Routing" "No interrupt,Interrupt" bitfld.long 0x00 6.--7. " HCFS ,Host Controller Functional State for USB" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND" textline " " bitfld.long 0x00 5. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x00 4. " CLE ,Control List Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PLE ,Periodic List Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" line.long 0x04 "HCCOMMANDSTATUS,HcCommandStatus Register" bitfld.long 0x04 16.--17. " SOC ,Schedulling overrun count" "0,1,2,3" bitfld.long 0x04 3. " OCR ,Ownership change request" "Not requested,Requested" textline " " bitfld.long 0x04 2. " BLF ,Bulk list filled" "Not filled,Filled" bitfld.long 0x04 1. " CLF ,Control list filled" "Not filled,Filled" textline " " bitfld.long 0x04 0. " HCR ,Host controller reset" "No reset,Reset" line.long 0x08 "HCINTERRUPTSTATUS,HcInterruptStatus Register" bitfld.long 0x08 30. " OC ,Ownership change" "Not changed,Changed" bitfld.long 0x08 6. " RHSC ,Root hub status change" "Not changed,Changed" textline " " bitfld.long 0x08 5. " FNO ,Frame number overflow" "No overflow,Overflow" bitfld.long 0x08 4. " UE ,Unrecoverable error" "No error,Error" textline " " bitfld.long 0x08 3. " RD ,Resume detected" "Not detected,Detected" bitfld.long 0x08 2. " SF ,Start to frame" "No effect,Started" textline " " bitfld.long 0x08 1. " WDH ,Writeback done head" "Not done,Done" bitfld.long 0x08 0. " SO ,Scheduling overrun" "No overrun,Overrun" line.long 0x0c "HCINTERRUPTENABLE,HcInterruptEnable Register" bitfld.long 0x0c 31. " MIE ,Master interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 30. " OC ,Ownership change interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 6. " RHSC ,Root hub status change interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 5. " FNO ,Frame number overflow interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 4. " UE ,Unrecoverable error interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 3. " RD ,Resume detect interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 2. " SF ,Start of frame interrupt enable" "Ignored,Enabled" bitfld.long 0x0c 1. " WDH ,HcDoneHead Writeback interrupt enable" "Ignored,Enabled" textline " " bitfld.long 0x0c 0. " SO ,Scheduling overrun interrupt enable" "Ignored,Enabled" line.long 0x10 "HCINTERRUPTDISABLE,HcInterruptDisable Register" bitfld.long 0x10 31. " MIE ,Master interrupt disable" "Ignored,Disabled" bitfld.long 0x10 30. " OC ,Ownership change interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 6. " RHSC ,Root hub status change interrupt disable" "Ignored,Disabled" bitfld.long 0x10 5. " FNO ,Frame number overflow interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 4. " UE ,Unrecoverable error interrupt disable" "Ignored,Disabled" bitfld.long 0x10 3. " RD ,Resume detect interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 2. " SF ,Start of frame interrupt disable" "Ignored,Disabled" bitfld.long 0x10 1. " WDH ,HcDoneHead Writeback interrupt disable" "Ignored,Disabled" textline " " bitfld.long 0x10 0. " SO ,Scheduling overrun interrupt disable" "Ignored,Disabled" line.long 0x14 "HCHCCA,HcHCCA Register" hexmask.long.tbyte 0x14 8.--31. 0x100 " HCCA ,Base address of the Host Controller Communication Area" line.long 0x18 "HCPERIODCURRENTED,HcPeriodCurrentED Register" hexmask.long 0x18 4.--31. 1. " PCED ,Period Current ED" line.long 0x1c "HCCONTROLHEADED,HcControlHeadED Register" hexmask.long 0x1C 4.--31. 1. " CHED ,Control head endpoint descriptor" line.long 0x20 "HCCONTROLCURRENTED,HcControlCurrentED Register" hexmask.long 0x20 4.--31. 1. " CCED ,Control current endpoint descriptor" line.long 0x24 "HCBULKHEADED,HcBulkHeadED Register" hexmask.long 0x24 4.--31. 1. " BHED ,Bulk head endpoint descriptor" line.long 0x28 "HCBULKCURRENTED,HcBulkCurrentED Register" hexmask.long 0x28 4.--31. 1. " BCED ,Bulk current endpoint descriptor" line.long 0x2c "HCDONEHEAD,HcDoneHead Register" hexmask.long 0x2c 4.--31. 1. " DH ,Done head" line.long 0x30 "HCFMINTERVAL,HcFmInterval Register" bitfld.long 0x30 31. " FIT ,Frame interval toggle" "0,1" hexmask.long.word 0x30 16.--30. 1. " FSMPS ,FS largest data packet" textline " " hexmask.long.word 0x30 0.--13. 1. " FI ,Frame interval" line.long 0x34 "HCFMREMAINING,HcFmRemaining Register" bitfld.long 0x34 31. " FRT ,Frame remaining toggle" "0,1" hexmask.long.word 0x34 0.--13. 1. " FR ,Frame remaining" line.long 0x38 "HCFMNUMBER,HcFmNumber Register" hexmask.long.word 0x38 0.--15. 1. " FN ,Frame number" line.long 0x3c "HCPERIODICSTART,HcPeriodicStart Register" hexmask.long.word 0x3c 0.--13. 1. " PS ,Periodic start" line.long 0x40 "HCLSTHRESHOLD,HcLSThreshold Register" hexmask.long.word 0x40 0.--11. 1. " LST ,Lo speed threshold" line.long 0x44 "HCRHDESCRIPTORA,HcRhDescriptorA Register" hexmask.long.byte 0x44 24.--31. 1. " POTPGT ,Power on to power goot time" bitfld.long 0x44 12. " NOCP ,No overcurrent protection" "Protected,Not protected" textline " " bitfld.long 0x44 11. " OCPM ,Overcurrent protection mode" "All,Individual" bitfld.long 0x44 10. " DT ,Device type" "Not compound,Compound" textline " " bitfld.long 0x44 9. " NPS ,No power switching" "Switched,Always on" bitfld.long 0x44 8. " PSM ,Power switching mode" "All,Individual" textline " " hexmask.long.byte 0x44 0.--7. 1. " NDP ,Number downstrem ports" line.long 0x48 "HCRHDESCRIPTORB,HcRhDescriptorB Register" bitfld.long 0x48 31. " PPCM15 ,Port 15 power control mask" "Global,Individual" bitfld.long 0x48 30. " PPCM14 ,Port 14 power control mask" "Global,Individual" textline " " bitfld.long 0x48 29. " PPCM13 ,Port 13 power control mask" "Global,Individual" bitfld.long 0x48 28. " PPCM12 ,Port 12 power control mask" "Global,Individual" textline " " bitfld.long 0x48 27. " PPCM11 ,Port 11 power control mask" "Global,Individual" bitfld.long 0x48 26. " PPCM10 ,Port 10 power control mask" "Global,Individual" textline " " bitfld.long 0x48 25. " PPCM9 ,Port 9 power control mask" "Global,Individual" bitfld.long 0x48 24. " PPCM8 ,Port 8 power control mask" "Global,Individual" textline " " bitfld.long 0x48 23. " PPCM7 ,Port 7 power control mask" "Global,Individual" bitfld.long 0x48 22. " PPCM6 ,Port 6 power control mask" "Global,Individual" textline " " bitfld.long 0x48 21. " PPCM5 ,Port 5 power control mask" "Global,Individual" bitfld.long 0x48 20. " PPCM4 ,Port 4 power control mask" "Global,Individual" textline " " bitfld.long 0x48 19. " PPCM3 ,Port 3 power control mask" "Global,Individual" bitfld.long 0x48 18. " PPCM2 ,Port 2 power control mask" "Global,Individual" textline " " bitfld.long 0x48 17. " PPCM1 ,Port 1 power control mask" "Global,Individual" bitfld.long 0x48 15. " DR15 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 14. " DR14 ,Device removable" "Removable,Not removable" bitfld.long 0x48 13. " DR13 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 12. " DR12 ,Device removable" "Removable,Not removable" bitfld.long 0x48 11. " DR11 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 10. " DR10 ,Device removable" "Removable,Not removable" bitfld.long 0x48 9. " DR9 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 8. " DR8 ,Device removable" "Removable,Not removable" bitfld.long 0x48 7. " DR7 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 6. " DR6 ,Device removable" "Removable,Not removable" bitfld.long 0x48 5. " DR5 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 4. " DR4 ,Device removable" "Removable,Not removable" bitfld.long 0x48 3. " DR3 ,Device removable" "Removable,Not removable" textline " " bitfld.long 0x48 2. " DR2 ,Device removable" "Removable,Not removable" bitfld.long 0x48 1. " DR1 ,Device removable" "Removable,Not removable" line.long 0x4c "HCRHSTATUS,HcRhStatus Register" bitfld.long 0x4c 31. " CRWE ,Clear remote wakeup enable" "No effect,Cleared" bitfld.long 0x4c 17. " OCIC ,Overcurrent indicator change" "Not changed,Changed" textline " " bitfld.long 0x4c 16. " LPSC ,Set global power" "Individual,Global" bitfld.long 0x4c 15. " DRWE ,Device remote wakeup enable" "Disabled,Enabled" textline " " bitfld.long 0x4c 1. " OCI ,Overcurrent indicator" "No overcurrent,Overcurrent" bitfld.long 0x4c 0. " LPS ,Clear global power" "No effect,Cleared" line.long 0x50 "HCRHPORTSTATUS,HcRhPortStatus Register" bitfld.long 0x50 20. " PRSC ,Port reset status change" "Not complete,Complete" bitfld.long 0x50 19. " OCIC ,Port overcurrent indicator change" "Not complete,Complete" textline " " bitfld.long 0x50 18. " PSSC ,Port suspend status change" "Not complete,Complete" bitfld.long 0x50 17. " PESC ,Port enable status change" "Not changed,Changed" textline " " bitfld.long 0x50 16. " CSC ,Connect status change" "Not changed,Changed" textline " " bitfld.long 0x50 9. " LSDA ,Low speed device attached (read) / Clear port power (write)" "Full speed/No effect,Low speed/Cleared" textline " " bitfld.long 0x50 8. " PPS ,Port power status/set" "Off,On" bitfld.long 0x50 4. " PRS ,Port reset status/set" "No reset,Reset" textline " " bitfld.long 0x50 3. " POCI ,Port overcurrent indicator (read) / Clear suspend status (write)" "No overcurrent/No effect,Overcurrent/Cleared" textline " " bitfld.long 0x50 2. " PSS ,Port suspend status/set" "Not suspended,Suspended" textline " " bitfld.long 0x50 1. " PES ,Port enable status/set" "Disabled,Enabled" textline " " bitfld.long 0x50 0. " CCS ,Current connect status (read) / Clear port enable (write)" "Not connected/No effect,Connected/Cleared" width 0xb tree.end tree "EHCI 1" base asd:0xe1800000 width 18. rgroup.long 0x00++0x0b "Capability registers" line.long 0x00 "HCCAPBASE,Capability Registers Base Address Register" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x0 16.--31. 1. " HCIVERSION ,EHCI revision number supported" hexmask.long.byte 0x0 0.--7. 1. " CAPLENGTH ,EHCI Compliant" endif line.long 0x4 "HCSPARAMS,Structural Parameters Register" sif (cpu()=="SPEAR600") bitfld.long 0x4 20.--23. " DPN ,Debug port number" "No debug,1,?..." textline " " else bitfld.long 0x4 20.--23. " DPN ,Debug port number" "No debug,1,2,?..." textline " " endif bitfld.long 0x4 16. " P_INDICATOR ,Port indicators" "Not supported,Supported" textline " " sif (cpu()=="SPEAR600") bitfld.long 0x4 12.--15. " N_CC ,Number of companion controllers" "0,1,?..." bitfld.long 0x4 8.--11. " N_PCC ,Number of ports per companion controller" "0,1,?..." else bitfld.long 0x4 12.--15. " N_CC ,Number of companion controllers" "0,1,2,?..." bitfld.long 0x4 8.--11. " N_PCC ,Number of ports per companion controller" "0,1,2,?..." endif textline " " bitfld.long 0x4 7. " PRR ,Port routing rules" "N_PCC lowest/next lowest numbered func,Enum. by first N_PORTS elements of the HCSP-PORTROUTE array" textline " " bitfld.long 0x4 4. " PPC ,Port power control" "Not included,Included" textline " " sif (cpu()=="SPEAR600") bitfld.long 0x4 0.--3. " N_PORTS ,Number of physical downstream ports" "0,1,?..." else bitfld.long 0x4 0.--3. " N_PORTS ,Number of physical downstream ports" "0,1,2,?..." endif line.long 0x8 "HCCPARAMS,Capability Parameters Register" hexmask.long.byte 0x8 8.--15. 1. " EECP ,EHCI Extended Capabilities Pointer" bitfld.long 0x8 7. " IST[7] ,Isochronous Scheduling Threshold bit 7" "Low,High" textline " " bitfld.long 0x8 4.--6. " IST[6:4] ,Isochronous Scheduling Threshold bits 6-4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 2. " ASPC ,Asynchronous Schedule Park Capability" "Not supported,Supported" bitfld.long 0x8 1. " PFLF ,Programmable Frame List Flag" "1024,FLS" textline " " bitfld.long 0x8 0. " 64BAC ,64 bits Addressing Capability" "32-bit,64-bit" group.long 0x10++0x03 line.long 0x00 "USBOPBASE,Operational Registers Base Address" width 18. base ((data.long(asd:0xe1800000+0x10))&0xffffffff) group.long 0x00++0x1b "Operational registers" line.long 0x00 "USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control" bitfld.long 0x00 11. " ASPME ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASPMC ,Asynchronous Schedule Park Mode Count" "Reserved,1,2,3" bitfld.long 0x00 7. " LHCR ,Light Host Controller Reset" "No reset,Reset" textline " " bitfld.long 0x00 6. " IAAD ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,ASYNCLISTADDR" textline " " bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,PERIODICLISTBASE" bitfld.long 0x00 2.--3. " FLS ,Frame List Size" "1024,512,256,?..." textline " " bitfld.long 0x00 1. " HCRESET ,Host Controller Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Run / Stop" "Stopped,Run" line.long 0x04 "USBSTS,USB Status Register" eventfld.long 0x04 15. " ASS ,Asynchronous Schedule Status" "Disabled,Enabled" eventfld.long 0x04 14. " PSS ,Periodic Schedule Status" "Disabled,Enabled" textline " " eventfld.long 0x04 13. " R ,Reclamation" "Not detected,Detected" eventfld.long 0x04 12. " HH ,HCHalted" "Not stopped,Stopped" textline " " eventfld.long 0x04 5. " IAA ,Interrupt on Async Advance" "No interrupt,Interrupt" eventfld.long 0x04 4. " HSE ,Host System Error" "No error,Error" textline " " eventfld.long 0x04 3. " FLR ,Frame List Rollover" "Not rolled over,Rolled over" eventfld.long 0x04 2. " PCD ,Port Change Detect" "Not changed,Changed" textline " " eventfld.long 0x04 1. " USBERRINT ,USB Error Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 0. " USBINT ,USB Interrupt" "No interrupt,Interrupt" line.long 0x08 "USBINTR,USB Interrupt Enable Register" bitfld.long 0x08 5. " IAAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x08 4. " HSEE ,Host System Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " FLRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x08 2. " PCIE ,Port Change Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " UEIE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " UIE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x0c "FRINDEX,USB Frame Index Register" hexmask.long.word 0x0C 0.--13. 1. " FRINDEX ,Frame Index" line.long 0x10 "CTRLDSSEGMENT,4G Segment Selector Register" line.long 0x14 "PERIODICLISTBASE,Periodic Frame List Base Address Register" hexmask.long.tbyte 0x14 12.--31. 0x10 " BA ,Base Address" line.long 0x18 "ASYNCLISTADDR,Asynchronous List Address Register" hexmask.long 0x18 5.--31. 0x20 " LPL ,Link Pointer Low" width 18. group.long 0x40++0x03 "Auxiliary Power Well registers" line.long 0x00 "CONFIGFLAG,Configured Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "OHCI,EHCI" if (((data.long(asd:0xe1800000+0x04))&0x10)==0x10) group.long 0x44++0x03 line.long 0x00 "PORTSC1,Port 1 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Off,On" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" else group.long 0x44++0x03 line.long 0x00 "PORTSC1,Port 1 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" endif sif (cpu()=="SPEAR300") if (((data.long(asd:0xe1800000+0x04))&0x10)==0x10) group.long 0x48++0x03 line.long 0x00 "PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Off,On" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" else group.long 0x48++0x03 line.long 0x00 "PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" endif endif width 18. group.long 0x80++0x17 "Proprietary Configuration Registers" line.long 0x00 "INSNREG00,Programmable micro frame base value Register" hexmask.long.word 0x00 0.--13. 1. " MFL ,Micro frame length" line.long 0x04 "INSNREG01,Programmable packet buffer OUT/IN thresholds" hexmask.long.word 0x04 16.--31. 1. " OUT ,OUT transactions threshold" hexmask.long.word 0x04 0.--15. 1. " IN ,IN transactions threshold" line.long 0x08 "INSNREG02,Programmable packet buffer depth" hexmask.long.word 0x08 0.--11. 1. " BUF_DEPTH ,Programmable packet buffer depth" line.long 0x0c "INSNREG03,Break memory transfer" bitfld.long 0x0C 0. " BMT ,Break Memory Transfer Enable" "Disabled,Enabled" line.long 0x10 "INSNREG04,For debug purposes only" line.long 0x14 "INSNREG05,UTMI control and status registers" bitfld.long 0x14 17. " VBUSY ,Vendor Interface Busy" "Not busy,Busy" bitfld.long 0x14 13.--16. " VPORT ,Vendor interface port selection" "Port 0,Port 1,?..." textline " " bitfld.long 0x14 12. " VCONTROLLOADM ,UTMI VcontrolLoadM output" "Load,No action" bitfld.long 0x14 8.--11. " VCONTROL ,Vendor Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x14 0.--7. 1. " VSTATUS ,Vendor Status" width 0xb tree.end sif (cpu()=="SPEAR600") tree "EHCI 2" base asd:0xe2000000 width 18. rgroup.long 0x00++0x0b "Capability registers" line.long 0x00 "HCCAPBASE,Capability Registers Base Address Register" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") hexmask.long.word 0x0 16.--31. 1. " HCIVERSION ,EHCI revision number supported" hexmask.long.byte 0x0 0.--7. 1. " CAPLENGTH ,EHCI Compliant" endif line.long 0x4 "HCSPARAMS,Structural Parameters Register" sif (cpu()=="SPEAR600") bitfld.long 0x4 20.--23. " DPN ,Debug port number" "No debug,1,?..." textline " " else bitfld.long 0x4 20.--23. " DPN ,Debug port number" "No debug,1,2,?..." textline " " endif bitfld.long 0x4 16. " P_INDICATOR ,Port indicators" "Not supported,Supported" textline " " sif (cpu()=="SPEAR600") bitfld.long 0x4 12.--15. " N_CC ,Number of companion controllers" "0,1,?..." bitfld.long 0x4 8.--11. " N_PCC ,Number of ports per companion controller" "0,1,?..." else bitfld.long 0x4 12.--15. " N_CC ,Number of companion controllers" "0,1,2,?..." bitfld.long 0x4 8.--11. " N_PCC ,Number of ports per companion controller" "0,1,2,?..." endif textline " " bitfld.long 0x4 7. " PRR ,Port routing rules" "N_PCC lowest/next lowest numbered func,Enum. by first N_PORTS elements of the HCSP-PORTROUTE array" textline " " bitfld.long 0x4 4. " PPC ,Port power control" "Not included,Included" textline " " sif (cpu()=="SPEAR600") bitfld.long 0x4 0.--3. " N_PORTS ,Number of physical downstream ports" "0,1,?..." else bitfld.long 0x4 0.--3. " N_PORTS ,Number of physical downstream ports" "0,1,2,?..." endif line.long 0x8 "HCCPARAMS,Capability Parameters Register" hexmask.long.byte 0x8 8.--15. 1. " EECP ,EHCI Extended Capabilities Pointer" bitfld.long 0x8 7. " IST[7] ,Isochronous Scheduling Threshold bit 7" "Low,High" textline " " bitfld.long 0x8 4.--6. " IST[6:4] ,Isochronous Scheduling Threshold bits 6-4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 2. " ASPC ,Asynchronous Schedule Park Capability" "Not supported,Supported" bitfld.long 0x8 1. " PFLF ,Programmable Frame List Flag" "1024,FLS" textline " " bitfld.long 0x8 0. " 64BAC ,64 bits Addressing Capability" "32-bit,64-bit" group.long 0x10++0x03 line.long 0x00 "USBOPBASE,Operational Registers Base Address" width 18. base ((data.long(asd:0xe2000000+0x10))&0xffffffff) group.long 0x00++0x1b "Operational registers" line.long 0x00 "USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control" bitfld.long 0x00 11. " ASPME ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASPMC ,Asynchronous Schedule Park Mode Count" "Reserved,1,2,3" bitfld.long 0x00 7. " LHCR ,Light Host Controller Reset" "No reset,Reset" textline " " bitfld.long 0x00 6. " IAAD ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,ASYNCLISTADDR" textline " " bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,PERIODICLISTBASE" bitfld.long 0x00 2.--3. " FLS ,Frame List Size" "1024,512,256,?..." textline " " bitfld.long 0x00 1. " HCRESET ,Host Controller Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Run / Stop" "Stopped,Run" line.long 0x04 "USBSTS,USB Status Register" eventfld.long 0x04 15. " ASS ,Asynchronous Schedule Status" "Disabled,Enabled" eventfld.long 0x04 14. " PSS ,Periodic Schedule Status" "Disabled,Enabled" textline " " eventfld.long 0x04 13. " R ,Reclamation" "Not detected,Detected" eventfld.long 0x04 12. " HH ,HCHalted" "Not stopped,Stopped" textline " " eventfld.long 0x04 5. " IAA ,Interrupt on Async Advance" "No interrupt,Interrupt" eventfld.long 0x04 4. " HSE ,Host System Error" "No error,Error" textline " " eventfld.long 0x04 3. " FLR ,Frame List Rollover" "Not rolled over,Rolled over" eventfld.long 0x04 2. " PCD ,Port Change Detect" "Not changed,Changed" textline " " eventfld.long 0x04 1. " USBERRINT ,USB Error Interrupt" "No interrupt,Interrupt" eventfld.long 0x04 0. " USBINT ,USB Interrupt" "No interrupt,Interrupt" line.long 0x08 "USBINTR,USB Interrupt Enable Register" bitfld.long 0x08 5. " IAAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x08 4. " HSEE ,Host System Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " FLRE ,Frame List Rollover Enable" "Disabled,Enabled" bitfld.long 0x08 2. " PCIE ,Port Change Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " UEIE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " UIE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x0c "FRINDEX,USB Frame Index Register" hexmask.long.word 0x0C 0.--13. 1. " FRINDEX ,Frame Index" line.long 0x10 "CTRLDSSEGMENT,4G Segment Selector Register" line.long 0x14 "PERIODICLISTBASE,Periodic Frame List Base Address Register" hexmask.long.tbyte 0x14 12.--31. 0x10 " BA ,Base Address" line.long 0x18 "ASYNCLISTADDR,Asynchronous List Address Register" hexmask.long 0x18 5.--31. 0x20 " LPL ,Link Pointer Low" width 18. group.long 0x40++0x03 "Auxiliary Power Well registers" line.long 0x00 "CONFIGFLAG,Configured Flag Register" bitfld.long 0x00 0. " CF ,Configure Flag" "OHCI,EHCI" if (((data.long(asd:0xe2000000+0x04))&0x10)==0x10) group.long 0x44++0x03 line.long 0x00 "PORTSC1,Port 1 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Off,On" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" else group.long 0x44++0x03 line.long 0x00 "PORTSC1,Port 1 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" endif sif (cpu()=="SPEAR300") if (((data.long(asd:0xe2000000+0x04))&0x10)==0x10) group.long 0x48++0x03 line.long 0x00 "PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Off,On" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" else group.long 0x48++0x03 line.long 0x00 "PORTSC2,Port 2 Status and Control Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WKCNNT_E ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." textline " " bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Disabled,Amber,Green,?..." bitfld.long 0x00 13. " PO ,Port Owner" "Low,High" textline " " bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0/Not Low-Speed/EHCI reset,J-state/Not Low-Speed/EHCI reset,K-state/Low-Speed/release ownership of port,Not Low-Speed/EHCI reset" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume" eventfld.long 0x00 5. " OCC ,Over-current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OCA ,Over-current Active" "Disabled,Enabled" eventfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PEN ,Port Enabled/Disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Not present,Present" endif endif width 18. group.long 0x80++0x17 "Proprietary Configuration Registers" line.long 0x00 "INSNREG00,Programmable micro frame base value Register" hexmask.long.word 0x00 0.--13. 1. " MFL ,Micro frame length" line.long 0x04 "INSNREG01,Programmable packet buffer OUT/IN thresholds" hexmask.long.word 0x04 16.--31. 1. " OUT ,OUT transactions threshold" hexmask.long.word 0x04 0.--15. 1. " IN ,IN transactions threshold" line.long 0x08 "INSNREG02,Programmable packet buffer depth" hexmask.long.word 0x08 0.--11. 1. " BUF_DEPTH ,Programmable packet buffer depth" line.long 0x0c "INSNREG03,Break memory transfer" bitfld.long 0x0C 0. " BMT ,Break Memory Transfer Enable" "Disabled,Enabled" line.long 0x10 "INSNREG04,For debug purposes only" line.long 0x14 "INSNREG05,UTMI control and status registers" bitfld.long 0x14 17. " VBUSY ,Vendor Interface Busy" "Not busy,Busy" bitfld.long 0x14 13.--16. " VPORT ,Vendor interface port selection" "Port 0,Port 1,?..." textline " " bitfld.long 0x14 12. " VCONTROLLOADM ,UTMI VcontrolLoadM output" "Load,No action" bitfld.long 0x14 8.--11. " VCONTROL ,Vendor Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x14 0.--7. 1. " VSTATUS ,Vendor Status" width 0xb tree.end endif tree.end tree.open "USB 2.0 Device" tree "Global Control and Status Registers" base asd:0xe1100000 width 12. group.long 0x400++0x03 line.long 0x00 "DEV_CONFIG,Device Configuration Register" bitfld.long 0x0 18. " SET_DESC ,Set Descriptor requests support" "Not supported,Supported" bitfld.long 0x0 17. " CSR_PRG ,Dynamic UDC register programming support" "Not supported,Supported" textline " " bitfld.long 0x0 16. " HALT_STATUS ,Reply to USB Host Clear_Feature request for endpoint 0" "ACK,STALL" bitfld.long 0x0 13.--15. " HS_TIMEOUT_CALIB ,Timeout counter in HS operation" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 10.--12. " FS_TIMEOUT_CALIB ,Timeout counter in FS operation" "0,1,2,3,4,5,6,7" bitfld.long 0x0 9. " PHY_ERROR_DETECT ,PHY error detection" "No error,Error" textline " " bitfld.long 0x0 8. " STATUS_1 ,Status 1" "Low,High" bitfld.long 0x0 7. " STATUS ,Status" "Low,High" textline " " bitfld.long 0x0 6. " DIR ,UTMI data bus interface direction" "Unidirectional,Bidirectional" bitfld.long 0x0 5. " PI ,UTMI PHY interface" "16-bit,8-bit" textline " " bitfld.long 0x0 4. " SS ,USB Device Support Sync Frame" "Not supported,Supported" bitfld.long 0x0 3. " SP ,USB Device self-powered" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " RWKP ,USB Device remote wake up capable" "No wakeup,Wakeup" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x0 0.--1. " SPD ,Device speed" "HS,FS,LS,?..." else bitfld.long 0x0 0.--1. " SPD ,Device speed" "HS 30/60 MHz,FS 30/60 MHz,LS 6 MHz,FS 48 MHz" endif if (((d.l(asd:0xe1100000+0x404))&0x200)==0x200) group.long 0x404++0x03 line.long 0x00 "DEV_CTRL,Device Control Register" hexmask.long.byte 0x00 24.--31. 1. " THLEN ,Threshold length" hexmask.long.byte 0x00 16.--23. 1. " BRLEN ,Burst length" textline " " bitfld.long 0x00 13. " CSR_DONE ,CSR programming completion notification" "Not completed,Completed" bitfld.long 0x00 12. " DEVNAK ,NAK handshake" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " SCALE ,Scale down" "Normal,Scale Down" bitfld.long 0x00 10. " SD ,Soft disconnect" "Connected,Disconnected" textline " " bitfld.long 0x00 9. " MODE ,Operation mode" "Slave,DMA" bitfld.long 0x00 8. " BREN ,Burst transfer to AHB bus enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " THE ,Thresholding enable" "Disabled,Enabled" bitfld.long 0x00 6. " BF ,Buffer fill mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BE ,Endianness bit" "Little,Big" bitfld.long 0x00 4. " DU ,Descriptor update" "Not updated,Updated" textline " " bitfld.long 0x00 3. " TDE ,DMA transmission" "Disabled,Enabled" bitfld.long 0x00 2. " RDE ,DMA receive" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RES ,Resuming signaling on the USB" "Not resumed,Resumed" else group.long 0x404++0x03 line.long 0x00 "DEV_CTRL,Device Control Register" textline " " bitfld.long 0x00 13. " CSR_DONE ,CSR programming completion notification" "Not completed,Completed" bitfld.long 0x00 12. " DEVNAK ,NAK handshake" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " SCALE ,Scale down" "Normal,Scale Down" bitfld.long 0x00 10. " SD ,Soft disconnect" "Connected,Disconnected" textline " " bitfld.long 0x00 9. " MODE ,Operation mode" "Slave,DMA" bitfld.long 0x00 0. " RES ,Resuming signaling on the USB" "Not resumed,Resumed" textline " " textline " " textline " " textline " " endif rgroup.long 0x408++0x03 line.long 0x00 "DEV_STATUS,Device Status Register" hexmask.long.word 0x00 18.--31. 1. " TS ,Frame number of the received SOF" bitfld.long 0x00 16. " PHY_ERROR ,PHY Error" "No error,Error" textline " " bitfld.long 0x00 15. " RXFIFO_EMPTY ,Receive FIFO empty status" "Not empty,Empty" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 13.--14. " ENUM_SPD ,Enumerated speed" "HS,FS,LS,?..." else bitfld.long 0x00 13.--14. " ENUM_SPD ,Enumerated speed" "HS,FS,LS,FS" endif textline " " bitfld.long 0x00 12. " SUSP ,Suspend status" "Not detected,Detected" bitfld.long 0x00 8.--11. " ALT ,Alternate setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " INTF ,Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " CFG ,Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 12. group.long 0x40c++0x0f line.long 0x00 "DEV_INT,Device Interrupt Register" bitfld.long 0x00 6. " ENUM ,Speed enumeration completed" "No interrupt,Interrupt" bitfld.long 0x00 5. " SOF ,SOF token detected" "No interrupt,Interrupt" bitfld.long 0x00 4. " US ,Suspend state detected" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " UR ,Reset detected" "No interrupt,Interrupt" bitfld.long 0x00 2. " ES ,Idle state detected" "No interrupt,Interrupt" bitfld.long 0x00 1. " SI ,Set interface command" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " SC ,Set configuration command" "No interrupt,Interrupt" line.long 0x04 "DEV_INTMSK,Device Interrupt Mask Register" bitfld.long 0x04 6. " ENUM ,Speed enumeration completed" "Not masked,Masked" bitfld.long 0x04 5. " SOF ,SOF token detected" "Not Masked,Masked" bitfld.long 0x04 4. " US ,Suspend state detected" "Not masked,Masked" textline " " bitfld.long 0x04 3. " UR ,Reset detected" "Not masked,Masked" bitfld.long 0x04 2. " ES ,Idle state detected" "Not masked,Masked" bitfld.long 0x04 1. " SI ,Set interface command" "Not masked,Masked" textline " " bitfld.long 0x04 0. " SC ,Set configuration command" "Not masked,Masked" line.long 0x08 "END_INT,Endpoint Interrupt Register" bitfld.long 0x08 31. " OUT[15] ,OUT endpoint bit 15" "No interrupt,Interrupt" bitfld.long 0x08 30. " OUT[14] ,OUT endpoint bit 14" "No interrupt,Interrupt" bitfld.long 0x08 29. " OUT[13] ,OUT endpoint bit 13" "No interrupt,Interrupt" textline " " bitfld.long 0x08 28. " OUT[12] ,OUT endpoint bit 12" "No interrupt,Interrupt" bitfld.long 0x08 27. " OUT[11] ,OUT endpoint bit 11" "No interrupt,Interrupt" bitfld.long 0x08 26. " OUT[10] ,OUT endpoint bit 10" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " OUT[9] ,OUT endpoint bit 9" "No interrupt,Interrupt" bitfld.long 0x08 24. " OUT[8] ,OUT endpoint bit 8" "No interrupt,Interrupt" bitfld.long 0x08 23. " OUT[7] ,OUT endpoint bit 7" "No interrupt,Interrupt" textline " " bitfld.long 0x08 22. " OUT[6] ,OUT endpoint bit 6" "No interrupt,Interrupt" bitfld.long 0x08 21. " OUT[5] ,OUT endpoint bit 5" "No interrupt,Interrupt" bitfld.long 0x08 20. " OUT[4] ,OUT endpoint bit 4" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " OUT[3] ,OUT endpoint bit 3" "No interrupt,Interrupt" bitfld.long 0x08 18. " OUT[2] ,OUT endpoint bit 2" "No interrupt,Interrupt" bitfld.long 0x08 17. " OUT[1] ,OUT endpoint bit 1" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " OUT[0] ,OUT endpoint bit 0" "No interrupt,Interrupt" bitfld.long 0x08 15. " IN[15] ,IN endpoint bit 15" "No interrupt,Interrupt" bitfld.long 0x08 14. " IN[14] ,IN endpoint bit 14" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " IN[13] ,IN endpoint bit 13" "No interrupt,Interrupt" bitfld.long 0x08 12. " IN[12] ,IN endpoint bit 12" "No interrupt,Interrupt" bitfld.long 0x08 11. " IN[11] ,IN endpoint bit 11" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " IN[10] ,IN endpoint bit 10" "No interrupt,Interrupt" bitfld.long 0x08 9. " IN[9] ,IN endpoint bit 9" "No interrupt,Interrupt" bitfld.long 0x08 8. " IN[8] ,IN endpoint bit 8" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " IN[7] ,IN endpoint bit 7" "No interrupt,Interrupt" bitfld.long 0x08 6. " IN[6] ,IN endpoint bit 6" "No interrupt,Interrupt" bitfld.long 0x08 5. " IN[5] ,IN endpoint bit 5" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " IN[4] ,IN endpoint bit 4" "No interrupt,Interrupt" bitfld.long 0x08 3. " IN[3] ,IN endpoint bit 3" "No interrupt,Interrupt" bitfld.long 0x08 2. " IN[2] ,IN endpoint bit 2" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " IN[1] ,IN endpoint bit 1" "No interrupt,Interrupt" bitfld.long 0x08 0. " IN[0] ,IN endpoint bit 0" "No interrupt,Interrupt" line.long 0x0c "END_INTMSK,Endpoint Interrupt Mask Register" bitfld.long 0x0c 31. " OUT[15] ,OUT endpoint bit 15" "Not masked,Masked" bitfld.long 0x0c 30. " OUT[14] ,OUT endpoint bit 14" "Not masked,Masked" bitfld.long 0x0c 29. " OUT[13] ,OUT endpoint bit 13" "Not masked,Masked" textline " " bitfld.long 0x0c 28. " OUT[12] ,OUT endpoint bit 12" "Not masked,Masked" bitfld.long 0x0c 27. " OUT[11] ,OUT endpoint bit 11" "Not masked,Masked" bitfld.long 0x0c 26. " OUT[10] ,OUT endpoint bit 10" "Not masked,Masked" textline " " bitfld.long 0x0c 25. " OUT[9] ,OUT endpoint bit 9" "Not masked,Masked" bitfld.long 0x0c 24. " OUT[8] ,OUT endpoint bit 8" "Not masked,Masked" bitfld.long 0x0c 23. " OUT[7] ,OUT endpoint bit 7" "Not masked,Masked" textline " " bitfld.long 0x0c 22. " OUT[6] ,OUT endpoint bit 6" "Not masked,Masked" bitfld.long 0x0c 21. " OUT[5] ,OUT endpoint bit 5" "Not masked,Masked" bitfld.long 0x0c 20. " OUT[4] ,OUT endpoint bit 4" "Not masked,Masked" textline " " bitfld.long 0x0c 19. " OUT[3] ,OUT endpoint bit 3" "Not masked,Masked" bitfld.long 0x0c 18. " OUT[2] ,OUT endpoint bit 2" "Not masked,Masked" bitfld.long 0x0c 17. " OUT[1] ,OUT endpoint bit 1" "Not masked,Masked" textline " " bitfld.long 0x0c 16. " OUT[0] ,OUT endpoint bit 0" "Not masked,Masked" bitfld.long 0x0c 15. " IN[15] ,IN endpoint bit 15" "Not masked,Masked" bitfld.long 0x0c 14. " IN[14] ,IN endpoint bit 14" "Not masked,Masked" textline " " bitfld.long 0x0c 13. " IN[13] ,IN endpoint bit 13" "Not masked,Masked" bitfld.long 0x0c 12. " IN[12] ,IN endpoint bit 12" "Not masked,Masked" bitfld.long 0x0c 11. " IN[11] ,IN endpoint bit 11" "Not masked,Masked" textline " " bitfld.long 0x0c 10. " IN[10] ,IN endpoint bit 10" "Not masked,Masked" bitfld.long 0x0c 9. " IN[9] ,IN endpoint bit 9" "Not masked,Masked" bitfld.long 0x0c 8. " IN[8] ,IN endpoint bit 8" "Not masked,Masked" textline " " bitfld.long 0x0c 7. " IN[7] ,IN endpoint bit 7" "Not masked,Masked" bitfld.long 0x0c 6. " IN[6] ,IN endpoint bit 6" "Not masked,Masked" bitfld.long 0x0c 5. " IN[5] ,IN endpoint bit 5" "Not masked,Masked" textline " " bitfld.long 0x0c 4. " IN[4] ,IN endpoint bit 4" "Not masked,Masked" bitfld.long 0x0c 3. " IN[3] ,IN endpoint bit 3" "Not masked,Masked" bitfld.long 0x0c 2. " IN[2] ,IN endpoint bit 2" "Not masked,Masked" textline " " bitfld.long 0x0c 1. " IN[1] ,IN endpoint bit 1" "Not masked,Masked" bitfld.long 0x0c 0. " IN[0] ,IN endpoint bit 0" "Not masked,Masked" width 0xb tree.end tree "Endpoints 0-15" width 14. tree "IN Endpoint Control and Status Registers" group.long 0x00++0x03 "Endpoint 0" line.long 0x00 "CTRL,IN Endpoint 0 Control Register" bitfld.long 0x0 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x0 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x0 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x0 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x0 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x0 3. " P ,Poll demand" "No demand,Demand" textline " " sif (cpu()=="SPEAR300") bitfld.long 0x0 2. " SN ,Snoop mode" "Disabled,Enabled" endif textline " " bitfld.long 0x0 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x0 0. " S ,STALL handshake" "Not set,Set" rgroup.long 0x04++0x03 line.long 0x00 "STATUS,IN Endpoint Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long 0x08++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 0 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 0 Maximum Packet Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,BUFF SIZE" textline " " hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long 0x14++0x03 line.long 0x00 "DDESPTR,IN Endpoint 0 Data Description Pointer Register" group.long 0x1c++0x03 line.long 0x00 "WRCONFIRM,Endpoint 0 Write Confirmation" group.long 0x20++0x03 "Endpoint 1" line.long 0x00 "CTRL,IN Endpoint 1 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x20+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 1 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x20+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 1 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 1 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x20+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 1 Data Description Pointer Register" group.long (0x20+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 1 Write Confirmation" group.long 0x60++0x03 "Endpoint 3" line.long 0x00 "CTRL,IN Endpoint 3 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x60+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 3 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x60+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 3 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 3 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x60+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 3 Data Description Pointer Register" group.long (0x60+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 3 Write Confirmation" group.long 0xA0++0x03 "Endpoint 5" line.long 0x00 "CTRL,IN Endpoint 5 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0xA0+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 5 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0xA0+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 5 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 5 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0xA0+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 5 Data Description Pointer Register" group.long (0xA0+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 5 Write Confirmation" group.long 0xE0++0x03 "Endpoint 7" line.long 0x00 "CTRL,IN Endpoint 7 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0xE0+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 7 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0xE0+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 7 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 7 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0xE0+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 7 Data Description Pointer Register" group.long (0xE0+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 7 Write Confirmation" group.long 0x120++0x03 "Endpoint 9" line.long 0x00 "CTRL,IN Endpoint 9 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x120+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 9 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x120+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 9 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 9 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x120+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 9 Data Description Pointer Register" group.long (0x120+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 9 Write Confirmation" group.long 0x160++0x03 "Endpoint 11" line.long 0x00 "CTRL,IN Endpoint 11 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x160+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 11 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x160+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 11 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 11 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x160+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 11 Data Description Pointer Register" group.long (0x160+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 11 Write Confirmation" group.long 0x1A0++0x03 "Endpoint 13" line.long 0x00 "CTRL,IN Endpoint 13 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x1A0+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 13 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x1A0+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 13 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 13 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x1A0+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 13 Data Description Pointer Register" group.long (0x1A0+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 13 Write Confirmation" group.long 0x1E0++0x03 "Endpoint 15" line.long 0x00 "CTRL,IN Endpoint 15 Control Register" bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" textline " " bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" bitfld.long 0x00 3. " P ,Poll demand" "No demand,Demand" textline " " bitfld.long 0x00 1. " F ,Flush the TxFIFO" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x1E0+0x04)++0x03 line.long 0x00 "STATUS,IN Endpoint 15 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 6. " IN ,IN token reception" "Not received,Received" textline " " bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x1E0+0x08)++0x07 line.long 0x00 "BUFFSIZE,IN Endpoint 15 Buffer Size" bitfld.long 0x00 16.--17. " ISO_PID ,Initial data PID to be sent for a high-bandwidth ISO transaction" "DATA0,DATA0,DATA1,DATA2" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Buffer size required for this endpoint" line.long 0x04 "MAXPKTSIZE,IN Endpoint 15 Maximum Packet Size Register" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x1E0+0x14)++0x03 line.long 0x00 "DDESPTR,IN Endpoint 15 Data Description Pointer Register" group.long (0x1E0+0x1c)++0x03 line.long 0x00 "WRCONFIRM,Endpoint 15 Write Confirmation" tree.end width 14. tree "OUT Endpoint Control and Status Registers" group.long 0x200++0x03 "Endpoint 0" line.long 0x00 "CTRL,OUT Endpoint 0 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x200+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 0 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x200+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 0 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 0 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x200+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x200+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 0 Data Description Pointer Register" group.long (0x200+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x240++0x03 "Endpoint 2" line.long 0x00 "CTRL,OUT Endpoint 2 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x240+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 2 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x240+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 2 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 2 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x240+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x240+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 2 Data Description Pointer Register" group.long (0x240+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x280++0x03 "Endpoint 4" line.long 0x00 "CTRL,OUT Endpoint 4 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x280+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 4 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x280+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 4 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 4 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x280+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x280+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 4 Data Description Pointer Register" group.long (0x280+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x2C0++0x03 "Endpoint 6" line.long 0x00 "CTRL,OUT Endpoint 6 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x2C0+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 6 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x2C0+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 6 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 6 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x2C0+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x2C0+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 6 Data Description Pointer Register" group.long (0x2C0+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x300++0x03 "Endpoint 8" line.long 0x00 "CTRL,OUT Endpoint 8 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x300+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 8 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x300+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 8 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 8 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x300+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x300+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 8 Data Description Pointer Register" group.long (0x300+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x340++0x03 "Endpoint 10" line.long 0x00 "CTRL,OUT Endpoint 10 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x340+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 10 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x340+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 10 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 10 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x340+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x340+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 10 Data Description Pointer Register" group.long (0x340+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x380++0x03 "Endpoint 12" line.long 0x00 "CTRL,OUT Endpoint 12 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x380+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 12 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x380+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 12 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 12 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x380+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x380+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 12 Data Description Pointer Register" group.long (0x380+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" group.long 0x3C0++0x03 "Endpoint 14" line.long 0x00 "CTRL,OUT Endpoint 14 Control Register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.long 0x00 11. " CLOSE_DESC ,Close descriptor channel for this endpoint" "Not closed,Closed" endif bitfld.long 0x00 9. " RRDY ,Receive ready" "Not ready,Ready" textline " " bitfld.long 0x00 8. " CNAK ,Clear NAK" "Not cleared,Cleared" bitfld.long 0x00 7. " SNAK ,Set NAK" "Not set,Set" textline " " bitfld.long 0x00 6. " NAK ,NAK handshake" "No NAK handshake,NAK handshake" bitfld.long 0x00 4.--5. " ET ,Endpoint type" "Control,Isochronous (ISO),Bulk,Interrupt" textline " " bitfld.long 0x00 2. " SN ,Snoop mode" "Disabled,Enabled" bitfld.long 0x00 0. " S ,STALL handshake" "Not set,Set" rgroup.long (0x3C0+0x04)++0x03 line.long 0x00 "STATUS,OUT Endpoint 14 Status Register" bitfld.long 0x00 23. " ISO_IN_DONE ,Isochronous IN transaction is completed" "Not completed,Completed" hexmask.long.word 0x00 11.--22. 1. " RX_PKT_SIZE ,Receive packet size" textline " " bitfld.long 0x00 10. " TDC ,Transmit DMA completion" "Not completed,Completed" bitfld.long 0x00 9. " HE ,Error response on the AHB" "No error,Error" textline " " bitfld.long 0x00 7. " BNA ,Buffer not available" "Not available,Available" bitfld.long 0x00 4.--5. " OUT ,OUT packet reception" "None,Data,SETUP data (8 bytes),?..." group.long (0x3C0+0x08)++0x07 line.long 0x00 "RXPKTFN,Endpoint 14 Received Packet Frame Number Register" bitfld.long 0x00 16.--17. " ISO_PID ,Data PID received for a high-bandwidth ISO transaction" "DATA0,DATA1,DATA2,MDATA" hexmask.long.word 0x00 0.--15. 1. " BUFF_SIZE ,Frame number in which the packet is received" line.long 0x04 "BUFFSIZE,OUT Endpoint 14 Maximum Packet Size and Buffer Size Register" hexmask.long.word 0x04 16.--31. 1. " BUFF_SIZE ,Buffer size required for this endpoint" hexmask.long.word 0x04 0.--15. 1. " MAX_PKT_SIZE ,Maximum packet size for the endpoint" group.long (0x3C0+0x10)++0x03 line.long 0x00 "SETUPBUFFPTR,Setup Buffer Pointer" group.long (0x3C0+0x14)++0x03 line.long 0x00 "DDESPTR,OUT Endpoint 14 Data Description Pointer Register" group.long (0x3C0+0x1c)++0x03 line.long 0x00 "RDCONFIRM,Read Confirmation" tree.end width 12. tree "UDC Endpoints Registers" group.long 0x504++0x03 line.long 0x00 "UDC20_END0,UDC20 Endpoint 0 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x508++0x03 line.long 0x00 "UDC20_END1,UDC20 Endpoint 1 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x50C++0x03 line.long 0x00 "UDC20_END2,UDC20 Endpoint 2 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x510++0x03 line.long 0x00 "UDC20_END3,UDC20 Endpoint 3 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x514++0x03 line.long 0x00 "UDC20_END4,UDC20 Endpoint 4 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x518++0x03 line.long 0x00 "UDC20_END5,UDC20 Endpoint 5 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x51C++0x03 line.long 0x00 "UDC20_END6,UDC20 Endpoint 6 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x520++0x03 line.long 0x00 "UDC20_END7,UDC20 Endpoint 7 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x524++0x03 line.long 0x00 "UDC20_END8,UDC20 Endpoint 8 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x528++0x03 line.long 0x00 "UDC20_END9,UDC20 Endpoint 9 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x52C++0x03 line.long 0x00 "UDC20_END10,UDC20 Endpoint 10 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x530++0x03 line.long 0x00 "UDC20_END11,UDC20 Endpoint 11 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x534++0x03 line.long 0x00 "UDC20_END12,UDC20 Endpoint 12 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x538++0x03 line.long 0x00 "UDC20_END13,UDC20 Endpoint 13 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x53C++0x03 line.long 0x00 "UDC20_END14,UDC20 Endpoint 14 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x540++0x03 line.long 0x00 "UDC20_END15,UDC20 Endpoint 15 Register" hexmask.long.word 0x00 19.--29. 1. " MAXPACKSIZE ,Maximum Endpoint packet size" bitfld.long 0x00 15.--18. " ALTSETTING ,Alternate setting to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " INTERFNUMBER ,Interface number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7.--10. " CONFNUMBER ,Configuration number to which this endpoint belongs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--6. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 4. " EPDIR ,Endpoint direction" "OUT,IN" textline " " bitfld.long 0x00 0.--3. " EPNUMBER ,Logical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 0xb tree.end tree.end sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "SPP (Standard parallel port interface)" base asd:0xA0000000 width 9. rgroup.word 0x00++0x01 line.word 0x00 "SPPDATA,SPP data register" bitfld.word 0x00 8. " SPPDATA[8] ,Auto LineFeed used as 9-th data bit" "No,Yes" hexmask.word.byte 0x00 0.--7. 1. " SPPDATA[7:0] ,8-bit parallel data received" rgroup.byte 0x04++0x00 line.byte 0x00 "SPPSTAT,SPP status register" bitfld.byte 0x00 7. " SPPSTAT[7] ,Data available status" "No available,Available" bitfld.byte 0x00 6. " SPPSTAT[6] ,SELINn status bit" "Device is selected,Device is not selected" textline " " bitfld.byte 0x00 5. " SPPSTAT[5] ,INITn status bit" "Initialized,Not initialized" bitfld.byte 0x00 4. " SPPSTAT[4] ,Auto LineFeed status bit" "Low,High" textline " " bitfld.byte 0x00 3. " SPPSTAT[3] ,Error status" "No error,Error" bitfld.byte 0x00 2. " SPPSTAT[2] ,Idle status" "Not idle,Idle" textline " " bitfld.byte 0x00 1. " SPPSTAT[1] ,Force Busy status" "Not busy,Busy" bitfld.byte 0x00 0. " SPPSTAT[0] ,Interface offline/online status" "Offline,Online" group.byte 0x08++0x00 line.byte 0x00 "SPPCTRL,SPP control status register" bitfld.byte 0x00 7. " SPPCTRL[7] ,Data received" "Not received,Received" bitfld.byte 0x00 6. " SPPCTRL[6] ,Fault" "Not occurred,Occurred" textline " " bitfld.byte 0x00 5. " SPPCTRL[5] ,PError" "No error,Paper jam/finish" bitfld.byte 0x00 4. " SPPCTRL[4] ,Software Error Clear" "Not cleared,Cleared" textline " " bitfld.byte 0x00 1. " SPPCTRL[1] ,Force busy" "Not forced,Forced" bitfld.byte 0x00 0. " SPPCTRL[0] ,Select" "Not selected,Selected" rgroup.byte 0x0C++0x00 line.byte 0x00 "SPPIS,SPP interrupt status register" bitfld.byte 0x00 7. " SPPIS[7] ,Raw Selln interrupt status" "Not occurred,Occurred" bitfld.byte 0x00 6. " SPPIS[6] ,Raw Init iterrupt status" "Not occurred,Occurred" textline " " bitfld.byte 0x00 5. " SPPIS[5] ,Raw AutoFd interrupt status" "Not occurred,Occurred" bitfld.byte 0x00 4. " SPPIS[4] ,Raw data available interrupt status" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " SPPIS[3] ,Masked Selln interrupt status" "Not occurred,Occurred" bitfld.byte 0x00 2. " SPPIS[2] ,Masked Init interrupt status" "Not occurred,Occurred" textline " " bitfld.byte 0x00 1. " SPPIS[1] ,Masked AutoFd interrupt status" "Not occurred,Occurred" bitfld.byte 0x00 0. " SPPIS[0] ,Masked data available interrupt status" "Not occurred,Occurred" group.byte 0x10++0x00 line.byte 0x00 "SPPIE,SPP interrupt enable" bitfld.byte 0x00 3. " SPPIE[3] ,Selln interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " SPPIE[2] ,Init interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " SPPIE[1] ,AutoFd interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SPPIE[0] ,Data available interrupt enable" "Disabled,Enabled" wgroup.byte 0x14++0x00 line.byte 0x00 "SPPIC,SPP interrupt clear" bitfld.byte 0x00 3. " SPPIC[3] ,Selln interrupt clear" "No clear,Clear" bitfld.byte 0x00 2. " SPPIC[2] ,Init interrupt clear" "No clear,Clear" textline " " bitfld.byte 0x00 1. " SPPIC[1] ,AutoFd interrupt clear" "No clear,Clear" width 0x0b tree.end endif sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree.open "CAN (Controller area network ports)" tree "CAN0" base asd:0xA1000000 sif (cpu()=="SPEAR320") width 12. group.word 0x00++0x01 line.word 0x00 "CANCTRL,CAN control register" bitfld.word 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled" bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " DAR ,Disable Automatic Re-transmission" "No,Yes" bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " INIT ,Initialization" "Normal,Started" group.word 0x04++0x01 line.word 0x00 "CANSTAT,CAN status register" rbitfld.word 0x00 7. " BOFF ,Busoff Status" "Not in busoff,In busoff" rbitfld.word 0x00 6. " EWARN ,Warning Status" "No warning,Warning" textline " " rbitfld.word 0x00 5. " EPASS ,Error Passive" "Active,Passive" bitfld.word 0x00 4. " RXOK ,Received a Message Successfully" "Not received,Received" textline " " bitfld.word 0x00 3. " TXOK ,Transmitted a Message Successfully" "Not transmitted,Transmitted" bitfld.word 0x00 0.--2. " LEC ,Last Error Code (Type of the last error to occur on the CAN bus)" "No error,Stuff error,Form error,Ack error,Bit1 error,Bit0 error,CRC error,?..." rgroup.word 0x08++0x01 line.word 0x00 "ERRCNT,Error counter" bitfld.word 0x00 15. " RP ,Receive Error Passive" "Below level,Reached level" hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter" textline " " hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter" group.word 0x0C++0x01 line.word 0x00 "BITTIME,Bit timing register" bitfld.word 0x00 12.--14. " TSEG2 ,Time segment after sample point" "0,1,2,3,4,5,6,7" bitfld.word 0x00 8.--11. " TSEG1 ,Time segment before the sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3" bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.word 0x10++0x01 line.word 0x00 "CANIRQ,Interrupt register" group.word 0x14++0x01 line.word 0x00 "CANTEST,Test register" rbitfld.word 0x00 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive" bitfld.word 0x00 5.--6. " TX1 ,Control of CAN_TX pin" "CAN core,CAN_TX monitored,CAN_TX dominant,CAN_TX recessive" textline " " bitfld.word 0x00 4. " LBACK ,Loop back mode" "Disabled,Enabled" bitfld.word 0x00 3. " SILENT ,Silent mode" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " BASIC ,Basic mode" "Disabled,Enabled" group.word 0x18++0x01 line.word 0x00 "BRPEX,BRP extension register" bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word (asd:0xA1000020)++0x01 line.word 0x00 "IF1CMDREQ,IF1 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA1000020+0x04)&0x80))==0x80) group.word (asd:0xA1000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA1000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA1000020+0x08)++0x01 line.word 0x00 "IF1MSK1,IF1 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000020+0xC)++0x01 line.word 0x00 "IF1MSK2,IF1 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000020+0x10)++0x01 line.word 0x00 "IF1ARB1,IF1 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA1000020+0x14)++0x01 line.word 0x00 "IF1ARB2,IF1 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA1000020+0x18)++0x01 line.word 0x00 "IF1MSG,IF1 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA1000020+0x1C)++0x01 line.word 0x00 "IF1DATAA1,IF1 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA1000020+0x20)++0x01 line.word 0x00 "IF1DATAA2,IF1 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA1000020+0x24)++0x01 line.word 0x00 "IF1DATAB1,IF1 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA1000020+0x28)++0x01 line.word 0x00 "IF1DATAB2,IF1 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" group.word (asd:0xA1000064)++0x01 line.word 0x00 "IF2CMDREQ,IF2 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA1000064+0x04)&0x80))==0x80) group.word (asd:0xA1000064+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA1000064+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA1000064+0x08)++0x01 line.word 0x00 "IF2MSK1,IF2 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000064+0xC)++0x01 line.word 0x00 "IF2MSK2,IF2 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000064+0x10)++0x01 line.word 0x00 "IF2ARB1,IF2 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA1000064+0x14)++0x01 line.word 0x00 "IF2ARB2,IF2 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA1000064+0x18)++0x01 line.word 0x00 "IF2MSG,IF2 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA1000064+0x1C)++0x01 line.word 0x00 "IF2DATAA1,IF2 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA1000064+0x20)++0x01 line.word 0x00 "IF2DATAA2,IF2 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA1000064+0x24)++0x01 line.word 0x00 "IF2DATAB1,IF2 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA1000064+0x28)++0x01 line.word 0x00 "IF2DATAB2,IF2 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" sif (cpu()=="SPEAR320") rgroup.word 0xA4++0x01 else rgroup.word 0x100++0x01 endif line.word 0x00 "TREQ1,Transmission request 1 register" bitfld.word 0x00 15. " TXRQST[16] ,Transmission Request Bit 16" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[15] ,Transmission Request Bit 15" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[14] ,Transmission Request Bit 14" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[13] ,Transmission Request Bit 13" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[12] ,Transmission Request Bit 12" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[11] ,Transmission Request Bit 11" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[10] ,Transmission Request Bit 10" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[9] ,Transmission Request Bit 9" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[8] ,Transmission Request Bit 8" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[7] ,Transmission Request Bit 7" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[6] ,Transmission Request Bit 6" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[5] ,Transmission Request Bit 5" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[4] ,Transmission Request Bit 4" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[3] ,Transmission Request Bit 3" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[2] ,Transmission Request Bit 2" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[1] ,Transmission Request Bit 1" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xA8++0x01 else rgroup.word 0x104++0x01 endif line.word 0x00 "TREQ2,Transmission request 2 register" bitfld.word 0x00 15. " TXRQST[32] ,Transmission Request Bit 32" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[31] ,Transmission Request Bit 31" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[30] ,Transmission Request Bit 30" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[29] ,Transmission Request Bit 29" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[28] ,Transmission Request Bit 28" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[27] ,Transmission Request Bit 27" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[26] ,Transmission Request Bit 26" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[25] ,Transmission Request Bit 25" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[24] ,Transmission Request Bit 24" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[23] ,Transmission Request Bit 23" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[22] ,Transmission Request Bit 22" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[21] ,Transmission Request Bit 21" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[20] ,Transmission Request Bit 20" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[19] ,Transmission Request Bit 19" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[18] ,Transmission Request Bit 18" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[17] ,Transmission Request Bit 17" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xB8++0x01 else rgroup.word 0x120++0x01 endif line.word 0x00 "NDATA1,New data 1 register" bitfld.word 0x00 15. " NEWDAT[16] ,New Data Bit 16" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[15] ,New Data Bit 15" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[14] ,New Data Bit 14" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[13] ,New Data Bit 13" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[12] ,New Data Bit 12" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[11] ,New Data Bit 11" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[10] ,New Data Bit 10" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[9] ,New Data Bit 9" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[8] ,New Data Bit 8" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[7] ,New Data Bit 7" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[6] ,New Data Bit 6" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[5] ,New Data Bit 5" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[4] ,New Data Bit 4" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[3] ,New Data Bit 3" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[2] ,New Data Bit 2" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[1] ,New Data Bit 1" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xBC++0x01 else rgroup.word 0x124++0x01 endif line.word 0x00 "NDATA2,New data 2 register" bitfld.word 0x00 15. " NEWDAT[32] ,New Data Bit 32" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[31] ,New Data Bit 31" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[30] ,New Data Bit 30" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[29] ,New Data Bit 29" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[28] ,New Data Bit 28" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[27] ,New Data Bit 27" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[26] ,New Data Bit 26" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[25] ,New Data Bit 25" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[24] ,New Data Bit 24" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[23] ,New Data Bit 23" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[22] ,New Data Bit 22" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[21] ,New Data Bit 21" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[20] ,New Data Bit 20" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[19] ,New Data Bit 19" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[18] ,New Data Bit 18" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[17] ,New Data Bit 17" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xCC++0x01 else rgroup.word 0x140++0x01 endif line.word 0x00 "IRQPND1,Interrupt pending 1 register" bitfld.word 0x00 15. " INTPND[16] ,Interrupt Pending Bit 16" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[15] ,Interrupt Pending Bit 15" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[14] ,Interrupt Pending Bit 14" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[13] ,Interrupt Pending Bit 13" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[12] ,Interrupt Pending Bit 12" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[11] ,Interrupt Pending Bit 11" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[10] ,Interrupt Pending Bit 10" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[9] ,Interrupt Pending Bit 9" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[8] ,Interrupt Pending Bit 8" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[7] ,Interrupt Pending Bit 7" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[6] ,Interrupt Pending Bit 6" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[5] ,Interrupt Pending Bit 5" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[4] ,Interrupt Pending Bit 4" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[3] ,Interrupt Pending Bit 3" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[2] ,Interrupt Pending Bit 2" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[1] ,Interrupt Pending Bit 1" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xD0++0x01 else rgroup.word 0x144++0x01 endif line.word 0x00 "IRQPND2,Interrupt pending 2 register" bitfld.word 0x00 15. " INTPND[32] ,Interrupt Pending Bit 32" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[31] ,Interrupt Pending Bit 31" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[30] ,Interrupt Pending Bit 30" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[29] ,Interrupt Pending Bit 29" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[28] ,Interrupt Pending Bit 28" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[27] ,Interrupt Pending Bit 27" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[26] ,Interrupt Pending Bit 26" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[25] ,Interrupt Pending Bit 25" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[24] ,Interrupt Pending Bit 24" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[23] ,Interrupt Pending Bit 23" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[22] ,Interrupt Pending Bit 22" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[21] ,Interrupt Pending Bit 21" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[20] ,Interrupt Pending Bit 20" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[19] ,Interrupt Pending Bit 19" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[18] ,Interrupt Pending Bit 18" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[17] ,Interrupt Pending Bit 17" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xE0++0x01 else rgroup.word 0x160++0x01 endif line.word 0x00 "MSGVLD1,Message valid 1 register" bitfld.word 0x00 15. " MSGVAL[16] ,Message Valid Bit 16" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[15] ,Message Valid Bit 15" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[14] ,Message Valid Bit 14" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[13] ,Message Valid Bit 13" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[12] ,Message Valid Bit 12" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[11] ,Message Valid Bit 11" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[10] ,Message Valid Bit 10" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[9] ,Message Valid Bit 9" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[8] ,Message Valid Bit 8" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[7] ,Message Valid Bit 7" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[6] ,Message Valid Bit 6" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[5] ,Message Valid Bit 5" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[4] ,Message Valid Bit 4" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[3] ,Message Valid Bit 3" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[2] ,Message Valid Bit 2" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[1] ,Message Valid Bit 1" "Not valid,Valid" sif (cpu()=="SPEAR320") rgroup.word 0xE4++0x01 else rgroup.word 0x164++0x01 endif line.word 0x00 "MSGVLD2,Message valid 2 register" bitfld.word 0x00 15. " MSGVAL[32] ,Message Valid Bit 32" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[31] ,Message Valid Bit 31" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[30] ,Message Valid Bit 30" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[29] ,Message Valid Bit 29" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[28] ,Message Valid Bit 28" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[27] ,Message Valid Bit 27" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[26] ,Message Valid Bit 26" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[25] ,Message Valid Bit 25" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[24] ,Message Valid Bit 24" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[23] ,Message Valid Bit 23" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[22] ,Message Valid Bit 22" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[21] ,Message Valid Bit 21" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[20] ,Message Valid Bit 20" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[19] ,Message Valid Bit 19" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[18] ,Message Valid Bit 18" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[17] ,Message Valid Bit 17" "Not valid,Valid" width 0x0b else width 12. group.word 0x00++0x01 line.word 0x00 "CANCTRL,CAN control register" bitfld.word 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled" bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " DAR ,Disable Automatic Re-transmission" "No,Yes" bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " INIT ,Initialization" "Normal,Started" group.word 0x04++0x01 line.word 0x00 "CANSTAT,CAN status register" rbitfld.word 0x00 7. " BOFF ,Busoff Status" "Not in busoff,In busoff" rbitfld.word 0x00 6. " EWARN ,Warning Status" "No warning,Warning" textline " " rbitfld.word 0x00 5. " EPASS ,Error Passive" "Active,Passive" bitfld.word 0x00 4. " RXOK ,Received a Message Successfully" "Not received,Received" textline " " bitfld.word 0x00 3. " TXOK ,Transmitted a Message Successfully" "Not transmitted,Transmitted" bitfld.word 0x00 0.--2. " LEC ,Last Error Code (Type of the last error to occur on the CAN bus)" "No error,Stuff error,Form error,Ack error,Bit1 error,Bit0 error,CRC error,?..." rgroup.word 0x08++0x01 line.word 0x00 "ERRCNT,Error counter" bitfld.word 0x00 15. " RP ,Receive Error Passive" "Below level,Reached level" hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter" textline " " hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter" group.word 0x0C++0x01 line.word 0x00 "BITTIME,Bit timing register" bitfld.word 0x00 12.--14. " TSEG2 ,Time segment after sample point" "0,1,2,3,4,5,6,7" bitfld.word 0x00 8.--11. " TSEG1 ,Time segment before the sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3" bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.word 0x10++0x01 line.word 0x00 "CANIRQ,Interrupt register" group.word 0x14++0x01 line.word 0x00 "CANTEST,Test register" rbitfld.word 0x00 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive" bitfld.word 0x00 5.--6. " TX1 ,Control of CAN_TX pin" "CAN core,CAN_TX monitored,CAN_TX dominant,CAN_TX recessive" textline " " bitfld.word 0x00 4. " LBACK ,Loop back mode" "Disabled,Enabled" bitfld.word 0x00 3. " SILENT ,Silent mode" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " BASIC ,Basic mode" "Disabled,Enabled" group.word 0x18++0x01 line.word 0x00 "BRPEX,BRP extension register" bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word (asd:0xA1000020)++0x01 line.word 0x00 "IF1CMDREQ,IF1 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA1000020+0x04)&0x80))==0x80) group.word (asd:0xA1000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA1000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA1000020+0x08)++0x01 line.word 0x00 "IF1MSK1,IF1 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000020+0xC)++0x01 line.word 0x00 "IF1MSK2,IF1 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000020+0x10)++0x01 line.word 0x00 "IF1ARB1,IF1 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA1000020+0x14)++0x01 line.word 0x00 "IF1ARB2,IF1 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA1000020+0x18)++0x01 line.word 0x00 "IF1MSG,IF1 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA1000020+0x1C)++0x01 line.word 0x00 "IF1DATAA1,IF1 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA1000020+0x20)++0x01 line.word 0x00 "IF1DATAA2,IF1 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA1000020+0x24)++0x01 line.word 0x00 "IF1DATAB1,IF1 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA1000020+0x28)++0x01 line.word 0x00 "IF1DATAB2,IF1 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" group.word (asd:0xA1000080)++0x01 line.word 0x00 "IF2CMDREQ,IF2 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA1000080+0x04)&0x80))==0x80) group.word (asd:0xA1000080+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA1000080+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA1000080+0x08)++0x01 line.word 0x00 "IF2MSK1,IF2 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000080+0xC)++0x01 line.word 0x00 "IF2MSK2,IF2 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA1000080+0x10)++0x01 line.word 0x00 "IF2ARB1,IF2 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA1000080+0x14)++0x01 line.word 0x00 "IF2ARB2,IF2 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA1000080+0x18)++0x01 line.word 0x00 "IF2MSG,IF2 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA1000080+0x1C)++0x01 line.word 0x00 "IF2DATAA1,IF2 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA1000080+0x20)++0x01 line.word 0x00 "IF2DATAA2,IF2 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA1000080+0x24)++0x01 line.word 0x00 "IF2DATAB1,IF2 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA1000080+0x28)++0x01 line.word 0x00 "IF2DATAB2,IF2 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" sif (cpu()=="SPEAR320") rgroup.word 0xA4++0x01 else rgroup.word 0x100++0x01 endif line.word 0x00 "TREQ1,Transmission request 1 register" bitfld.word 0x00 15. " TXRQST[16] ,Transmission Request Bit 16" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[15] ,Transmission Request Bit 15" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[14] ,Transmission Request Bit 14" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[13] ,Transmission Request Bit 13" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[12] ,Transmission Request Bit 12" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[11] ,Transmission Request Bit 11" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[10] ,Transmission Request Bit 10" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[9] ,Transmission Request Bit 9" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[8] ,Transmission Request Bit 8" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[7] ,Transmission Request Bit 7" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[6] ,Transmission Request Bit 6" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[5] ,Transmission Request Bit 5" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[4] ,Transmission Request Bit 4" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[3] ,Transmission Request Bit 3" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[2] ,Transmission Request Bit 2" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[1] ,Transmission Request Bit 1" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xA8++0x01 else rgroup.word 0x104++0x01 endif line.word 0x00 "TREQ2,Transmission request 2 register" bitfld.word 0x00 15. " TXRQST[32] ,Transmission Request Bit 32" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[31] ,Transmission Request Bit 31" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[30] ,Transmission Request Bit 30" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[29] ,Transmission Request Bit 29" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[28] ,Transmission Request Bit 28" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[27] ,Transmission Request Bit 27" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[26] ,Transmission Request Bit 26" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[25] ,Transmission Request Bit 25" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[24] ,Transmission Request Bit 24" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[23] ,Transmission Request Bit 23" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[22] ,Transmission Request Bit 22" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[21] ,Transmission Request Bit 21" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[20] ,Transmission Request Bit 20" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[19] ,Transmission Request Bit 19" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[18] ,Transmission Request Bit 18" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[17] ,Transmission Request Bit 17" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xB8++0x01 else rgroup.word 0x120++0x01 endif line.word 0x00 "NDATA1,New data 1 register" bitfld.word 0x00 15. " NEWDAT[16] ,New Data Bit 16" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[15] ,New Data Bit 15" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[14] ,New Data Bit 14" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[13] ,New Data Bit 13" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[12] ,New Data Bit 12" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[11] ,New Data Bit 11" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[10] ,New Data Bit 10" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[9] ,New Data Bit 9" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[8] ,New Data Bit 8" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[7] ,New Data Bit 7" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[6] ,New Data Bit 6" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[5] ,New Data Bit 5" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[4] ,New Data Bit 4" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[3] ,New Data Bit 3" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[2] ,New Data Bit 2" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[1] ,New Data Bit 1" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xBC++0x01 else rgroup.word 0x124++0x01 endif line.word 0x00 "NDATA2,New data 2 register" bitfld.word 0x00 15. " NEWDAT[32] ,New Data Bit 32" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[31] ,New Data Bit 31" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[30] ,New Data Bit 30" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[29] ,New Data Bit 29" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[28] ,New Data Bit 28" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[27] ,New Data Bit 27" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[26] ,New Data Bit 26" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[25] ,New Data Bit 25" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[24] ,New Data Bit 24" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[23] ,New Data Bit 23" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[22] ,New Data Bit 22" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[21] ,New Data Bit 21" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[20] ,New Data Bit 20" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[19] ,New Data Bit 19" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[18] ,New Data Bit 18" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[17] ,New Data Bit 17" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xCC++0x01 else rgroup.word 0x140++0x01 endif line.word 0x00 "IRQPND1,Interrupt pending 1 register" bitfld.word 0x00 15. " INTPND[16] ,Interrupt Pending Bit 16" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[15] ,Interrupt Pending Bit 15" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[14] ,Interrupt Pending Bit 14" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[13] ,Interrupt Pending Bit 13" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[12] ,Interrupt Pending Bit 12" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[11] ,Interrupt Pending Bit 11" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[10] ,Interrupt Pending Bit 10" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[9] ,Interrupt Pending Bit 9" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[8] ,Interrupt Pending Bit 8" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[7] ,Interrupt Pending Bit 7" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[6] ,Interrupt Pending Bit 6" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[5] ,Interrupt Pending Bit 5" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[4] ,Interrupt Pending Bit 4" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[3] ,Interrupt Pending Bit 3" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[2] ,Interrupt Pending Bit 2" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[1] ,Interrupt Pending Bit 1" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xD0++0x01 else rgroup.word 0x144++0x01 endif line.word 0x00 "IRQPND2,Interrupt pending 2 register" bitfld.word 0x00 15. " INTPND[32] ,Interrupt Pending Bit 32" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[31] ,Interrupt Pending Bit 31" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[30] ,Interrupt Pending Bit 30" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[29] ,Interrupt Pending Bit 29" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[28] ,Interrupt Pending Bit 28" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[27] ,Interrupt Pending Bit 27" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[26] ,Interrupt Pending Bit 26" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[25] ,Interrupt Pending Bit 25" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[24] ,Interrupt Pending Bit 24" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[23] ,Interrupt Pending Bit 23" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[22] ,Interrupt Pending Bit 22" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[21] ,Interrupt Pending Bit 21" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[20] ,Interrupt Pending Bit 20" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[19] ,Interrupt Pending Bit 19" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[18] ,Interrupt Pending Bit 18" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[17] ,Interrupt Pending Bit 17" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xE0++0x01 else rgroup.word 0x160++0x01 endif line.word 0x00 "MSGVLD1,Message valid 1 register" bitfld.word 0x00 15. " MSGVAL[16] ,Message Valid Bit 16" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[15] ,Message Valid Bit 15" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[14] ,Message Valid Bit 14" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[13] ,Message Valid Bit 13" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[12] ,Message Valid Bit 12" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[11] ,Message Valid Bit 11" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[10] ,Message Valid Bit 10" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[9] ,Message Valid Bit 9" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[8] ,Message Valid Bit 8" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[7] ,Message Valid Bit 7" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[6] ,Message Valid Bit 6" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[5] ,Message Valid Bit 5" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[4] ,Message Valid Bit 4" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[3] ,Message Valid Bit 3" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[2] ,Message Valid Bit 2" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[1] ,Message Valid Bit 1" "Not valid,Valid" sif (cpu()=="SPEAR320") rgroup.word 0xE4++0x01 else rgroup.word 0x164++0x01 endif line.word 0x00 "MSGVLD2,Message valid 2 register" bitfld.word 0x00 15. " MSGVAL[32] ,Message Valid Bit 32" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[31] ,Message Valid Bit 31" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[30] ,Message Valid Bit 30" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[29] ,Message Valid Bit 29" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[28] ,Message Valid Bit 28" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[27] ,Message Valid Bit 27" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[26] ,Message Valid Bit 26" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[25] ,Message Valid Bit 25" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[24] ,Message Valid Bit 24" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[23] ,Message Valid Bit 23" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[22] ,Message Valid Bit 22" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[21] ,Message Valid Bit 21" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[20] ,Message Valid Bit 20" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[19] ,Message Valid Bit 19" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[18] ,Message Valid Bit 18" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[17] ,Message Valid Bit 17" "Not valid,Valid" width 0x0b endif tree.end tree "CAN1" base asd:0xA2000000 sif (cpu()=="SPEAR320") width 12. group.word 0x00++0x01 line.word 0x00 "CANCTRL,CAN control register" bitfld.word 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled" bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " DAR ,Disable Automatic Re-transmission" "No,Yes" bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " INIT ,Initialization" "Normal,Started" group.word 0x04++0x01 line.word 0x00 "CANSTAT,CAN status register" rbitfld.word 0x00 7. " BOFF ,Busoff Status" "Not in busoff,In busoff" rbitfld.word 0x00 6. " EWARN ,Warning Status" "No warning,Warning" textline " " rbitfld.word 0x00 5. " EPASS ,Error Passive" "Active,Passive" bitfld.word 0x00 4. " RXOK ,Received a Message Successfully" "Not received,Received" textline " " bitfld.word 0x00 3. " TXOK ,Transmitted a Message Successfully" "Not transmitted,Transmitted" bitfld.word 0x00 0.--2. " LEC ,Last Error Code (Type of the last error to occur on the CAN bus)" "No error,Stuff error,Form error,Ack error,Bit1 error,Bit0 error,CRC error,?..." rgroup.word 0x08++0x01 line.word 0x00 "ERRCNT,Error counter" bitfld.word 0x00 15. " RP ,Receive Error Passive" "Below level,Reached level" hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter" textline " " hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter" group.word 0x0C++0x01 line.word 0x00 "BITTIME,Bit timing register" bitfld.word 0x00 12.--14. " TSEG2 ,Time segment after sample point" "0,1,2,3,4,5,6,7" bitfld.word 0x00 8.--11. " TSEG1 ,Time segment before the sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3" bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.word 0x10++0x01 line.word 0x00 "CANIRQ,Interrupt register" group.word 0x14++0x01 line.word 0x00 "CANTEST,Test register" rbitfld.word 0x00 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive" bitfld.word 0x00 5.--6. " TX1 ,Control of CAN_TX pin" "CAN core,CAN_TX monitored,CAN_TX dominant,CAN_TX recessive" textline " " bitfld.word 0x00 4. " LBACK ,Loop back mode" "Disabled,Enabled" bitfld.word 0x00 3. " SILENT ,Silent mode" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " BASIC ,Basic mode" "Disabled,Enabled" group.word 0x18++0x01 line.word 0x00 "BRPEX,BRP extension register" bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word (asd:0xA2000020)++0x01 line.word 0x00 "IF1CMDREQ,IF1 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA2000020+0x04)&0x80))==0x80) group.word (asd:0xA2000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA2000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA2000020+0x08)++0x01 line.word 0x00 "IF1MSK1,IF1 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000020+0xC)++0x01 line.word 0x00 "IF1MSK2,IF1 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000020+0x10)++0x01 line.word 0x00 "IF1ARB1,IF1 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA2000020+0x14)++0x01 line.word 0x00 "IF1ARB2,IF1 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA2000020+0x18)++0x01 line.word 0x00 "IF1MSG,IF1 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA2000020+0x1C)++0x01 line.word 0x00 "IF1DATAA1,IF1 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA2000020+0x20)++0x01 line.word 0x00 "IF1DATAA2,IF1 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA2000020+0x24)++0x01 line.word 0x00 "IF1DATAB1,IF1 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA2000020+0x28)++0x01 line.word 0x00 "IF1DATAB2,IF1 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" group.word (asd:0xA2000064)++0x01 line.word 0x00 "IF2CMDREQ,IF2 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA2000064+0x04)&0x80))==0x80) group.word (asd:0xA2000064+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA2000064+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA2000064+0x08)++0x01 line.word 0x00 "IF2MSK1,IF2 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000064+0xC)++0x01 line.word 0x00 "IF2MSK2,IF2 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000064+0x10)++0x01 line.word 0x00 "IF2ARB1,IF2 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA2000064+0x14)++0x01 line.word 0x00 "IF2ARB2,IF2 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA2000064+0x18)++0x01 line.word 0x00 "IF2MSG,IF2 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA2000064+0x1C)++0x01 line.word 0x00 "IF2DATAA1,IF2 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA2000064+0x20)++0x01 line.word 0x00 "IF2DATAA2,IF2 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA2000064+0x24)++0x01 line.word 0x00 "IF2DATAB1,IF2 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA2000064+0x28)++0x01 line.word 0x00 "IF2DATAB2,IF2 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" sif (cpu()=="SPEAR320") rgroup.word 0xA4++0x01 else rgroup.word 0x100++0x01 endif line.word 0x00 "TREQ1,Transmission request 1 register" bitfld.word 0x00 15. " TXRQST[16] ,Transmission Request Bit 16" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[15] ,Transmission Request Bit 15" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[14] ,Transmission Request Bit 14" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[13] ,Transmission Request Bit 13" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[12] ,Transmission Request Bit 12" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[11] ,Transmission Request Bit 11" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[10] ,Transmission Request Bit 10" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[9] ,Transmission Request Bit 9" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[8] ,Transmission Request Bit 8" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[7] ,Transmission Request Bit 7" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[6] ,Transmission Request Bit 6" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[5] ,Transmission Request Bit 5" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[4] ,Transmission Request Bit 4" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[3] ,Transmission Request Bit 3" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[2] ,Transmission Request Bit 2" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[1] ,Transmission Request Bit 1" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xA8++0x01 else rgroup.word 0x104++0x01 endif line.word 0x00 "TREQ2,Transmission request 2 register" bitfld.word 0x00 15. " TXRQST[32] ,Transmission Request Bit 32" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[31] ,Transmission Request Bit 31" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[30] ,Transmission Request Bit 30" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[29] ,Transmission Request Bit 29" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[28] ,Transmission Request Bit 28" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[27] ,Transmission Request Bit 27" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[26] ,Transmission Request Bit 26" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[25] ,Transmission Request Bit 25" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[24] ,Transmission Request Bit 24" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[23] ,Transmission Request Bit 23" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[22] ,Transmission Request Bit 22" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[21] ,Transmission Request Bit 21" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[20] ,Transmission Request Bit 20" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[19] ,Transmission Request Bit 19" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[18] ,Transmission Request Bit 18" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[17] ,Transmission Request Bit 17" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xB8++0x01 else rgroup.word 0x120++0x01 endif line.word 0x00 "NDATA1,New data 1 register" bitfld.word 0x00 15. " NEWDAT[16] ,New Data Bit 16" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[15] ,New Data Bit 15" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[14] ,New Data Bit 14" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[13] ,New Data Bit 13" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[12] ,New Data Bit 12" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[11] ,New Data Bit 11" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[10] ,New Data Bit 10" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[9] ,New Data Bit 9" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[8] ,New Data Bit 8" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[7] ,New Data Bit 7" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[6] ,New Data Bit 6" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[5] ,New Data Bit 5" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[4] ,New Data Bit 4" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[3] ,New Data Bit 3" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[2] ,New Data Bit 2" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[1] ,New Data Bit 1" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xBC++0x01 else rgroup.word 0x124++0x01 endif line.word 0x00 "NDATA2,New data 2 register" bitfld.word 0x00 15. " NEWDAT[32] ,New Data Bit 32" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[31] ,New Data Bit 31" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[30] ,New Data Bit 30" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[29] ,New Data Bit 29" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[28] ,New Data Bit 28" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[27] ,New Data Bit 27" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[26] ,New Data Bit 26" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[25] ,New Data Bit 25" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[24] ,New Data Bit 24" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[23] ,New Data Bit 23" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[22] ,New Data Bit 22" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[21] ,New Data Bit 21" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[20] ,New Data Bit 20" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[19] ,New Data Bit 19" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[18] ,New Data Bit 18" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[17] ,New Data Bit 17" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xCC++0x01 else rgroup.word 0x140++0x01 endif line.word 0x00 "IRQPND1,Interrupt pending 1 register" bitfld.word 0x00 15. " INTPND[16] ,Interrupt Pending Bit 16" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[15] ,Interrupt Pending Bit 15" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[14] ,Interrupt Pending Bit 14" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[13] ,Interrupt Pending Bit 13" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[12] ,Interrupt Pending Bit 12" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[11] ,Interrupt Pending Bit 11" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[10] ,Interrupt Pending Bit 10" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[9] ,Interrupt Pending Bit 9" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[8] ,Interrupt Pending Bit 8" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[7] ,Interrupt Pending Bit 7" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[6] ,Interrupt Pending Bit 6" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[5] ,Interrupt Pending Bit 5" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[4] ,Interrupt Pending Bit 4" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[3] ,Interrupt Pending Bit 3" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[2] ,Interrupt Pending Bit 2" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[1] ,Interrupt Pending Bit 1" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xD0++0x01 else rgroup.word 0x144++0x01 endif line.word 0x00 "IRQPND2,Interrupt pending 2 register" bitfld.word 0x00 15. " INTPND[32] ,Interrupt Pending Bit 32" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[31] ,Interrupt Pending Bit 31" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[30] ,Interrupt Pending Bit 30" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[29] ,Interrupt Pending Bit 29" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[28] ,Interrupt Pending Bit 28" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[27] ,Interrupt Pending Bit 27" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[26] ,Interrupt Pending Bit 26" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[25] ,Interrupt Pending Bit 25" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[24] ,Interrupt Pending Bit 24" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[23] ,Interrupt Pending Bit 23" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[22] ,Interrupt Pending Bit 22" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[21] ,Interrupt Pending Bit 21" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[20] ,Interrupt Pending Bit 20" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[19] ,Interrupt Pending Bit 19" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[18] ,Interrupt Pending Bit 18" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[17] ,Interrupt Pending Bit 17" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xE0++0x01 else rgroup.word 0x160++0x01 endif line.word 0x00 "MSGVLD1,Message valid 1 register" bitfld.word 0x00 15. " MSGVAL[16] ,Message Valid Bit 16" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[15] ,Message Valid Bit 15" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[14] ,Message Valid Bit 14" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[13] ,Message Valid Bit 13" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[12] ,Message Valid Bit 12" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[11] ,Message Valid Bit 11" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[10] ,Message Valid Bit 10" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[9] ,Message Valid Bit 9" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[8] ,Message Valid Bit 8" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[7] ,Message Valid Bit 7" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[6] ,Message Valid Bit 6" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[5] ,Message Valid Bit 5" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[4] ,Message Valid Bit 4" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[3] ,Message Valid Bit 3" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[2] ,Message Valid Bit 2" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[1] ,Message Valid Bit 1" "Not valid,Valid" sif (cpu()=="SPEAR320") rgroup.word 0xE4++0x01 else rgroup.word 0x164++0x01 endif line.word 0x00 "MSGVLD2,Message valid 2 register" bitfld.word 0x00 15. " MSGVAL[32] ,Message Valid Bit 32" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[31] ,Message Valid Bit 31" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[30] ,Message Valid Bit 30" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[29] ,Message Valid Bit 29" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[28] ,Message Valid Bit 28" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[27] ,Message Valid Bit 27" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[26] ,Message Valid Bit 26" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[25] ,Message Valid Bit 25" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[24] ,Message Valid Bit 24" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[23] ,Message Valid Bit 23" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[22] ,Message Valid Bit 22" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[21] ,Message Valid Bit 21" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[20] ,Message Valid Bit 20" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[19] ,Message Valid Bit 19" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[18] ,Message Valid Bit 18" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[17] ,Message Valid Bit 17" "Not valid,Valid" width 0x0b else width 12. group.word 0x00++0x01 line.word 0x00 "CANCTRL,CAN control register" bitfld.word 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled" bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " DAR ,Disable Automatic Re-transmission" "No,Yes" bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " SIE ,Status Change Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " INIT ,Initialization" "Normal,Started" group.word 0x04++0x01 line.word 0x00 "CANSTAT,CAN status register" rbitfld.word 0x00 7. " BOFF ,Busoff Status" "Not in busoff,In busoff" rbitfld.word 0x00 6. " EWARN ,Warning Status" "No warning,Warning" textline " " rbitfld.word 0x00 5. " EPASS ,Error Passive" "Active,Passive" bitfld.word 0x00 4. " RXOK ,Received a Message Successfully" "Not received,Received" textline " " bitfld.word 0x00 3. " TXOK ,Transmitted a Message Successfully" "Not transmitted,Transmitted" bitfld.word 0x00 0.--2. " LEC ,Last Error Code (Type of the last error to occur on the CAN bus)" "No error,Stuff error,Form error,Ack error,Bit1 error,Bit0 error,CRC error,?..." rgroup.word 0x08++0x01 line.word 0x00 "ERRCNT,Error counter" bitfld.word 0x00 15. " RP ,Receive Error Passive" "Below level,Reached level" hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter" textline " " hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter" group.word 0x0C++0x01 line.word 0x00 "BITTIME,Bit timing register" bitfld.word 0x00 12.--14. " TSEG2 ,Time segment after sample point" "0,1,2,3,4,5,6,7" bitfld.word 0x00 8.--11. " TSEG1 ,Time segment before the sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3" bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.word 0x10++0x01 line.word 0x00 "CANIRQ,Interrupt register" group.word 0x14++0x01 line.word 0x00 "CANTEST,Test register" rbitfld.word 0x00 7. " RX ,Monitors the actual value of the CAN_RX Pin" "Dominant,Recessive" bitfld.word 0x00 5.--6. " TX1 ,Control of CAN_TX pin" "CAN core,CAN_TX monitored,CAN_TX dominant,CAN_TX recessive" textline " " bitfld.word 0x00 4. " LBACK ,Loop back mode" "Disabled,Enabled" bitfld.word 0x00 3. " SILENT ,Silent mode" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " BASIC ,Basic mode" "Disabled,Enabled" group.word 0x18++0x01 line.word 0x00 "BRPEX,BRP extension register" bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word (asd:0xA2000020)++0x01 line.word 0x00 "IF1CMDREQ,IF1 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA2000020+0x04)&0x80))==0x80) group.word (asd:0xA2000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA2000020+0x04)++0x01 line.word 0x00 "IF1CMDMSK,IF1 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA2000020+0x08)++0x01 line.word 0x00 "IF1MSK1,IF1 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000020+0xC)++0x01 line.word 0x00 "IF1MSK2,IF1 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000020+0x10)++0x01 line.word 0x00 "IF1ARB1,IF1 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA2000020+0x14)++0x01 line.word 0x00 "IF1ARB2,IF1 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA2000020+0x18)++0x01 line.word 0x00 "IF1MSG,IF1 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA2000020+0x1C)++0x01 line.word 0x00 "IF1DATAA1,IF1 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA2000020+0x20)++0x01 line.word 0x00 "IF1DATAA2,IF1 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA2000020+0x24)++0x01 line.word 0x00 "IF1DATAB1,IF1 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA2000020+0x28)++0x01 line.word 0x00 "IF1DATAB2,IF1 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" group.word (asd:0xA2000080)++0x01 line.word 0x00 "IF2CMDREQ,IF2 Command request register" bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy" hexmask.word.byte 0x00 0.--5. 1. " MESSAGE_NUMBER ,Message Number" if (((d.w(asd:0xA2000080+0x04)&0x80))==0x80) group.word (asd:0xA2000080+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to Message Object" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Ident+Dir+Xtd+MsgVal to Message Object" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to Message Object" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Ignored" bitfld.word 0x00 2. " TXRQST ,Access Transmission Request Bit" "Unchanged,Set TxRqst" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data 3:0 to Message Object" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Data 7:4 to Message Object" else group.word (asd:0xA2000080+0x04)++0x01 line.word 0x00 "IF2CMDMSK,IF2 Command mask register" bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write" bitfld.word 0x00 6. " MASK ,Mask Access Mask Bits" "Unchanged,Mask+MDir+MXtd to IF1" textline " " bitfld.word 0x00 5. " ARB ,Arb Access Arbitration Bits" "Unchanged,Identifier + Dir + Xtd + MsgVal to IF1" bitfld.word 0x00 4. " CONTROL ,Control Access Control Bits" "Unchanged,Control Bits to IF1" textline " " bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending Bit" "Unchanged,Cleared" bitfld.word 0x00 2. " NEWDAT ,Access Transmission Request Bit" "Unchanged,Cleared" textline " " bitfld.word 0x00 1. " DATAA ,Access Data Bytes 3:0" "Unchanged,Data Bytes 3:0 to IF1" bitfld.word 0x00 0. " DATAB ,Access Data Bytes 7:4" "Unchanged,Transfer Data 7:4 to IF1" endif group.word (asd:0xA2000080+0x08)++0x01 line.word 0x00 "IF2MSK1,IF2 mask 1 register" bitfld.word 0x00 15. " MSK[15-0] ,Identifier Bit 15 Mask" "0,1" bitfld.word 0x00 14. ",Identifier Bit 14 Mask" "0,1" bitfld.word 0x00 13. ",Identifier Bit 13 Mask" "0,1" bitfld.word 0x00 12. ",Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000080+0xC)++0x01 line.word 0x00 "IF2MSK2,IF2 mask 2 register" bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "No effect,Acceptance filtering" bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "No effect,Acceptance filtering" textline " " bitfld.word 0x00 12. " MSK[28-16] ,Identifier Bit 12 Mask" "0,1" bitfld.word 0x00 11. ",Identifier Bit 11 Mask" "0,1" bitfld.word 0x00 10. ",Identifier Bit 10 Mask" "0,1" bitfld.word 0x00 9. ",Identifier Bit 9 Mask" "0,1" bitfld.word 0x00 8. ",Identifier Bit 8 Mask" "0,1" bitfld.word 0x00 7. ",Identifier Bit 7 Mask" "0,1" bitfld.word 0x00 6. ",Identifier Bit 6 Mask" "0,1" bitfld.word 0x00 5. ",Identifier Bit 5 Mask" "0,1" bitfld.word 0x00 4. ",Identifier Bit 4 Mask" "0,1" bitfld.word 0x00 3. ",Identifier Bit 3 Mask" "0,1" bitfld.word 0x00 2. ",Identifier Bit 2 Mask" "0,1" bitfld.word 0x00 1. ",Identifier Bit 1 Mask" "0,1" bitfld.word 0x00 0. ",Identifier Bit 0 Mask" "0,1" group.word (asd:0xA2000080+0x10)++0x01 line.word 0x00 "IF2ARB1,IF2 arbitration 1 register" hexmask.word 0x00 0.--15. 1. " ID[5-0] ,Message Identifier" group.word (asd:0xA2000080+0x14)++0x01 line.word 0x00 "IF2ARB2,IF2 arbitration 2 register" bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Valid" bitfld.word 0x00 14. " XTD ,Extended Identifier" "11-bit,29-bit" textline " " bitfld.word 0x00 13. " DIR ,Message Direction" "Receive,Transmit" hexmask.word 0x00 0.--12. 1. " ID[28-16] ,Message Identifier" group.word (asd:0xA2000080+0x18)++0x01 line.word 0x00 "IF2MSG,IF2 message control register" bitfld.word 0x00 15. " NEWDAT ,New Data" "No new data,Occurred" bitfld.word 0x00 14. " MSGLST ,Message Lost" "No lost,Occurred" textline " " bitfld.word 0x00 13. " INTPND ,Interrupt Pending" "Not pending,Pending" bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Mask ignored,Use Mask" textline " " bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested" textline " " bitfld.word 0x00 7. " EOB ,End of Buffer" "No,Yes" bitfld.word 0x00 0.--3. " DLC[3:0] ,Data length code" "0 bytes,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.word (asd:0xA2000080+0x1C)++0x01 line.word 0x00 "IF2DATAA1,IF2 data A1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data bytes of CAN messages" group.word (asd:0xA2000080+0x20)++0x01 line.word 0x00 "IF2DATAA2,IF2 data A2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data bytes of CAN messages" group.word (asd:0xA2000080+0x24)++0x01 line.word 0x00 "IF2DATAB1,IF2 data B1 register" hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data bytes of CAN messages" group.word (asd:0xA2000080+0x28)++0x01 line.word 0x00 "IF2DATAB2,IF2 data B2 register" hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data bytes of CAN messages" hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data bytes of CAN messages" sif (cpu()=="SPEAR320") rgroup.word 0xA4++0x01 else rgroup.word 0x100++0x01 endif line.word 0x00 "TREQ1,Transmission request 1 register" bitfld.word 0x00 15. " TXRQST[16] ,Transmission Request Bit 16" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[15] ,Transmission Request Bit 15" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[14] ,Transmission Request Bit 14" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[13] ,Transmission Request Bit 13" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[12] ,Transmission Request Bit 12" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[11] ,Transmission Request Bit 11" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[10] ,Transmission Request Bit 10" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[9] ,Transmission Request Bit 9" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[8] ,Transmission Request Bit 8" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[7] ,Transmission Request Bit 7" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[6] ,Transmission Request Bit 6" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[5] ,Transmission Request Bit 5" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[4] ,Transmission Request Bit 4" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[3] ,Transmission Request Bit 3" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[2] ,Transmission Request Bit 2" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[1] ,Transmission Request Bit 1" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xA8++0x01 else rgroup.word 0x104++0x01 endif line.word 0x00 "TREQ2,Transmission request 2 register" bitfld.word 0x00 15. " TXRQST[32] ,Transmission Request Bit 32" "Not requested,Requested" bitfld.word 0x00 14. " TXRQST[31] ,Transmission Request Bit 31" "Not requested,Requested" textline " " bitfld.word 0x00 13. " TXRQST[30] ,Transmission Request Bit 30" "Not requested,Requested" bitfld.word 0x00 12. " TXRQST[29] ,Transmission Request Bit 29" "Not requested,Requested" textline " " bitfld.word 0x00 11. " TXRQST[28] ,Transmission Request Bit 28" "Not requested,Requested" bitfld.word 0x00 10. " TXRQST[27] ,Transmission Request Bit 27" "Not requested,Requested" textline " " bitfld.word 0x00 9. " TXRQST[26] ,Transmission Request Bit 26" "Not requested,Requested" bitfld.word 0x00 8. " TXRQST[25] ,Transmission Request Bit 25" "Not requested,Requested" textline " " bitfld.word 0x00 7. " TXRQST[24] ,Transmission Request Bit 24" "Not requested,Requested" bitfld.word 0x00 6. " TXRQST[23] ,Transmission Request Bit 23" "Not requested,Requested" textline " " bitfld.word 0x00 5. " TXRQST[22] ,Transmission Request Bit 22" "Not requested,Requested" bitfld.word 0x00 4. " TXRQST[21] ,Transmission Request Bit 21" "Not requested,Requested" textline " " bitfld.word 0x00 3. " TXRQST[20] ,Transmission Request Bit 20" "Not requested,Requested" bitfld.word 0x00 2. " TXRQST[19] ,Transmission Request Bit 19" "Not requested,Requested" textline " " bitfld.word 0x00 1. " TXRQST[18] ,Transmission Request Bit 18" "Not requested,Requested" bitfld.word 0x00 0. " TXRQST[17] ,Transmission Request Bit 17" "Not requested,Requested" sif (cpu()=="SPEAR320") rgroup.word 0xB8++0x01 else rgroup.word 0x120++0x01 endif line.word 0x00 "NDATA1,New data 1 register" bitfld.word 0x00 15. " NEWDAT[16] ,New Data Bit 16" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[15] ,New Data Bit 15" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[14] ,New Data Bit 14" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[13] ,New Data Bit 13" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[12] ,New Data Bit 12" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[11] ,New Data Bit 11" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[10] ,New Data Bit 10" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[9] ,New Data Bit 9" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[8] ,New Data Bit 8" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[7] ,New Data Bit 7" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[6] ,New Data Bit 6" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[5] ,New Data Bit 5" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[4] ,New Data Bit 4" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[3] ,New Data Bit 3" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[2] ,New Data Bit 2" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[1] ,New Data Bit 1" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xBC++0x01 else rgroup.word 0x124++0x01 endif line.word 0x00 "NDATA2,New data 2 register" bitfld.word 0x00 15. " NEWDAT[32] ,New Data Bit 32" "No new data,Occurred" bitfld.word 0x00 14. " NEWDAT[31] ,New Data Bit 31" "No new data,Occurred" textline " " bitfld.word 0x00 13. " NEWDAT[30] ,New Data Bit 30" "No new data,Occurred" bitfld.word 0x00 12. " NEWDAT[29] ,New Data Bit 29" "No new data,Occurred" textline " " bitfld.word 0x00 11. " NEWDAT[28] ,New Data Bit 28" "No new data,Occurred" bitfld.word 0x00 10. " NEWDAT[27] ,New Data Bit 27" "No new data,Occurred" textline " " bitfld.word 0x00 9. " NEWDAT[26] ,New Data Bit 26" "No new data,Occurred" bitfld.word 0x00 8. " NEWDAT[25] ,New Data Bit 25" "No new data,Occurred" textline " " bitfld.word 0x00 7. " NEWDAT[24] ,New Data Bit 24" "No new data,Occurred" bitfld.word 0x00 6. " NEWDAT[23] ,New Data Bit 23" "No new data,Occurred" textline " " bitfld.word 0x00 5. " NEWDAT[22] ,New Data Bit 22" "No new data,Occurred" bitfld.word 0x00 4. " NEWDAT[21] ,New Data Bit 21" "No new data,Occurred" textline " " bitfld.word 0x00 3. " NEWDAT[20] ,New Data Bit 20" "No new data,Occurred" bitfld.word 0x00 2. " NEWDAT[19] ,New Data Bit 19" "No new data,Occurred" textline " " bitfld.word 0x00 1. " NEWDAT[18] ,New Data Bit 18" "No new data,Occurred" bitfld.word 0x00 0. " NEWDAT[17] ,New Data Bit 17" "No new data,Occurred" sif (cpu()=="SPEAR320") rgroup.word 0xCC++0x01 else rgroup.word 0x140++0x01 endif line.word 0x00 "IRQPND1,Interrupt pending 1 register" bitfld.word 0x00 15. " INTPND[16] ,Interrupt Pending Bit 16" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[15] ,Interrupt Pending Bit 15" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[14] ,Interrupt Pending Bit 14" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[13] ,Interrupt Pending Bit 13" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[12] ,Interrupt Pending Bit 12" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[11] ,Interrupt Pending Bit 11" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[10] ,Interrupt Pending Bit 10" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[9] ,Interrupt Pending Bit 9" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[8] ,Interrupt Pending Bit 8" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[7] ,Interrupt Pending Bit 7" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[6] ,Interrupt Pending Bit 6" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[5] ,Interrupt Pending Bit 5" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[4] ,Interrupt Pending Bit 4" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[3] ,Interrupt Pending Bit 3" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[2] ,Interrupt Pending Bit 2" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[1] ,Interrupt Pending Bit 1" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xD0++0x01 else rgroup.word 0x144++0x01 endif line.word 0x00 "IRQPND2,Interrupt pending 2 register" bitfld.word 0x00 15. " INTPND[32] ,Interrupt Pending Bit 32" "Not pending,Pending" bitfld.word 0x00 14. " INTPND[31] ,Interrupt Pending Bit 31" "Not pending,Pending" textline " " bitfld.word 0x00 13. " INTPND[30] ,Interrupt Pending Bit 30" "Not pending,Pending" bitfld.word 0x00 12. " INTPND[29] ,Interrupt Pending Bit 29" "Not pending,Pending" textline " " bitfld.word 0x00 11. " INTPND[28] ,Interrupt Pending Bit 28" "Not pending,Pending" bitfld.word 0x00 10. " INTPND[27] ,Interrupt Pending Bit 27" "Not pending,Pending" textline " " bitfld.word 0x00 9. " INTPND[26] ,Interrupt Pending Bit 26" "Not pending,Pending" bitfld.word 0x00 8. " INTPND[25] ,Interrupt Pending Bit 25" "Not pending,Pending" textline " " bitfld.word 0x00 7. " INTPND[24] ,Interrupt Pending Bit 24" "Not pending,Pending" bitfld.word 0x00 6. " INTPND[23] ,Interrupt Pending Bit 23" "Not pending,Pending" textline " " bitfld.word 0x00 5. " INTPND[22] ,Interrupt Pending Bit 22" "Not pending,Pending" bitfld.word 0x00 4. " INTPND[21] ,Interrupt Pending Bit 21" "Not pending,Pending" textline " " bitfld.word 0x00 3. " INTPND[20] ,Interrupt Pending Bit 20" "Not pending,Pending" bitfld.word 0x00 2. " INTPND[19] ,Interrupt Pending Bit 19" "Not pending,Pending" textline " " bitfld.word 0x00 1. " INTPND[18] ,Interrupt Pending Bit 18" "Not pending,Pending" bitfld.word 0x00 0. " INTPND[17] ,Interrupt Pending Bit 17" "Not pending,Pending" sif (cpu()=="SPEAR320") rgroup.word 0xE0++0x01 else rgroup.word 0x160++0x01 endif line.word 0x00 "MSGVLD1,Message valid 1 register" bitfld.word 0x00 15. " MSGVAL[16] ,Message Valid Bit 16" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[15] ,Message Valid Bit 15" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[14] ,Message Valid Bit 14" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[13] ,Message Valid Bit 13" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[12] ,Message Valid Bit 12" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[11] ,Message Valid Bit 11" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[10] ,Message Valid Bit 10" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[9] ,Message Valid Bit 9" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[8] ,Message Valid Bit 8" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[7] ,Message Valid Bit 7" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[6] ,Message Valid Bit 6" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[5] ,Message Valid Bit 5" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[4] ,Message Valid Bit 4" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[3] ,Message Valid Bit 3" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[2] ,Message Valid Bit 2" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[1] ,Message Valid Bit 1" "Not valid,Valid" sif (cpu()=="SPEAR320") rgroup.word 0xE4++0x01 else rgroup.word 0x164++0x01 endif line.word 0x00 "MSGVLD2,Message valid 2 register" bitfld.word 0x00 15. " MSGVAL[32] ,Message Valid Bit 32" "Not valid,Valid" bitfld.word 0x00 14. " MSGVAL[31] ,Message Valid Bit 31" "Not valid,Valid" textline " " bitfld.word 0x00 13. " MSGVAL[30] ,Message Valid Bit 30" "Not valid,Valid" bitfld.word 0x00 12. " MSGVAL[29] ,Message Valid Bit 29" "Not valid,Valid" textline " " bitfld.word 0x00 11. " MSGVAL[28] ,Message Valid Bit 28" "Not valid,Valid" bitfld.word 0x00 10. " MSGVAL[27] ,Message Valid Bit 27" "Not valid,Valid" textline " " bitfld.word 0x00 9. " MSGVAL[26] ,Message Valid Bit 26" "Not valid,Valid" bitfld.word 0x00 8. " MSGVAL[25] ,Message Valid Bit 25" "Not valid,Valid" textline " " bitfld.word 0x00 7. " MSGVAL[24] ,Message Valid Bit 24" "Not valid,Valid" bitfld.word 0x00 6. " MSGVAL[23] ,Message Valid Bit 23" "Not valid,Valid" textline " " bitfld.word 0x00 5. " MSGVAL[22] ,Message Valid Bit 22" "Not valid,Valid" bitfld.word 0x00 4. " MSGVAL[21] ,Message Valid Bit 21" "Not valid,Valid" textline " " bitfld.word 0x00 3. " MSGVAL[20] ,Message Valid Bit 20" "Not valid,Valid" bitfld.word 0x00 2. " MSGVAL[19] ,Message Valid Bit 19" "Not valid,Valid" textline " " bitfld.word 0x00 1. " MSGVAL[18] ,Message Valid Bit 18" "Not valid,Valid" bitfld.word 0x00 0. " MSGVAL[17] ,Message Valid Bit 17" "Not valid,Valid" width 0x0b endif tree.end tree.end endif tree.open "UART (Universal Asynchronous Receiver Transmitter)" sif (cpu()=="SPEAR310") base asd:0xD0000000 width 13. tree "UART0 (Universal Asynchronous Receiver Transmitter 0)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART0DR,UART0 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART0DR,UART0 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART0FR,UART0 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" else rgroup.word 0x18++0x1 line.word 0x0 "UART0FR,UART0 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART0ILPR,UART0 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART0IBRD,UART0 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART0FBRD,UART0 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART0LCR_H,UART0 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART0CR,UART0 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART0CR,UART0 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART0IFLS,UART0 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART0DMACR,UART0 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xB2000000 width 13. tree "UART1 (Universal Asynchronous Receiver Transmitter 1)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART1DR,UART1 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART1DR,UART1 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif else rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART1ILPR,UART1 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART1IBRD,UART1 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART1FBRD,UART1 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART1LCR_H,UART1 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif else group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART1IFLS,UART1 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR310") group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART1DMACR,UART1 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xB2080000 width 13. tree "UART2 (Universal Asynchronous Receiver Transmitter 2)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART2DR,UART2 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART2DR,UART2 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART2ILPR,UART2 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART2IBRD,UART2 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART2FBRD,UART2 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART2LCR_H,UART2 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART2IFLS,UART2 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART2DMACR,UART2 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xB2100000 width 13. tree "UART3 (Universal Asynchronous Receiver Transmitter 3)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART3DR,UART3 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART3RSECR,UART3 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART3DR,UART3 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART3RSECR,UART3 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART3FR,UART3 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART3FR,UART3 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART3ILPR,UART3 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART3IBRD,UART3 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART3FBRD,UART3 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART3LCR_H,UART3 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART3CR,UART3 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART3CR,UART3 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART3IFLS,UART3 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART3IMSC,UART3 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART3RIS,UART3 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART3MIS, UART3 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART3ICR,UART3 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART3IMSC,UART3 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART3RIS,UART3 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART3MIS, UART3 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART3ICR,UART3 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART3DMACR,UART3 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xB2180000 width 13. tree "UART4 (Universal Asynchronous Receiver Transmitter 4)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART4DR,UART4 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART4RSECR,UART4 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART4DR,UART4 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART4RSECR,UART4 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART4FR,UART4 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART4FR,UART4 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART4ILPR,UART4 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART4IBRD,UART4 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART4FBRD,UART4 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART4LCR_H,UART4 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART4CR,UART4 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART4CR,UART4 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART4IFLS,UART4 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART4IMSC,UART4 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART4RIS,UART4 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART4MIS, UART4 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART4ICR,UART4 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART4IMSC,UART4 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART4RIS,UART4 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART4MIS, UART4 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART4ICR,UART4 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART4DMACR,UART4 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xB2200000 width 13. tree "UART5 (Universal Asynchronous Receiver Transmitter 5)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART5DR,UART5 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART5RSECR,UART5 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART5DR,UART5 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART5RSECR,UART5 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART5FR,UART5 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART5FR,UART5 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART5ILPR,UART5 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART5IBRD,UART5 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART5FBRD,UART5 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART5LCR_H,UART5 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART5CR,UART5 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART5CR,UART5 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART5IFLS,UART5 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART5IMSC,UART5 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART5RIS,UART5 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART5MIS, UART5 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART5ICR,UART5 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART5IMSC,UART5 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART5RIS,UART5 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART5MIS, UART5 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART5ICR,UART5 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART5DMACR,UART5 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b elif (cpu()=="SPEAR320") base asd:0xD0000000 width 13. tree "UART0 (Universal Asynchronous Receiver Transmitter 0)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART0DR,UART0 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART0DR,UART0 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART0FR,UART0 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" else rgroup.word 0x18++0x1 line.word 0x0 "UART0FR,UART0 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART0ILPR,UART0 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART0IBRD,UART0 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART0FBRD,UART0 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART0LCR_H,UART0 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART0CR,UART0 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART0CR,UART0 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART0IFLS,UART0 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART0DMACR,UART0 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xA3000000 width 13. tree "UART1 (Universal Asynchronous Receiver Transmitter 1)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART1DR,UART1 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART1DR,UART1 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif else rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART1ILPR,UART1 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART1IBRD,UART1 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART1FBRD,UART1 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART1LCR_H,UART1 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif else group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART1IFLS,UART1 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR310") group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART1DMACR,UART1 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xA4000000 width 13. tree "UART2 (Universal Asynchronous Receiver Transmitter 2)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART2DR,UART2 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART2DR,UART2 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART2ILPR,UART2 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART2IBRD,UART2 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART2FBRD,UART2 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART2LCR_H,UART2 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART2IFLS,UART2 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART2DMACR,UART2 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b elif (cpu()=="SPEAR320S") base asd:0xD0000000 width 13. tree "UART0 (Universal Asynchronous Receiver Transmitter 0)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART0DR,UART0 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART0DR,UART0 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART0FR,UART0 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" else rgroup.word 0x18++0x1 line.word 0x0 "UART0FR,UART0 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART0ILPR,UART0 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART0IBRD,UART0 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART0FBRD,UART0 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART0LCR_H,UART0 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART0CR,UART0 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART0CR,UART0 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART0IFLS,UART0 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART0DMACR,UART0 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xA3000000 width 13. tree "UART1 (Universal Asynchronous Receiver Transmitter 1)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART1DR,UART1 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART1DR,UART1 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif else rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART1ILPR,UART1 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART1IBRD,UART1 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART1FBRD,UART1 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART1LCR_H,UART1 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif else group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART1IFLS,UART1 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR310") group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART1DMACR,UART1 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xA4000000 width 13. tree "UART2 (Universal Asynchronous Receiver Transmitter 2)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART2DR,UART2 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART2DR,UART2 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART2ILPR,UART2 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART2IBRD,UART2 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART2FBRD,UART2 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART2LCR_H,UART2 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART2IFLS,UART2 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART2DMACR,UART2 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xA9100000 width 13. tree "UART3 (Universal Asynchronous Receiver Transmitter 3)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART3DR,UART3 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART3RSECR,UART3 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART3DR,UART3 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART3RSECR,UART3 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART3FR,UART3 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART3FR,UART3 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART3ILPR,UART3 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART3IBRD,UART3 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART3FBRD,UART3 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART3LCR_H,UART3 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART3CR,UART3 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART3CR,UART3 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART3IFLS,UART3 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART3IMSC,UART3 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART3RIS,UART3 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART3MIS, UART3 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART3ICR,UART3 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART3IMSC,UART3 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART3RIS,UART3 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART3MIS, UART3 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART3ICR,UART3 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART3DMACR,UART3 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0xA9200000 width 13. tree "UART4 (Universal Asynchronous Receiver Transmitter 4)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART4DR,UART4 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART4RSECR,UART4 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART4DR,UART4 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART4RSECR,UART4 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART4FR,UART4 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART4FR,UART4 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART4ILPR,UART4 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART4IBRD,UART4 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART4FBRD,UART4 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART4LCR_H,UART4 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART4CR,UART4 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART4CR,UART4 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART4IFLS,UART4 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART4IMSC,UART4 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART4RIS,UART4 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART4MIS, UART4 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART4ICR,UART4 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART4IMSC,UART4 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART4RIS,UART4 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART4MIS, UART4 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART4ICR,UART4 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART4DMACR,UART4 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0x60000000 width 13. tree "UART5 (Universal Asynchronous Receiver Transmitter 5)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART5DR,UART5 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART5RSECR,UART5 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART5DR,UART5 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART5RSECR,UART5 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART5FR,UART5 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART5FR,UART5 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART5ILPR,UART5 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART5IBRD,UART5 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART5FBRD,UART5 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART5LCR_H,UART5 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART5CR,UART5 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART5CR,UART5 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART5IFLS,UART5 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART5IMSC,UART5 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART5RIS,UART5 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART5MIS, UART5 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART5ICR,UART5 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART5IMSC,UART5 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART5RIS,UART5 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART5MIS, UART5 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART5ICR,UART5 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART5DMACR,UART5 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b base asd:0x60100000 width 13. tree "UART6 (Universal Asynchronous Receiver Transmitter 6)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART6DR,UART6 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART6RSECR,UART6 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART6DR,UART6 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART6RSECR,UART6 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART6FR,UART6 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART6FR,UART6 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART6ILPR,UART6 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART6IBRD,UART6 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART6FBRD,UART6 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART6LCR_H,UART6 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART6CR,UART6 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART6CR,UART6 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART6IFLS,UART6 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART6IMSC,UART6 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART6RIS,UART6 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART6MIS, UART6 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART6ICR,UART6 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART6IMSC,UART6 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART6RIS,UART6 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART6MIS, UART6 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART6ICR,UART6 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART6DMACR,UART6 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b else base asd:0xD0000000 width 13. tree "UART1 (Universal Asynchronous Receiver Transmitter 1)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART1DR,UART1 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART1DR,UART1 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART1RSECR,UART1 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif else rgroup.word 0x18++0x1 line.word 0x0 "UART1FR,UART1 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART1ILPR,UART1 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART1IBRD,UART1 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART1FBRD,UART1 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART1LCR_H,UART1 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif else group.word 0x30++0x1 line.word 0x0 "UART1CR,UART1 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART1IFLS,UART1 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") sif (cpu()=="SPEAR310") group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif else group.word 0x38++0x1 line.word 0x0 "UART1IMSC,UART1 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART1RIS,UART1 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART1MIS, UART1 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART1ICR,UART1 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART1DMACR,UART1 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b endif sif (cpu()=="SPEAR600") base asd:0xD0080000 width 13. tree "UART2 (Universal Asynchronous Receiver Transmitter 2)" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x00++0x01 line.word 0x00 "UART2DR,UART2 Data Register" bitfld.word 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 10. " BE ,Break Error" "No error,Error" bitfld.word 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.word.byte 0x00 0.--7. 1. "DATA, Receive (read) or transmit (write) data character" group.word 0x04++0x01 line.word 0x00 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.word 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.word 0x00 2. " BE ,Break Error" "No error,Error" bitfld.word 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.word 0x00 0. " FE ,Framing Error" "No error,Error" else hgroup.word 0x0++0x1 hide.word 0x0 "UART2DR,UART2 Data Register" in group.byte 0x4++0x0 line.byte 0x0 "UART2RSECR,UART2 Receive Status Register/Error Clear Register" bitfld.byte 0x0 3. " OE ,Overrun Error" "No error,Error" bitfld.byte 0x0 2. " BE ,Break Error" "No error,Error" bitfld.byte 0x0 1. " PE ,Parity Error" "No error,Error" bitfld.byte 0x0 0. " FE ,Framing Error" "No error,Error" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" textline " " bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" else rgroup.word 0x18++0x1 line.word 0x0 "UART2FR,UART2 Flag Register" bitfld.word 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.word 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.word 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.word 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.word 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.word 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.word 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.word 0x00 0. " CTS ,Clear To Send" "0,1" endif sif (cpu()=="SPEAR600"||cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.word 0x20++0x1 line.word 0x0 "UART2ILPR,UART2 IrDA Low Power Counter Divisor Register" hexmask.word.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" endif group.word 0x24++0x1 line.word 0x0 "UART2IBRD,UART2 Integer Baud Rate Register" group.word 0x28++0x1 line.word 0x0 "UART2FBRD,UART2 Fractional Baud Rate Register" hexmask.word.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.word 0x2C++0x1 line.word 0x0 "UART2LCR_H,UART2 Line Control Register" bitfld.word 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.word 0x00 5.--6. " WLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.word 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.word 0x00 0. " BRK ,Send Break" "Normal,Send break" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" else group.word 0x30++0x1 line.word 0x0 "UART2CR,UART2 Control Register" bitfld.word 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.word 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") bitfld.word 0x00 13. " OUT2 ,Modem status output 2" "1,0" bitfld.word 0x00 12. " OUT1 ,Modem status output" "1,0" endif textline " " bitfld.word 0x00 11. " RTS ,Request to Send" "0,1" bitfld.word 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.word 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" sif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) bitfld.word 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" bitfld.word 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" endif bitfld.word 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" endif group.word 0x34++0x1 line.word 0x0 "UART2IFLS,UART2 Interrupt FIFO Level Select Register" bitfld.word 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.word 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" else group.word 0x38++0x1 line.word 0x0 "UART2IMSC,UART2 Interrupt Mask Set/Clear Register" bitfld.word 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.word 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "UART2RIS,UART2 Raw Interrupt Status Register" bitfld.word 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.word 0x40++0x1 line.word 0x0 "UART2MIS, UART2 Masked Interrupt Status Register" bitfld.word 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.word 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.word 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.word 0x44++0x1 line.word 0x0 "UART2ICR,UART2 Interrupt Clear Register" bitfld.word 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.word 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.word 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.word 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.word 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.word 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" endif group.word 0x48++0x1 line.word 0x0 "UART2DMACR,UART2 DMA Control Register" bitfld.word 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" sif (cpu()!="SPEAR1340"&&cpu()!="SPEAR1310") sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" rgroup.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" rgroup.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" rgroup.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" rgroup.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" rgroup.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" rgroup.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" else group.byte 0xfe0++0x00 "Peripheral identification registers" line.byte 0x00 "UARTPERID0,UART Periph ID 0" group.byte 0xfe4++0x00 line.byte 0x00 "UARTPERID1,UART Periph ID 1" group.byte 0xfe8++0x00 line.byte 0x00 "UARTPERID2,UART Periph ID 2" group.byte 0xfec++0x00 line.byte 0x00 "UARTPERID3,UART Periph ID 3" group.byte 0xff0++0x00 "Prime cell identification registers" line.byte 0x00 "UARTCELLID0,UARTP Cell ID 0" group.byte 0xff4++0x00 line.byte 0x00 "UARTCELLID1,UARTP Cell ID 1" group.byte 0xff8++0x00 line.byte 0x00 "UARTCELLID2,UARTP Cell ID 2" group.byte 0xffc++0x00 line.byte 0x00 "UARTCELLID3,UARTP Cell ID 3" endif endif tree.end width 0x0b endif tree.end sif (cpu()=="SPEAR310") tree.open "RS485" tree "HDLC 1" base asd:0xB3000000 width 7. group.long 0x20++0x03 line.long 0x00 "HTCR,HDLC transmit command register" hexmask.long.byte 0x0 16.--23. 1. " CTS_DELAY ,Internal clock cycles delay before using data in CTS" bitfld.long 0x0 11. " FALLEDGE ,Tx data sent out after rising/falling edge" "Rising,Falling" textline " " bitfld.long 0x0 10. " READ ,Read command memory" "Write,Read" bitfld.long 0x0 8. " CF ,Common flag,Flag between previous and next frame" "Distinct,Identical" textline " " bitfld.long 0x0 7. " PEN ,CSMA PENALTY value" "2,1" bitfld.long 0x0 6. " CSMA ,Carrier Sense Multiple Access with Contention Resolution" "Echo bit is not taken,Echo bit is taken" textline " " bitfld.long 0x0 5. " NCRC ,CRC transmit" "Transmitted,Not transmitted" textline " " bitfld.long 0x0 4. " F ,Flag transmit" "Transmitted 1,Transmitted flags" bitfld.long 0x0 2.--3. " P1/P0 ,Command bits written by the microprocessor" "Abort,Start,Continue,Halt" textline " " bitfld.long 0x0 0.--1. " C1/C0 ,Status bits written by the microprocessor" "Abort,Start,Continue,Continue" group.long 0x30++0x07 line.long 0x00 "HRCR,HDLC receive command register" bitfld.long 0x00 11. " RISEEDGE ,Rx data sampling" "Falling edge,Rising edge" bitfld.long 0x00 10. " READ ,Read command memory" "Write,Read" textline " " bitfld.long 0x00 9. " AR21 ,Address recognition 21" "Not compared,Compared" bitfld.long 0x00 8. " AR20 ,Address recognition 20" "Not compared,Compared" textline " " bitfld.long 0x00 7. " AR11 ,Address recognition 11" "Not compared,Compared" bitfld.long 0x00 6. " AR10 ,Address recognition 10" "Not compared,Compared" textline " " bitfld.long 0x00 5. " CRC ,CRC stored in external memory" "Not stored,Stored" bitfld.long 0x00 4. " FM ,Flag monitoring" "Not received,Received" textline " " bitfld.long 0x00 2.--3. " P1/P0 ,Command bits written by the microprocessor" "Abort,Start,Continue,Halt" bitfld.long 0x00 0.--1. " C1/C0 ,Status bits written by the microprocessor" "Abort,Start,Continue,Continue" line.long 0x04 "AFRAR,Address field recognition address register" bitfld.long 0x04 10. " READ ,Read command AFR memory" "Write,Read" bitfld.long 0x04 9. " AMM ,Access to mask memory" "Not masked,Masked" if (((data.long(asd:0xB3000000+0x34))&0x200)==0x00) group.long 0x38++0x03 line.long 0x00 "AFRDR,Address field recognition data register" hexmask.long.word 0x00 0.--15. 1. " AF[15:00] ,Address field bits" else group.long 0x38++0x03 line.long 0x00 "AFRDR,Address field recognition data register" hexmask.long.word 0x00 0.--15. 1. " AFM[15:00] ,Address field mask bits" endif group.long 0x40++0x07 line.long 0x00 "IBAR,Initiate block address register" sif (cpuis("SPEAR1310*")) hexmask.long.tbyte 0x00 10.--31. 0x4 " IBA ,Start address of initiate block" else hexmask.long.tbyte 0x00 10.--31. 0x4 " RFU ,Start address of initiate block" endif line.long 0x04 "IMR,Interrupt mask register" bitfld.long 0x04 7. " INTFOV_MASK ,INTFOV_MASK" "Not masked,Masked" bitfld.long 0x04 6. " INTFWAR_MASK ,INTFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 5. " TXFOV_MASK ,TXFOV_MASK" "Not masked,Masked" bitfld.long 0x04 4. " TXFWAR_MASK ,TXFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 3. " RXFOV_MASK ,RXFOV_MASK" "Not masked,Masked" bitfld.long 0x04 2. " RXFWAR_MASK ,RXFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 1. " ICOV_MASK ,ICOV_MASK" "Not masked,Masked" bitfld.long 0x04 0. " HDLC_MASK ,HDLC_MASK" "Not masked,Masked" hgroup.long 0x48++0x03 hide.long 0x00 "IR,Interrupt register" in group.long 0x4C++0x03 line.long 0x00 "IQSR,Interrupt queue size register" bitfld.long 0x00 0.--1. " HS[1:0] ,HDLC Interrupt Queue size" "512 words,1024 words,1536 words,2048 words" width 0x0b tree.end tree "HDLC 2" base asd:0xB3800000 width 7. group.long 0x20++0x03 line.long 0x00 "HTCR,HDLC transmit command register" hexmask.long.byte 0x0 16.--23. 1. " CTS_DELAY ,Internal clock cycles delay before using data in CTS" bitfld.long 0x0 11. " FALLEDGE ,Tx data sent out after rising/falling edge" "Rising,Falling" textline " " bitfld.long 0x0 10. " READ ,Read command memory" "Write,Read" bitfld.long 0x0 8. " CF ,Common flag,Flag between previous and next frame" "Distinct,Identical" textline " " bitfld.long 0x0 7. " PEN ,CSMA PENALTY value" "2,1" bitfld.long 0x0 6. " CSMA ,Carrier Sense Multiple Access with Contention Resolution" "Echo bit is not taken,Echo bit is taken" textline " " bitfld.long 0x0 5. " NCRC ,CRC transmit" "Transmitted,Not transmitted" textline " " bitfld.long 0x0 4. " F ,Flag transmit" "Transmitted 1,Transmitted flags" bitfld.long 0x0 2.--3. " P1/P0 ,Command bits written by the microprocessor" "Abort,Start,Continue,Halt" textline " " bitfld.long 0x0 0.--1. " C1/C0 ,Status bits written by the microprocessor" "Abort,Start,Continue,Continue" group.long 0x30++0x07 line.long 0x00 "HRCR,HDLC receive command register" bitfld.long 0x00 11. " RISEEDGE ,Rx data sampling" "Falling edge,Rising edge" bitfld.long 0x00 10. " READ ,Read command memory" "Write,Read" textline " " bitfld.long 0x00 9. " AR21 ,Address recognition 21" "Not compared,Compared" bitfld.long 0x00 8. " AR20 ,Address recognition 20" "Not compared,Compared" textline " " bitfld.long 0x00 7. " AR11 ,Address recognition 11" "Not compared,Compared" bitfld.long 0x00 6. " AR10 ,Address recognition 10" "Not compared,Compared" textline " " bitfld.long 0x00 5. " CRC ,CRC stored in external memory" "Not stored,Stored" bitfld.long 0x00 4. " FM ,Flag monitoring" "Not received,Received" textline " " bitfld.long 0x00 2.--3. " P1/P0 ,Command bits written by the microprocessor" "Abort,Start,Continue,Halt" bitfld.long 0x00 0.--1. " C1/C0 ,Status bits written by the microprocessor" "Abort,Start,Continue,Continue" line.long 0x04 "AFRAR,Address field recognition address register" bitfld.long 0x04 10. " READ ,Read command AFR memory" "Write,Read" bitfld.long 0x04 9. " AMM ,Access to mask memory" "Not masked,Masked" if (((data.long(asd:0xB3800000+0x34))&0x200)==0x00) group.long 0x38++0x03 line.long 0x00 "AFRDR,Address field recognition data register" hexmask.long.word 0x00 0.--15. 1. " AF[15:00] ,Address field bits" else group.long 0x38++0x03 line.long 0x00 "AFRDR,Address field recognition data register" hexmask.long.word 0x00 0.--15. 1. " AFM[15:00] ,Address field mask bits" endif group.long 0x40++0x07 line.long 0x00 "IBAR,Initiate block address register" sif (cpuis("SPEAR1310*")) hexmask.long.tbyte 0x00 10.--31. 0x4 " IBA ,Start address of initiate block" else hexmask.long.tbyte 0x00 10.--31. 0x4 " RFU ,Start address of initiate block" endif line.long 0x04 "IMR,Interrupt mask register" bitfld.long 0x04 7. " INTFOV_MASK ,INTFOV_MASK" "Not masked,Masked" bitfld.long 0x04 6. " INTFWAR_MASK ,INTFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 5. " TXFOV_MASK ,TXFOV_MASK" "Not masked,Masked" bitfld.long 0x04 4. " TXFWAR_MASK ,TXFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 3. " RXFOV_MASK ,RXFOV_MASK" "Not masked,Masked" bitfld.long 0x04 2. " RXFWAR_MASK ,RXFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 1. " ICOV_MASK ,ICOV_MASK" "Not masked,Masked" bitfld.long 0x04 0. " HDLC_MASK ,HDLC_MASK" "Not masked,Masked" hgroup.long 0x48++0x03 hide.long 0x00 "IR,Interrupt register" in group.long 0x4C++0x03 line.long 0x00 "IQSR,Interrupt queue size register" bitfld.long 0x00 0.--1. " HS[1:0] ,HDLC Interrupt Queue size" "512 words,1024 words,1536 words,2048 words" width 0x0b tree.end tree.end endif sif (cpu()=="SPEAR310") tree "TDM (Time Division Multiplex)" base asd:0xB2800000 width 9. group.long 0x00++0x07 line.long 0x00 "RX_TAAR,RX time slot assigner address register" bitfld.long 0x0 12.--13. " DELAY ,Delay between SYNC and the beginning of TS0" "No delay,1 clock,2 clock,3 clock" bitfld.long 0x0 10. " READ ,Read memory" "Write,Read" textline " " rbitfld.long 0x0 9. " BUSY ,Busy bit" "Not busy,Busy" bitfld.long 0x0 8. " HDI ,Memory initialization" "Normal state,TSA memory" textline " " hexmask.long.byte 0x0 0.--6. 1. " TS[6:0] ,Time slots" line.long 0x4 "RX_TADR,RX time slot assigner data register" bitfld.long 0x4 15. " VAL_CB ,Validation of CB pin" "Not validated,Validated" bitfld.long 0x4 14. " VAL[7] ,VAL[7] bit" "Not validated,Validated" textline " " bitfld.long 0x4 13. " VAL[6] ,VAL[6] bit" "Not validated,Validated" bitfld.long 0x4 12. " VAL[5] ,VAL[5] bit" "Not validated,Validated" textline " " bitfld.long 0x4 11. " VAL[4] ,VAL[4] bit" "Not validated,Validated" bitfld.long 0x4 10. " VAL[3] ,VAL[3] bit" "Not validated,Validated" textline " " bitfld.long 0x4 9. " VAL[2] ,VAL[2] bit" "Not validated,Validated" bitfld.long 0x4 8. " VAL[1] ,VAL[1] bit" "Not validated,Validated" textline " " bitfld.long 0x4 7. " VAL[0] ,VAL[0] bit" "Not validated,Validated" hexmask.long.byte 0x4 0.--6. 1. " CH[6:0] ,Channels" group.long 0x10++0x07 line.long 0x00 "TX_TAAR,TX time slot assigner address register" bitfld.long 0x00 12.--13. " DELAY ,Delay between SYNC and the beginning of TS0" "No delay,1 clock,2 clock,3 clock" bitfld.long 0x00 10. " READ ,Read memory" "Write,Read" textline " " rbitfld.long 0x00 9. " BUSY ,Busy bit" "Not busy,Busy" bitfld.long 0x00 8. " HDI ,Memory initialization" "Normal state,TSA memory" textline " " hexmask.long.byte 0x00 0.--6. 1. " TS[6:0] ,Time slots" line.long 0x04 "TX_TADR,TX time slot assigner data register" bitfld.long 0x04 15. " VAL_CB ,Validation of CB pin" "Not validated,Validated" bitfld.long 0x04 14. " VAL[7] ,VAL[7] bit" "Not validated,Validated" textline " " bitfld.long 0x04 13. " VAL[6] ,VAL[6] bit" "Not validated,Validated" bitfld.long 0x04 12. " VAL[5] ,VAL[5] bit" "Not validated,Validated" textline " " bitfld.long 0x04 11. " VAL[4] ,VAL[4] bit" "Not validated,Validated" bitfld.long 0x04 10. " VAL[3] ,VAL[3] bit" "Not validated,Validated" textline " " bitfld.long 0x04 9. " VAL[2] ,VAL[2] bit" "Not validated,Validated" bitfld.long 0x04 8. " VAL[1] ,VAL[1] bit" "Not validated,Validated" textline " " bitfld.long 0x04 7. " VAL[0] ,VAL[0] bit" "Not validated,Validated" hexmask.long.byte 0x04 0.--6. 1. " CH[6:0] ,Channels" if (((data.long(asd:0xB2800000+0x20))&0x400)==0x00) group.long 0x20++0x03 line.long 0x00 "HTCR,HDLC transmit command register" bitfld.long 0x00 20. " FALL_EDGE ,Tx data sent out after rising/falling edge" "Rising,Falling" bitfld.long 0x00 19. " CONF_EN ,Configure enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 12.--18. 1. " CH[6:0] ,Define one of 128 channels" rbitfld.long 0x00 11. " BUSY ,Busy bit" "Not busy,Busy" textline " " bitfld.long 0x00 10. " READ ,Read command memory" "Write,Read" bitfld.long 0x00 8. " CF ,Common flag,Flag between previous and next frame" "Distinct,Identical" textline " " bitfld.long 0x0 7. " PEN ,CSMA PENALTY significant" "0,1" bitfld.long 0x0 6. " CSMA ,Carrier Sense Multiple Access with Contention Resolution" "0,1" textline " " bitfld.long 0x0 5. " NCRC ,CRC generate" "Generated,Not generated" bitfld.long 0x0 4. " CRC32 ,CRC coding" "16-bit,32-bit" textline " " bitfld.long 0x0 3. " F ,Flag transmit" "Transmitted 1,Transmitted flags" bitfld.long 0x0 2. " P ,Protocol bits" "0,1" textline " " bitfld.long 0x0 0.--1. " C[1:0] ,Command bits" "Abort,Start,Continue,Halt" else group.long 0x20++0x03 line.long 0x00 "HTCR,HDLC transmit command register" bitfld.long 0x00 20. " FALL_EDGE ,Tx data sent out after rising/falling edge" "Rising,Falling" bitfld.long 0x00 19. " CONF_EN ,Configure enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 12.--18. 1. " CH[6:0] ,Define one of 128 channels" rbitfld.long 0x00 11. " BUSY ,Busy bit" "Not busy,Busy" textline " " bitfld.long 0x00 10. " READ ,Read command memory" "Write,Read" bitfld.long 0x00 8. " CF ,Common flag,Flag between previous and next frame" "Distinct,Identical" textline " " bitfld.long 0x0 7. " PEN ,CSMA PENALTY significant" "0,1" bitfld.long 0x0 6. " CSMA ,Carrier Sense Multiple Access with Contention Resolution" "0,1" textline " " bitfld.long 0x0 5. " NCRC ,CRC generate" "Generated,Not generated" bitfld.long 0x0 4. " CRC32 ,CRC coding" "16-bit,32-bit" textline " " bitfld.long 0x0 3. " F ,Flag transmit" "Transmitted 1,Transmitted flags" bitfld.long 0x0 2. " P ,Protocol bits" "0,1" textline " " bitfld.long 0x0 0.--1. " C[1:0] ,Command bits" "Abort,Start,Continue,Continue" endif group.long 0x30++0x07 line.long 0x00 "HRCR,HDLC receive command register" bitfld.long 0x00 20. " RISE_EDGE ,Rx data sampling" "Falling edge,Rising edge" bitfld.long 0x00 19. " CONF_EN ,Configure enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 12.--18. 1. " CH[6:0] ,Define one of 128 channels" rbitfld.long 0x00 11. " BUSY ,Busy bit" "Not busy,Busy" textline " " bitfld.long 0x00 10. " READ ,Read command memory" "Write,Read" bitfld.long 0x00 6.--9. " AR2[1:0]/AR1[1:0] ,Address recognition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 5. " CRC2 ,CRC stored in external memory" "Not stored,Stored" bitfld.long 0x0 4. " CRC32 ,CRC coding" "16-bit,32-bit" textline " " bitfld.long 0x00 3. " FM ,Flag monitoring" "Not received,Received" bitfld.long 0x0 2. " P ,Protocol bits" "0,1" textline " " bitfld.long 0x0 0.--1. " C[1:0] ,Command bits" "Abort,Start,Continue,Halt" line.long 0x04 "AFRAR,Address field recognition address register" bitfld.long 0x04 10. " READ ,Read command AFR memory" "Write,Read" bitfld.long 0x04 9. " AMM ,Access to mask memory" "Not masked,Masked" textline " " rbitfld.long 0x04 8. " BUSY ,Busy bit" "Not busy,Busy" hexmask.long.byte 0x04 0.--6. 1. " CH[6:0] ,Channels" if (((data.long(asd:0xB2800000+0x34))&0x200)==0x00) group.long 0x38++0x03 line.long 0x00 "AFRDR,Address field recognition data register" hexmask.long.word 0x00 0.--15. 1. " AF[15:00] ,Address field bits" else group.long 0x38++0x03 line.long 0x00 "AFRDR,Address field recognition data register" hexmask.long.word 0x00 0.--15. 1. " AFM[15:00] ,Address field mask bits" endif group.long 0x40++0x07 line.long 0x00 "IBAR,Initiate block address register" hexmask.long 0x00 10.--31. 0x4 " RFU ,Start address of initiate block" line.long 0x04 "IMR,Interrupt mask register" bitfld.long 0x04 7. " INTFOV_MASK ,INTFOV_MASK" "Not masked,Masked" bitfld.long 0x04 6. " INTFWAR_MASK ,INTFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 5. " TXFOV_MASK ,TXFOV_MASK" "Not masked,Masked" bitfld.long 0x04 4. " TXFWAR_MASK ,TXFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 3. " RXFOV_MASK ,RXFOV_MASK" "Not masked,Masked" bitfld.long 0x04 2. " RXFWAR_MASK ,RXFWAR_MASK" "Not masked,Masked" textline " " bitfld.long 0x04 1. " ICOV_MASK ,ICOV_MASK" "Not masked,Masked" bitfld.long 0x04 0. " HDLC_MASK ,HDLC_MASK" "Not masked,Masked" hgroup.long 0x48++0x03 hide.long 0x00 "IR,Interrupt register" in group.long 0x4C++0x03 line.long 0x00 "IQSR,Interrupt queue size register" bitfld.long 0x00 0.--1. " HS[1:0] ,HDLC Interrupt Queue size" "512 words,1024 words,1536 words,2048 words" width 0x0b tree.end endif tree "FIRDA (Fast IRDA controller)" base asd:0xD1000000 width 11. group.long 0x10++0xf line.long 0x0 "IRDA_CON,IrDA Control Register" bitfld.long 0x0 0. " RUN ,Enable FIrDA Controller" "Disabled,Enabled" line.long 0x4 "IRDA_CONF,IrDA Configuration Register" bitfld.long 0x4 20. " POLTX ,Polarity of TX pulses" "Active high,Active low" bitfld.long 0x4 19. " POLRX ,Polarity of RX pulses" "Active low,Active high" textline " " bitfld.long 0x4 16.--18. " BS ,Burst size" "1 word,2 words,4 words,?..." hexmask.long.word 0x4 0.--12. 1. " RATV ,Reception abort timer value" line.long 0x8 "IRDA_PARA,IrDA Parameter Register" hexmask.long.word 0x8 16.--27. 1. " MNRB ,Maximum number of received bytes" bitfld.long 0x8 2.--7. " ABF ,Number of additional beginning flags" "No flags,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,?..." bitfld.long 0x8 0.--1. " MODE ,Infrared mode" "SIR,MIR,FIR,?..." line.long 0xc "IRDA_DV,IrDA Divider Register" hexmask.long.word 0xc 16.--26. 1. " DEC ,Decrement value of fractional divider" hexmask.long.byte 0xc 8.--15. 1. " INC ,Increment value of fractional divider" hexmask.long.byte 0xc 0.--7. 1. " N ,Denominator of the integer divider" rgroup.long 0x20++0x3 line.long 0x0 "IRDA_STAT,IrDA Status Register" bitfld.long 0x00 1. " TXS ,FIrDA Transmission state Status" "No effect,Transmission" bitfld.long 0x00 0. " RXS ,FIrDA Reception state Status" "No effect,Reception" wgroup.long 0x24++0x3 line.long 0x0 "IRDA_TFS,Transmission Frame Size Register" hexmask.long.word 0x0 0.--11. 1. " TFS ,Transmission frame size" rgroup.long 0x28++0x3 line.long 0x0 "IRDA_RFS,Reception Frame Size Register" hexmask.long.word 0x0 0.--11. 1. " RFS ,Reception frame size" wgroup.long 0x2c++0x3 line.long 0x0 "IRDA_TXB,Transmission Buffer Register" rgroup.long 0x30++0x3 line.long 0x0 "IRDA_RXB,Reception Buffer Register" group.long 0xe8++0x3 line.long 0x0 "IRDA_IMSC,Interrupt Mask Control Register" bitfld.long 0x00 7. " FD ,Frame detected interrupt mask" "Disabled,Enabled" bitfld.long 0x00 6. " FI ,Frame invalid interrupt mask" "Disabled,Enabled" bitfld.long 0x00 5. " SD ,Signal detected interrupt mask" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " FT ,Frame transmitted interrupt mask" "Disabled,Enabled" bitfld.long 0x00 3. " BREQ ,BREQ interrupt mask" "Disabled,Enabled" bitfld.long 0x00 2. " LBREQ ,LBREQ interrupt mask" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SREQ ,SREQ interrupt mask" "Disabled,Enabled" bitfld.long 0x00 0. " LSREQ ,LSREQ interrupt mask" "Disabled,Enabled" group.long 0xec++0x3 line.long 0x0 "IRDA_RIS,Interrupt Interrupt Status Register" setclrfld.long 0x00 7. 0x0c 7. 0x08 7. " FD_set/clr ,Frame detected interrupt Status" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0c 6. 0x08 6. " FI_set/clr ,Frame invalid interrupt Status" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0c 5. 0x08 5. " SD_set/clr ,Signal detected interrupt Status" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0c 4. 0x08 4. " FT_set/clr ,Frame transmitted interrupt Status" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0c 3. 0x08 3. " BREQ_set/clr ,BREQ interrupt Status" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0c 2. 0x08 2. " LBREQ_set/clr ,LBREQ interrupt Status" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0c 1. 0x08 1. " SREQ_set/clr ,SREQ interrupt Status" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0c 0. 0x08 0. " LSREQ_set/clr ,LSREQ interrupt Status" "No interrupt,Interrupt" rgroup.long 0xf0++0x3 line.long 0x0 "IRDA_MIS,Masked Interrupt Status Register" bitfld.long 0x00 7. " FD ,Frame detected masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " FI ,Frame invalid masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " SD ,Signal detected masked interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " FT ,Frame transmitted masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BREQ ,BREQ masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " LBREQ ,LBREQ masked interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SREQ ,SREQ masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " LSREQ ,LSREQ masked interrupt status" "No interrupt,Interrupt" group.long 0xfc++0x3 line.long 0x0 "IRDA_DMA,DMA Control Register" bitfld.long 0x00 3. " BREQEN ,Burst request DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " LBREQEN ,Last burst request DMA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SREQEN ,Single request DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " LSREQEN ,Last single request DMA enable" "Disabled,Enabled" width 0xB tree.end tree.open "SSP (Synchronous Serial Port)" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "SSP0" base asd:0xD0100000 width 12. if (((data.long(asd:0xD0100000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP0CR0,SSP0 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP0CR0,SSP0 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xD0100000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP0CR1,SSP0 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP0CR1,SSP0 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP0DR,SSP0 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP0SR,SSP0 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP0CPSR,SSP0 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP0IMSC,SSP0 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP0RIS,SSP0 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP0MIS,SSP0 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP0ICR,SSP0 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP0DMACR,SSP0 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end sif (cpu()!="SPEAR310") tree "SSP1" base asd:0xA5000000 width 12. if (((data.long(asd:0xA5000000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP1CR0,SSP1 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP1CR0,SSP1 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xA5000000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP1CR1,SSP1 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP1CR1,SSP1 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP1DR,SSP1 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP1SR,SSP1 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP1CPSR,SSP1 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP1IMSC,SSP1 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP1RIS,SSP1 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP1MIS,SSP1 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP1ICR,SSP1 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP1DMACR,SSP1 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end tree "SSP2" base asd:0xA6000000 width 12. if (((data.long(asd:0xA6000000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP2CR0,SSP2 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP2CR0,SSP2 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xA6000000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP2CR1,SSP2 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP2CR1,SSP2 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP2DR,SSP2 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP2SR,SSP2 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP2CPSR,SSP2 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP2IMSC,SSP2 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP2RIS,SSP2 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP2MIS,SSP2 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP2ICR,SSP2 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP2DMACR,SSP2 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end endif else tree "SSP1" base asd:0xD0100000 width 12. if (((data.long(asd:0xD0100000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP1CR0,SSP1 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP1CR0,SSP1 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xD0100000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP1CR1,SSP1 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP1CR1,SSP1 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP1DR,SSP1 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP1SR,SSP1 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP1CPSR,SSP1 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP1IMSC,SSP1 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP1RIS,SSP1 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP1MIS,SSP1 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP1ICR,SSP1 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP1DMACR,SSP1 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end sif (cpu()=="SPEAR600") tree "SSP2" base asd:0xD0180000 width 12. if (((data.long(asd:0xD0180000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP2CR0,SSP2 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP2CR0,SSP2 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xD0180000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP2CR1,SSP2 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP2CR1,SSP2 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP2DR,SSP2 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP2SR,SSP2 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP2CPSR,SSP2 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP2IMSC,SSP2 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP2RIS,SSP2 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP2MIS,SSP2 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP2ICR,SSP2 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP2DMACR,SSP2 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end tree "SSP3" base asd:0xD8180000 width 12. if (((data.long(asd:0xD8180000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP3CR0,SSP3 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP3CR0,SSP3 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xD8180000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP3CR1,SSP3 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP3CR1,SSP3 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP3DR,SSP3 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP3SR,SSP3 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP3CPSR,SSP3 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP3IMSC,SSP3 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP3RIS,SSP3 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP3MIS,SSP3 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP3ICR,SSP3 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP3DMACR,SSP3 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end endif endif tree.end tree.open "I2C (I2C controller)" tree "I2C0" sif (cpu()=="SPEAR600") base asd:0xD0200000 width 18. group.word 0x00++0x01 line.word 0x00 "IC_CON,I2C Control Register" bitfld.word 0x0 6. " IC_SLAVE_DISABLE ,Slave disabled after reset" "No,Yes" bitfld.word 0x0 5. " IC_RESTART_EN ,Enable restart conditions" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " else bitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " endif bitfld.word 0x0 3. " IC_10BITADDR_SLAVE ,Responds to 7 or 10 bit addresses" "7,10" textline " " bitfld.word 0x0 1.--2. " SPEED ,Controls operation speed" "Reserved,Standard,Fast,High" bitfld.word 0x0 0. " MASTER_MODE ,Enable master" "Disabled,Enabled" group.word 0x04++0x01 line.word 0x00 "IC_TAR,I2C Target Address Register" bitfld.word 0x00 12. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" bitfld.word 0x00 11. " SPECIAL ,Perform a general call or start byte I2C command" "Not performed,Performed" textline " " bitfld.word 0x00 10. " GC_OR_START ,General call or start byte I2C command is performed" "General Call,Start Byte" hexmask.word 0x00 0.--9. 1. " IC_TAR ,Target address" if (((data.long(asd:0xD0200000))&0x08)==0x00) group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word.byte 0x00 0.--6. 1. " IC_SAR ,Slave address" else group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word 0x00 0.--9. 1. " IC_SAR ,Slave address" endif group.word 0x0c++0x01 line.word 0x00 "IC_HS_MADDR,I2C high-speed master code Register" bitfld.word 0x00 0.--2. " IC_HS_MAR ,I2C HS mode master code" "0,1,2,3,4,5,6,7" group.word 0x10++0x01 line.word 0x00 "IC_DATA_CMD,I2C data command Register" bitfld.word 0x00 8. " CMD ,Control read or write" "Write,Read" hexmask.word.byte 0x00 0.--7. 1. " DAT ,Data to be transmitted or received on the I2C bus" group.word 0x14++0x01 line.word 0x00 "IC_SS_SCL_HCNT,Standard-Speed I2C Clock SCL High Count Register" group.word 0x18++0x01 line.word 0x00 "IC_SS_SCL_LCNT,Standard-Speed I2C Clock SCL Low Count Register" group.word 0x1c++0x01 line.word 0x00 "IC_FS_SCL_HCNT,Fast-Speed I2C Clock SCL High Count Register" group.word 0x20++0x01 line.word 0x00 "IC_FS_SCL_LCNT,I2C Fast-Speed I2C Clock SCL Low Count Register" group.word 0x24++0x01 line.word 0x00 "IC_HS_SCL_HCNT,I2C High-Speed I2C Clock SCL High Count Register" group.word 0x28++0x01 line.word 0x00 "IC_HS_SCL_LCNT,I2C High-Speed I2C Clock SCL Low Count Register" rgroup.word 0x2c++0x01 line.word 0x00 "IC_INTR_STAT,I2C Interrupt Status Register" bitfld.word 0x00 11. " R_GEN_CALL ,General Call request received interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " R_START_DET ,START condition interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " R_STOP_DET ,STOP condition interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " R_ACTIVITY ,Capture system activity interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " R_RX_DONE ,Transmission done interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " R_TX_ABRT ,Transmission abort interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " R_RD_REQ ,Read request interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " R_TX_EMPTY ,Transmit buffer at threshold value interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " R_TX_OVER ,Transmit buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " R_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " R_RX_OVER ,Receive buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " R_RX_UNDER ,Receive buffer empty interrupt status" "No interrupt,Interrupt" group.word 0x30++0x01 line.word 0x00 "IC_INTR_MASK,I2C Interrupt Mask Register" bitfld.word 0x00 11. " M_GEN_CALL ,General Call request received interrupt mask" "Not masked,Masked" bitfld.word 0x00 10. " M_START_DET ,START condition occurred interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 9. " M_STOP_DET ,STOP condition occurred interrupt mask" "Not masked,Masked" bitfld.word 0x00 8. " M_ACTIVITY ,Capture system activity interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 7. " M_RX_DONE ,Indicates transmission done interrupt mask" "Not masked,Masked" bitfld.word 0x00 6. " M_TX_ABRT ,Indicates transmission abort interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 5. " M_RD_REQ ,Read request interrupt mask" "Not masked,Masked" bitfld.word 0x00 4. " M_TX_EMPTY ,Transmit buffer at threshold value interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 3. " M_TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 2. " M_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 1. " M_RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 0. " M_RX_UNDER ,Receive buffer empty interrupt mask" "Not masked,Masked" rgroup.word 0x34++0x01 line.word 0x00 "IC_RAW_INTR_STAT,I2C Raw Interrupt Status Register" bitfld.word 0x00 11. " GEN_CALL ,General Call request received raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " START_DET ,START condition occurred raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " STOP_DET ,STOP condition occurred raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " ACTIVITY ,Capture system activity raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " RX_DONE ,Indicates transmission done raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " TX_ABRT ,Indicates transmission abort raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " RD_REQ ,Read request raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " TX_EMPTY ,Transmit buffer at threshold value raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " RX_FULL ,Transmit buffer reach RX_TL threshold raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " RX_UNDER ,Receive buffer empty raw interrupt status" "No interrupt,Interrupt" group.word 0x38++0x01 line.word 0x00 "IC_RX_TL,I2C Receive FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " RX_TL ,RX_FULL interrupt threshold" group.word 0x3c++0x01 line.word 0x00 "IC_TX_TL,I2C Transmit FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " TX_TL ,TX_EMPTY interrupt threshold" hgroup.word 0x40++0x01 hide.word 0x00 "IC_CLR_INTR,I2C Clear Combined and Individual Interrupts Register" in hgroup.word 0x44++0x01 hide.word 0x00 "IC_CLR_RX_UNDER,Clear RX_UNDER Interrupt Register" in hgroup.word 0x48++0x01 hide.word 0x00 "IC_CLR_RX_OVER,Clear RX_OVER Interrupt Register" in hgroup.word 0x4c++0x01 hide.word 0x00 "IC_CLR_TX_OVER,Clear TX_OVER Interrupt Register" in hgroup.word 0x50++0x01 hide.word 0x00 "IC_CLR_RD_REQ,Clear RD_REQ Interrupt Register" in hgroup.word 0x54++0x01 hide.word 0x00 "IC_CLR_TX_ABRT,Clear TX_ABRT Interrupt Register" in hgroup.word 0x58++0x01 hide.word 0x00 "IC_CLR_RX_DONE,Clear RX_DONE Interrupt Register" in hgroup.word 0x5c++0x01 hide.word 0x00 "IC_CLR_ACTIVITY,Clear ACTIVITY Interrupt Register" in hgroup.word 0x60++0x01 hide.word 0x00 "IC_CLR_STOP_DET,Clear STOP_DET Interrupt Register" in hgroup.word 0x64++0x01 hide.word 0x00 "IC_CLR_START_DET,Clear START_DET Interrupt Register" in hgroup.word 0x68++0x01 hide.word 0x00 "IC_CLR_GEN_CALL,Clear GEN_CALL Interrupt Register" in group.word 0x6c++0x01 line.word 0x00 "IC_ENABLE,I2C Enable Register" bitfld.word 0x00 0. " ENABLE ,I2C Controller Enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x70++0x01 else group.word 0x70++0x01 endif line.word 0x00 "IC_STATUS,I2C Status Register" bitfld.word 0x00 6. " SLV_ACTIVITY ,Slave FSM activity status" "Not active,Active" bitfld.word 0x00 5. " MST_ACTIVITY ,Master FSM activity status" "Not active,Active" textline " " bitfld.word 0x00 4. " RFF ,Receive FIFO completely full" "Not full,Full" bitfld.word 0x00 3. " RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.word 0x00 2. " TFE ,Transmit FIFO completely empty" "Not empty,Empty" bitfld.word 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.word 0x00 0. " ACTIVITY ,I2C activity status" "Not active,Active" rgroup.word 0x74++0x01 line.word 0x00 "IC_TXFLR,Transmit FIFO Level Register" bitfld.word 0x00 0.--3. " TXFLR ,Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.word 0x78++0x01 line.word 0x00 "IC_RXFLR,Receive FIFO Level Register" bitfld.word 0x00 0.--3. " RXFLR ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()=="SPEAR320S") group.word 0x7C++0x01 line.word 0x00 "IC_SDA_HOLD,SDA hold time" endif hgroup.word 0x80++0x01 hide.word 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" in sif (cpu()=="SPEAR600") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" elif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" bitfld.word 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x00 0. " RDMAE ,Recive DMA Enable" "Disabled,Enabled" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" hexmask.word.byte 0x00 0.--2. 1. " DMATDL ,Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" hexmask.word.byte 0x00 0.--2. 1. " DMARDL ,Recive data level" endif rgroup.long 0xf4++0x03 line.long 0x00 "IC_COMP_PARAM1,I2C Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH ,Transmission buffer depth" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH ,Receive buffer depth" textline " " sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" else bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" bitfld.long 0x00 6. " HAS_DMA ,DMA interface" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" endif textline " " bitfld.long 0x00 4. " HC_COUNT_VALUES ,CNT register access" "Read/write,Read only" bitfld.long 0x00 2.--3. " MAX_SPEED_MODE ,Maximum operation mode for the I2C Controller" "Reserved,Standard,Fast,High" textline " " bitfld.long 0x00 0.--1. " APB_DATA_WIDTH ,APB data bus width" "8 bits,16 bits,32 bits,?..." rgroup.long 0xf8++0x03 line.long 0x00 "IC_COMP_VERSION,Component Version ID" rgroup.long 0xfc++0x03 line.long 0x00 "IC_COMP_TYPE,DW Component Type" width 0xB else base asd:0xD0180000 width 18. group.word 0x00++0x01 line.word 0x00 "IC_CON,I2C Control Register" bitfld.word 0x0 6. " IC_SLAVE_DISABLE ,Slave disabled after reset" "No,Yes" bitfld.word 0x0 5. " IC_RESTART_EN ,Enable restart conditions" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " else bitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " endif bitfld.word 0x0 3. " IC_10BITADDR_SLAVE ,Responds to 7 or 10 bit addresses" "7,10" textline " " bitfld.word 0x0 1.--2. " SPEED ,Controls operation speed" "Reserved,Standard,Fast,High" bitfld.word 0x0 0. " MASTER_MODE ,Enable master" "Disabled,Enabled" group.word 0x04++0x01 line.word 0x00 "IC_TAR,I2C Target Address Register" bitfld.word 0x00 12. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" bitfld.word 0x00 11. " SPECIAL ,Perform a general call or start byte I2C command" "Not performed,Performed" textline " " bitfld.word 0x00 10. " GC_OR_START ,General call or start byte I2C command is performed" "General Call,Start Byte" hexmask.word 0x00 0.--9. 1. " IC_TAR ,Target address" if (((data.long(asd:0xD0180000))&0x08)==0x00) group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word.byte 0x00 0.--6. 1. " IC_SAR ,Slave address" else group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word 0x00 0.--9. 1. " IC_SAR ,Slave address" endif group.word 0x0c++0x01 line.word 0x00 "IC_HS_MADDR,I2C high-speed master code Register" bitfld.word 0x00 0.--2. " IC_HS_MAR ,I2C HS mode master code" "0,1,2,3,4,5,6,7" group.word 0x10++0x01 line.word 0x00 "IC_DATA_CMD,I2C data command Register" bitfld.word 0x00 8. " CMD ,Control read or write" "Write,Read" hexmask.word.byte 0x00 0.--7. 1. " DAT ,Data to be transmitted or received on the I2C bus" group.word 0x14++0x01 line.word 0x00 "IC_SS_SCL_HCNT,Standard-Speed I2C Clock SCL High Count Register" group.word 0x18++0x01 line.word 0x00 "IC_SS_SCL_LCNT,Standard-Speed I2C Clock SCL Low Count Register" group.word 0x1c++0x01 line.word 0x00 "IC_FS_SCL_HCNT,Fast-Speed I2C Clock SCL High Count Register" group.word 0x20++0x01 line.word 0x00 "IC_FS_SCL_LCNT,I2C Fast-Speed I2C Clock SCL Low Count Register" group.word 0x24++0x01 line.word 0x00 "IC_HS_SCL_HCNT,I2C High-Speed I2C Clock SCL High Count Register" group.word 0x28++0x01 line.word 0x00 "IC_HS_SCL_LCNT,I2C High-Speed I2C Clock SCL Low Count Register" rgroup.word 0x2c++0x01 line.word 0x00 "IC_INTR_STAT,I2C Interrupt Status Register" bitfld.word 0x00 11. " R_GEN_CALL ,General Call request received interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " R_START_DET ,START condition interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " R_STOP_DET ,STOP condition interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " R_ACTIVITY ,Capture system activity interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " R_RX_DONE ,Transmission done interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " R_TX_ABRT ,Transmission abort interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " R_RD_REQ ,Read request interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " R_TX_EMPTY ,Transmit buffer at threshold value interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " R_TX_OVER ,Transmit buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " R_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " R_RX_OVER ,Receive buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " R_RX_UNDER ,Receive buffer empty interrupt status" "No interrupt,Interrupt" group.word 0x30++0x01 line.word 0x00 "IC_INTR_MASK,I2C Interrupt Mask Register" bitfld.word 0x00 11. " M_GEN_CALL ,General Call request received interrupt mask" "Not masked,Masked" bitfld.word 0x00 10. " M_START_DET ,START condition occurred interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 9. " M_STOP_DET ,STOP condition occurred interrupt mask" "Not masked,Masked" bitfld.word 0x00 8. " M_ACTIVITY ,Capture system activity interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 7. " M_RX_DONE ,Indicates transmission done interrupt mask" "Not masked,Masked" bitfld.word 0x00 6. " M_TX_ABRT ,Indicates transmission abort interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 5. " M_RD_REQ ,Read request interrupt mask" "Not masked,Masked" bitfld.word 0x00 4. " M_TX_EMPTY ,Transmit buffer at threshold value interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 3. " M_TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 2. " M_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 1. " M_RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 0. " M_RX_UNDER ,Receive buffer empty interrupt mask" "Not masked,Masked" rgroup.word 0x34++0x01 line.word 0x00 "IC_RAW_INTR_STAT,I2C Raw Interrupt Status Register" bitfld.word 0x00 11. " GEN_CALL ,General Call request received raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " START_DET ,START condition occurred raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " STOP_DET ,STOP condition occurred raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " ACTIVITY ,Capture system activity raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " RX_DONE ,Indicates transmission done raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " TX_ABRT ,Indicates transmission abort raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " RD_REQ ,Read request raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " TX_EMPTY ,Transmit buffer at threshold value raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " RX_FULL ,Transmit buffer reach RX_TL threshold raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " RX_UNDER ,Receive buffer empty raw interrupt status" "No interrupt,Interrupt" group.word 0x38++0x01 line.word 0x00 "IC_RX_TL,I2C Receive FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " RX_TL ,RX_FULL interrupt threshold" group.word 0x3c++0x01 line.word 0x00 "IC_TX_TL,I2C Transmit FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " TX_TL ,TX_EMPTY interrupt threshold" hgroup.word 0x40++0x01 hide.word 0x00 "IC_CLR_INTR,I2C Clear Combined and Individual Interrupts Register" in hgroup.word 0x44++0x01 hide.word 0x00 "IC_CLR_RX_UNDER,Clear RX_UNDER Interrupt Register" in hgroup.word 0x48++0x01 hide.word 0x00 "IC_CLR_RX_OVER,Clear RX_OVER Interrupt Register" in hgroup.word 0x4c++0x01 hide.word 0x00 "IC_CLR_TX_OVER,Clear TX_OVER Interrupt Register" in hgroup.word 0x50++0x01 hide.word 0x00 "IC_CLR_RD_REQ,Clear RD_REQ Interrupt Register" in hgroup.word 0x54++0x01 hide.word 0x00 "IC_CLR_TX_ABRT,Clear TX_ABRT Interrupt Register" in hgroup.word 0x58++0x01 hide.word 0x00 "IC_CLR_RX_DONE,Clear RX_DONE Interrupt Register" in hgroup.word 0x5c++0x01 hide.word 0x00 "IC_CLR_ACTIVITY,Clear ACTIVITY Interrupt Register" in hgroup.word 0x60++0x01 hide.word 0x00 "IC_CLR_STOP_DET,Clear STOP_DET Interrupt Register" in hgroup.word 0x64++0x01 hide.word 0x00 "IC_CLR_START_DET,Clear START_DET Interrupt Register" in hgroup.word 0x68++0x01 hide.word 0x00 "IC_CLR_GEN_CALL,Clear GEN_CALL Interrupt Register" in group.word 0x6c++0x01 line.word 0x00 "IC_ENABLE,I2C Enable Register" bitfld.word 0x00 0. " ENABLE ,I2C Controller Enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x70++0x01 else group.word 0x70++0x01 endif line.word 0x00 "IC_STATUS,I2C Status Register" bitfld.word 0x00 6. " SLV_ACTIVITY ,Slave FSM activity status" "Not active,Active" bitfld.word 0x00 5. " MST_ACTIVITY ,Master FSM activity status" "Not active,Active" textline " " bitfld.word 0x00 4. " RFF ,Receive FIFO completely full" "Not full,Full" bitfld.word 0x00 3. " RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.word 0x00 2. " TFE ,Transmit FIFO completely empty" "Not empty,Empty" bitfld.word 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.word 0x00 0. " ACTIVITY ,I2C activity status" "Not active,Active" rgroup.word 0x74++0x01 line.word 0x00 "IC_TXFLR,Transmit FIFO Level Register" bitfld.word 0x00 0.--3. " TXFLR ,Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.word 0x78++0x01 line.word 0x00 "IC_RXFLR,Receive FIFO Level Register" bitfld.word 0x00 0.--3. " RXFLR ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()=="SPEAR320S") group.word 0x7C++0x01 line.word 0x00 "IC_SDA_HOLD,SDA hold time" endif hgroup.word 0x80++0x01 hide.word 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" in sif (cpu()=="SPEAR600") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" elif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" bitfld.word 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x00 0. " RDMAE ,Recive DMA Enable" "Disabled,Enabled" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" hexmask.word.byte 0x00 0.--2. 1. " DMATDL ,Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" hexmask.word.byte 0x00 0.--2. 1. " DMARDL ,Recive data level" endif rgroup.long 0xf4++0x03 line.long 0x00 "IC_COMP_PARAM1,I2C Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH ,Transmission buffer depth" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH ,Receive buffer depth" textline " " sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" else bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" bitfld.long 0x00 6. " HAS_DMA ,DMA interface" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" endif textline " " bitfld.long 0x00 4. " HC_COUNT_VALUES ,CNT register access" "Read/write,Read only" bitfld.long 0x00 2.--3. " MAX_SPEED_MODE ,Maximum operation mode for the I2C Controller" "Reserved,Standard,Fast,High" textline " " bitfld.long 0x00 0.--1. " APB_DATA_WIDTH ,APB data bus width" "8 bits,16 bits,32 bits,?..." rgroup.long 0xf8++0x03 line.long 0x00 "IC_COMP_VERSION,Component Version ID" rgroup.long 0xfc++0x03 line.long 0x00 "IC_COMP_TYPE,DW Component Type" width 0xB endif tree.end sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "I2C1" base asd:0xA7000000 width 18. group.word 0x00++0x01 line.word 0x00 "IC_CON,I2C Control Register" bitfld.word 0x0 6. " IC_SLAVE_DISABLE ,Slave disabled after reset" "No,Yes" bitfld.word 0x0 5. " IC_RESTART_EN ,Enable restart conditions" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " else bitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " endif bitfld.word 0x0 3. " IC_10BITADDR_SLAVE ,Responds to 7 or 10 bit addresses" "7,10" textline " " bitfld.word 0x0 1.--2. " SPEED ,Controls operation speed" "Reserved,Standard,Fast,High" bitfld.word 0x0 0. " MASTER_MODE ,Enable master" "Disabled,Enabled" group.word 0x04++0x01 line.word 0x00 "IC_TAR,I2C Target Address Register" bitfld.word 0x00 12. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" bitfld.word 0x00 11. " SPECIAL ,Perform a general call or start byte I2C command" "Not performed,Performed" textline " " bitfld.word 0x00 10. " GC_OR_START ,General call or start byte I2C command is performed" "General Call,Start Byte" hexmask.word 0x00 0.--9. 1. " IC_TAR ,Target address" if (((data.long(asd:0xA7000000))&0x08)==0x00) group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word.byte 0x00 0.--6. 1. " IC_SAR ,Slave address" else group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word 0x00 0.--9. 1. " IC_SAR ,Slave address" endif group.word 0x0c++0x01 line.word 0x00 "IC_HS_MADDR,I2C high-speed master code Register" bitfld.word 0x00 0.--2. " IC_HS_MAR ,I2C HS mode master code" "0,1,2,3,4,5,6,7" group.word 0x10++0x01 line.word 0x00 "IC_DATA_CMD,I2C data command Register" bitfld.word 0x00 8. " CMD ,Control read or write" "Write,Read" hexmask.word.byte 0x00 0.--7. 1. " DAT ,Data to be transmitted or received on the I2C bus" group.word 0x14++0x01 line.word 0x00 "IC_SS_SCL_HCNT,Standard-Speed I2C Clock SCL High Count Register" group.word 0x18++0x01 line.word 0x00 "IC_SS_SCL_LCNT,Standard-Speed I2C Clock SCL Low Count Register" group.word 0x1c++0x01 line.word 0x00 "IC_FS_SCL_HCNT,Fast-Speed I2C Clock SCL High Count Register" group.word 0x20++0x01 line.word 0x00 "IC_FS_SCL_LCNT,I2C Fast-Speed I2C Clock SCL Low Count Register" group.word 0x24++0x01 line.word 0x00 "IC_HS_SCL_HCNT,I2C High-Speed I2C Clock SCL High Count Register" group.word 0x28++0x01 line.word 0x00 "IC_HS_SCL_LCNT,I2C High-Speed I2C Clock SCL Low Count Register" rgroup.word 0x2c++0x01 line.word 0x00 "IC_INTR_STAT,I2C Interrupt Status Register" bitfld.word 0x00 11. " R_GEN_CALL ,General Call request received interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " R_START_DET ,START condition interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " R_STOP_DET ,STOP condition interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " R_ACTIVITY ,Capture system activity interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " R_RX_DONE ,Transmission done interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " R_TX_ABRT ,Transmission abort interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " R_RD_REQ ,Read request interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " R_TX_EMPTY ,Transmit buffer at threshold value interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " R_TX_OVER ,Transmit buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " R_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " R_RX_OVER ,Receive buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " R_RX_UNDER ,Receive buffer empty interrupt status" "No interrupt,Interrupt" group.word 0x30++0x01 line.word 0x00 "IC_INTR_MASK,I2C Interrupt Mask Register" bitfld.word 0x00 11. " M_GEN_CALL ,General Call request received interrupt mask" "Not masked,Masked" bitfld.word 0x00 10. " M_START_DET ,START condition occurred interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 9. " M_STOP_DET ,STOP condition occurred interrupt mask" "Not masked,Masked" bitfld.word 0x00 8. " M_ACTIVITY ,Capture system activity interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 7. " M_RX_DONE ,Indicates transmission done interrupt mask" "Not masked,Masked" bitfld.word 0x00 6. " M_TX_ABRT ,Indicates transmission abort interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 5. " M_RD_REQ ,Read request interrupt mask" "Not masked,Masked" bitfld.word 0x00 4. " M_TX_EMPTY ,Transmit buffer at threshold value interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 3. " M_TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 2. " M_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 1. " M_RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 0. " M_RX_UNDER ,Receive buffer empty interrupt mask" "Not masked,Masked" rgroup.word 0x34++0x01 line.word 0x00 "IC_RAW_INTR_STAT,I2C Raw Interrupt Status Register" bitfld.word 0x00 11. " GEN_CALL ,General Call request received raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " START_DET ,START condition occurred raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " STOP_DET ,STOP condition occurred raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " ACTIVITY ,Capture system activity raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " RX_DONE ,Indicates transmission done raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " TX_ABRT ,Indicates transmission abort raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " RD_REQ ,Read request raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " TX_EMPTY ,Transmit buffer at threshold value raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " RX_FULL ,Transmit buffer reach RX_TL threshold raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " RX_UNDER ,Receive buffer empty raw interrupt status" "No interrupt,Interrupt" group.word 0x38++0x01 line.word 0x00 "IC_RX_TL,I2C Receive FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " RX_TL ,RX_FULL interrupt threshold" group.word 0x3c++0x01 line.word 0x00 "IC_TX_TL,I2C Transmit FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " TX_TL ,TX_EMPTY interrupt threshold" hgroup.word 0x40++0x01 hide.word 0x00 "IC_CLR_INTR,I2C Clear Combined and Individual Interrupts Register" in hgroup.word 0x44++0x01 hide.word 0x00 "IC_CLR_RX_UNDER,Clear RX_UNDER Interrupt Register" in hgroup.word 0x48++0x01 hide.word 0x00 "IC_CLR_RX_OVER,Clear RX_OVER Interrupt Register" in hgroup.word 0x4c++0x01 hide.word 0x00 "IC_CLR_TX_OVER,Clear TX_OVER Interrupt Register" in hgroup.word 0x50++0x01 hide.word 0x00 "IC_CLR_RD_REQ,Clear RD_REQ Interrupt Register" in hgroup.word 0x54++0x01 hide.word 0x00 "IC_CLR_TX_ABRT,Clear TX_ABRT Interrupt Register" in hgroup.word 0x58++0x01 hide.word 0x00 "IC_CLR_RX_DONE,Clear RX_DONE Interrupt Register" in hgroup.word 0x5c++0x01 hide.word 0x00 "IC_CLR_ACTIVITY,Clear ACTIVITY Interrupt Register" in hgroup.word 0x60++0x01 hide.word 0x00 "IC_CLR_STOP_DET,Clear STOP_DET Interrupt Register" in hgroup.word 0x64++0x01 hide.word 0x00 "IC_CLR_START_DET,Clear START_DET Interrupt Register" in hgroup.word 0x68++0x01 hide.word 0x00 "IC_CLR_GEN_CALL,Clear GEN_CALL Interrupt Register" in group.word 0x6c++0x01 line.word 0x00 "IC_ENABLE,I2C Enable Register" bitfld.word 0x00 0. " ENABLE ,I2C Controller Enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x70++0x01 else group.word 0x70++0x01 endif line.word 0x00 "IC_STATUS,I2C Status Register" bitfld.word 0x00 6. " SLV_ACTIVITY ,Slave FSM activity status" "Not active,Active" bitfld.word 0x00 5. " MST_ACTIVITY ,Master FSM activity status" "Not active,Active" textline " " bitfld.word 0x00 4. " RFF ,Receive FIFO completely full" "Not full,Full" bitfld.word 0x00 3. " RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.word 0x00 2. " TFE ,Transmit FIFO completely empty" "Not empty,Empty" bitfld.word 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.word 0x00 0. " ACTIVITY ,I2C activity status" "Not active,Active" rgroup.word 0x74++0x01 line.word 0x00 "IC_TXFLR,Transmit FIFO Level Register" bitfld.word 0x00 0.--3. " TXFLR ,Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.word 0x78++0x01 line.word 0x00 "IC_RXFLR,Receive FIFO Level Register" bitfld.word 0x00 0.--3. " RXFLR ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()=="SPEAR320S") group.word 0x7C++0x01 line.word 0x00 "IC_SDA_HOLD,SDA hold time" endif hgroup.word 0x80++0x01 hide.word 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" in sif (cpu()=="SPEAR600") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" elif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" bitfld.word 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x00 0. " RDMAE ,Recive DMA Enable" "Disabled,Enabled" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" hexmask.word.byte 0x00 0.--2. 1. " DMATDL ,Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" hexmask.word.byte 0x00 0.--2. 1. " DMARDL ,Recive data level" endif rgroup.long 0xf4++0x03 line.long 0x00 "IC_COMP_PARAM1,I2C Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH ,Transmission buffer depth" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH ,Receive buffer depth" textline " " sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" else bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" bitfld.long 0x00 6. " HAS_DMA ,DMA interface" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" endif textline " " bitfld.long 0x00 4. " HC_COUNT_VALUES ,CNT register access" "Read/write,Read only" bitfld.long 0x00 2.--3. " MAX_SPEED_MODE ,Maximum operation mode for the I2C Controller" "Reserved,Standard,Fast,High" textline " " bitfld.long 0x00 0.--1. " APB_DATA_WIDTH ,APB data bus width" "8 bits,16 bits,32 bits,?..." rgroup.long 0xf8++0x03 line.long 0x00 "IC_COMP_VERSION,Component Version ID" rgroup.long 0xfc++0x03 line.long 0x00 "IC_COMP_TYPE,DW Component Type" width 0xB tree.end sif (cpu()=="SPEAR320S") tree "I2C2" base asd:0xA9000000 width 18. group.word 0x00++0x01 line.word 0x00 "IC_CON,I2C Control Register" bitfld.word 0x0 6. " IC_SLAVE_DISABLE ,Slave disabled after reset" "No,Yes" bitfld.word 0x0 5. " IC_RESTART_EN ,Enable restart conditions" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " else bitfld.word 0x0 4. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" textline " " endif bitfld.word 0x0 3. " IC_10BITADDR_SLAVE ,Responds to 7 or 10 bit addresses" "7,10" textline " " bitfld.word 0x0 1.--2. " SPEED ,Controls operation speed" "Reserved,Standard,Fast,High" bitfld.word 0x0 0. " MASTER_MODE ,Enable master" "Disabled,Enabled" group.word 0x04++0x01 line.word 0x00 "IC_TAR,I2C Target Address Register" bitfld.word 0x00 12. " IC_10BITADDR_MASTER ,10-bit addressing mode" "7,10" bitfld.word 0x00 11. " SPECIAL ,Perform a general call or start byte I2C command" "Not performed,Performed" textline " " bitfld.word 0x00 10. " GC_OR_START ,General call or start byte I2C command is performed" "General Call,Start Byte" hexmask.word 0x00 0.--9. 1. " IC_TAR ,Target address" if (((data.long(asd:0xA9000000))&0x08)==0x00) group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word.byte 0x00 0.--6. 1. " IC_SAR ,Slave address" else group.word 0x08++0x01 line.word 0x00 "IC_SAR,I2C slave Address Register" hexmask.word 0x00 0.--9. 1. " IC_SAR ,Slave address" endif group.word 0x0c++0x01 line.word 0x00 "IC_HS_MADDR,I2C high-speed master code Register" bitfld.word 0x00 0.--2. " IC_HS_MAR ,I2C HS mode master code" "0,1,2,3,4,5,6,7" group.word 0x10++0x01 line.word 0x00 "IC_DATA_CMD,I2C data command Register" bitfld.word 0x00 8. " CMD ,Control read or write" "Write,Read" hexmask.word.byte 0x00 0.--7. 1. " DAT ,Data to be transmitted or received on the I2C bus" group.word 0x14++0x01 line.word 0x00 "IC_SS_SCL_HCNT,Standard-Speed I2C Clock SCL High Count Register" group.word 0x18++0x01 line.word 0x00 "IC_SS_SCL_LCNT,Standard-Speed I2C Clock SCL Low Count Register" group.word 0x1c++0x01 line.word 0x00 "IC_FS_SCL_HCNT,Fast-Speed I2C Clock SCL High Count Register" group.word 0x20++0x01 line.word 0x00 "IC_FS_SCL_LCNT,I2C Fast-Speed I2C Clock SCL Low Count Register" group.word 0x24++0x01 line.word 0x00 "IC_HS_SCL_HCNT,I2C High-Speed I2C Clock SCL High Count Register" group.word 0x28++0x01 line.word 0x00 "IC_HS_SCL_LCNT,I2C High-Speed I2C Clock SCL Low Count Register" rgroup.word 0x2c++0x01 line.word 0x00 "IC_INTR_STAT,I2C Interrupt Status Register" bitfld.word 0x00 11. " R_GEN_CALL ,General Call request received interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " R_START_DET ,START condition interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " R_STOP_DET ,STOP condition interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " R_ACTIVITY ,Capture system activity interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " R_RX_DONE ,Transmission done interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " R_TX_ABRT ,Transmission abort interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " R_RD_REQ ,Read request interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " R_TX_EMPTY ,Transmit buffer at threshold value interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " R_TX_OVER ,Transmit buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " R_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " R_RX_OVER ,Receive buffer filled interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " R_RX_UNDER ,Receive buffer empty interrupt status" "No interrupt,Interrupt" group.word 0x30++0x01 line.word 0x00 "IC_INTR_MASK,I2C Interrupt Mask Register" bitfld.word 0x00 11. " M_GEN_CALL ,General Call request received interrupt mask" "Not masked,Masked" bitfld.word 0x00 10. " M_START_DET ,START condition occurred interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 9. " M_STOP_DET ,STOP condition occurred interrupt mask" "Not masked,Masked" bitfld.word 0x00 8. " M_ACTIVITY ,Capture system activity interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 7. " M_RX_DONE ,Indicates transmission done interrupt mask" "Not masked,Masked" bitfld.word 0x00 6. " M_TX_ABRT ,Indicates transmission abort interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 5. " M_RD_REQ ,Read request interrupt mask" "Not masked,Masked" bitfld.word 0x00 4. " M_TX_EMPTY ,Transmit buffer at threshold value interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 3. " M_TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 2. " M_RX_FULL ,Transmit buffer reach RX_TL threshold interrupt mask" "Not masked,Masked" textline " " bitfld.word 0x00 1. " M_RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH interrupt mask" "Not masked,Masked" bitfld.word 0x00 0. " M_RX_UNDER ,Receive buffer empty interrupt mask" "Not masked,Masked" rgroup.word 0x34++0x01 line.word 0x00 "IC_RAW_INTR_STAT,I2C Raw Interrupt Status Register" bitfld.word 0x00 11. " GEN_CALL ,General Call request received raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 10. " START_DET ,START condition occurred raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " STOP_DET ,STOP condition occurred raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " ACTIVITY ,Capture system activity raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 7. " RX_DONE ,Indicates transmission done raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " TX_ABRT ,Indicates transmission abort raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " RD_REQ ,Read request raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 4. " TX_EMPTY ,Transmit buffer at threshold value raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " TX_OVER ,Transmit buffer filled to IC_TX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 2. " RX_FULL ,Transmit buffer reach RX_TL threshold raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " RX_OVER ,Receive buffer filled to IC_RX_BUFFER_DEPTH raw interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " RX_UNDER ,Receive buffer empty raw interrupt status" "No interrupt,Interrupt" group.word 0x38++0x01 line.word 0x00 "IC_RX_TL,I2C Receive FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " RX_TL ,RX_FULL interrupt threshold" group.word 0x3c++0x01 line.word 0x00 "IC_TX_TL,I2C Transmit FIFO Threshold Register" hexmask.word.byte 0x00 0.--7. 1. " TX_TL ,TX_EMPTY interrupt threshold" hgroup.word 0x40++0x01 hide.word 0x00 "IC_CLR_INTR,I2C Clear Combined and Individual Interrupts Register" in hgroup.word 0x44++0x01 hide.word 0x00 "IC_CLR_RX_UNDER,Clear RX_UNDER Interrupt Register" in hgroup.word 0x48++0x01 hide.word 0x00 "IC_CLR_RX_OVER,Clear RX_OVER Interrupt Register" in hgroup.word 0x4c++0x01 hide.word 0x00 "IC_CLR_TX_OVER,Clear TX_OVER Interrupt Register" in hgroup.word 0x50++0x01 hide.word 0x00 "IC_CLR_RD_REQ,Clear RD_REQ Interrupt Register" in hgroup.word 0x54++0x01 hide.word 0x00 "IC_CLR_TX_ABRT,Clear TX_ABRT Interrupt Register" in hgroup.word 0x58++0x01 hide.word 0x00 "IC_CLR_RX_DONE,Clear RX_DONE Interrupt Register" in hgroup.word 0x5c++0x01 hide.word 0x00 "IC_CLR_ACTIVITY,Clear ACTIVITY Interrupt Register" in hgroup.word 0x60++0x01 hide.word 0x00 "IC_CLR_STOP_DET,Clear STOP_DET Interrupt Register" in hgroup.word 0x64++0x01 hide.word 0x00 "IC_CLR_START_DET,Clear START_DET Interrupt Register" in hgroup.word 0x68++0x01 hide.word 0x00 "IC_CLR_GEN_CALL,Clear GEN_CALL Interrupt Register" in group.word 0x6c++0x01 line.word 0x00 "IC_ENABLE,I2C Enable Register" bitfld.word 0x00 0. " ENABLE ,I2C Controller Enable" "Disabled,Enabled" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.word 0x70++0x01 else group.word 0x70++0x01 endif line.word 0x00 "IC_STATUS,I2C Status Register" bitfld.word 0x00 6. " SLV_ACTIVITY ,Slave FSM activity status" "Not active,Active" bitfld.word 0x00 5. " MST_ACTIVITY ,Master FSM activity status" "Not active,Active" textline " " bitfld.word 0x00 4. " RFF ,Receive FIFO completely full" "Not full,Full" bitfld.word 0x00 3. " RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.word 0x00 2. " TFE ,Transmit FIFO completely empty" "Not empty,Empty" bitfld.word 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.word 0x00 0. " ACTIVITY ,I2C activity status" "Not active,Active" rgroup.word 0x74++0x01 line.word 0x00 "IC_TXFLR,Transmit FIFO Level Register" bitfld.word 0x00 0.--3. " TXFLR ,Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.word 0x78++0x01 line.word 0x00 "IC_RXFLR,Receive FIFO Level Register" bitfld.word 0x00 0.--3. " RXFLR ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()=="SPEAR320S") group.word 0x7C++0x01 line.word 0x00 "IC_SDA_HOLD,SDA hold time" endif hgroup.word 0x80++0x01 hide.word 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" in sif (cpu()=="SPEAR600") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" elif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.word 0x88++0x01 line.word 0x00 "IC_DMA_CR,DAM Control Register" bitfld.word 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x00 0. " RDMAE ,Recive DMA Enable" "Disabled,Enabled" group.word 0x8c++0x01 line.word 0x00 "IC_DMA_TDLR,DMA Transmit data level" hexmask.word.byte 0x00 0.--2. 1. " DMATDL ,Transmit data level" group.word 0x90++0x01 line.word 0x00 "IC_DMA_RDLR,DMA Receive data level" hexmask.word.byte 0x00 0.--2. 1. " DMARDL ,Recive data level" endif rgroup.long 0xf4++0x03 line.long 0x00 "IC_COMP_PARAM1,I2C Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH ,Transmission buffer depth" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH ,Receive buffer depth" textline " " sif (cpu()=="SPEAR600"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" else bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,Add encoded parameters" "Not Added,Added" bitfld.long 0x00 6. " HAS_DMA ,DMA interface" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INTR_IO ,Interrupt output port" "Separate outputs,Common output" endif textline " " bitfld.long 0x00 4. " HC_COUNT_VALUES ,CNT register access" "Read/write,Read only" bitfld.long 0x00 2.--3. " MAX_SPEED_MODE ,Maximum operation mode for the I2C Controller" "Reserved,Standard,Fast,High" textline " " bitfld.long 0x00 0.--1. " APB_DATA_WIDTH ,APB data bus width" "8 bits,16 bits,32 bits,?..." rgroup.long 0xf8++0x03 line.long 0x00 "IC_COMP_VERSION,Component Version ID" rgroup.long 0xfc++0x03 line.long 0x00 "IC_COMP_TYPE,DW Component Type" width 0xB tree.end endif endif tree.end tree "DMAC (DMA Controller)" base asd:0xFC400000 width 19. tree "Common Registers" rgroup.long 0x0++0x07 line.long 0x0 "DMACINTSTAT,Interrupt Status Register" bitfld.long 0x0 7. " IS7 ,Interrupt Status After Masking 7" "No interrupt,Interrupt" bitfld.long 0x0 6. " IS6 ,Interrupt Status After Masking 6" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " IS5 ,Interrupt Status After Masking 5" "No interrupt,Interrupt" bitfld.long 0x0 4. " IS4 ,Interrupt Status After Masking 4" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " IS3 ,Interrupt Status After Masking 3" "No interrupt,Interrupt" bitfld.long 0x0 2. " IS2 ,Interrupt Status After Masking 2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " IS1 ,Interrupt Status After Masking 1" "No interrupt,Interrupt" bitfld.long 0x0 0. " IS0 ,Interrupt Status After Masking 0" "No interrupt,Interrupt" line.long 0x4 "DMACINTTCSTAT,Terminal Count Interrupt Status Register" bitfld.long 0x4 7. " ITCS7 ,Terminal Count Interrupt Status After Masking 7" "No interrupt,Interrupt" bitfld.long 0x4 6. " ITCS6 ,Terminal Count Interrupt Status After Masking 6" "No interrupt,Interrupt" textline " " bitfld.long 0x4 5. " ITCS5 ,Terminal Count Interrupt Status After Masking 5" "No interrupt,Interrupt" bitfld.long 0x4 4. " ITCS4 ,Terminal Count Interrupt Status After Masking 4" "No interrupt,Interrupt" textline " " bitfld.long 0x4 3. " ITCS3 ,Terminal Count Interrupt Status After Masking 3" "No interrupt,Interrupt" bitfld.long 0x4 2. " ITCS2 ,Terminal Count Interrupt Status After Masking 2" "No interrupt,Interrupt" textline " " bitfld.long 0x4 1. " ITCS1 ,Terminal Count Interrupt Status After Masking 1" "No interrupt,Interrupt" bitfld.long 0x4 0. " ITCS0 ,Terminal Count Interrupt Status After Masking 0" "No interrupt,Interrupt" wgroup.long 0x8++0x03 line.long 0x0 "DMACINTTCCLR,Terminal Count Interrupt Clear Register" bitfld.long 0x0 7. " ITCC7 ,Terminal Count Interrupt Clear 7" "No effect,Clear" bitfld.long 0x0 6. " ITCC6 ,Terminal Count Interrupt Clear 6" "No effect,Clear" textline " " bitfld.long 0x0 5. " ITCC5 ,Terminal Count Interrupt Clear 5" "No effect,Clear" bitfld.long 0x0 4. " ITCC4 ,Terminal Count Interrupt Clear 4" "No effect,Clear" textline " " bitfld.long 0x0 3. " ITCC3 ,Terminal Count Interrupt Clear 3" "No effect,Clear" bitfld.long 0x0 2. " ITCC2 ,Terminal Count Interrupt Clear 2" "No effect,Clear" textline " " bitfld.long 0x0 1. " ITCC1 ,Terminal Count Interrupt Clear 1" "No effect,Clear" bitfld.long 0x0 0. " ITCC0 ,Terminal Count Interrupt Clear 0" "No effect,Clear" rgroup.long 0xC++0x03 line.long 0x0 "DMACINTERRSTAT,Error Interrupt Status Register" bitfld.long 0x0 7. " IES7 ,Error Interrupt Status After Masking 7" "No interrupt,Interrupt" bitfld.long 0x0 6. " IES6 ,Error Interrupt Status After Masking 6" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " IES5 ,Error Interrupt Status After Masking 5" "No interrupt,Interrupt" bitfld.long 0x0 4. " IES4 ,Error Interrupt Status After Masking 4" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " IES3 ,Error Interrupt Status After Masking 3" "No interrupt,Interrupt" bitfld.long 0x0 2. " IES2 ,Error Interrupt Status After Masking 2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " IES1 ,Error Interrupt Status After Masking 1" "No interrupt,Interrupt" bitfld.long 0x0 0. " IES0 ,Error Interrupt Status After Masking 0" "No interrupt,Interrupt" wgroup.long 0x10++0x03 line.long 0x0 "DMACINTERRCLR,Error Interrupt Clear Register" bitfld.long 0x0 7. " IEC7 ,Error Interrupt Clear 7" "No effect,Clear" bitfld.long 0x0 6. " IEC6 ,Error Interrupt Clear 6" "No effect,Clear" textline " " bitfld.long 0x0 5. " IEC5 ,Error Interrupt Clear 5" "No effect,Clear" bitfld.long 0x0 4. " IEC4 ,Error Interrupt Clear 4" "No effect,Clear" textline " " bitfld.long 0x0 3. " IEC3 ,Error Interrupt Clear 3" "No effect,Clear" bitfld.long 0x0 2. " IEC2 ,Error Interrupt Clear 2" "No effect,Clear" textline " " bitfld.long 0x0 1. " IEC1 ,Error Interrupt Clear 1" "No effect,Clear" bitfld.long 0x0 0. " IEC0 ,Error Interrupt Clear 0" "No effect,Clear" rgroup.long 0x14++0x03 line.long 0x0 "DMACRAWINTTCSTAT,Terminal Count Raw Interrupt Status Register" bitfld.long 0x0 7. " RITCS7 ,Terminal Count Raw Interrupt Status 7" "No interrupt,Interrupt" bitfld.long 0x0 6. " RITCS6 ,Terminal Count Raw Interrupt Status 6" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " RITCS5 ,Terminal Count Raw Interrupt Status 5" "No interrupt,Interrupt" bitfld.long 0x0 4. " RITCS4 ,Terminal Count Raw Interrupt Status 4" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " RITCS3 ,Terminal Count Raw Interrupt Status 3" "No interrupt,Interrupt" bitfld.long 0x0 2. " RITCS2 ,Terminal Count Raw Interrupt Status 2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " RITCS1 ,Terminal Count Raw Interrupt Status 1" "No interrupt,Interrupt" bitfld.long 0x0 0. " RITCS0 ,Terminal Count Raw Interrupt Status 0" "No interrupt,Interrupt" rgroup.long 0x18++0x03 line.long 0x0 "DMACRAWINTERRSTAT,Error Raw Interrupt Status Register" bitfld.long 0x0 7. " RIES7 ,Error Raw Interrupt Status 7" "No interrupt,Interrupt" bitfld.long 0x0 6. " RIES6 ,Error Raw Interrupt Status 6" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " RIES5 ,Error Raw Interrupt Status 5" "No interrupt,Interrupt" bitfld.long 0x0 4. " RIES4 ,Error Raw Interrupt Status 4" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " RIES3 ,Error Raw Interrupt Status 3" "No interrupt,Interrupt" bitfld.long 0x0 2. " RIES2 ,Error Raw Interrupt Status 2" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " RIES1 ,Error Raw Interrupt Status 1" "No interrupt,Interrupt" bitfld.long 0x0 0. " RIES0 ,Error Raw Interrupt Status 0" "No interrupt,Interrupt" rgroup.long 0x1C++0x03 line.long 0x0 "DMACENCHSTAT,Enabled Channel Status Register" bitfld.long 0x0 7. " ENCS7 ,Enabled Channel Status 7" "Disabled,Enabled" bitfld.long 0x0 6. " ENCS6 ,Enabled Channel Status 6" "Disabled,Enabled" textline " " bitfld.long 0x0 5. " ENCS5 ,Enabled Channel Status 5" "Disabled,Enabled" bitfld.long 0x0 4. " ENCS4 ,Enabled Channel Status 4" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " ENCS3 ,Enabled Channel Status 3" "Disabled,Enabled" bitfld.long 0x0 2. " ENCS2 ,Enabled Channel Status 2" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " ENCS1 ,Enabled Channel Status 1" "Disabled,Enabled" bitfld.long 0x0 0. " ENCS0 ,Enabled Channel Status 0" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x0 "DMACSOFTBREQ,Software Burst Request Register" bitfld.long 0x0 15. " SBR15 ,Software Burst Request for Source 15" "No effect,Generated" bitfld.long 0x0 14. " SBR14 ,Software Burst Request for Source 14" "No effect,Generated" textline " " bitfld.long 0x0 13. " SBR13 ,Software Burst Request for Source 13" "No effect,Generated" bitfld.long 0x0 12. " SBR12 ,Software Burst Request for Source 12" "No effect,Generated" textline " " bitfld.long 0x0 11. " SBR11 ,Software Burst Request for Source 11" "No effect,Generated" bitfld.long 0x0 10. " SBR10 ,Software Burst Request for Source 10" "No effect,Generated" textline " " bitfld.long 0x0 9. " SBR9 ,Software Burst Request for Source 9" "No effect,Generated" bitfld.long 0x0 8. " SBR8 ,Software Burst Request for Source 8" "No effect,Generated" textline " " bitfld.long 0x0 7. " SBR7 ,Software Burst Request for Source 7" "No effect,Generated" bitfld.long 0x0 6. " SBR6 ,Software Burst Request for Source 6" "No effect,Generated" textline " " bitfld.long 0x0 5. " SBR5 ,Software Burst Request for Source 5" "No effect,Generated" bitfld.long 0x0 4. " SBR4 ,Software Burst Request for Source 4" "No effect,Generated" textline " " bitfld.long 0x0 3. " SBR3 ,Software Burst Request for Source 3" "No effect,Generated" bitfld.long 0x0 2. " SBR2 ,Software Burst Request for Source 2" "No effect,Generated" textline " " bitfld.long 0x0 1. " SBR1 ,Software Burst Request for Source 1" "No effect,Generated" bitfld.long 0x0 0. " SBR0 ,Software Burst Request for Source 0" "No effect,Generated" group.long 0x24++0x03 line.long 0x0 "DMACSOFTSREQ,Software Single Request Register" bitfld.long 0x0 15. " SSR15 ,Software Single Request for Source 15" "No effect,Generated" bitfld.long 0x0 14. " SSR14 ,Software Single Request for Source 14" "No effect,Generated" textline " " bitfld.long 0x0 13. " SSR13 ,Software Single Request for Source 13" "No effect,Generated" bitfld.long 0x0 12. " SSR12 ,Software Single Request for Source 12" "No effect,Generated" textline " " bitfld.long 0x0 11. " SSR11 ,Software Single Request for Source 11" "No effect,Generated" bitfld.long 0x0 10. " SSR10 ,Software Single Request for Source 10" "No effect,Generated" textline " " bitfld.long 0x0 9. " SSR9 ,Software Single Request for Source 9" "No effect,Generated" bitfld.long 0x0 8. " SSR8 ,Software Single Request for Source 8" "No effect,Generated" textline " " bitfld.long 0x0 7. " SSR7 ,Software Single Request for Source 7" "No effect,Generated" bitfld.long 0x0 6. " SSR6 ,Software Single Request for Source 6" "No effect,Generated" textline " " bitfld.long 0x0 5. " SSR5 ,Software Single Request for Source 5" "No effect,Generated" bitfld.long 0x0 4. " SSR4 ,Software Single Request for Source 4" "No effect,Generated" textline " " bitfld.long 0x0 3. " SSR3 ,Software Single Request for Source 3" "No effect,Generated" bitfld.long 0x0 2. " SSR2 ,Software Single Request for Source 2" "No effect,Generated" textline " " bitfld.long 0x0 1. " SSR1 ,Software Single Request for Source 1" "No effect,Generated" bitfld.long 0x0 0. " SSR0 ,Software Single Request for Source 0" "No effect,Generated" group.long 0x28++0x03 line.long 0x0 "DMACSOFTLBREQ,Software Last Burst Request Register" bitfld.long 0x0 15. " SLB15 ,Software Last Burst Request for Source 15" "No effect,Generated" bitfld.long 0x0 14. " SLB14 ,Software Last Burst Request for Source 14" "No effect,Generated" textline " " bitfld.long 0x0 13. " SLB13 ,Software Last Burst Request for Source 13" "No effect,Generated" bitfld.long 0x0 12. " SLB12 ,Software Last Burst Request for Source 12" "No effect,Generated" textline " " bitfld.long 0x0 11. " SLB11 ,Software Last Burst Request for Source 11" "No effect,Generated" bitfld.long 0x0 10. " SLB10 ,Software Last Burst Request for Source 10" "No effect,Generated" textline " " bitfld.long 0x0 9. " SLB9 ,Software Last Burst Request for Source 9" "No effect,Generated" bitfld.long 0x0 8. " SLB8 ,Software Last Burst Request for Source 8" "No effect,Generated" textline " " bitfld.long 0x0 7. " SLB7 ,Software Last Burst Request for Source 7" "No effect,Generated" bitfld.long 0x0 6. " SLB6 ,Software Last Burst Request for Source 6" "No effect,Generated" textline " " bitfld.long 0x0 5. " SLB5 ,Software Last Burst Request for Source 5" "No effect,Generated" bitfld.long 0x0 4. " SLB4 ,Software Last Burst Request for Source 4" "No effect,Generated" textline " " bitfld.long 0x0 3. " SLB3 ,Software Last Burst Request for Source 3" "No effect,Generated" bitfld.long 0x0 2. " SLB2 ,Software Last Burst Request for Source 2" "No effect,Generated" textline " " bitfld.long 0x0 1. " SLB1 ,Software Last Burst Request for Source 1" "No effect,Generated" textline " " bitfld.long 0x0 0. " SLB0 ,Software Last Burst Request for Source 0" "No effect,Generated" group.long 0x2C++0x03 line.long 0x0 "DMACSOFTLSREQ,Software Last Single Request Register" bitfld.long 0x0 15. " SLS15 ,Software Last Single Request for Source 15" "No effect,Generated" bitfld.long 0x0 14. " SLS14 ,Software Last Single Request for Source 14" "No effect,Generated" textline " " bitfld.long 0x0 13. " SLS13 ,Software Last Single Request for Source 13" "No effect,Generated" bitfld.long 0x0 12. " SLS12 ,Software Last Single Request for Source 12" "No effect,Generated" textline " " bitfld.long 0x0 11. " SLS11 ,Software Last Single Request for Source 11" "No effect,Generated" bitfld.long 0x0 10. " SLS10 ,Software Last Single Request for Source 10" "No effect,Generated" textline " " bitfld.long 0x0 9. " SLS9 ,Software Last Single Request for Source 9" "No effect,Generated" bitfld.long 0x0 8. " SLS8 ,Software Last Single Request for Source 8" "No effect,Generated" textline " " bitfld.long 0x0 7. " SLS7 ,Software Last Single Request for Source 7" "No effect,Generated" textline " " bitfld.long 0x0 6. " SLS6 ,Software Last Single Request for Source 6" "No effect,Generated" textline " " bitfld.long 0x0 5. " SLS5 ,Software Last Single Request for Source 5" "No effect,Generated" bitfld.long 0x0 4. " SLS4 ,Software Last Single Request for Source 4" "No effect,Generated" textline " " bitfld.long 0x0 3. " SLS3 ,Software Last Single Request for Source 3" "No effect,Generated" bitfld.long 0x0 2. " SLS2 ,Software Last Single Request for Source 2" "No effect,Generated" textline " " bitfld.long 0x0 1. " SLS1 ,Software Last Single Request for Source 1" "No effect,Generated" bitfld.long 0x0 0. " SLS0 ,Software Last Single Request for Source 0" "No effect,Generated" group.long 0x30++0x03 line.long 0x0 "DMACCONFIG,Configuration Register" bitfld.long 0x0 2. " M2 ,AHB master 2 endianness configuration" "Little-endian,Big-endian" bitfld.long 0x0 1. " M1 ,AHB master 1 endianness configuration" "Little-endian,Big-endian" textline " " bitfld.long 0x0 0. " EN ,DMA Controller Enable" "Disabled,Enabled" group.long 0x34++0x03 line.long 0x0 "DMACSYNC,Synchronization Register" bitfld.long 0x0 15. " SYNC15 ,Synchronization Disable 15" "No,Yes" bitfld.long 0x0 14. " SYNC14 ,Synchronization Disable 14" "No,Yes" textline " " bitfld.long 0x0 13. " SYNC13 ,Synchronization Disable 13" "No,Yes" bitfld.long 0x0 12. " SYNC12 ,Synchronization Disable 12" "No,Yes" textline " " bitfld.long 0x0 11. " SYNC11 ,Synchronization Disable 11" "No,Yes" bitfld.long 0x0 10. " SYNC10 ,Synchronization Disable 10" "No,Yes" textline " " bitfld.long 0x0 9. " SYNC9 ,Synchronization Disable 9" "No,Yes" bitfld.long 0x0 8. " SYNC8 ,Synchronization Disable 8" "No,Yes" textline " " bitfld.long 0x0 7. " SYNC7 ,Synchronization Disable 7" "No,Yes" bitfld.long 0x0 6. " SYNC6 ,Synchronization Disable 6" "No,Yes" textline " " bitfld.long 0x0 5. " SYNC5 ,Synchronization Disable 5" "No,Yes" bitfld.long 0x0 4. " SYNC4 ,Synchronization Disable 4" "No,Yes" textline " " bitfld.long 0x0 3. " SYNC3 ,Synchronization Disable 3" "No,Yes" bitfld.long 0x0 2. " SYNC2 ,Synchronization Disable 2" "No,Yes" textline " " bitfld.long 0x0 1. " SYNC1 ,Synchronization Disable 1" "No,Yes" bitfld.long 0x0 0. " SYNC0 ,Synchronization Disable 0" "No,Yes" tree.end tree "Channel Registers" tree "Channel 0" group.long 0x100++0x13 line.long 0x0 "DMACC0SRCADDR,Channel Source Address Register 0" line.long 0x4 "DMACC0DESTADDR,Channel Destination Address Register 0" line.long 0x8 "DMACC0LLI,Channel Linked List Item Register 0" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 0" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC0CONTROL,Channel Control Register 0" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC0CONFIG,Channel Configuration Register 0" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 1" group.long 0x120++0x13 line.long 0x0 "DMACC1SRCADDR,Channel Source Address Register 1" line.long 0x4 "DMACC1DESTADDR,Channel Destination Address Register 1" line.long 0x8 "DMACC1LLI,Channel Linked List Item Register 1" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 1" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC1CONTROL,Channel Control Register 1" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC1CONFIG,Channel Configuration Register 1" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 2" group.long 0x140++0x13 line.long 0x0 "DMACC2SRCADDR,Channel Source Address Register 2" line.long 0x4 "DMACC2DESTADDR,Channel Destination Address Register 2" line.long 0x8 "DMACC2LLI,Channel Linked List Item Register 2" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 2" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC2CONTROL,Channel Control Register 2" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC2CONFIG,Channel Configuration Register 2" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 3" group.long 0x160++0x13 line.long 0x0 "DMACC3SRCADDR,Channel Source Address Register 3" line.long 0x4 "DMACC3DESTADDR,Channel Destination Address Register 3" line.long 0x8 "DMACC3LLI,Channel Linked List Item Register 3" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 3" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC3CONTROL,Channel Control Register 3" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC3CONFIG,Channel Configuration Register 3" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 4" group.long 0x180++0x13 line.long 0x0 "DMACC4SRCADDR,Channel Source Address Register 4" line.long 0x4 "DMACC4DESTADDR,Channel Destination Address Register 4" line.long 0x8 "DMACC4LLI,Channel Linked List Item Register 4" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 4" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC4CONTROL,Channel Control Register 4" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC4CONFIG,Channel Configuration Register 4" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 5" group.long 0x1A0++0x13 line.long 0x0 "DMACC5SRCADDR,Channel Source Address Register 5" line.long 0x4 "DMACC5DESTADDR,Channel Destination Address Register 5" line.long 0x8 "DMACC5LLI,Channel Linked List Item Register 5" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 5" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC5CONTROL,Channel Control Register 5" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC5CONFIG,Channel Configuration Register 5" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 6" group.long 0x1C0++0x13 line.long 0x0 "DMACC6SRCADDR,Channel Source Address Register 6" line.long 0x4 "DMACC6DESTADDR,Channel Destination Address Register 6" line.long 0x8 "DMACC6LLI,Channel Linked List Item Register 6" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 6" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC6CONTROL,Channel Control Register 6" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC6CONFIG,Channel Configuration Register 6" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "Channel 7" group.long 0x1E0++0x13 line.long 0x0 "DMACC7SRCADDR,Channel Source Address Register 7" line.long 0x4 "DMACC7DESTADDR,Channel Destination Address Register 7" line.long 0x8 "DMACC7LLI,Channel Linked List Item Register 7" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 7" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0xC "DMACC7CONTROL,Channel Control Register 7" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "DMACC7CONFIG,Channel Configuration Register 7" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " else bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " endif bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree.end rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Identifies the peripheral" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,Identifies the peripheral" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,Configuration option of the peripheral" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end sif (cpu()!="SPEAR310") tree "SDIO Controller" base asd:0x70000000 width 15. group.long 0x00++0x03 line.long 0x00 "SDMASYSADDR,SDMA system address register" group.word 0x04++0x03 line.word 0x00 "BLKSIZE,Block size register" bitfld.word 0x00 12.--14. " HSDMABSIZE ,Size of contiguous buffer in the system memory" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB" hexmask.word 0x00 0.--11. 1. " TBKSIZE ,Block size for block data transfers for CMD17/CMD18/CMD24/CMD25/CMD53" line.word 0x02 "BLKCNT,Block count register" group.long 0x08++0x03 line.long 0x00 "CMDARG,Command argument register" group.word 0x0c++0x03 line.word 0x00 "TRMODE,Transfer mode register" bitfld.word 0x00 7. " SPIMODE ,SPI mode enable" "SD,SPI" bitfld.word 0x00 5. " MSBLKSEL ,Multiple block DAT line data transfers enable" "Single,Multiple" bitfld.word 0x00 4. " DTDIRSEL ,Direction of DAT line data transfers" "Write,Read" textline " " bitfld.word 0x00 2. " ACMD12EN ,Multiple block transfers for memory require CMD12 to stop the transaction" "Disabled,Enabled" bitfld.word 0x00 1. " BLKCNTEN ,Block count register enable" "Disabled,Enabled" bitfld.word 0x00 0. " DMAEN ,DMA enabled" "Disabled,Enabled" line.word 0x02 "CMD,Command register" bitfld.word 0x02 8.--13. " CMDINDEX ,CMD Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x02 6.--7. " CMDTYPE ,Types of special commands" "Normal,Suspend,Resume,Abort" textline " " bitfld.word 0x02 5. " DPSEL ,Data Present" "No Data,Data Present" bitfld.word 0x02 4. " IDXCKEN ,Inex Check Enable" "Disabled,Enabled" textline " " bitfld.word 0x02 3. " CRCCKEN ,CRC Check Enable" "Disabled,Enabled" bitfld.word 0x02 0.--1. " RESTYPESEL ,Response Type Select" "No Response,136,48,48 check Busy" if (((data.word(asd:0x70000000+0x0e))&0x03)==0x00) hgroup.long 0x10++0x0f hide.long 0x0 "RESP0,Response register 0" hide.long 0x4 "RESP1,Response register 1" hide.long 0x8 "RESP2,Response register 2" hide.long 0xC "RESP3,Response register 3" elif (((data.word(asd:0x70000000+0x0e))&0x03)==0x01) rgroup.long 0x10++0x0f line.long 0x00 "RESP0,Response register 0" hexmask.long 0x00 0.--31. 1. " RESP[31:0] ,R2 Response" line.long 0x04 "RESP1,Response register 1" hexmask.long 0x04 0.--31. 1. " RESP[63:32] ,R2 Response" line.long 0x08 "RESP2,Response register 2" hexmask.long 0x08 0.--31. 1. " RESP[95:64] ,R2 Response" line.long 0x0c "RESP3,Response register 3" hexmask.long.tbyte 0x0c 0.--23. 1. " RESP[119:96] ,R2 Response" elif (((data.word(asd:0x70000000+0x0e))&0x03)==0x02) rgroup.long 0x10++0x03 line.long 0x00 "RESP0,Response register 0" hexmask.long 0x00 0.--31. 1. " RESP[31:0] ,R3/R4/R1/R6/R5 Response" hgroup.long 0x14++0x0b hide.long 0x0 "RESP1,Response register 1" hide.long 0x4 "RESP2,Response register 2" hide.long 0x8 "RESP3,Response register 3" else rgroup.long 0x10++0x03 line.long 0x00 "RESP0,Response register 0" hexmask.long 0x00 0.--31. 1. " RESP[31:0] ,R1b/R5b Response" hgroup.long 0x14++0x07 hide.long 0x00 "RESP1,Response register 1" hide.long 0x04 "RESP2,Response register 2" rgroup.long 0x1c++0x03 line.long 0x00 "RESP3,Response register 3" hexmask.long 0x00 0.--31. 1. " RESP[127:96] ,R1b Response" endif group.long 0x20++0x03 line.long 0x00 "BUFDATAPORT,Buffer data port register" rgroup.long 0x24++0x03 line.long 0x00 "PRSTATE,Present state register" bitfld.long 0x00 28. " DAT7LSL ,Check DAT7 line" "Not checked,Checked" bitfld.long 0x00 27. " DAT6LSL ,Check DAT6 line" "Not checked,Checked" bitfld.long 0x00 26. " DAT5LSL ,Check DAT5 line" "Not checked,Checked" textline " " bitfld.long 0x00 25. " DAT4LSL ,Check DAT4 line" "Not checked,Checked" bitfld.long 0x00 24. " CMDLSL ,Check CMD line" "Not checked,Checked" bitfld.long 0x00 23. " DAT3LSL ,Check DAT3 line" "Not checked,Checked" textline " " bitfld.long 0x00 22. " DAT2LSL ,Check DAT2 line" "Not checked,Checked" bitfld.long 0x00 21. " DAT1LSL ,Check DAT1 line" "Not checked,Checked" bitfld.long 0x00 20. " DAT0LSL ,Check DAT0 line" "Not checked,Checked" textline " " bitfld.long 0x00 19. " WPRSPL ,Write Protect Switch is supported for memory and combo cards" "Protected,Enabled" bitfld.long 0x00 18. " CDPL ,Reflects the inverse value of the SDCD# pin" "No Card,Present" textline " " bitfld.long 0x00 17. " CSS ,Testing bit" "Reset,No Card/Inserted" textline " " bitfld.long 0x00 16. " CRDINS ,Card inserted" "Reset/Debouncing/No Card,Inserted" textline " " bitfld.long 0x00 11. " BRE ,Non-DMA read transfers" "Disabled,Enabled" bitfld.long 0x00 10. " BWE ,Non-DMA write transfers" "Disabled,Enabled" bitfld.long 0x00 9. " RTA ,Detecting completion of a read transfer" "Not completed,Completed" textline " " bitfld.long 0x00 8. " WTA ,Write transfer active" "No data,Active" bitfld.long 0x00 2. " DATLA ,DAT line on SD bus active" "Not active,Active" bitfld.long 0x00 1. " CMDINBDAT ,Command Inhibit (DAT)" "Not issued,Issued" textline " " bitfld.long 0x00 0. " CMDINBCMD ,HC issue SD command using the CMD line" "Not issued,Issued" group.byte 0x28++0x03 line.byte 0x00 "HOSTCTRL,Host control register" bitfld.byte 0x00 7. " CDSD ,Source for card detection" "SDCD#,Card detect test level" bitfld.byte 0x00 6. " CDTL ,Card inserted or not" "No Card,Inserted" textline " " bitfld.byte 0x00 5. " SD8MODE ,Selects the data width of the HC(8 bit mode)" "Not selected,Selected" bitfld.byte 0x00 3.--4. " DMASEL ,DMA mode select" "SDMA,32-bit Address ADMA1,32-bit Address ADMA2,64-bit Address ADMA2" textline " " bitfld.byte 0x00 2. " HSEN ,High Speed Mode Enable" "Normal,Disabled" bitfld.byte 0x00 1. " DTW ,Data width of the HC" "1 bit,4 bit" textline " " bitfld.byte 0x00 0. " LEDCTRL ,LED Control" "Off,On" line.byte 0x01 "PWRCTRL,Power control register" bitfld.byte 0x01 1.--3. " SDBVS ,Voltage level for the SD card" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8 V,3.0 V,3.3 Flattop" bitfld.byte 0x01 0. " SDBPWR ,SD Bus Powet" "Off,On" line.byte 0x02 "BLKGAPCTRL,Block gap control register" bitfld.byte 0x02 3. " IRQBK ,Sample point in the interrupt cycle" "Disabled,Enabled" bitfld.byte 0x02 2. " RDWCTRL ,Read wait function control" "Disabled,Enabled" bitfld.byte 0x02 1. " CNTREQ ,Restart transaction which was stopped using the Stop At Block Gap Request" "Ignored,Restarted" textline " " bitfld.byte 0x02 0. " STPBKGPREQ ,Stop At Block Gap Request" "Transfer,Stopped" line.byte 0x03 "WKUPCTRL,Wake up control register" bitfld.byte 0x03 2. " WEECDR ,Wakeup Event Enable On SD Card Removal" "Disabled,Enabled" bitfld.byte 0x03 1. " WEECDI ,Wakeup Event Enable On SD Card Insertion" "Disabled,Enabled" bitfld.byte 0x03 0. " WEEIRDQ ,Wakeup Event Enable On Card Interrupt" "Disabled,Enabled" group.word 0x2c++0x01 line.word 0x00 "CLKCTRL,Clock control register" hexmask.word.byte 0x00 8.--15. 1. " SDCLKFSEL ,Frequency of the SDCLK pin" bitfld.word 0x00 2. " SDCLKEN ,SDCLK Enable" "Disabled,Enabled" bitfld.word 0x00 1. " INCLKST ,SD clock stable" "Not ready,Ready" textline " " bitfld.word 0x00 0. " INCLKEN ,Internal Clock Enable" "Stopped,Oscillate" group.byte 0x2e++0x01 line.byte 0x00 "TMOUTCTRL,Time out control register" bitfld.byte 0x00 0.--3. " DATATMCNT ,Interval by which DAT line time-outs are detected" "TMCLK*2^13,TMCLK*2^14,TMCLK*2^15,TMCLK*2^16,TMCLK*2^17,TMCLK*2^18,TMCLK*2^19,TMCLK*2^20,TMCLK*2^21,TMCLK*2^22,TMCLK*2^23,TMCLK*2^24,TMCLK*2^25,TMCLK*2^26,TMCLK*2^27,?..." line.byte 0x01 "SWRES,Software reset register" bitfld.byte 0x01 2. " SWRESDAT ,Software reset data" "Work,Reset" bitfld.byte 0x01 1. " SWRESCMD ,Software reset command" "Work,Reset" bitfld.byte 0x01 0. " SWRESALL ,Software reset all" "Work,Reset" group.word 0x30++0x0b line.word 0x00 "NIRQSTAT,Normal Interrupt Status" bitfld.word 0x00 15. " ERRINT ,Error Interrupt" "No error,Error" bitfld.word 0x00 8. " CDINT ,Card Interrupt" "No interrupt,Interrupt" eventfld.word 0x00 7. " CDRINT ,Card Remove Interrupt" "No interrupt,Interrupt" textline " " eventfld.word 0x00 6. " CDIINT ,Card Inserted Interrupt" "No interrupt,Interrupt" eventfld.word 0x00 5. " BUFRDRDY ,Buffer Read Ready" "Not ready,Ready" eventfld.word 0x00 4. " BUFWRRDY ,Buffer Write Ready" "Not ready,Ready" textline " " eventfld.word 0x00 3. " DMAINT ,DMA Interrupt" "No interrupt,Interrupt" eventfld.word 0x00 2. " BLKGAPE ,Block Gap Event" "No event,Stopped" eventfld.word 0x00 1. " TRNCPL ,Read / write transaction complete" "Not completed,Completed" textline " " eventfld.word 0x00 0. " CMDCPL ,Command Complete" "Not completed,Completed" line.word 0x02 "ERRIRQSTAT,Error Interrupt Status" bitfld.word 0x02 14.--15. " VDSERRSTS ,Vendor Specific Error Status" "0,1,2,3" textline " " eventfld.word 0x02 13. " CEATAERR ,ATA command termination has occurred due to an error condition the device has encountered" "No error,Error" eventfld.word 0x02 12. " TGTRESERR ,Target Response error" "No error,Error" textline " " eventfld.word 0x02 9. " ADMAERR ,ADMA Error" "No error,Error" eventfld.word 0x02 8. " ACMD12ERR ,Auto CMD12 Error" "No error,Error" eventfld.word 0x02 7. " CURLERR ,Current Limit Error" "No error,Error" textline " " eventfld.word 0x02 6. " DATAEBERR ,Data End Bit Error" "No error,Error" eventfld.word 0x02 5. " DATACRCERR ,Data CRC Error" "No error,Error" eventfld.word 0x02 4. " DATATOERR ,Data Timeout Error" "No error,Error" textline " " eventfld.word 0x02 3. " CMDIDXERR ,Command Index error" "No error,Error" eventfld.word 0x02 2. " CMDEBERR ,Command End Bit Error" "No error,Error" eventfld.word 0x02 1. " CMDCRCERR ,Command CRC Error" "No error,Error" textline " " eventfld.word 0x02 0. " CMDTOERR ,Command Timeout Error" "No error,Error" line.word 0x04 "NIRQSTATEN,Normal interrupt Status Enable" sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.word 0x04 15. " FIX0 ,HC shall control error Interrupts using the Error Interrupt Status Enable register" "Disabled,Enabled" textline " " else bitfld.word 0x04 15. " FIX0 ,HC shall control error Interrupts using the Error Interrupt Status Enable register" "Disabled,Enabled" textline " " endif bitfld.word 0x04 8. " CDIRQSTSEN ,Card Interrupt Request Status Enable" "Masked,Enabled" bitfld.word 0x04 7. " CDRSTSEN ,Card Reset Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 6. " CDISTSEN ,Card Interrupt Status Enable" "Masked,Enabled" bitfld.word 0x04 5. " BUFRDRDYEN ,Buffer Read Ready Enable" "Masked,Enabled" bitfld.word 0x04 4. " BUFWRRDYEN ,Buffer Write Ready Enable" "Masked,Enabled" textline " " bitfld.word 0x04 3. " DMAIRQSTSEN ,DMA Interrupt Request Status Enable" "Masked,Enabled" bitfld.word 0x04 2. " BLKGESTSEN ,Block Gap Event Status Enable" "Masked,Enabled" bitfld.word 0x04 1. " TRNFCSTSEN ,Transaction Complete Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 0. " CMDCSTSEN ,Command Complete Status Enable" "Masked,Enabled" line.word 0x06 "ERRIRQSTATEN,Error Interrupt Status Enable" sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") eventfld.word 0x06 15. " VDSERSTSEN[1] ,VDSERSTSEN[1]" "0,1" eventfld.word 0x06 14. " VDSERSTSEN[0] ,VDSERSTSEN[0]" "0,1" textline " " eventfld.word 0x06 13. " CEATAERSTSEN ,CEATAERSTSEN" "Masked,Enabled" eventfld.word 0x06 12. " TGTRESERSTSEN ,TGTRESERSTSEN" "Masked,Enabled" textline " " else bitfld.word 0x06 14.--15. " VDSERSTSEN ,VDSERSTSEN" "0,1,2,3" bitfld.word 0x06 13. " CEATAERSTSEN ,CEATAERSTSEN" "Masked,Enabled" bitfld.word 0x06 12. " TGTRESERSTSEN ,TGTRESERSTSEN" "Masked,Enabled" textline " " endif bitfld.word 0x06 9. " ADMAERSTSEN ,ADMAERSTSEN" "Masked,Enabled" bitfld.word 0x06 8. " ACMD12ERSTSEN ,ACMD12ERSTSEN" "Masked,Enabled" bitfld.word 0x06 7. " CURLERSTSEN ,CURLERSTSEN" "Masked,Enabled" textline " " bitfld.word 0x06 6. " DATAEBSTSEN ,DATAEBSTSEN" "Masked,Enabled" bitfld.word 0x06 5. " DATACRCERSTSEN ,DATACRCERSTSEN" "Masked,Enabled" bitfld.word 0x06 4. " DATATOERSTSEN ,DATATOERSTSEN" "Masked,Enabled" textline " " bitfld.word 0x06 3. " CMDIDXERSTSEN ,CMDIDXERSTSEN" "Masked,Enabled" bitfld.word 0x06 2. " CMDEBERSTSEN ,CMDEBERSTSEN" "Masked,Enabled" bitfld.word 0x06 1. " CMDCRCERSTSEN ,CMDCRCERSTSEN" "Masked,Enabled" textline " " bitfld.word 0x06 0. " CMDTOERSTSEN ,CMDTOERSTSEN" "Masked,Enabled" line.word 0x08 "NIRQSIGEN,Normal Interrupt Signal Enable" sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.word 0x08 15. " FIX0 ,HD shall control error Interrupts using the Error Interrupt Signal Enable register" "Masked,Enabled" textline " " else bitfld.word 0x08 15. " FIX0 ,HD shall control error Interrupts using the Error Interrupt Signal Enable register" "Masked,Enabled" textline " " endif bitfld.word 0x08 8. " CDSIGEN ,CDSIGEN" "Masked,Enabled" bitfld.word 0x08 7. " CDRSIGEN ,CDRSIGEN" "Masked,Enabled" textline " " bitfld.word 0x08 6. " CDISIGEN ,CDISIGEN" "Masked,Enabled" bitfld.word 0x08 5. " BFRDRDYSIGEN ,BFRDRDYSIGEN" "Masked,Enabled" bitfld.word 0x08 4. " BFWRRDYSIGEN ,BFWRRDYSIGEN" "Masked,Enabled" textline " " bitfld.word 0x08 3. " DMAIRQSIGEN ,DMAIRQSIGEN" "Masked,Enabled" bitfld.word 0x08 2. " BLKGESIGEN ,BLKGESIGEN" "Masked,Enabled" bitfld.word 0x08 1. " TRFCPLSIGEN ,TRFCPLSIGEN" "Masked,Enabled" textline " " bitfld.word 0x08 0. " CMDCPLSIGEN ,CMDCPLSIGEN" "Masked,Enabled" line.word 0x0a "ERRIRQSIGEN,Error Interrupt Signal Enable" sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") eventfld.word 0x0a 15. " VDSERSIGEN[1] ,VDSERSIGEN[1]" "0,1" eventfld.word 0x0a 14. " VDSERSIGEN[0] ,VDSERSIGEN[0]" "0,1" textline " " eventfld.word 0x0a 13. " CEATAERSIGEN ,CEATAERSIGEN" "Masked,Enabled" eventfld.word 0x0a 12. " TGTRESERSIGEN ,TGTRESERSIGEN" "Masked,Enabled" textline " " else bitfld.word 0x0a 14.--15. " VDSERSIGEN ,VDSERSIGEN" "0,1,2,3" bitfld.word 0x0a 13. " CEATAERSIGEN ,CEATAERSIGEN" "Masked,Enabled" bitfld.word 0x0a 12. " TGTRESERSIGEN ,TGTRESERSIGEN" "Masked,Enabled" textline " " endif bitfld.word 0x0a 9. " ADMAERSIGEN ,ADMAERSIGEN" "Masked,Enabled" bitfld.word 0x0a 8. " ACMD12ERSIGEN ,ACMD12ERSIGEN" "Masked,Enabled" bitfld.word 0x0a 7. " CURLERSIGEN ,CURLERSIGEN" "Masked,Enabled" textline " " bitfld.word 0x0a 6. " DATAEBSIGEN ,DATAEBSIGEN" "Masked,Enabled" bitfld.word 0x0a 5. " DATACRCERSIGEN ,DATACRCERSIGEN" "Masked,Enabled" bitfld.word 0x0a 4. " DATATOERSIGEN ,DATATOERSIGEN" "Masked,Enabled" textline " " bitfld.word 0x0a 3. " CMDIDXERSIGEN ,CMDIDXERSIGEN" "Masked,Enabled" bitfld.word 0x0a 2. " CMDEBERSIGEN ,CMDEBERSIGEN" "Masked,Enabled" bitfld.word 0x0a 1. " CMDCRCERSIGEN ,CMDCRCERSIGEN" "Masked,Enabled" textline " " bitfld.word 0x0a 0. " CMDTOERSIGEN ,CMDTOERSIGEN" "Masked,Enabled" rgroup.word 0x3c++0x01 line.word 0x00 "ACMD12ERSTS,Auto Command 12 error status register" bitfld.word 0x00 7. " CMDNIER ,Command Not Issue Error" "No error,Error" bitfld.word 0x00 4. " ACMD12IDXER ,Auto CMD12 Index Error" "No error,Error" textline " " bitfld.word 0x00 3. " ACMD12EBER ,Auto CMD12 End Bit Error" "No error,Error" bitfld.word 0x00 2. " ACMD12CRCER ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.word 0x00 1. " ACMD12TOER ,Auto CMD12 Timeout Error" "No error,Error" bitfld.word 0x00 0. " ACMD12NEX ,Auto CMD12 Not Executed Error" "No error,Error" if (((data.long(asd:0x70000000+0x40))&0x80)==0x00) rgroup.long 0x40++0x03 line.long 0x00 "CAP1,Capabilities register 1" bitfld.long 0x00 30. " SPIBLKMODE ,Spi block mode Support" "Not supported,Supported" bitfld.long 0x00 29. " SPIMODE ,Spi mode Support" "Not supported,Supported" textline " " bitfld.long 0x00 28. " 64BITSUPP ,64 bit system address Support" "Not supported,Supported" bitfld.long 0x00 27. " IRQMODE ,Interrupt mode Support" "Not supported,Supported" textline " " bitfld.long 0x00 26. " V18SUPP ,1.8 VoltageSupport " "Not supported,Supported" bitfld.long 0x00 25. " V30SUPP ,3.0 Voltage Support" "Not supported,Supported" textline " " bitfld.long 0x00 24. " V33SUPP ,3.3 Voltage Support" "Not supported,Supported" bitfld.long 0x00 23. " SUSRESSUPP ,Suspend / Resume functionality Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " SDMASUPP ,SDMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSSUPP ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 19. " ADMA2SUPP ,ADMA2 support" "Not supported,Supported" bitfld.long 0x00 18. " EXTMDBSUPP ,Extended Media Bus Supporte" "Not supported,Supported" textline " " bitfld.long 0x00 16.--17. " MAXBLKLEN ,Maximum block size" "512 bytes,1024 bytes,2048 bytes,4096 bytes" bitfld.long 0x00 8.--13. " BCLKFREQ ,Base (maximum) clock frequency for the SD clock" "Reserved,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz" textline " " bitfld.long 0x00 7. " TOCLKU ,Unit of base clock frequency" "KHz,MHz" bitfld.long 0x00 0.--5. " TOCLKFREQ ,Base clock frequency used to detect Data Timeout Error" "Reserved,1 kHz,2 kHz,3 kHz,4 kHz,5 kHz,6 kHz,7 kHz,8 kHz,9 kHz,10 kHz,11 kHz,12 kHz,13 kHz,14 kHz,15 kHz,16 kHz,17 kHz,18 kHz,19 kHz,20 kHz,21 kHz,22 kHz,23 kHz,24 kHz,25 kHz,26 kHz,27 kHz,28 kHz,29 kHz,30 kHz,31 kHz,32 kHz,33 kHz,34 kHz,35 kHz,36 kHz,37 kHz,38 kHz,39 kHz,40 kHz,41 kHz,42 kHz,43 kHz,44 kHz,45 kHz,46 kHz,47 kHz,48 kHz,49 kHz,50 kHz,51 kHz,52 kHz,53 kHz,54 kHz,55 kHz,56 kHz,57 kHz,58 kHz,59 kHz,60 kHz,61 kHz,62 kHz,63 kHz" else rgroup.long 0x40++0x03 line.long 0x00 "CAP1,Capabilities register 1" bitfld.long 0x00 30. " SPIBLKMODE ,Spi block mode Support" "Not supported,Supported" bitfld.long 0x00 29. " SPIMODE ,Spi mode Support" "Not supported,Supported" textline " " bitfld.long 0x00 28. " 64BITSUPP ,64 bit system address Support" "Not supported,Supported" bitfld.long 0x00 27. " IRQMODE ,Interrupt mode Support" "Not supported,Supported" textline " " bitfld.long 0x00 26. " V18SUPP ,1.8 VoltageSupport " "Not supported,Supported" bitfld.long 0x00 25. " V30SUPP ,3.0 Voltage Support" "Not supported,Supported" textline " " bitfld.long 0x00 24. " V33SUPP ,3.3 Voltage Support" "Not supported,Supported" bitfld.long 0x00 23. " SUSRESSUPP ,Suspend / Resume functionality Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " SDMASUPP ,SDMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSSUPP ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 19. " ADMA2SUPP ,ADMA2 support" "Not supported,Supported" bitfld.long 0x00 18. " EXTMDBSUPP ,Extended Media Bus Supporte" "Not supported,Supported" textline " " bitfld.long 0x00 16.--17. " MAXBLKLEN ,Maximum block size" "512 bytes,1024 bytes,2048 bytes,4096 bytes" bitfld.long 0x00 8.--13. " BCLKFREQ ,Base (maximum) clock frequency for the SD clock" "Reserved,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz" textline " " bitfld.long 0x00 7. " TOCLKU ,Unit of base clock frequency" "KHz,MHz" bitfld.long 0x00 0.--5. " TOCLKFREQ ,Base clock frequency used to detect Data Timeout Error" "Reserved,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz" endif hgroup.long 0x44++0x03 hide.long 0x00 "CAP2,Capabilities register 2" rgroup.long 0x48++0x03 line.long 0x00 "MAXCURR1,Maximum current capabilities register 1" hexmask.long.byte 0x00 16.--23. 1. " MAX18CURR ,Maximum current for 1.8V card" hexmask.long.byte 0x00 8.--15. 1. " MAX30CURR ,Maximum current for 3.0V card" hexmask.long.byte 0x00 0.--7. 1. " MAX33CURR ,Maximum current for 3.3V card" sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") hgroup.long 0x4c++0x03 hide.long 0x00 "MAXCURR2,Maximum current capabilities register 2" else group.long 0x4c++0x03 line.long 0x00 "MAXCURR2,Maximum current capabilities register 2" endif wgroup.word 0x50++0x03 line.word 0x00 "ACMD12FEERSTS,Force event register for auto CMD12 error status" bitfld.word 0x00 7. " FECMDNI ,Force Event for command not issued by Auto CMD12 Error" "No interrupt,Interrupt" bitfld.word 0x00 4. " FEACMDIDX ,Force Event for Auto CMD12 Index Error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " FEACMDEB ,Force Event for Auto CMD12 End bit Error" "No interrupt,Interrupt" bitfld.word 0x00 2. " FEACMDCRC ,Force Event for Auto CMD12 CRC Error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " FEACMDTO ,Force Event for Auto CMD12 timeout Error" "No interrupt,Interrupt" bitfld.word 0x00 0. " FEACMDNE ,Force Event for Auto CMD12 NOT Executed" "No interrupt,Interrupt" line.word 0x02 "FEERRINTSTS,Force event register for error interrupt status" bitfld.word 0x02 15. " FEVSERSTS1 ,Force Event for Vendor Specific Error Status 1" "No interrupt,Interrupt" bitfld.word 0x02 14. " FEVSERSTS0 ,Force Event for Vendor Specific Error Status 0" "No interrupt,Interrupt" textline " " bitfld.word 0x02 13. " FECEATAER ,Force Event for Ceata Error" "No interrupt,Interrupt" bitfld.word 0x02 12. " FETRER ,Force Event for Target Response Error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 9. " FEADMAER ,Force Event for ADMA Error" "No interrupt,Interrupt" bitfld.word 0x02 8. " FEACMD12ER ,Force Event for Auto CMD12 Error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 7. " FECLER ,Force Event for Current Limit Error" "No interrupt,Interrupt" bitfld.word 0x02 6. " FEDATAEBER ,Force Event for Data End Bit Error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 5. " FEDATACRCER ,Force Event for Data CRC Error" "No interrupt,Interrupt" bitfld.word 0x02 4. " FEDATATOER ,Force Event for Data Timeout Error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 3. " FECMDIDXER ,Force Event for Command Index Error" "No interrupt,Interrupt" bitfld.word 0x02 2. " FECMDEBER ,Force Event for Command End Bit Error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 1. " FECMDCRCER ,Force Event for Command CRC Error" "No interrupt,Interrupt" bitfld.word 0x02 0. " FECMDTOER ,Force Event for Command Timeout Error" "No interrupt,Interrupt" group.byte 0x54++0x00 line.byte 0x00 "ADMAERRSTS,ADMA error status register" bitfld.byte 0x00 2. " ADMALMER ,ADMA Length Mismatch Error" "No error,Error" bitfld.byte 0x00 0.--1. " ADMAERSTS ,ADMA Error State" "ST_STOP,ST_FDS,Reserved,ST_TFR" group.long 0x58++0x07 line.long 0x00 "ADMAADDR1,ADMA LSB system address register" line.long 0x04 "ADMAADDR2,ADMA MSB system address register" group.byte 0xf0++0x00 line.byte 0x00 "SPIIRQSUPP,SPI Interrupt request support register" rgroup.word 0xfc++0x03 line.word 0x00 "SLTIRQSTS,Slot Interrupts register" bitfld.word 0x00 7. " SLTIRQSIG[8] ,Slot 8 Interrupt Request Signal" "No interrupt,Interrupt" bitfld.word 0x00 6. " SLTIRQSIG[7] ,Slot 7 Interrupt Request Signal" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " SLTIRQSIG[6] ,Slot 6 Interrupt Request Signal" "No interrupt,Interrupt" bitfld.word 0x00 4. " SLTIRQSIG[5] ,Slot 5 Interrupt Request Signal" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " SLTIRQSIG[4] ,Slot 4 Interrupt Request Signal" "No interrupt,Interrupt" bitfld.word 0x00 2. " SLTIRQSIG[3] ,Slot 3 Interrupt Request Signal" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " SLTIRQSIG[2] ,Slot 2 Interrupt Request Signal" "No interrupt,Interrupt" bitfld.word 0x00 0. " SLTIRQSIG[1] ,Slot 1 Interrupt Request Signal" "No interrupt,Interrupt" line.word 0x02 "HCTRLVER,Host controller version register" hexmask.word.byte 0x02 8.--15. 1. " VVN ,Host Controller IP release version" hexmask.word.byte 0x02 0.--7. 1. " SVN ,Host Controller Spec Version" width 0x0b tree.end endif sif (cpu()!="SPEAR310") tree "CLCDC (Color liquid crystal display controller)" sif (cpu()=="SPEAR600") base asd:0xFC200000 elif (cpu()=="SPEAR320"||cpu()=="SEAR320S") base asd:0x90000000 else base asd:0x60000000 endif width 12. group.long 0x00++0x1f "CLCDC configuration registers" line.long 0x00 "LCDTIMING0,Horizontal axis panel control register" hexmask.long.byte 0x0 24.--31. 1. " HBP ,Horizontal back porch" hexmask.long.byte 0x0 16.--23. 1. " HFP ,Horizontal front porch" textline " " hexmask.long.byte 0x0 8.--15. 1. " HSW ,Horizontal synchronization pulse width" hexmask.long.byte 0x0 2.--7. 1. " PPL ,Pixels-per-line" line.long 0x4 "LCDTIMING1,Vertical axis panel control register" hexmask.long.byte 0x4 24.--31. 1. " VBP ,Vertical back porch" hexmask.long.byte 0x4 16.--23. 1. " VFP ,Vertical front porch" textline " " hexmask.long.byte 0x4 10.--15. 1. " VSW ,Vertical synchronization pulse width" hexmask.long.word 0x4 0.--9. 1. " LPP ,Lines Per Panel" line.long 0x8 "LCDTIMING2,Clock and signal polarity control register" bitfld.long 0x8 27.--31. " PCD_HI ,Upper part of Panel Clock Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x8 26. " BCD ,Bypass pixel clock divider" "Not bypassed,Bypassed" hexmask.long.word 0x8 16.--25. 1. " CPL ,Clocks per line" textline " " bitfld.long 0x8 14. " IEO ,Invert output enable" "Active high,Active low" bitfld.long 0x8 13. " IPC ,Invert panel clock" "Rising,Falling" bitfld.long 0x8 12. " IHS ,Invert horizontal synchronization" "Active high,Active low" textline " " bitfld.long 0x8 11. " IVS ,Invert vertical synchronization" "Active high,Active low" bitfld.long 0x8 6.--10. " ACB ,AC bias pin frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()=="SPEAR600") bitfld.long 0x8 5. " CLKSEL ,Drives the CLCDCLKSEL signal" "Not selected,Selected" else bitfld.long 0x8 5. " CLKSEL ,Drives the CLCDCLKSEL signal" "HCLK,Other Clock" endif textline " " bitfld.long 0x8 0.--4. " PCD_LO ,Lower part of Panel Clock Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0xc "LCDTIMING3,Line end control register" bitfld.long 0xc 16. " LEE ,LCD Line end enable" "Disabled,Enabled" hexmask.long.byte 0xc 0.--6. 1. " LED ,Line-end signal delay" line.long 0x10 "LCDUPBASE,Upper panel frame base address register" hexmask.long 0x10 2.--31. 0x4 " LCDUPBASE ,LCD upper panel base address" line.long 0x14 "LCDLPBASE,Lower panel frame base address register" hexmask.long 0x14 2.--31. 0x4 " LCDLPBASE ,LCD lower panel base address" line.long 0x18 "LCDIMSC,Interrupt Mask Set/Clear Register" bitfld.long 0x18 4. " MBERRINTRENB ,AHB master error interrupt enable" "Disabled,Enabled" bitfld.long 0x18 3. " VCOMPINTRENB ,Vertical compare interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " LNBUINTRENB ,Next base update interrupt enable" "Disabled,Enabled" bitfld.long 0x18 1. " FUFINTRENB ,FIFO underflow interrupt enable" "Disabled,Enabled" line.long 0x1c "LCDCONTROL,Control Register" bitfld.long 0x1c 16. " WATERMARK ,LCD DMA FIFO Watermark level" ">=4,>=8" bitfld.long 0x1c 12.--13. " LCDVCOMP ,Generate interrupt" "Vertical sync,Back porch,Active video,Front porch" textline " " bitfld.long 0x1c 11. " LCDPWR ,LCD Power enable" "Not gated,Gated" bitfld.long 0x1c 10. " BEPO ,Big-endian pixel order within a byte" "Little-endian,Big-endian" textline " " bitfld.long 0x1c 9. " BEBO ,Big-endian byte order" "Little-endian,Big-endian" bitfld.long 0x1c 8. " BGR ,RGB of BGR format selection" "RGB,BGR" textline " " bitfld.long 0x1c 7. " LCDDUAL ,LCD Interface is dual panel STN" "Single,Dual" bitfld.long 0x1c 6. " LCDMONO8 ,Monochrome LCD has an 8 bits interface" "4,8" textline " " bitfld.long 0x1c 5. " LCDTFT ,LCD is TFT" "STN,TFT" bitfld.long 0x1c 4. " LCDBW ,STN LCD is monochrome" "Color,Monochrome" textline " " bitfld.long 0x1c 1.--3. " LCDBPP ,LCD bits per pixel" "1,2,4,8,16,24,?..." bitfld.long 0x1c 0. " LCDEN ,LCD controller enable bit" "Disabled,Enabled" rgroup.long 0x20++0x07 line.long 0x00 "LCDRIS,Raw interrupt status register" bitfld.long 0x00 4. " MBERROR ,AHB bus master error status" "No error,Error" bitfld.long 0x00 3. " VCOMP ,Vertical compare" "Not reached,Reached" textline " " bitfld.long 0x00 2. " LNBU ,LCD next address base update" "Not updated,Updated" bitfld.long 0x00 1. " FUF ,FIFO underflow" "No underflow,Underflow" line.long 0x04 "LCDMIS,Mask interrupt status register" bitfld.long 0x04 4. " MBERRORINTR ,AHB Master errors interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x04 3. " VCOMPINTR ,Vertical compare interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " LNBUINTR ,LCD next base address update interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x04 1. " FUFINTR ,FIFO underflows interrupt status bit" "No interrupt,Interrupt" wgroup.long 0x28++0x03 line.long 0x00 "LCDICR,Interrupt clear register" bitfld.long 0x00 4. " MBERROR ,AHB Master errors interrupt Clear" "Not clear,Clear" bitfld.long 0x00 3. " VCOMP ,Vertical compare interrupt Clear" "Not clear,Clear" textline " " bitfld.long 0x00 2. " LNBU ,LCD next base address update interrupt Clear" "Not clear,Clear" bitfld.long 0x00 1. " FUF ,FIFO underflows interrupt Clear" "Not clear,Clear" rgroup.long 0x2c++0x07 line.long 0x00 "LCDUPCURR,Upper panel current address value register" line.long 0x04 "LCDLPCURR,Lower panel current address value register" group.long 0x200++0x03 "Color Palette Register" line.long 0x00 "LCDPALETTE,LCD Palette Register" bitfld.long 0x00 26.--30. " B[4:0] ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--25. " G[4:0] ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " R[4:0] ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 15. " I ,Intensity bit" "0,1" textline " " bitfld.long 0x00 10.--14. " B[4:0] ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--9. " G[4:0] ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " R[4:0] ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.byte 0xfe0++0x00 "Identification Registers" line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x10" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x1" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end endif tree.open "JPEG codec" base asd:0xD0800000 width 21. tree "JPGC Codec Core Registers" wgroup.long 0x00++0x03 line.long 0x00 "JPGCREG0,JPGC Register 0" bitfld.long 0x0 0. " STARTSTOP ,SCAN RATE type in Enhanced mode" "Stopped,Started" group.long 0x04++0x01b line.long 0x00 "JPGCREG1,JPGC Register 1" hexmask.long.word 0x00 16.--31. 1. " YSIZ ,Number of lines" bitfld.long 0x00 8. " HDR ,Header processing enable" "Disabled,Enabled" bitfld.long 0x00 6.--7. " NS ,Number of components for scan header marker segment" "1,2,3,4" textline " " bitfld.long 0x00 4.--5. " COLSPCTYPE ,Number of quantization tables in the output stream" "Grayscale,YUV,RGB,CMYK" bitfld.long 0x00 3. " DE ,Decoding/encoding" "Encoder,Decoder" bitfld.long 0x00 2. " RE ,Restart marker processing enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NF ,Number of color components" "1,2,3,4" line.long 0x04 "JPGCREG2,JPGC Register 2" hexmask.long 0x04 0.--25. 1. " NMCU ,Number of minimum coded units to be coded" line.long 0x08 "JPGCREG3,JPGC Register 3" hexmask.long.word 0x08 16.--31. 1. " XSIZ ,Number of pixels per line" hexmask.long.word 0x08 0.--15. 1. " NRST ,Number of MCU's between two restart markers" line.long 0x0c "JPGCREG4,JPGC Register 4" bitfld.long 0x0c 12.--15. " V0 ,Vertical sampling factor for component 0" "Reserved,1,2,3,4,?..." bitfld.long 0x0c 8.--11. " H0 ,Horizontal sampling factor for component 0" "Reserved,1,2,3,4,?..." textline " " bitfld.long 0x0c 4.--7. " NBLOCK0 ,Number of data units for component 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0c 2.--3. " QT0 ,Quantization table used for componentt 0" "0,1,2,3" textline " " bitfld.long 0x0c 1. " HA0 ,AC Huffman table used for component 0" "Not used,Used" bitfld.long 0x0c 0. " HD0 ,DC Huffman table used for component 0" "Not used,Used" line.long 0x10 "JPGCREG5,JPGC Register 5" bitfld.long 0x10 12.--15. " V1 ,Vertical sampling factor for component 1" "Reserved,1,2,3,4,?..." bitfld.long 0x10 8.--11. " H1 ,Horizontal sampling factor for component 1" "Reserved,1,2,3,4,?..." textline " " bitfld.long 0x10 4.--7. " NBLOCK1 ,Number of data units for component 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 2.--3. " QT1 ,Quantization table used for componentt 1" "0,1,2,3" textline " " bitfld.long 0x10 1. " HA1 ,AC Huffman table used for component 1" "Not used,Used" bitfld.long 0x10 0. " HD1 ,DC Huffman table used for component 1" "Not used,Used" line.long 0x14 "JPGCREG6,JPGC Register 6" bitfld.long 0x14 12.--15. " V2 ,Vertical sampling factor for component 2" "Reserved,1,2,3,4,?..." bitfld.long 0x14 8.--11. " H2 ,Horizontal sampling factor for component 2" "Reserved,1,2,3,4,?..." textline " " bitfld.long 0x14 4.--7. " NBLOCK2 ,Number of data units for component 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 2.--3. " QT2 ,Quantization table used for componentt 2" "0,1,2,3" textline " " bitfld.long 0x14 1. " HA2 ,AC Huffman table used for component 2" "Not used,Used" bitfld.long 0x14 0. " HD2 ,DC Huffman table used for component 2" "Not used,Used" line.long 0x18 "JPGCREG7,JPGC Register 7" bitfld.long 0x18 12.--15. " V3 ,Vertical sampling factor for component 3" "Reserved,1,2,3,4,?..." bitfld.long 0x18 8.--11. " H3 ,Horizontal sampling factor for component 3" "Reserved,1,2,3,4,?..." textline " " bitfld.long 0x18 4.--7. " NBLOCK3 ,Number of data units for component 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 2.--3. " QT3 ,Quantization table used for componentt 3" "0,1,2,3" textline " " bitfld.long 0x18 1. " HA3 ,AC Huffman table used for component 3" "Not used,Used" bitfld.long 0x18 0. " HD3 ,DC Huffman table used for component 3" "Not used,Used" group.long 0x200++0x03 line.long 0x00 "JPGCCONTROLSTAT,JPGC Control Status Register" bitfld.long 0x00 31. " EOC ,End of conversion" "Not end,End" bitfld.long 0x00 30. " SCR ,Synchronous core reset" "No reset,Reset" hexmask.long.word 0x00 3.--17. 1. " LLI , Number of LLI" textline " " bitfld.long 0x00 1.--2. " BNV ,Number of bytes not valid in last word" "1,2,3,4" bitfld.long 0x00 0. " INT ,Interrupt bit" "Cleared,?..." rgroup.long 0x204++0x07 line.long 0x00 "JPGCBFFIFOTOCORE,JPGC Bytes From Fifo To Core Register" line.long 0x04 "JPGCBFCORETOFIFO,JPGC Bytes From Core To Fifo Register" group.long 0x20c++0x03 line.long 0x00 "JPGCBURSTCOUNTBEINT,JPGC Burst count before int Register" bitfld.long 0x00 31. " ENABLE ,Burst count ENABLE" "Disabled,Enabled" hexmask.long 0x00 0.--30. 1. " NBX ,Numbers of burst transfers sent by TX fifo" tree.end tree "JPGC DMAC Registers" base asd:0xFC400000 group.long 0x200++0x13 line.long 0x00 "JPGCDMACCNSRCADDR,Channel Source Address" line.long 0x04 "JPGCDMACCNDESTADDR,Channel destination Address" line.long 0x08 "JPGCDMACCLLI,Channel Linked List Item" hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel $2" bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2" line.long 0x0c "JPGCDMACCCONTROL,Channel Control" bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0c 30. " HPROT[3] ,AHB access information" "Not cacheable,Cacheable" textline " " bitfld.long 0x0c 29. " HPROT[2] ,AHB access information" "Not bufferable,Bufferable" bitfld.long 0x0c 28. " HPROT[1] ,AHB access information" "User,Privileged" textline " " bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented" bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented" textline " " bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 1,Master 2" bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 1,Master 2" textline " " bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..." bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers" textline " " hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size" line.long 0x10 "JPGCDMACCONFIG,Channel Configuration" bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored" bitfld.long 0x10 17. " A ,Active" "No data,Data" textline " " bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled" bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)" textline " " bitfld.long 0x10 6.--9. " DESTPERIPHERAL ,Destination peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " SRCPERIPHERAL ,Source peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled" tree.end tree "JPGC FIFO Registers" base asd:0xD0800000 hgroup.long 0x400++0x3 hide.long 0x00 "JPGCFIFOIN,JPGC Fifo In Register" in hgroup.long 0x600++0x3 hide.long 0x00 "JPGCFIFOOUT,JPGC Fifo Out Register" in tree.end tree "JPGC Internal Memories" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.byte 0x800++0x00 line.byte 0x00 "JPGCQMEM,Quantization Table Memory" button "QMEM" "d ad:(asd:0xD0800000+0x800)--ad:(asd:0xD0800000+0x8FF) /byte" group.long 0xC00++0x03 line.long 0x00 "JPGCHUFFMIN,HuffMin Table Memory" button "HUFFMIN" "d ad:(asd:0xD0800000+0xC00)--ad:(asd:0xD0800000+0xc32) /long" group.word 0x1000++0x01 line.word 0x00 "JPGCHUFFBASE,HuffBase Table Memory" button "HUFFBASE" "d ad:(asd:0xD0800000+0x1000)--ad:(asd:0xD0800000+0x1047) /word" group.long 0x1400++0x03 line.byte 0x00 "JPGCHUFFSYMB,HuffSymb Table Memory" button "HUFFSYMB" "d ad:(asd:0xD0800000+0x1400)--ad:(asd:0xD0800000+0x154F) /byte" group.long 0x1800++0x03 line.byte 0x00 "JPGCDHTMEM,DHT Marker Segment Memory" button "DHTMEM" "d ad:(asd:0xD0800000+0x1800)--ad:(asd:0xD0800000+0x199B) /byte" group.long 0x1c00++0x03 line.word 0x00 "JPGCHUFFENC,HuffEnc Table Memory" button "HuffEnc" "d ad:(asd:0xD0800000+0x1c00)--ad:(asd:0xD0800000+0x1E3F) /word" else group.byte 0x800++0x00 line.byte 0x00 "JPGCQMEM,Quantization Table Memory" button "QMEM" "d ad:(asd:0xD0800000+0x800)--ad:(asd:0xD0800000+0xa55) /byte" group.long 0xC00++0x03 line.long 0x00 "JPGCHUFFMIN,HuffMin Table Memory" button "HUFFMIN" "d ad:(asd:0xD0800000+0xC00)--ad:(asd:0xD0800000+0xc4f) /long" group.byte 0x1000++0x00 line.byte 0x00 "JPGCHUFFBASE,HuffBase Table Memory" button "HUFFBASE" "d ad:(asd:0xD0800000+0x1000)--ad:(asd:0xD0800000+0x106d) /byte" group.long 0x1400++0x03 line.long 0x00 "JPGCHUFFSYMB,HuffSymb Table Memory" button "HUFFSYMB" "d ad:(asd:0xD0800000+0x1400)--ad:(asd:0xD0800000+0x1736) /long" group.long 0x1800++0x03 line.long 0x00 "JPGCDHTMEM,DHT Marker Segment Memory" button "DHTMEM" "d ad:(asd:0xD0800000+0x1800)--ad:(asd:0xD0800000+0x1bFF) /long" group.long 0x1c00++0x03 line.long 0x00 "JPGCHUFFENC,HuffEnc Table Memory" button "HuffEnc" "d ad:(asd:0xD0800000+0x1c00)--ad:(asd:0xD0800000+0x1FFF) /long" endif tree.end width 0x0b tree.end sif (cpu()=="SPEAR320S") tree "I2S (Digital audio port)" base asd:0xA9400000 width 13. group.long 0x00++0x13 line.long 0x00 "IER,I2S enable register" bitfld.long 0x0 0. " IEN ,I2S enable" "Disabled,Enabled" line.long 0x4 "IRER,I2S receiver block enable register" bitfld.long 0x4 0. " RXEN ,Receiver block enable" "Disabled,Enabled" line.long 0x8 "ITER,I2S transmitter block enable register" bitfld.long 0x8 0. " TXEN ,Transmitter block enable" "Disabled,Enabled" line.long 0xc "CER,Clock enable register" bitfld.long 0xc 0. " CLKEN ,Clock generation enable" "Disabled,Enabled" line.long 0x10 "CCR,Clock configuration register" bitfld.long 0x10 3.--4. " WSS[4:3] ,Number of I2S_CLK cycles" "16 clock cycles,24 clock cycles,32 clock cycles,?..." bitfld.long 0x10 0.--2. " SCLKG[2:0] ,Gating of I2S_CLK" "No clock gating,12 clock cycles,16 clock cycles,20 clock cycles,24 clock cycles,?..." wgroup.long 0x14++0x07 line.long 0x00 "RXFFR,Receiver block FIFO reset register" bitfld.long 0x00 0. " RXFFR ,Receiver FIFO reset" "No reset,Reset" line.long 0x04 "TXFFR,Transmitter block FIFO reset register" bitfld.long 0x04 0. " TXFFR ,Transmitter FIFO reset" "No reset,Reset" group.long 0x20++0x17 line.long 0x00 "LRBR0_LTHR0,Left receive buffer 0/left transmit holding 0" line.long 0x04 "RRBR0_RTHR0,Right receive buffer 0/right transmit holding 0" line.long 0x08 "RER0,Receive enable register 0" bitfld.long 0x08 0. " RXCHEN0 ,Receive channel enable" "Disabled,Enabled" line.long 0x0C "TER0,Transmit enable register 0" bitfld.long 0x0C 0. " TXCHEN0 ,Transmit channel enable" "Disabled,Enabled" line.long 0x10 "RCR0,Receive configuration register 0" bitfld.long 0x10 0.--2. " WLEN[2:0] ,Receiver data resolution" "Ignore,12-bit,16-bit,20-bit,24-bit,32-bit,?..." line.long 0x14 "TCR0,Transmit configuration register 0" bitfld.long 0x14 0.--2. " WLEN[2:0] ,Transmitter data resolution" "Ignore,12-bit,16-bit,20-bit,24-bit,32-bit,?..." rgroup.long 0x38++0x03 line.long 0x00 "ISR0,Interrupt status register 0" bitfld.long 0x00 5. " TXFO ,Status of data overrun interrupt for the TX channel" "No overrun,Overrun" bitfld.long 0x00 4. " TXFE ,Status of transmit empty trigger interrupt" "Not reached,Reached" textline " " bitfld.long 0x00 1. " RXFO ,Status of data overrun interrupt for the RX channel" "No overrun,Overrun" bitfld.long 0x00 0. " RXDA ,Status of receive data available interrupt" "Not reached,Reached" group.long 0x3C++0x03 line.long 0x00 "IMR0,Interrupt mask register 0" bitfld.long 0x00 5. " TXFOM ,Masks TX FIFO overrun interrupt" "Not masked,Masked" bitfld.long 0x00 4. " TXFEM ,Masks TX FIFO empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 1. " RXFOM ,Masks RX FIFO overrun interrupt" "Not masked,Masked" bitfld.long 0x00 0. " RXDAM ,Masks RX FIFO data available interrupt" "Not masked,Masked" hgroup.long 0x40++0x03 hide.long 0x00 "ROR0,Receive overrun register 0" in hgroup.long 0x44++0x03 hide.long 0x00 "TOR0,Transmit overrun register 0" in group.long 0x48++0x07 line.long 0x00 "RFCR0,Receive FIFO configuration register 0" bitfld.long 0x00 0.--3. " RXCHDT[3:0] ,Trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TFCR0,Transmit FIFO configuration register 0" bitfld.long 0x04 0.--3. " TXCHDT[3:0] ,Trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long 0x50++0x07 line.long 0x00 "RFF0,Receive FIFO flush register 0" bitfld.long 0x00 0. " RXCHFR ,Receive channel FIFO reset" "No reset,Reset" line.long 0x04 "TFF0,Transmit FIFO flush register 0" bitfld.long 0x04 0. " TXCHFR ,Transmit channel FIFO reset" "No reset,Reset" rgroup.long 0x1C0++0x03 line.long 0x00 "RXDMA,Receiver block DMA register" wgroup.long 0x1C8++0x03 line.long 0x00 "TXDMA,Transmitter block DMA register" width 0x0b tree.end endif tree.open "GPIO (General Purpose Input/Output)" sif (cpu()=="SPEAR600") tree "CPU GPIO" base asd:0xF0100000 width 15. group.byte 0x00++0x00 line.byte 0x0 "GPIODATA,GPIO$1 Data Register" bitfld.byte 0x0 7. " GPIODATA7 ,GPIO Data 7" "L,H" bitfld.byte 0x0 6. " GPIODATA6 ,GPIO Data 6" "L,H" bitfld.byte 0x0 5. " GPIODATA5 ,GPIO Data 5" "L,H" textline " " bitfld.byte 0x0 4. " GPIODATA4 ,GPIO Data 4" "L,H" bitfld.byte 0x0 3. " GPIODATA3 ,GPIO Data 3" "L,H" bitfld.byte 0x0 2. " GPIODATA2 ,GPIO Data 2" "L,H" textline " " bitfld.byte 0x0 1. " GPIODATA1 ,GPIO Data 1" "L,H" bitfld.byte 0x0 0. " GPIODATA0 ,GPIO Data 0" "L,H" group.byte 0x400++0x00 line.byte 0x00 "GPIODIR,Data direction register" bitfld.byte 0x00 7. " GPIODIR[7] ,Direction of pin 7" "Input,Output" bitfld.byte 0x00 6. " GPIODIR[6] ,Direction of pin 6" "Input,Output" bitfld.byte 0x00 5. " GPIODIR[5] ,Direction of pin 5" "Input,Output" textline " " bitfld.byte 0x00 4. " GPIODIR[4] ,Direction of pin 4" "Input,Output" bitfld.byte 0x00 3. " GPIODIR[3] ,Direction of pin 3" "Input,Output" bitfld.byte 0x00 2. " GPIODIR[2] ,Direction of pin 2" "Input,Output" textline " " bitfld.byte 0x00 1. " GPIODIR[1] ,Direction of pin 1" "Input,Output" bitfld.byte 0x00 0. " GPIODIR[0] ,Direction of pin 0" "Input,Output" group.byte 0x404++0x00 line.byte 0x00 "GPIOIS,Detect level or an edge register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIS[7] ,Detect level or an edge of pin 7" "Edge,Level" bitfld.byte 0x00 6. " GPIOIS[6] ,Detect level or an edge of pin 6" "Edge,Level" endif bitfld.byte 0x00 5. " GPIOIS[5] ,Detect level or an edge of pin 5" "Edge,Level" textline " " bitfld.byte 0x00 4. " GPIOIS[4] ,Detect level or an edge of pin 4" "Edge,Level" bitfld.byte 0x00 3. " GPIOIS[3] ,Detect level or an edge of pin 3" "Edge,Level" bitfld.byte 0x00 2. " GPIOIS[2] ,Detect level or an edge of pin 2" "Edge,Level" textline " " bitfld.byte 0x00 1. " GPIOIS[1] ,Detect level or an edge of pin 1" "Edge,Level" bitfld.byte 0x00 0. " GPIOIS[0] ,Detect level or an edge of pin 0" "Edge,Level" group.byte 0x408++0x00 line.byte 0x00 "GPIOIBE,Interrupt Both Edges register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIBE[7] ,Interrupt Both Edges of pin 7" "Single edge,Both edges" bitfld.byte 0x00 6. " GPIOIBE[6] ,Interrupt Both Edges of pin 6" "Single edge,Both edges" textline " " endif bitfld.byte 0x00 5. " GPIOIBE[5] ,Interrupt Both Edges of pin 5" "Single edge,Both edges" bitfld.byte 0x00 4. " GPIOIBE[4] ,Interrupt Both Edges of pin 4" "Single edge,Both edges" textline " " bitfld.byte 0x00 3. " GPIOIBE[3] ,Interrupt Both Edges of pin 3" "Single edge,Both edges" bitfld.byte 0x00 2. " GPIOIBE[2] ,Interrupt Both Edges of pin 2" "Single edge,Both edges" textline " " bitfld.byte 0x00 1. " GPIOIBE[1] ,Interrupt Both Edges of pin 1" "Single edge,Both edges" bitfld.byte 0x00 0. " GPIOIBE[0] ,Interrupt Both Edges of pin 0" "Single edge,Both edges" group.byte 0x40c++0x00 line.byte 0x00 "GPIOIEV,Interrupt Event register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIEV[7] ,Interrupt Event of pin 7" "Falling/low,Rising/high" bitfld.byte 0x00 6. " GPIOIEV[6] ,Interrupt Event of pin 6" "Falling/low,Rising/high" textline " " endif bitfld.byte 0x00 5. " GPIOIEV[5] ,Interrupt Event of pin 5" "Falling/low,Rising/high" bitfld.byte 0x00 4. " GPIOIEV[4] ,Interrupt Event of pin 4" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 3. " GPIOIEV[3] ,Interrupt Event of pin 3" "Falling/low,Rising/high" bitfld.byte 0x00 2. " GPIOIEV[2] ,Interrupt Event of pin 2" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 1. " GPIOIEV[1] ,Interrupt Event of pin 1" "Falling/low,Rising/high" bitfld.byte 0x00 0. " GPIOIEV[0] ,Interrupt Event of pin 0" "Falling/low,Rising/high" group.byte 0x410++0x00 line.byte 0x00 "GPIOIE,Interrupt Mask register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIE[7] ,Interrupt Mask of pin 7" "Masked,Not masked" bitfld.byte 0x00 6. " GPIOIE[6] ,Interrupt Mask of pin 6" "Masked,Not masked" endif bitfld.byte 0x00 5. " GPIOIE[5] ,Interrupt Mask of pin 5" "Masked,Not masked" textline " " bitfld.byte 0x00 4. " GPIOIE[4] ,Interrupt Mask of pin 4" "Masked,Not masked" bitfld.byte 0x00 3. " GPIOIE[3] ,Interrupt Mask of pin 3" "Masked,Not masked" bitfld.byte 0x00 2. " GPIOIE[2] ,Interrupt Mask of pin 2" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " GPIOIE[1] ,Interrupt Mask of pin 1" "Masked,Not masked" bitfld.byte 0x00 0. " GPIOIE[0] ,Interrupt Mask of pin 0" "Masked,Not masked" rgroup.byte 0x414++0x00 line.byte 0x00 "GPIORIS,Raw Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIORIS[7] ,Raw Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIORIS[6] ,Raw Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIORIS[5] ,Raw Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIORIS[4] ,Raw Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIORIS[3] ,Raw Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIORIS[2] ,Raw Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIORIS[1] ,Raw Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIORIS[0] ,Raw Interrupt Status of pin 0" "No interrupt,Interrupt" rgroup.byte 0x418++0x00 line.byte 0x00 "GPIOMIS,Masked Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOMIS[7] ,Masked Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIOMIS[6] ,Masked Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIOMIS[5] ,Masked Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIOMIS[4] ,Masked Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIOMIS[3] ,Masked Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIOMIS[2] ,Masked Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIOMIS[1] ,Masked Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIOMIS[0] ,Masked Interrupt Status of pin 0" "No interrupt,Interrupt" wgroup.byte 0x41C++0x00 line.byte 0x00 "GPIOIC,Interrupt Clear register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIC[7] ,Interrupt Clear of pin 7" "No effect,Cleared" bitfld.byte 0x00 6. " GPIOIC[6] ,Interrupt Clear of pin 6" "No effect,Cleared" endif bitfld.byte 0x00 5. " GPIOIC[5] ,Interrupt Clear of pin 5" "No effect,Cleared" textline " " bitfld.byte 0x00 4. " GPIOIC[4] ,Interrupt Clear of pin 4" "No effect,Cleared" bitfld.byte 0x00 3. " GPIOIC[3] ,Interrupt Clear of pin 3" "No effect,Cleared" bitfld.byte 0x00 2. " GPIOIC[2] ,Interrupt Clear of pin 2" "No effect,Cleared" textline " " bitfld.byte 0x00 1. " GPIOIC[1] ,Interrupt Clear of pin 1" "No effect,Cleared" bitfld.byte 0x00 0. " GPIOIC[0] ,Interrupt Clear of pin 0" "No effect,Cleared" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.byte 0x420++0x00 line.byte 0x00 "GPIOAFSEL,Mode control register" bitfld.byte 0x00 7. " GPIOAFSEL[7] ,Mode control of pin 7" "Software,Hardware" bitfld.byte 0x00 6. " GPIOAFSEL[6] ,Mode control of pin 6" "Software,Hardware" textline " " bitfld.byte 0x00 5. " GPIOAFSEL[5] ,Mode control of pin 5" "Software,Hardware" bitfld.byte 0x00 4. " GPIOAFSEL[4] ,Mode control of pin 4" "Software,Hardware" textline " " bitfld.byte 0x00 3. " GPIOAFSEL[3] ,Mode control of pin 3" "Software,Hardware" bitfld.byte 0x00 2. " GPIOAFSEL[2] ,Mode control of pin 2" "Software,Hardware" textline " " bitfld.byte 0x00 1. " GPIOAFSEL[1] ,Mode control of pin 1" "Software,Hardware" bitfld.byte 0x00 0. " GPIOAFSEL[0] ,Mode control of pin 0" "Software,Hardware" endif rgroup.byte 0xFE0++0x0 line.byte 0x00 "GPIOPERIPHID0,Peripheral Identification 0 Register" rgroup.byte 0xFE4++0x0 line.byte 0x00 "GPIOPERIPHID1,Peripheral Identification 1 Register" rgroup.byte 0xFE8++0x0 line.byte 0x00 "GPIOPERIPHID2,Peripheral Identification 2 Register" rgroup.byte 0xFEc++0x0 line.byte 0x00 "GPIOPERIPHID3,Peripheral Identification 3 Register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xFF0++0x00 line.byte 0x00 "GPIOCELLID0,Peripheral Cell Id 0 Register" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GPIOCELLID1,Peripheral Cell Id 1 Register" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GPIOCELLID2,Peripheral Cell Id 2 Register" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GPIOCELLID3,Peripheral Cell Id 3 Register" endif width 0xB tree.end tree "Application Subsystem GPIO" base asd:0xD8100000 width 15. group.byte 0x00++0x00 line.byte 0x0 "GPIODATA,GPIO$1 Data Register" bitfld.byte 0x0 7. " GPIODATA7 ,GPIO Data 7" "L,H" bitfld.byte 0x0 6. " GPIODATA6 ,GPIO Data 6" "L,H" bitfld.byte 0x0 5. " GPIODATA5 ,GPIO Data 5" "L,H" textline " " bitfld.byte 0x0 4. " GPIODATA4 ,GPIO Data 4" "L,H" bitfld.byte 0x0 3. " GPIODATA3 ,GPIO Data 3" "L,H" bitfld.byte 0x0 2. " GPIODATA2 ,GPIO Data 2" "L,H" textline " " bitfld.byte 0x0 1. " GPIODATA1 ,GPIO Data 1" "L,H" bitfld.byte 0x0 0. " GPIODATA0 ,GPIO Data 0" "L,H" group.byte 0x400++0x00 line.byte 0x00 "GPIODIR,Data direction register" bitfld.byte 0x00 7. " GPIODIR[7] ,Direction of pin 7" "Input,Output" bitfld.byte 0x00 6. " GPIODIR[6] ,Direction of pin 6" "Input,Output" bitfld.byte 0x00 5. " GPIODIR[5] ,Direction of pin 5" "Input,Output" textline " " bitfld.byte 0x00 4. " GPIODIR[4] ,Direction of pin 4" "Input,Output" bitfld.byte 0x00 3. " GPIODIR[3] ,Direction of pin 3" "Input,Output" bitfld.byte 0x00 2. " GPIODIR[2] ,Direction of pin 2" "Input,Output" textline " " bitfld.byte 0x00 1. " GPIODIR[1] ,Direction of pin 1" "Input,Output" bitfld.byte 0x00 0. " GPIODIR[0] ,Direction of pin 0" "Input,Output" group.byte 0x404++0x00 line.byte 0x00 "GPIOIS,Detect level or an edge register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIS[7] ,Detect level or an edge of pin 7" "Edge,Level" bitfld.byte 0x00 6. " GPIOIS[6] ,Detect level or an edge of pin 6" "Edge,Level" endif bitfld.byte 0x00 5. " GPIOIS[5] ,Detect level or an edge of pin 5" "Edge,Level" textline " " bitfld.byte 0x00 4. " GPIOIS[4] ,Detect level or an edge of pin 4" "Edge,Level" bitfld.byte 0x00 3. " GPIOIS[3] ,Detect level or an edge of pin 3" "Edge,Level" bitfld.byte 0x00 2. " GPIOIS[2] ,Detect level or an edge of pin 2" "Edge,Level" textline " " bitfld.byte 0x00 1. " GPIOIS[1] ,Detect level or an edge of pin 1" "Edge,Level" bitfld.byte 0x00 0. " GPIOIS[0] ,Detect level or an edge of pin 0" "Edge,Level" group.byte 0x408++0x00 line.byte 0x00 "GPIOIBE,Interrupt Both Edges register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIBE[7] ,Interrupt Both Edges of pin 7" "Single edge,Both edges" bitfld.byte 0x00 6. " GPIOIBE[6] ,Interrupt Both Edges of pin 6" "Single edge,Both edges" textline " " endif bitfld.byte 0x00 5. " GPIOIBE[5] ,Interrupt Both Edges of pin 5" "Single edge,Both edges" bitfld.byte 0x00 4. " GPIOIBE[4] ,Interrupt Both Edges of pin 4" "Single edge,Both edges" textline " " bitfld.byte 0x00 3. " GPIOIBE[3] ,Interrupt Both Edges of pin 3" "Single edge,Both edges" bitfld.byte 0x00 2. " GPIOIBE[2] ,Interrupt Both Edges of pin 2" "Single edge,Both edges" textline " " bitfld.byte 0x00 1. " GPIOIBE[1] ,Interrupt Both Edges of pin 1" "Single edge,Both edges" bitfld.byte 0x00 0. " GPIOIBE[0] ,Interrupt Both Edges of pin 0" "Single edge,Both edges" group.byte 0x40c++0x00 line.byte 0x00 "GPIOIEV,Interrupt Event register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIEV[7] ,Interrupt Event of pin 7" "Falling/low,Rising/high" bitfld.byte 0x00 6. " GPIOIEV[6] ,Interrupt Event of pin 6" "Falling/low,Rising/high" textline " " endif bitfld.byte 0x00 5. " GPIOIEV[5] ,Interrupt Event of pin 5" "Falling/low,Rising/high" bitfld.byte 0x00 4. " GPIOIEV[4] ,Interrupt Event of pin 4" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 3. " GPIOIEV[3] ,Interrupt Event of pin 3" "Falling/low,Rising/high" bitfld.byte 0x00 2. " GPIOIEV[2] ,Interrupt Event of pin 2" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 1. " GPIOIEV[1] ,Interrupt Event of pin 1" "Falling/low,Rising/high" bitfld.byte 0x00 0. " GPIOIEV[0] ,Interrupt Event of pin 0" "Falling/low,Rising/high" group.byte 0x410++0x00 line.byte 0x00 "GPIOIE,Interrupt Mask register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIE[7] ,Interrupt Mask of pin 7" "Masked,Not masked" bitfld.byte 0x00 6. " GPIOIE[6] ,Interrupt Mask of pin 6" "Masked,Not masked" endif bitfld.byte 0x00 5. " GPIOIE[5] ,Interrupt Mask of pin 5" "Masked,Not masked" textline " " bitfld.byte 0x00 4. " GPIOIE[4] ,Interrupt Mask of pin 4" "Masked,Not masked" bitfld.byte 0x00 3. " GPIOIE[3] ,Interrupt Mask of pin 3" "Masked,Not masked" bitfld.byte 0x00 2. " GPIOIE[2] ,Interrupt Mask of pin 2" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " GPIOIE[1] ,Interrupt Mask of pin 1" "Masked,Not masked" bitfld.byte 0x00 0. " GPIOIE[0] ,Interrupt Mask of pin 0" "Masked,Not masked" rgroup.byte 0x414++0x00 line.byte 0x00 "GPIORIS,Raw Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIORIS[7] ,Raw Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIORIS[6] ,Raw Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIORIS[5] ,Raw Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIORIS[4] ,Raw Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIORIS[3] ,Raw Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIORIS[2] ,Raw Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIORIS[1] ,Raw Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIORIS[0] ,Raw Interrupt Status of pin 0" "No interrupt,Interrupt" rgroup.byte 0x418++0x00 line.byte 0x00 "GPIOMIS,Masked Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOMIS[7] ,Masked Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIOMIS[6] ,Masked Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIOMIS[5] ,Masked Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIOMIS[4] ,Masked Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIOMIS[3] ,Masked Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIOMIS[2] ,Masked Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIOMIS[1] ,Masked Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIOMIS[0] ,Masked Interrupt Status of pin 0" "No interrupt,Interrupt" wgroup.byte 0x41C++0x00 line.byte 0x00 "GPIOIC,Interrupt Clear register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIC[7] ,Interrupt Clear of pin 7" "No effect,Cleared" bitfld.byte 0x00 6. " GPIOIC[6] ,Interrupt Clear of pin 6" "No effect,Cleared" endif bitfld.byte 0x00 5. " GPIOIC[5] ,Interrupt Clear of pin 5" "No effect,Cleared" textline " " bitfld.byte 0x00 4. " GPIOIC[4] ,Interrupt Clear of pin 4" "No effect,Cleared" bitfld.byte 0x00 3. " GPIOIC[3] ,Interrupt Clear of pin 3" "No effect,Cleared" bitfld.byte 0x00 2. " GPIOIC[2] ,Interrupt Clear of pin 2" "No effect,Cleared" textline " " bitfld.byte 0x00 1. " GPIOIC[1] ,Interrupt Clear of pin 1" "No effect,Cleared" bitfld.byte 0x00 0. " GPIOIC[0] ,Interrupt Clear of pin 0" "No effect,Cleared" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.byte 0x420++0x00 line.byte 0x00 "GPIOAFSEL,Mode control register" bitfld.byte 0x00 7. " GPIOAFSEL[7] ,Mode control of pin 7" "Software,Hardware" bitfld.byte 0x00 6. " GPIOAFSEL[6] ,Mode control of pin 6" "Software,Hardware" textline " " bitfld.byte 0x00 5. " GPIOAFSEL[5] ,Mode control of pin 5" "Software,Hardware" bitfld.byte 0x00 4. " GPIOAFSEL[4] ,Mode control of pin 4" "Software,Hardware" textline " " bitfld.byte 0x00 3. " GPIOAFSEL[3] ,Mode control of pin 3" "Software,Hardware" bitfld.byte 0x00 2. " GPIOAFSEL[2] ,Mode control of pin 2" "Software,Hardware" textline " " bitfld.byte 0x00 1. " GPIOAFSEL[1] ,Mode control of pin 1" "Software,Hardware" bitfld.byte 0x00 0. " GPIOAFSEL[0] ,Mode control of pin 0" "Software,Hardware" endif rgroup.byte 0xFE0++0x0 line.byte 0x00 "GPIOPERIPHID0,Peripheral Identification 0 Register" rgroup.byte 0xFE4++0x0 line.byte 0x00 "GPIOPERIPHID1,Peripheral Identification 1 Register" rgroup.byte 0xFE8++0x0 line.byte 0x00 "GPIOPERIPHID2,Peripheral Identification 2 Register" rgroup.byte 0xFEc++0x0 line.byte 0x00 "GPIOPERIPHID3,Peripheral Identification 3 Register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xFF0++0x00 line.byte 0x00 "GPIOCELLID0,Peripheral Cell Id 0 Register" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GPIOCELLID1,Peripheral Cell Id 1 Register" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GPIOCELLID2,Peripheral Cell Id 2 Register" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GPIOCELLID3,Peripheral Cell Id 3 Register" endif width 0xB tree.end endif sif (cpu()=="SPEAR300"||cpu()=="SPEAR320") tree "GPIO" base asd:0xa9000000 width 15. group.byte 0x00++0x00 line.byte 0x0 "GPIODATA,GPIO$1 Data Register" bitfld.byte 0x0 7. " GPIODATA7 ,GPIO Data 7" "L,H" bitfld.byte 0x0 6. " GPIODATA6 ,GPIO Data 6" "L,H" bitfld.byte 0x0 5. " GPIODATA5 ,GPIO Data 5" "L,H" textline " " bitfld.byte 0x0 4. " GPIODATA4 ,GPIO Data 4" "L,H" bitfld.byte 0x0 3. " GPIODATA3 ,GPIO Data 3" "L,H" bitfld.byte 0x0 2. " GPIODATA2 ,GPIO Data 2" "L,H" textline " " bitfld.byte 0x0 1. " GPIODATA1 ,GPIO Data 1" "L,H" bitfld.byte 0x0 0. " GPIODATA0 ,GPIO Data 0" "L,H" group.byte 0x400++0x00 line.byte 0x00 "GPIODIR,Data direction register" bitfld.byte 0x00 7. " GPIODIR[7] ,Direction of pin 7" "Input,Output" bitfld.byte 0x00 6. " GPIODIR[6] ,Direction of pin 6" "Input,Output" bitfld.byte 0x00 5. " GPIODIR[5] ,Direction of pin 5" "Input,Output" textline " " bitfld.byte 0x00 4. " GPIODIR[4] ,Direction of pin 4" "Input,Output" bitfld.byte 0x00 3. " GPIODIR[3] ,Direction of pin 3" "Input,Output" bitfld.byte 0x00 2. " GPIODIR[2] ,Direction of pin 2" "Input,Output" textline " " bitfld.byte 0x00 1. " GPIODIR[1] ,Direction of pin 1" "Input,Output" bitfld.byte 0x00 0. " GPIODIR[0] ,Direction of pin 0" "Input,Output" group.byte 0x404++0x00 line.byte 0x00 "GPIOIS,Detect level or an edge register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIS[7] ,Detect level or an edge of pin 7" "Edge,Level" bitfld.byte 0x00 6. " GPIOIS[6] ,Detect level or an edge of pin 6" "Edge,Level" endif bitfld.byte 0x00 5. " GPIOIS[5] ,Detect level or an edge of pin 5" "Edge,Level" textline " " bitfld.byte 0x00 4. " GPIOIS[4] ,Detect level or an edge of pin 4" "Edge,Level" bitfld.byte 0x00 3. " GPIOIS[3] ,Detect level or an edge of pin 3" "Edge,Level" bitfld.byte 0x00 2. " GPIOIS[2] ,Detect level or an edge of pin 2" "Edge,Level" textline " " bitfld.byte 0x00 1. " GPIOIS[1] ,Detect level or an edge of pin 1" "Edge,Level" bitfld.byte 0x00 0. " GPIOIS[0] ,Detect level or an edge of pin 0" "Edge,Level" group.byte 0x408++0x00 line.byte 0x00 "GPIOIBE,Interrupt Both Edges register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIBE[7] ,Interrupt Both Edges of pin 7" "Single edge,Both edges" bitfld.byte 0x00 6. " GPIOIBE[6] ,Interrupt Both Edges of pin 6" "Single edge,Both edges" textline " " endif bitfld.byte 0x00 5. " GPIOIBE[5] ,Interrupt Both Edges of pin 5" "Single edge,Both edges" bitfld.byte 0x00 4. " GPIOIBE[4] ,Interrupt Both Edges of pin 4" "Single edge,Both edges" textline " " bitfld.byte 0x00 3. " GPIOIBE[3] ,Interrupt Both Edges of pin 3" "Single edge,Both edges" bitfld.byte 0x00 2. " GPIOIBE[2] ,Interrupt Both Edges of pin 2" "Single edge,Both edges" textline " " bitfld.byte 0x00 1. " GPIOIBE[1] ,Interrupt Both Edges of pin 1" "Single edge,Both edges" bitfld.byte 0x00 0. " GPIOIBE[0] ,Interrupt Both Edges of pin 0" "Single edge,Both edges" group.byte 0x40c++0x00 line.byte 0x00 "GPIOIEV,Interrupt Event register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIEV[7] ,Interrupt Event of pin 7" "Falling/low,Rising/high" bitfld.byte 0x00 6. " GPIOIEV[6] ,Interrupt Event of pin 6" "Falling/low,Rising/high" textline " " endif bitfld.byte 0x00 5. " GPIOIEV[5] ,Interrupt Event of pin 5" "Falling/low,Rising/high" bitfld.byte 0x00 4. " GPIOIEV[4] ,Interrupt Event of pin 4" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 3. " GPIOIEV[3] ,Interrupt Event of pin 3" "Falling/low,Rising/high" bitfld.byte 0x00 2. " GPIOIEV[2] ,Interrupt Event of pin 2" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 1. " GPIOIEV[1] ,Interrupt Event of pin 1" "Falling/low,Rising/high" bitfld.byte 0x00 0. " GPIOIEV[0] ,Interrupt Event of pin 0" "Falling/low,Rising/high" group.byte 0x410++0x00 line.byte 0x00 "GPIOIE,Interrupt Mask register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIE[7] ,Interrupt Mask of pin 7" "Masked,Not masked" bitfld.byte 0x00 6. " GPIOIE[6] ,Interrupt Mask of pin 6" "Masked,Not masked" endif bitfld.byte 0x00 5. " GPIOIE[5] ,Interrupt Mask of pin 5" "Masked,Not masked" textline " " bitfld.byte 0x00 4. " GPIOIE[4] ,Interrupt Mask of pin 4" "Masked,Not masked" bitfld.byte 0x00 3. " GPIOIE[3] ,Interrupt Mask of pin 3" "Masked,Not masked" bitfld.byte 0x00 2. " GPIOIE[2] ,Interrupt Mask of pin 2" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " GPIOIE[1] ,Interrupt Mask of pin 1" "Masked,Not masked" bitfld.byte 0x00 0. " GPIOIE[0] ,Interrupt Mask of pin 0" "Masked,Not masked" rgroup.byte 0x414++0x00 line.byte 0x00 "GPIORIS,Raw Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIORIS[7] ,Raw Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIORIS[6] ,Raw Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIORIS[5] ,Raw Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIORIS[4] ,Raw Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIORIS[3] ,Raw Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIORIS[2] ,Raw Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIORIS[1] ,Raw Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIORIS[0] ,Raw Interrupt Status of pin 0" "No interrupt,Interrupt" rgroup.byte 0x418++0x00 line.byte 0x00 "GPIOMIS,Masked Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOMIS[7] ,Masked Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIOMIS[6] ,Masked Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIOMIS[5] ,Masked Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIOMIS[4] ,Masked Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIOMIS[3] ,Masked Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIOMIS[2] ,Masked Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIOMIS[1] ,Masked Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIOMIS[0] ,Masked Interrupt Status of pin 0" "No interrupt,Interrupt" wgroup.byte 0x41C++0x00 line.byte 0x00 "GPIOIC,Interrupt Clear register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIC[7] ,Interrupt Clear of pin 7" "No effect,Cleared" bitfld.byte 0x00 6. " GPIOIC[6] ,Interrupt Clear of pin 6" "No effect,Cleared" endif bitfld.byte 0x00 5. " GPIOIC[5] ,Interrupt Clear of pin 5" "No effect,Cleared" textline " " bitfld.byte 0x00 4. " GPIOIC[4] ,Interrupt Clear of pin 4" "No effect,Cleared" bitfld.byte 0x00 3. " GPIOIC[3] ,Interrupt Clear of pin 3" "No effect,Cleared" bitfld.byte 0x00 2. " GPIOIC[2] ,Interrupt Clear of pin 2" "No effect,Cleared" textline " " bitfld.byte 0x00 1. " GPIOIC[1] ,Interrupt Clear of pin 1" "No effect,Cleared" bitfld.byte 0x00 0. " GPIOIC[0] ,Interrupt Clear of pin 0" "No effect,Cleared" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.byte 0x420++0x00 line.byte 0x00 "GPIOAFSEL,Mode control register" bitfld.byte 0x00 7. " GPIOAFSEL[7] ,Mode control of pin 7" "Software,Hardware" bitfld.byte 0x00 6. " GPIOAFSEL[6] ,Mode control of pin 6" "Software,Hardware" textline " " bitfld.byte 0x00 5. " GPIOAFSEL[5] ,Mode control of pin 5" "Software,Hardware" bitfld.byte 0x00 4. " GPIOAFSEL[4] ,Mode control of pin 4" "Software,Hardware" textline " " bitfld.byte 0x00 3. " GPIOAFSEL[3] ,Mode control of pin 3" "Software,Hardware" bitfld.byte 0x00 2. " GPIOAFSEL[2] ,Mode control of pin 2" "Software,Hardware" textline " " bitfld.byte 0x00 1. " GPIOAFSEL[1] ,Mode control of pin 1" "Software,Hardware" bitfld.byte 0x00 0. " GPIOAFSEL[0] ,Mode control of pin 0" "Software,Hardware" endif rgroup.byte 0xFE0++0x0 line.byte 0x00 "GPIOPERIPHID0,Peripheral Identification 0 Register" rgroup.byte 0xFE4++0x0 line.byte 0x00 "GPIOPERIPHID1,Peripheral Identification 1 Register" rgroup.byte 0xFE8++0x0 line.byte 0x00 "GPIOPERIPHID2,Peripheral Identification 2 Register" rgroup.byte 0xFEc++0x0 line.byte 0x00 "GPIOPERIPHID3,Peripheral Identification 3 Register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xFF0++0x00 line.byte 0x00 "GPIOCELLID0,Peripheral Cell Id 0 Register" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GPIOCELLID1,Peripheral Cell Id 1 Register" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GPIOCELLID2,Peripheral Cell Id 2 Register" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GPIOCELLID3,Peripheral Cell Id 3 Register" endif width 0xB tree.end endif tree "Basic Subsystem GPIO" base asd:0xFC980000 width 15. group.byte 0x00++0x00 line.byte 0x0 "GPIODATA,GPIO$1 Data Register" bitfld.byte 0x0 7. " GPIODATA7 ,GPIO Data 7" "L,H" bitfld.byte 0x0 6. " GPIODATA6 ,GPIO Data 6" "L,H" bitfld.byte 0x0 5. " GPIODATA5 ,GPIO Data 5" "L,H" textline " " bitfld.byte 0x0 4. " GPIODATA4 ,GPIO Data 4" "L,H" bitfld.byte 0x0 3. " GPIODATA3 ,GPIO Data 3" "L,H" bitfld.byte 0x0 2. " GPIODATA2 ,GPIO Data 2" "L,H" textline " " bitfld.byte 0x0 1. " GPIODATA1 ,GPIO Data 1" "L,H" bitfld.byte 0x0 0. " GPIODATA0 ,GPIO Data 0" "L,H" group.byte 0x400++0x00 line.byte 0x00 "GPIODIR,Data direction register" bitfld.byte 0x00 7. " GPIODIR[7] ,Direction of pin 7" "Input,Output" bitfld.byte 0x00 6. " GPIODIR[6] ,Direction of pin 6" "Input,Output" bitfld.byte 0x00 5. " GPIODIR[5] ,Direction of pin 5" "Input,Output" textline " " bitfld.byte 0x00 4. " GPIODIR[4] ,Direction of pin 4" "Input,Output" bitfld.byte 0x00 3. " GPIODIR[3] ,Direction of pin 3" "Input,Output" bitfld.byte 0x00 2. " GPIODIR[2] ,Direction of pin 2" "Input,Output" textline " " bitfld.byte 0x00 1. " GPIODIR[1] ,Direction of pin 1" "Input,Output" bitfld.byte 0x00 0. " GPIODIR[0] ,Direction of pin 0" "Input,Output" group.byte 0x404++0x00 line.byte 0x00 "GPIOIS,Detect level or an edge register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIS[7] ,Detect level or an edge of pin 7" "Edge,Level" bitfld.byte 0x00 6. " GPIOIS[6] ,Detect level or an edge of pin 6" "Edge,Level" endif bitfld.byte 0x00 5. " GPIOIS[5] ,Detect level or an edge of pin 5" "Edge,Level" textline " " bitfld.byte 0x00 4. " GPIOIS[4] ,Detect level or an edge of pin 4" "Edge,Level" bitfld.byte 0x00 3. " GPIOIS[3] ,Detect level or an edge of pin 3" "Edge,Level" bitfld.byte 0x00 2. " GPIOIS[2] ,Detect level or an edge of pin 2" "Edge,Level" textline " " bitfld.byte 0x00 1. " GPIOIS[1] ,Detect level or an edge of pin 1" "Edge,Level" bitfld.byte 0x00 0. " GPIOIS[0] ,Detect level or an edge of pin 0" "Edge,Level" group.byte 0x408++0x00 line.byte 0x00 "GPIOIBE,Interrupt Both Edges register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIBE[7] ,Interrupt Both Edges of pin 7" "Single edge,Both edges" bitfld.byte 0x00 6. " GPIOIBE[6] ,Interrupt Both Edges of pin 6" "Single edge,Both edges" textline " " endif bitfld.byte 0x00 5. " GPIOIBE[5] ,Interrupt Both Edges of pin 5" "Single edge,Both edges" bitfld.byte 0x00 4. " GPIOIBE[4] ,Interrupt Both Edges of pin 4" "Single edge,Both edges" textline " " bitfld.byte 0x00 3. " GPIOIBE[3] ,Interrupt Both Edges of pin 3" "Single edge,Both edges" bitfld.byte 0x00 2. " GPIOIBE[2] ,Interrupt Both Edges of pin 2" "Single edge,Both edges" textline " " bitfld.byte 0x00 1. " GPIOIBE[1] ,Interrupt Both Edges of pin 1" "Single edge,Both edges" bitfld.byte 0x00 0. " GPIOIBE[0] ,Interrupt Both Edges of pin 0" "Single edge,Both edges" group.byte 0x40c++0x00 line.byte 0x00 "GPIOIEV,Interrupt Event register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIEV[7] ,Interrupt Event of pin 7" "Falling/low,Rising/high" bitfld.byte 0x00 6. " GPIOIEV[6] ,Interrupt Event of pin 6" "Falling/low,Rising/high" textline " " endif bitfld.byte 0x00 5. " GPIOIEV[5] ,Interrupt Event of pin 5" "Falling/low,Rising/high" bitfld.byte 0x00 4. " GPIOIEV[4] ,Interrupt Event of pin 4" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 3. " GPIOIEV[3] ,Interrupt Event of pin 3" "Falling/low,Rising/high" bitfld.byte 0x00 2. " GPIOIEV[2] ,Interrupt Event of pin 2" "Falling/low,Rising/high" textline " " bitfld.byte 0x00 1. " GPIOIEV[1] ,Interrupt Event of pin 1" "Falling/low,Rising/high" bitfld.byte 0x00 0. " GPIOIEV[0] ,Interrupt Event of pin 0" "Falling/low,Rising/high" group.byte 0x410++0x00 line.byte 0x00 "GPIOIE,Interrupt Mask register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIE[7] ,Interrupt Mask of pin 7" "Masked,Not masked" bitfld.byte 0x00 6. " GPIOIE[6] ,Interrupt Mask of pin 6" "Masked,Not masked" endif bitfld.byte 0x00 5. " GPIOIE[5] ,Interrupt Mask of pin 5" "Masked,Not masked" textline " " bitfld.byte 0x00 4. " GPIOIE[4] ,Interrupt Mask of pin 4" "Masked,Not masked" bitfld.byte 0x00 3. " GPIOIE[3] ,Interrupt Mask of pin 3" "Masked,Not masked" bitfld.byte 0x00 2. " GPIOIE[2] ,Interrupt Mask of pin 2" "Masked,Not masked" textline " " bitfld.byte 0x00 1. " GPIOIE[1] ,Interrupt Mask of pin 1" "Masked,Not masked" bitfld.byte 0x00 0. " GPIOIE[0] ,Interrupt Mask of pin 0" "Masked,Not masked" rgroup.byte 0x414++0x00 line.byte 0x00 "GPIORIS,Raw Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIORIS[7] ,Raw Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIORIS[6] ,Raw Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIORIS[5] ,Raw Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIORIS[4] ,Raw Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIORIS[3] ,Raw Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIORIS[2] ,Raw Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIORIS[1] ,Raw Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIORIS[0] ,Raw Interrupt Status of pin 0" "No interrupt,Interrupt" rgroup.byte 0x418++0x00 line.byte 0x00 "GPIOMIS,Masked Interrupt Status register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOMIS[7] ,Masked Interrupt Status of pin 7" "No interrupt,Interrupt" bitfld.byte 0x00 6. " GPIOMIS[6] ,Masked Interrupt Status of pin 6" "No interrupt,Interrupt" textline " " endif bitfld.byte 0x00 5. " GPIOMIS[5] ,Masked Interrupt Status of pin 5" "No interrupt,Interrupt" bitfld.byte 0x00 4. " GPIOMIS[4] ,Masked Interrupt Status of pin 4" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " GPIOMIS[3] ,Masked Interrupt Status of pin 3" "No interrupt,Interrupt" bitfld.byte 0x00 2. " GPIOMIS[2] ,Masked Interrupt Status of pin 2" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " GPIOMIS[1] ,Masked Interrupt Status of pin 1" "No interrupt,Interrupt" bitfld.byte 0x00 0. " GPIOMIS[0] ,Masked Interrupt Status of pin 0" "No interrupt,Interrupt" wgroup.byte 0x41C++0x00 line.byte 0x00 "GPIOIC,Interrupt Clear register" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") bitfld.byte 0x00 7. " GPIOIC[7] ,Interrupt Clear of pin 7" "No effect,Cleared" bitfld.byte 0x00 6. " GPIOIC[6] ,Interrupt Clear of pin 6" "No effect,Cleared" endif bitfld.byte 0x00 5. " GPIOIC[5] ,Interrupt Clear of pin 5" "No effect,Cleared" textline " " bitfld.byte 0x00 4. " GPIOIC[4] ,Interrupt Clear of pin 4" "No effect,Cleared" bitfld.byte 0x00 3. " GPIOIC[3] ,Interrupt Clear of pin 3" "No effect,Cleared" bitfld.byte 0x00 2. " GPIOIC[2] ,Interrupt Clear of pin 2" "No effect,Cleared" textline " " bitfld.byte 0x00 1. " GPIOIC[1] ,Interrupt Clear of pin 1" "No effect,Cleared" bitfld.byte 0x00 0. " GPIOIC[0] ,Interrupt Clear of pin 0" "No effect,Cleared" sif (cpu()!="SPEAR310"&&cpu()!="SPEAR320"&&cpu()!="SPEAR320S") group.byte 0x420++0x00 line.byte 0x00 "GPIOAFSEL,Mode control register" bitfld.byte 0x00 7. " GPIOAFSEL[7] ,Mode control of pin 7" "Software,Hardware" bitfld.byte 0x00 6. " GPIOAFSEL[6] ,Mode control of pin 6" "Software,Hardware" textline " " bitfld.byte 0x00 5. " GPIOAFSEL[5] ,Mode control of pin 5" "Software,Hardware" bitfld.byte 0x00 4. " GPIOAFSEL[4] ,Mode control of pin 4" "Software,Hardware" textline " " bitfld.byte 0x00 3. " GPIOAFSEL[3] ,Mode control of pin 3" "Software,Hardware" bitfld.byte 0x00 2. " GPIOAFSEL[2] ,Mode control of pin 2" "Software,Hardware" textline " " bitfld.byte 0x00 1. " GPIOAFSEL[1] ,Mode control of pin 1" "Software,Hardware" bitfld.byte 0x00 0. " GPIOAFSEL[0] ,Mode control of pin 0" "Software,Hardware" endif rgroup.byte 0xFE0++0x0 line.byte 0x00 "GPIOPERIPHID0,Peripheral Identification 0 Register" rgroup.byte 0xFE4++0x0 line.byte 0x00 "GPIOPERIPHID1,Peripheral Identification 1 Register" rgroup.byte 0xFE8++0x0 line.byte 0x00 "GPIOPERIPHID2,Peripheral Identification 2 Register" rgroup.byte 0xFEc++0x0 line.byte 0x00 "GPIOPERIPHID3,Peripheral Identification 3 Register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.byte 0xFF0++0x00 line.byte 0x00 "GPIOCELLID0,Peripheral Cell Id 0 Register" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GPIOCELLID1,Peripheral Cell Id 1 Register" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GPIOCELLID2,Peripheral Cell Id 2 Register" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GPIOCELLID3,Peripheral Cell Id 3 Register" endif width 0xB tree.end tree.end sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "PWM (Pulse width modulators)" base asd:0xA8000000 width 16. group.long 0x0++0xB "CHANNEL 1" line.long 0x00 "CONTROL_REG_1,PWM control register 1" hexmask.long.word 0x0 2.--15. 1. " PRESCALER ,Prescaler" bitfld.long 0x0 0. " EN ,Enable bit for corresponding PWM1 output" "Disabled,Enabled" line.long 0x4 "DUTY_REG_1,PWM duty cycle register 1" hexmask.long.word 0x4 0.--15. 1. " DUTY ,Duty factor of the corresponding PWM output" line.long 0x8 "PERIOD_REG_1,PWM period length register 1" hexmask.long.word 0x8 0.--15. 1. " PERIOD ,Period of the corresponding PWM output" group.long 0x10++0xB "CHANNEL 2" line.long 0x00 "CONTROL_REG_2,PWM control register 2" hexmask.long.word 0x0 2.--15. 1. " PRESCALER ,Prescaler" bitfld.long 0x0 0. " EN ,Enable bit for corresponding PWM2 output" "Disabled,Enabled" line.long 0x4 "DUTY_REG_2,PWM duty cycle register 2" hexmask.long.word 0x4 0.--15. 1. " DUTY ,Duty factor of the corresponding PWM output" line.long 0x8 "PERIOD_REG_2,PWM period length register 2" hexmask.long.word 0x8 0.--15. 1. " PERIOD ,Period of the corresponding PWM output" group.long 0x20++0xB "CHANNEL 3" line.long 0x00 "CONTROL_REG_3,PWM control register 3" hexmask.long.word 0x0 2.--15. 1. " PRESCALER ,Prescaler" bitfld.long 0x0 0. " EN ,Enable bit for corresponding PWM3 output" "Disabled,Enabled" line.long 0x4 "DUTY_REG_3,PWM duty cycle register 3" hexmask.long.word 0x4 0.--15. 1. " DUTY ,Duty factor of the corresponding PWM output" line.long 0x8 "PERIOD_REG_3,PWM period length register 3" hexmask.long.word 0x8 0.--15. 1. " PERIOD ,Period of the corresponding PWM output" group.long 0x30++0xB "CHANNEL 4" line.long 0x00 "CONTROL_REG_4,PWM control register 4" hexmask.long.word 0x0 2.--15. 1. " PRESCALER ,Prescaler" bitfld.long 0x0 0. " EN ,Enable bit for corresponding PWM4 output" "Disabled,Enabled" line.long 0x4 "DUTY_REG_4,PWM duty cycle register 4" hexmask.long.word 0x4 0.--15. 1. " DUTY ,Duty factor of the corresponding PWM output" line.long 0x8 "PERIOD_REG_4,PWM period length register 4" hexmask.long.word 0x8 0.--15. 1. " PERIOD ,Period of the corresponding PWM output" width 0x0b tree.end endif tree "ADC (Analog-to-Digital Converter)" sif (cpu()=="SPEAR600") base asd:0xD8200000 width 17. group.word 0x00++0x01 line.word 0x00 "ADC_STATUS_REG,ADC Status Register" sif (cpu()=="SPEAR600") bitfld.word 0x00 13. " HIGH_RESOLUTION ,Enable HIGH Resolution (16 bit) output" "10-bit,16-bit" endif bitfld.word 0x0 12. " DMA_EN ,DMA Request Enable" "Disabled,Enabled" bitfld.word 0x0 11. " ECVEXT_SCAN_RATE ,SCAN RATE type in Enhanced mode" "Internal,External" textline " " bitfld.word 0x0 10. " ENM ,Enhanced mode" "Disabled,Enabled" textline " " bitfld.word 0x0 9. " V_REF_SEL ,Reference voltages type" "External,Internal" bitfld.word 0x0 8. " CONV_READY ,Conversion is finished" "Not ready,Ready" textline " " bitfld.word 0x0 5.--7. " AVRG_SAMPLE ,Average of samples to collect for average" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.word 0x0 4. " POWER_DOWN ,ADC Power on/off" "Disabled,Enabled" textline " " bitfld.word 0x0 1.--3. " CH_SEL ,Allows selecting one of the 8 analog input" "AIN[0],AIN[1],AIN[2],AIN[3],AIN[4],AIN[5],AIN[6],AIN[7]" bitfld.word 0x0 0. " ENABLE ,Conversion enabled" "Disabled,Enabled" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") if (((d.w((asd:0xD8200000+0x00)))&0x2000)==0x0) rgroup.word 0x04++0x01 line.word 0x00 "AVERAGE_REG,Average Register" hexmask.word 0x00 0.--9. 1. " AVERAGE ,Resulting data of the requested ADC conversion" else rgroup.word 0x04++0x01 line.word 0x00 "AVERAGE_REG,Average Register" hexmask.word 0x00 0.--15. 1. " AVERAGE ,Resulting data of the requested ADC conversion" endif group.long 0x08++0x03 line.long 0x00 "SCAN_RATE,SCAN RATE Register" endif group.word 0x0c++0x1 line.word 0x00 "ADC_CLK_REG,ADC Clock frequency Register" bitfld.word 0x00 4.--7. " ADC_CLK_H ,Number of APB clock periods for high state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " ADC_CLK_L ,Number of APB clock period for low state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x10++0x0 line.byte 0x00 "CH0_CTRL,ADC Channel 0 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x14++0x0 line.byte 0x00 "CH1_CTRL,ADC Channel 1 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x18++0x0 line.byte 0x00 "CH2_CTRL,ADC Channel 2 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x1C++0x0 line.byte 0x00 "CH3_CTRL,ADC Channel 3 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x20++0x0 line.byte 0x00 "CH4_CTRL,ADC Channel 4 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x24++0x0 line.byte 0x00 "CH5_CTRL,ADC Channel 5 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x28++0x0 line.byte 0x00 "CH6_CTRL,ADC Channel 6 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x2C++0x0 line.byte 0x00 "CH7_CTRL,ADC Channel 7 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" sif (cpu()=="SPEAR600") rgroup.word 0x30++0x01 line.word 0x00 "CH0_DATA_LSB,Channel 0 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x34++0x01 line.word 0x00 "CH0_DATA_MSB,Channel 0 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x38++0x01 line.word 0x00 "CH1_DATA_LSB,Channel 1 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x3C++0x01 line.word 0x00 "CH1_DATA_MSB,Channel 1 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x40++0x01 line.word 0x00 "CH2_DATA_LSB,Channel 2 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x44++0x01 line.word 0x00 "CH2_DATA_MSB,Channel 2 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x48++0x01 line.word 0x00 "CH3_DATA_LSB,Channel 3 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x4C++0x01 line.word 0x00 "CH3_DATA_MSB,Channel 3 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x50++0x01 line.word 0x00 "CH4_DATA_LSB,Channel 4 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x54++0x01 line.word 0x00 "CH4_DATA_MSB,Channel 4 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x58++0x01 line.word 0x00 "CH5_DATA_LSB,Channel 5 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x5C++0x01 line.word 0x00 "CH5_DATA_MSB,Channel 5 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x60++0x01 line.word 0x00 "CH6_DATA_LSB,Channel 6 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x64++0x01 line.word 0x00 "CH6_DATA_MSB,Channel 6 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x68++0x01 line.word 0x00 "CH7_DATA_LSB,Channel 7 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x6C++0x01 line.word 0x00 "CH7_DATA_MSB,Channel 7 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" else if (((d.w((asd:0xD8200000+0x00)))&0x2000)==0x0) sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x30++0x03 line.long 0x00 "CH0_DATA,Channel 0 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x30++0x01 line.word 0x00 "CH0_DATA,Channel 0 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x34++0x03 line.long 0x00 "CH1_DATA,Channel 1 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x34++0x01 line.word 0x00 "CH1_DATA,Channel 1 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x38++0x03 line.long 0x00 "CH2_DATA,Channel 2 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x38++0x01 line.word 0x00 "CH2_DATA,Channel 2 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x3C++0x03 line.long 0x00 "CH3_DATA,Channel 3 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x3C++0x01 line.word 0x00 "CH3_DATA,Channel 3 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x40++0x03 line.long 0x00 "CH4_DATA,Channel 4 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x40++0x01 line.word 0x00 "CH4_DATA,Channel 4 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x44++0x03 line.long 0x00 "CH5_DATA,Channel 5 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x44++0x01 line.word 0x00 "CH5_DATA,Channel 5 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x48++0x03 line.long 0x00 "CH6_DATA,Channel 6 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x48++0x01 line.word 0x00 "CH6_DATA,Channel 6 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x4C++0x03 line.long 0x00 "CH7_DATA,Channel 7 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x4C++0x01 line.word 0x00 "CH7_DATA,Channel 7 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif else rgroup.long 0x30++0x03 line.long 0x00 "CH0_DATA,Channel 0 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x34++0x03 line.long 0x00 "CH1_DATA,Channel 1 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x38++0x03 line.long 0x00 "CH2_DATA,Channel 2 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x3C++0x03 line.long 0x00 "CH3_DATA,Channel 3 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x40++0x03 line.long 0x00 "CH4_DATA,Channel 4 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x44++0x03 line.long 0x00 "CH5_DATA,Channel 5 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x48++0x03 line.long 0x00 "CH6_DATA,Channel 6 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x4C++0x03 line.long 0x00 "CH7_DATA,Channel 7 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif endif endif sif (cpu()=="SPEAR600") group.word 0x70++0x1 line.word 0x00 "SCAN_RATE_LO,ADC SCAN_RATE_LO Register" group.word 0x74++0x1 line.word 0x00 "SCAN_RATE_HI,ADC SCAN_RATE_HI Register" rgroup.word 0x78++0x1 line.word 0x00 "AVERAGE_REG_LSB,ADC AVERAGE_REG_LSB Register" hexmask.word.byte 0x00 0.--6. 1. " AVRG_REG_LSB ,LSB bits of the result" rgroup.word 0x7c++0x1 line.word 0x00 "AVERAGE_REG_MSB,ADC AVERAGE_REG_MSB Register" hexmask.word 0x00 0.--9. 1. " AVRG_REG_MSB ,Integer part of the average of all acquisitions" endif width 0x0b else base asd:0xD0080000 width 17. group.word 0x00++0x01 line.word 0x00 "ADC_STATUS_REG,ADC Status Register" sif (cpu()=="SPEAR600") bitfld.word 0x00 13. " HIGH_RESOLUTION ,Enable HIGH Resolution (16 bit) output" "10-bit,16-bit" endif bitfld.word 0x0 12. " DMA_EN ,DMA Request Enable" "Disabled,Enabled" bitfld.word 0x0 11. " ECVEXT_SCAN_RATE ,SCAN RATE type in Enhanced mode" "Internal,External" textline " " bitfld.word 0x0 10. " ENM ,Enhanced mode" "Disabled,Enabled" textline " " bitfld.word 0x0 9. " V_REF_SEL ,Reference voltages type" "External,Internal" bitfld.word 0x0 8. " CONV_READY ,Conversion is finished" "Not ready,Ready" textline " " bitfld.word 0x0 5.--7. " AVRG_SAMPLE ,Average of samples to collect for average" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.word 0x0 4. " POWER_DOWN ,ADC Power on/off" "Disabled,Enabled" textline " " bitfld.word 0x0 1.--3. " CH_SEL ,Allows selecting one of the 8 analog input" "AIN[0],AIN[1],AIN[2],AIN[3],AIN[4],AIN[5],AIN[6],AIN[7]" bitfld.word 0x0 0. " ENABLE ,Conversion enabled" "Disabled,Enabled" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") if (((d.w((asd:0xD0080000+0x00)))&0x2000)==0x0) rgroup.word 0x04++0x01 line.word 0x00 "AVERAGE_REG,Average Register" hexmask.word 0x00 0.--9. 1. " AVERAGE ,Resulting data of the requested ADC conversion" else rgroup.word 0x04++0x01 line.word 0x00 "AVERAGE_REG,Average Register" hexmask.word 0x00 0.--15. 1. " AVERAGE ,Resulting data of the requested ADC conversion" endif group.long 0x08++0x03 line.long 0x00 "SCAN_RATE,SCAN RATE Register" endif group.word 0x0c++0x1 line.word 0x00 "ADC_CLK_REG,ADC Clock frequency Register" bitfld.word 0x00 4.--7. " ADC_CLK_H ,Number of APB clock periods for high state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " ADC_CLK_L ,Number of APB clock period for low state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x10++0x0 line.byte 0x00 "CH0_CTRL,ADC Channel 0 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x14++0x0 line.byte 0x00 "CH1_CTRL,ADC Channel 1 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x18++0x0 line.byte 0x00 "CH2_CTRL,ADC Channel 2 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x1C++0x0 line.byte 0x00 "CH3_CTRL,ADC Channel 3 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x20++0x0 line.byte 0x00 "CH4_CTRL,ADC Channel 4 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x24++0x0 line.byte 0x00 "CH5_CTRL,ADC Channel 5 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x28++0x0 line.byte 0x00 "CH6_CTRL,ADC Channel 6 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" group.byte 0x2C++0x0 line.byte 0x00 "CH7_CTRL,ADC Channel 7 Control register" bitfld.byte 0x00 1.--3. " AVERAGE ,Number of average sample field" "Single data,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" bitfld.byte 0x00 0. " CHANNEL_EN ,Activation of channel during Scan" "Disabled,Enabled" sif (cpu()=="SPEAR600") rgroup.word 0x30++0x01 line.word 0x00 "CH0_DATA_LSB,Channel 0 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x34++0x01 line.word 0x00 "CH0_DATA_MSB,Channel 0 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x38++0x01 line.word 0x00 "CH1_DATA_LSB,Channel 1 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x3C++0x01 line.word 0x00 "CH1_DATA_MSB,Channel 1 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x40++0x01 line.word 0x00 "CH2_DATA_LSB,Channel 2 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x44++0x01 line.word 0x00 "CH2_DATA_MSB,Channel 2 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x48++0x01 line.word 0x00 "CH3_DATA_LSB,Channel 3 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x4C++0x01 line.word 0x00 "CH3_DATA_MSB,Channel 3 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x50++0x01 line.word 0x00 "CH4_DATA_LSB,Channel 4 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x54++0x01 line.word 0x00 "CH4_DATA_MSB,Channel 4 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x58++0x01 line.word 0x00 "CH5_DATA_LSB,Channel 5 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x5C++0x01 line.word 0x00 "CH5_DATA_MSB,Channel 5 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x60++0x01 line.word 0x00 "CH6_DATA_LSB,Channel 6 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x64++0x01 line.word 0x00 "CH6_DATA_MSB,Channel 6 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x68++0x01 line.word 0x00 "CH7_DATA_LSB,Channel 7 data register" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" rgroup.word 0x6C++0x01 line.word 0x00 "CH7_DATA_MSB,Channel 7 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word.byte 0x00 0.--6. 1. " DATA ,Result of last conversion on relative channel" else if (((d.w((asd:0xD0080000+0x00)))&0x2000)==0x0) sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x30++0x03 line.long 0x00 "CH0_DATA,Channel 0 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x30++0x01 line.word 0x00 "CH0_DATA,Channel 0 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x34++0x03 line.long 0x00 "CH1_DATA,Channel 1 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x34++0x01 line.word 0x00 "CH1_DATA,Channel 1 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x38++0x03 line.long 0x00 "CH2_DATA,Channel 2 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x38++0x01 line.word 0x00 "CH2_DATA,Channel 2 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x3C++0x03 line.long 0x00 "CH3_DATA,Channel 3 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x3C++0x01 line.word 0x00 "CH3_DATA,Channel 3 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x40++0x03 line.long 0x00 "CH4_DATA,Channel 4 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x40++0x01 line.word 0x00 "CH4_DATA,Channel 4 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x44++0x03 line.long 0x00 "CH5_DATA,Channel 5 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x44++0x01 line.word 0x00 "CH5_DATA,Channel 5 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x48++0x03 line.long 0x00 "CH6_DATA,Channel 6 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x48++0x01 line.word 0x00 "CH6_DATA,Channel 6 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rgroup.long 0x4C++0x03 line.long 0x00 "CH7_DATA,Channel 7 data register" bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" else rgroup.word 0x4C++0x01 line.word 0x00 "CH7_DATA,Channel 7 data register" bitfld.word 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.word 0x00 0.--9. 1. " DATA ,Result of last conversion on relative channel" endif else rgroup.long 0x30++0x03 line.long 0x00 "CH0_DATA,Channel 0 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x34++0x03 line.long 0x00 "CH1_DATA,Channel 1 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x38++0x03 line.long 0x00 "CH2_DATA,Channel 2 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x3C++0x03 line.long 0x00 "CH3_DATA,Channel 3 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x40++0x03 line.long 0x00 "CH4_DATA,Channel 4 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x44++0x03 line.long 0x00 "CH5_DATA,Channel 5 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x48++0x03 line.long 0x00 "CH6_DATA,Channel 6 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif rgroup.long 0x4C++0x03 line.long 0x00 "CH7_DATA,Channel 7 data register" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") bitfld.long 0x00 17. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--16. 1. " DATA ,Result of last conversion on relative channel" else bitfld.long 0x00 10. " VALID_DATA ,Data valid" "Not valid,Valid" hexmask.long 0x00 0.--15. 1. " DATA ,Result of last conversion on relative channel" endif endif endif sif (cpu()=="SPEAR600") group.word 0x70++0x1 line.word 0x00 "SCAN_RATE_LO,ADC SCAN_RATE_LO Register" group.word 0x74++0x1 line.word 0x00 "SCAN_RATE_HI,ADC SCAN_RATE_HI Register" rgroup.word 0x78++0x1 line.word 0x00 "AVERAGE_REG_LSB,ADC AVERAGE_REG_LSB Register" hexmask.word.byte 0x00 0.--6. 1. " AVRG_REG_LSB ,LSB bits of the result" rgroup.word 0x7c++0x1 line.word 0x00 "AVERAGE_REG_MSB,ADC AVERAGE_REG_MSB Register" hexmask.word 0x00 0.--9. 1. " AVRG_REG_MSB ,Integer part of the average of all acquisitions" endif width 0x0b endif tree.end tree "RTC (Real Time Clock)" base asd:0xFC900000 width 12. if (((d.l((asd:0xFC900000+0x00)))&0x300000)>0x100000) group.long 0x0++0x3 line.long 0x00 "TIME,RTC Time Register" bitfld.long 0x0 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x0 16.--19. ",Hour Units in BCD Format" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x0 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x0 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x0 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x0 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0x0++0x3 line.long 0x00 "TIME,RTC Time Register" bitfld.long 0x00 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x00 16.--19. ",Hour Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." endif if ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x00)&&(((d.l((asd:0xFC900000+0x04)))&0x30)!=0x30)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x100||0x300||0x500||0x700||0x800||0x400||0x600||0x900))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x00)&&(((d.l((asd:0xFC900000+0x04)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x100||0x300||0x500||0x700||0x800))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x00)&&(((d.l((asd:0xFC900000+0x04)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x400||0x600||0x900))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x1000)&&(((d.l((asd:0xFC900000+0x04)))&0x30)!=0x30)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x000||0x200||0x100))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x1000)&&(((d.l((asd:0xFC900000+0x04)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x000||0x200))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x1000)&&(((d.l((asd:0xFC900000+0x04)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x100))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x04)))&0x1000)==0x0000)&&(((d.l((asd:0xFC900000+0x04)))&0xF00)==(0x200))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." endif if (((d.l((asd:0xFC900000+0x08)))&0x300000)>0x100000) group.long 0x08++0x3 line.long 0x00 "ALARM_TIME,RTC Alarm Time Register" bitfld.long 0x00 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x00 16.--19. ",Hour Units in BCD Format" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0x08++0x3 line.long 0x00 "ALARM_TIME,RTC Alarm Time Register" bitfld.long 0x00 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x00 16.--19. ",Hour Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." endif if ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x00)&&(((d.l((asd:0xFC900000+0x0c)))&0x30)!=0x30)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x100||0x300||0x500||0x700||0x800||0x400||0x600||0x900))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x00)&&(((d.l((asd:0xFC900000+0x0c)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x100||0x300||0x500||0x700||0x800))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x00)&&(((d.l((asd:0xFC900000+0x0c)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x400||0x600||0x900))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x1000)&&(((d.l((asd:0xFC900000+0x0c)))&0x30)!=0x30)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x000||0x200||0x100))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x1000)&&(((d.l((asd:0xFC900000+0x0c)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x000||0x200))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x1000)&&(((d.l((asd:0xFC900000+0x0c)))&0x30)==0x30)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x100))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((asd:0xFC900000+0x0c)))&0x1000)==0x0000)&&(((d.l((asd:0xFC900000+0x0c)))&0xF00)==(0x200))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." endif group.long 0x10++0x03 line.long 0x00 "CONTROL,RTC Control Register" bitfld.long 0x00 31. " IE ,Interrupt event enable" "Disabled,Enabled" bitfld.long 0x00 9. " TB ,Time bypass" "Normal,Bypass" bitfld.long 0x00 8. " PB ,Prescaler bypass" "Normal,Bypass" textline " " bitfld.long 0x00 5. " MASK[5] ,Year's mask bit" "Not masked,Masked" bitfld.long 0x00 4. " MASK[4] ,Month's mask bit" "Not masked,Masked" bitfld.long 0x00 3. " MASK[3] ,Day's mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 2. " MASK[2] ,Hour's mask bit" "Not masked,Masked" bitfld.long 0x00 1. " MASK[1] ,Minute's mask bit" "Not masked,Masked" bitfld.long 0x00 0. " MASK[0] ,Second's mask bit" "Not masked,Masked" group.long 0x14++0x3 line.long 0x00 "STATUS,RTC STATUS Register" bitfld.long 0x00 31. " I ,Interrupt status" "No interrupt,Interrupt" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x00 5. " LD ,Write to DATE register lost" "Not lost,Lost" rbitfld.long 0x00 4. " LT ,Write to TIME register lost" "Not lost,Lost" textline " " rbitfld.long 0x00 3. " PD ,Pending write to DATE register" "Not asserted,Asserted" rbitfld.long 0x00 2. " PT ,Pending write to TIME register" "Not asserted,Asserted" rbitfld.long 0x00 0. " RC ,Isolation of timer" "Isolated,Not isolated" else bitfld.long 0x00 5. " LD ,Write to DATE register lost" "Not lost,Lost" bitfld.long 0x00 4. " LT ,Write to TIME register lost" "Not lost,Lost" textline " " bitfld.long 0x00 3. " PD ,Pending write to DATE register" "Not asserted,Asserted" bitfld.long 0x00 2. " PT ,Pending write to TIME register" "Not asserted,Asserted" bitfld.long 0x00 0. " RC ,Isolation of timer" "Isolated,Not isolated" endif sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.long 0x18++0x07 line.long 0x00 "REG1MC,General purpose register 1" line.long 0x04 "REG2MC,General purpose register 2" elif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.long 0x18++0x3F line.long 0x0 "GP_REG_0,General purpose register 0" line.long 0x4 "GP_REG_1,General purpose register 1" line.long 0x8 "GP_REG_2,General purpose register 2" line.long 0xC "GP_REG_3,General purpose register 3" line.long 0x10 "GP_REG_4,General purpose register 4" line.long 0x14 "GP_REG_5,General purpose register 5" line.long 0x18 "GP_REG_6,General purpose register 6" line.long 0x1C "GP_REG_7,General purpose register 7" line.long 0x20 "GP_REG_8,General purpose register 8" line.long 0x24 "GP_REG_9,General purpose register 9" line.long 0x28 "GP_REG_10,General purpose register 10" line.long 0x2C "GP_REG_11,General purpose register 11" line.long 0x30 "GP_REG_12,General purpose register 12" line.long 0x34 "GP_REG_13,General purpose register 13" line.long 0x38 "GP_REG_14,General purpose register 14" line.long 0x3C "GP_REG_15,General purpose register 15" endif width 0x0b tree.end sif (cpu()=="SPEAR600") tree.open "EXPI (Expansion interface)" base asd:0xCFFFE000 width 20. tree "MLEPX IP registers" group.long 0x0++0xb line.long 0x00 "MLEXP_PL1,Arbitration priority level register" bitfld.long 0x00 0.--3. " PRY_LVL ,Arbitration priority level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MLEXP_PL2,Arbitration priority level register" bitfld.long 0x04 0.--3. " PRY_LVL ,Arbitration priority level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "MLEXP_PL3,Arbitration priority level register" bitfld.long 0x08 0.--3. " PRY_LVL ,Arbitration priority level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3c++0x7 line.long 0x00 "MLEPX_EBTCOUNT,Early burst termination counter register" hexmask.long.word 0x00 0.--9. 1. " EBT_CNTR ,Early burst termination count register" line.long 0x04 "MLEXP_EBT_EN,Early burst terminations enable register" bitfld.long 0x04 0. " EBT_ENAB ,Early burst termination enable bit active high" "Disabled,Enabled" rgroup.long 0x44++0x3 line.long 0x00 "MLEXP_EBT,Early burst terminations status register" bitfld.long 0x00 0. " EARLY_BRST_TERM ,Early burst termination register" "Not terminated,Terminated" group.long 0x48++0x3 line.long 0x00 "MLEXP_DFT_MST,Default master register" bitfld.long 0x00 0.--3. " DEF_MST ,Default master ID number register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x90++0x3 line.long 0x00 "MLEXP_COMP_VERSION,IP version register" tree.end tree "AHB_Xlat Table registers" rgroup.long 0x400++0x3 line.long 0x00 "XLAT_ENT0,Address Segment Translation register 0" group.long 0x404++0x1f line.long 0x0 "XLAT_ENT1,Address Segment Translation register 1" hexmask.long.word 0x0 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" line.long 0x4 "XLAT_ENT2,Address Segment Translation register 2" hexmask.long.word 0x4 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" line.long 0x8 "XLAT_ENT3,Address Segment Translation register 3" hexmask.long.word 0x8 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" line.long 0xC "XLAT_ENT4,Address Segment Translation register 4" hexmask.long.word 0xC 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" line.long 0x10 "XLAT_ENT5,Address Segment Translation register 5" hexmask.long.word 0x10 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" line.long 0x14 "XLAT_ENT6,Address Segment Translation register 6" hexmask.long.word 0x14 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" line.long 0x18 "XLAT_ENT7,Address Segment Translation register 7" hexmask.long.word 0x18 0.--14. 1. " ADD_SEGMENT ,Upper address portion of the external EXPI master transaction" tree.end tree "SE2H bridge overview configuration registers" wgroup.long 0x1000++0x3 line.long 0x00 "SE2H_EWSC,Error clear register" bitfld.long 0x00 3. " CLEAR_MST3 ,Clear the write error event of master-3" "No effect,Clear" bitfld.long 0x00 2. " CLEAR_MST2 ,Clear the write error event of master-2" "No effect,Clear" textline " " bitfld.long 0x00 1. " CLEAR_MST1 ,Clear the write error event of master-1" "No effect,Clear" rgroup.long 0x1004++0x7 line.long 0x00 "SE2H_EWS,Error status register" bitfld.long 0x00 3. " CLEAR_MST3 ,Error received during a write transaction originated from master-3" "No error,Error" bitfld.long 0x00 2. " CLEAR_MST2 ,Error received during a write transaction originated from master-2" "No error,Error" textline " " bitfld.long 0x00 1. " CLEAR_MST1 ,Error received during a write transaction originated from master-1" "No error,Error" line.long 0x04 "SE2H_MEWS,Multiple error status register" bitfld.long 0x04 3. " CLEAR_MST3 ,Multiple error received during a write transaction originated from master-3" "No error,Error" bitfld.long 0x04 2. " CLEAR_MST2 ,Multiple error received during a write transaction originated from master-2" "No error,Error" textline " " bitfld.long 0x04 1. " CLEAR_MST1 ,Multiple error received during a write transaction originated from master-1" "No error,Error" rgroup.long 0x13f0++0xf line.long 0x00 "SE2H_COMP_PARAM1,Bridge silicon parameter 1 register" bitfld.long 0x00 14.--16. " PHY_MDAT_WDTH ,Read and write data bus width of the secondary AHB system" "Reserved,Reserved,32bit,?..." bitfld.long 0x00 13. " PHY_MADR_WDTH ,Address bus width of the secondary AHB system" "32bit,?..." textline " " bitfld.long 0x00 12. " PHY_MBIG_END ,Data bus endianness of the secondary AHB system" "Little-Endian,?..." bitfld.long 0x00 10.--11. " PHY_SDAT_WDTH ,Read and write data bus width of the primary AHB system" "32bit,?..." textline " " bitfld.long 0x00 9. " PHY_SADR_WDTH ,Address bus width of the primary AHB system" "32bit,?..." bitfld.long 0x00 8. " PHY_SBIG_END ,Data bus endianness of the primary AHB system" "Little-Endian,?..." textline " " bitfld.long 0x00 4.--7. " NUM_PRIM_MST ,Number of masters in the primary AHB" "0,1,2,3,4,?..." line.long 0x04 "SE2H_COMP_PARAM2,Bridge silicon parameter 2 register" bitfld.long 0x04 16.--19. " RD_PRFTC_DPH ,Number of locations considered for prefetch by the bridge master" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x04 8.--15. 1. " RD_BUFF_DPH ,Number of locations in the read buffer" hexmask.long.byte 0x04 0.--7. 1. " WD_BUFF_DPH ,Number of locations in the write buffer" line.long 0x08 "SE2H_COMP_VERSION,Bridge version register" line.long 0x0c "SE2H_COMP_TYPE,Bridge type register" tree.end tree "ME2H bridge overview configuration registers" wgroup.long 0x1800++0x3 line.long 0x00 "ME2H_EWSC,Error clear register" bitfld.long 0x00 3. " CLEAR_MST3 ,Clear the write error event of master-3" "No effect,Clear" bitfld.long 0x00 2. " CLEAR_MST2 ,Clear the write error event of master-2" "No effect,Clear" textline " " bitfld.long 0x00 1. " CLEAR_MST1 ,Clear the write error event of master-1" "No effect,Clear" rgroup.long 0x1804++0x7 line.long 0x00 "ME2H_EWS,Error status register" bitfld.long 0x00 3. " CLEAR_MST3 ,Error received during a write transaction originated from master-3" "No error,Error" bitfld.long 0x00 2. " CLEAR_MST2 ,Error received during a write transaction originated from master-2" "No error,Error" textline " " bitfld.long 0x00 1. " CLEAR_MST1 ,Error received during a write transaction originated from master-1" "No error,Error" line.long 0x04 "ME2H_MEWS,Multiple error status register" bitfld.long 0x04 3. " CLEAR_MST3 ,Multiple error received during a write transaction originated from master-3" "No error,Error" bitfld.long 0x04 2. " CLEAR_MST2 ,Multiple error received during a write transaction originated from master-2" "No error,Error" textline " " bitfld.long 0x04 1. " CLEAR_MST1 ,Multiple error received during a write transaction originated from master-1" "No error,Error" rgroup.long 0x1bf0++0xf line.long 0x00 "ME2H_COMP_PARAM1,Bridge silicon parameter 1 register" bitfld.long 0x00 14.--16. " PHY_MDAT_WDTH ,Read and write data bus width of the secondary AHB system" "Reserved,Reserved,32bit,?..." bitfld.long 0x00 13. " PHY_MADR_WDTH ,Address bus width of the secondary AHB system" "32bit,?..." textline " " bitfld.long 0x00 12. " PHY_MBIG_END ,Data bus endianness of the secondary AHB system" "Little-Endian,?..." bitfld.long 0x00 10.--11. " PHY_SDAT_WDTH ,Read and write data bus width of the primary AHB system" "32bit,?..." textline " " bitfld.long 0x00 9. " PHY_SADR_WDTH ,Address bus width of the primary AHB system" "32bit,?..." bitfld.long 0x00 8. " PHY_SBIG_END ,Data bus endianness of the primary AHB system" "Little-Endian,?..." textline " " bitfld.long 0x00 4.--7. " NUM_PRIM_MST ,Number of masters in the primary AHB" "0,1,2,3,4,?..." line.long 0x04 "ME2H_COMP_PARAM2,Bridge silicon parameter 2 register" bitfld.long 0x04 16.--19. " RD_PRFTC_DPH ,Number of locations considered for prefetch by the bridge master" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x04 8.--15. 1. " RD_BUFF_DPH ,Number of locations in the read buffer" hexmask.long.byte 0x04 0.--7. 1. " WD_BUFF_DPH ,Number of locations in the write buffer" line.long 0x08 "ME2H_COMP_VERSION,Bridge version register" line.long 0x0c "ME2H_COMP_TYPE,Bridge type register" tree.end width 0xB tree.end endif sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "C3 (Cryptographic Co-Processor)" base asd:0xD9000000 width 12. group.long 0x00++0x03 "System register" line.long 0x00 "SYS_SCR,Status and control register" rbitfld.long 0x0 30.--31. " ID3_S ,Instruction Dispatcher 3 Status" "0,1,2,3" rbitfld.long 0x0 28.--29. " ID2_S ,Instruction Dispatcher 2 Status" "0,1,2,3" textline " " rbitfld.long 0x0 26.--27. " ID1_S ,Instruction Dispatcher 1 Status" "0,1,2,3" rbitfld.long 0x0 24.--25. " ID0_S ,Instruction Dispatcher 0 Status" "0,1,2,3" textline " " bitfld.long 0x0 23. " ISD3 ,Instruction Dispatcher 3 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 22. " ISD2 ,Instruction Dispatcher 2 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 21. " ISD1 ,Instruction Dispatcher 1 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 20. " ISD0 ,Instruction Dispatcher 0 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 19. " ISA ,Interrupt Status of All Instruction Dispatchers" "No interrupt,Interrupt" bitfld.long 0x0 18. " CISR ,Clear Interrupt Status on Read" "Not cleared,Cleared" textline " " bitfld.long 0x0 17. " BEND ,Big Endian" "0,1" bitfld.long 0x0 16. " ARST ,Asynchronous Master Reset" "No reset,Reset" textline " " rbitfld.long 0x0 14.--15. " C7_S ,Channel 7 status" "0,1,2,3" rbitfld.long 0x0 12.--13. " C6_S ,Channel 6 status" "0,1,2,3" textline " " rbitfld.long 0x0 10.--11. " C5_S ,Channel 5 status" "0,1,2,3" rbitfld.long 0x0 8.--9. " C4_S ,Channel 4 status" "0,1,2,3" textline " " rbitfld.long 0x0 6.--7. " C3_S ,Channel 3 status" "0,1,2,3" rbitfld.long 0x0 4.--5. " C2_S ,Channel 2 status" "0,1,2,3" textline " " rbitfld.long 0x0 2.--3. " C1_S ,Channel 1 status" "0,1,2,3" rbitfld.long 0x0 0.--1. " C0_S ,Channel 0 status" "0,1,2,3" rgroup.long 0x40++0x03 line.long 0x00 "SYS_STR,Channel status register" bitfld.long 0x00 30.--31. " C15S ,Channel 15 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 28.--29. " C14S ,Channel 14 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 26.--27. " C13S ,Channel 13 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 24.--25. " C12S ,Channel 12 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 22.--23. " C11S ,Channel 11 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 20.--21. " C10S ,Channel 10 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 18.--19. " C9S ,Channel 9 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 16.--17. " C8S ,Channel 8 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 14.--15. " C7S ,Channel 7 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 12.--13. " C6S ,Channel 6 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 10.--11. " C5S ,Channel 5 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 8.--9. " C4S ,Channel 4 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 6.--7. " C3S ,Channel 3 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 4.--5. " C2S ,Channel 2 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 2.--3. " C1S ,Channel 1 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 0.--1. " C0S ,Channel 0 Status" "Not Present,Error,Idle,Busy" rgroup.long 0x3F0++0x03 line.long 0x00 "SYS_VER,Hardware version and revision" hexmask.long.byte 0x00 24.--31. 1. " V ,Hardware Version" hexmask.long.byte 0x00 16.--23. 1. " R ,Hardware Revision" textline " " hexmask.long.word 0x00 0.--15. 1. " S ,Hardware Sub-revision" rgroup.long 0x3fc++0x03 line.long 0x00 "SYS_HWID,Hardware ID Register" base (asd:0xD9000000+0x400) group.long 0x00++0x03 "Master Interface Registers" line.long 0x00 "HIF_MP,Memory Page Register" button "Red Memory" "d (asd:0xD9000000)--(asd:0xD9000000+0x1FF) /long" rgroup.long 0x300++0x03 line.long 0x00 "HIF_MSIZE,Memory Size Register" hexmask.long.word 0x00 2.--16. 1. " S ,Size of the internal Memory in Bytes" group.long 0x304++0x13 line.long 0x00 "HIF_MBAR,Memory Base Address Register" hexmask.long.word 0x00 16.--31. 1. " B ,Base Address of the Internal Memory" line.long 0x04 "HIF_MCAR,Memory Control Register" bitfld.long 0x04 17. " DAIR ,Disable Auto Increment on Read" "No,Yes" bitfld.long 0x04 16. " DAIW ,Disable Auto Increment on Write" "No,Yes" textline " " bitfld.long 0x04 0. " EMM ,Enable Memory Mapping" "Disabled,Enabled" line.long 0x08 "HIF_MPBAR,Memory Page Base Address Register" hexmask.long.word 0x08 16.--31. 1. " B ,Base Address" hexmask.long.byte 0x08 9.--15. 1. " P ,Page Number" line.long 0x0c "HIF_MAAR,Memory Access Address Register" hexmask.long.word 0x0C 16.--31. 1. " B ,Memory Base Address" hexmask.long.word 0x0C 2.--15. 1. " A ,AHB slave accesses to the HIF_MADR" line.long 0x10 "HIF_MADR,Memory Access Data Register" group.long 0x344++0x07 line.long 0x00 "HIF_NBAR,Byte Bucket Base Address Register" hexmask.long.word 0x00 16.--31. 1. " B ,Base Address of the Byte Bucket" line.long 0x04 "HIF_NCR,Byte Bucket Control Register" bitfld.long 0x04 0. " ENM ,Enable Byte Bucket Mapping" "Disabled,Enabled" base (asd:0xD9000000+0x1000) group.long 0x00++0x03 "Instruction Dispatcher Registers" line.long 0x00 "ID_SCR,Status and Control Register" rbitfld.long 0x00 30.--31. " IDS ,Instruction Dispatcher Status" "Not Present,Error,Idle,Run" rbitfld.long 0x00 29. " BERR ,Bus Error" "No error,Error" textline " " rbitfld.long 0x00 26. " CERR ,Channel Error" "No error,Error" rbitfld.long 0x00 25. " CBSY ,Channel Busy" "Not busy,Busy" textline " " rbitfld.long 0x00 24. " CDNX ,Channel Does Not Exist" "Exist,Not exist" bitfld.long 0x00 23. " IS ,Interrupt Status" "Not requested,Requested" textline " " bitfld.long 0x00 22. " IES ,Interrupt Enable on Stop" "No interrupt,Interrupt" bitfld.long 0x00 21. " IER ,Interrupt Enable on Error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " SSC ,Single Step Command" "Not executed,Executed" bitfld.long 0x00 19. " SSE ,Single Step Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " IGR ,Ignore Errors" "0,1" bitfld.long 0x00 16. " RST ,Reset Command" "No reset,Reset" textline " " rbitfld.long 0x00 14.--15. " C7S ,Channel 7 Status" "Not Present,Error,Idle,Busy" rbitfld.long 0x00 12.--13. " C6S ,Channel 6 Status" "Not Present,Error,Idle,Busy" textline " " rbitfld.long 0x00 10.--11. " C5S ,Channel 5 Status" "Not Present,Error,Idle,Busy" rbitfld.long 0x00 8.--9. " C4S ,Channel 4 Status" "Not Present,Error,Idle,Busy" textline " " rbitfld.long 0x00 6.--7. " C3S ,Channel 3 Status" "Not Present,Error,Idle,Busy" rbitfld.long 0x00 4.--5. " C2S ,Channel 2 Status" "Not Present,Error,Idle,Busy" textline " " rbitfld.long 0x00 2.--3. " C1S ,Channel 1 Status" "Not Present,Error,Idle,Busy" rbitfld.long 0x00 0.--1. " C0S ,Channel 0 Status" "Not Present,Error,Idle,Busy" group.long 0x10++0x03 line.long 0x00 "ID_IP,Instruction Pointer Register" rgroup.long 0x20++0x0f line.long 0x0 "ID_IR0,Instruction Word 0 Register" line.long 0x4 "ID_IR1,Instruction Word 1 Register" line.long 0x8 "ID_IR2,Instruction Word 2 Register" line.long 0xC "ID_IR3,Instruction Word 3 Register" width 21. base (asd:0xD9000000+0x2400) group.long 0x00++0x13 "Data Encryption Standard Channel" line.long 0x00 "DES_DATAINOUT_HI,Data input/output Register High" line.long 0x04 "DES_DATAINOUT_LO,Data input/output Register Low" line.long 0x08 "DES_FEEDBACK_HI,Feedback Register High" line.long 0x0c "DES_FEEDBACK_LO,Feedback Register Low" line.long 0x10 "DES_CONTROLSTATUS,Control and Status Register" bitfld.long 0x10 2. " ED ,Encryption/Decryption" "Encryption,Decryption" bitfld.long 0x10 1. " MODE ,Mode of operation" "ECB,CBC" textline " " bitfld.long 0x10 0. " ALGO ,Algorithm" "DES,3DES" group.long 0x20++0x17 line.long (0x0) "DES_KEY1_HI,TKey Register 0" line.long (0x0+0x04) "DES_KEY1_LO,TKey Register 1" line.long (0x8) "DES_KEY2_HI,TKey Register 2" line.long (0x8+0x04) "DES_KEY2_LO,TKey Register 3" line.long (0x10) "DES_KEY3_HI,TKey Register 4" line.long (0x10+0x04) "DES_KEY3_LO,TKey Register 5" rgroup.long 0x3fc++0x03 line.long 0x00 "DES_ID,Channel ID Register" base (asd:0xD9000000+0x2800) group.long 0x00++0x2f "Advanced Encryption Standard Channel" line.long 0x0 "AES_DATAINOUT0,Data input/output Register 0" line.long 0x4 "AES_DATAINOUT1,Data input/output Register 1" line.long 0x8 "AES_DATAINOUT2,Data input/output Register 2" line.long 0xC "AES_DATAINOUT3,Data input/output Register 3" line.long 0x10 "AES_FEEDBACK0,Feedback Register 0" line.long 0x14 "AES_FEEDBACK1,Feedback Register 1" line.long 0x18 "AES_FEEDBACK2,Feedback Register 2" line.long 0x1C "AES_FEEDBACK3,Feedback Register 3" line.long 0x20 "AES_COUNTER0,Counter Register 0" line.long 0x24 "AES_COUNTER1,Counter Register 1" line.long 0x28 "AES_COUNTER2,Counter Register 2" line.long 0x2C "AES_COUNTER3,Counter Register 3" group.long 0x40++0x03 line.long 0x00 "AES_CONTROLSTATUS,Control and Status Register" bitfld.long 0x00 31. " ED ,Encryption/Decryption" "Decryption,Encryption" bitfld.long 0x00 29.--30. " KEYS ,Key Size" "128 bits,192 bits,256 bits,?..." textline " " bitfld.long 0x00 26.--28. " MODE ,- Mode of operation" "ECB,CBR,CTR,?..." bitfld.long 0x00 25. " KEYRDY ,Key ready" "Ready,Not ready" textline " " bitfld.long 0x00 23.--24. " CTXS ,Context Save/Restore" "None,Context restore,Context save,?..." group.long 0x50++0x01f line.long 0x0 "AES_KEY0,Key Registers 0" line.long 0x4 "AES_KEY1,Key Registers 1" line.long 0x8 "AES_KEY2,Key Registers 2" line.long 0xC "AES_KEY3,Key Registers 3" line.long 0x10 "AES_KEY4,Key Registers 4" line.long 0x14 "AES_KEY5,Key Registers 5" line.long 0x18 "AES_KEY6,Key Registers 6" line.long 0x1C "AES_KEY7,Key Registers 7" rgroup.long 0x3fc++0x03 line.long 0x00 "AES_ID,Channel ID Register" width 23. base (asd:0xD9000000+0x2c00) group.long 0x200++0x03 "UNIFIED HASH WITH HMAC Channel" line.long 0x00 "UHH_CU_CONTROL_STATUS,Control and Status Register" rbitfld.long 0x00 30.--31. " CS ,Channel Status" "Not Present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR ,Bus Error" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR ,Dispatching Protocol Error" "No error,Error" rbitfld.long 0x00 27. " PER ,Couple/Chaining Error" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR ,Instruction Decode Error" "No error,Error" rbitfld.long 0x00 25. " AERR ,Alignment Error" "No error,Error" textline " " bitfld.long 0x00 16. " RST ,Reset Command" "No reset,Reset" group.long 0x0ec++0x03 line.long 0x00 "UHH_DATA_IN,Data input Register" group.long 0x200++0x03 line.long 0x00 "UHH_CB_CONTROL_STATUS,Control and Status Register" bitfld.long 0x00 26.--30. " N_BLW ,Number of Bits for the Last Word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 22.--25. " STAT ,CryptoBlock Internal Status" "BLOCK_IDLE,HASH_DO_RESET,HASH_REQUEST_DATA,HASH_PROCESS_DATA,HMAC_DO_RESET_SHORT_KEY,HMAC_DO_RESET_LONG_KEY,HMAC_REQUEST_IKEY_SHORT,HMAC_REQUEST_IKEY_LONG,HMAC_REQUEST_DATA,HMAC_PROCESS_DATA_SHORT_KEY,HMAC_PROCESS_DATA_LONG_KEY,HMAC_REQUEST_OKEY_SHORT,HMAC_REQUEST_OKEY_LONG,CONTEXT_SAVE,CONTEXT_RESTORE,?..." textline " " bitfld.long 0x00 21. " INVALID ,Data Input Valid" "Valid,Not valid" bitfld.long 0x00 20. " SHORT ,Short Output" "96 bits,Full length" textline " " bitfld.long 0x00 16.--17. " ALG ,Current Algorithm" "MD5,SHA-1,?..." width 11. group.long 0x20--0xef line.long 0x00 "UHH_SR,Core Status Register" bitfld.long 0x00 30.--31. " ALG ,Current Algorithm" "MD5,SHA-1,?..." bitfld.long 0x00 25.--26. " CPHA ,Current Phase" "0,1,2,3" textline " " bitfld.long 0x00 22.--24. " PST ,Padder State" "Idle state; no padding,Insert the first 1 after the end of the message,Insert extra zeros,Insert the length of the message,Insert extra key,Pause the padding,?..." bitfld.long 0x00 18.--21. " WCNT ,Number of Words" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 14.--17. " ST ,HMAC State" "Idle state; no work in progress,Get short inner key,Pad short inner key,Get message,Wait for the message digest,Get short outer key,Pad short outer key,Wait for the HMAC,HMAC value is ready,Get long inner key,Get long outer key,Wait for long inner key preparation,Wait for long outer key preparation,?..." bitfld.long 0x00 13. " LKEY ,Long Key" "Long,Short" textline " " bitfld.long 0x00 11.--12. " PHA ,Phase" "0,1,2,3" bitfld.long 0x00 9.--10. " CST ,Hash Core State" "Idle state; no work in progress,Compute the digest,Update the result,Computation ended" textline " " hexmask.long.byte 0x00 2.--8. 1. " SCNT ,Step Count" bitfld.long 0x00 1. " LAST ,Last Word Asserted" "Not passed,Passed" line.long 0x4 "UHH_HX0,Hash Status Register 0" line.long 0x8 "UHH_HX1,Hash Status Register 1" line.long 0xC "UHH_HX2,Hash Status Register 2" line.long 0x10 "UHH_HX3,Hash Status Register 3" line.long 0x14 "UHH_HX4,Hash Status Register 4" line.long 0x18 "UHH_HX5,Hash Status Register 5" line.long 0x1C "UHH_HX6,Hash Status Register 6" line.long 0x20 "UHH_HX7,Hash Status Register 7" line.long 0x24 "UHH_X0,Hash Working Register 0" line.long 0x28 "UHH_X1,Hash Working Register 1" line.long 0x2C "UHH_X2,Hash Working Register 2" line.long 0x30 "UHH_X3,Hash Working Register 3" line.long 0x34 "UHH_X4,Hash Working Register 4" line.long 0x38 "UHH_X5,Hash Working Register 5" line.long 0x3C "UHH_X6,Hash Working Register 6" line.long 0x40 "UHH_X7,Hash Working Register 7" line.long 0x44 "UHH_WX0,Message Scheduler Register 0" line.long 0x48 "UHH_WX1,Message Scheduler Register 1" line.long 0x4C "UHH_WX2,Message Scheduler Register 2" line.long 0x50 "UHH_WX3,Message Scheduler Register 3" line.long 0x54 "UHH_WX4,Message Scheduler Register 4" line.long 0x58 "UHH_WX5,Message Scheduler Register 5" line.long 0x5C "UHH_WX6,Message Scheduler Register 6" line.long 0x60 "UHH_WX7,Message Scheduler Register 7" line.long 0x64 "UHH_WX8,Message Scheduler Register 8" line.long 0x68 "UHH_WX9,Message Scheduler Register 9" line.long 0x6C "UHH_WX10,Message Scheduler Register 10" line.long 0x70 "UHH_WX11,Message Scheduler Register 11" line.long 0x74 "UHH_WX12,Message Scheduler Register 12" line.long 0x78 "UHH_WX13,Message Scheduler Register 13" line.long 0x7C "UHH_WX14,Message Scheduler Register 14" line.long 0x80 "UHH_WX15,Message Scheduler Register 15" line.long 0x84 "UHH_UHR,Current Hash Constant Register" line.long 0x88 "UHH_BCLO,Bit Count Register Low" line.long 0x8c "UHH_BCHI,Bit Count Register High" line.long 0x90 "UHH_RK0,HMAC Key Digest Register 0" line.long 0x94 "UHH_RK1,HMAC Key Digest Register 1" line.long 0x98 "UHH_RK2,HMAC Key Digest Register 2" line.long 0x9C "UHH_RK3,HMAC Key Digest Register 3" line.long 0xA0 "UHH_RK4,HMAC Key Digest Register 4" line.long 0xA4 "UHH_RK5,HMAC Key Digest Register 5" line.long 0xA8 "UHH_RK6,HMAC Key Digest Register 6" line.long 0xAC "UHH_RK7,HMAC Key Digest Register 7" line.long 0xB0 "UHH_RH0,HMAC Working Register 0" line.long 0xB4 "UHH_RH1,HMAC Working Register 1" line.long 0xB8 "UHH_RH2,HMAC Working Register 2" line.long 0xBC "UHH_RH3,HMAC Working Register 3" line.long 0xC0 "UHH_RH4,HMAC Working Register 4" line.long 0xC4 "UHH_RH5,HMAC Working Register 5" line.long 0xC8 "UHH_RH6,HMAC Working Register 6" line.long 0xCC "UHH_RH7,HMAC Working Register 7" rgroup.long 0x3fc++0x03 line.long 0x00 "CTAG_IR,Channel ID Register" width 0x0b tree.end endif sif (cpu()=="SPEAR300") tree "C3 (Channel Controller Co-Processor)" base asd:0x40000000 width 10. group.long 0x00++0x03 "System Registers" line.long 0x00 "SYS_STR,Channel Status Register" bitfld.long 0x00 30.--31. " ID3_S ,Instruction Dispatcher 3 Status" "0,1,2,3" bitfld.long 0x00 28.--29. " ID2_S ,Instruction Dispatcher 2 Status" "0,1,2,3" textline " " bitfld.long 0x00 26.--27. " ID1_S ,Instruction Dispatcher 1 Status" "0,1,2,3" bitfld.long 0x00 24.--25. " ID0_S ,Instruction Dispatcher 0 Status" "0,1,2,3" textline " " bitfld.long 0x00 23. " ISD3 ,Instruction Dispatcher 3 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 22. " ISD2 ,Instruction Dispatcher 2 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " ISD1 ,Instruction Dispatcher 1 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 20. " ISD0 ,Instruction Dispatcher 0 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " ISA ,Interrupt Status of All Instruction Dispatchers" "No interrupt,Interrupt" bitfld.long 0x00 18. " CISR ,Clear Interrupt Status on Read" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " BEND ,Big Endian" "0,1" bitfld.long 0x00 16. " ARST ,Asynchronous Master Reset" "No reset,Reset" textline " " bitfld.long 0x00 3. " C3S ,Channel 3 Status" "Low,High" bitfld.long 0x00 2. " C2S ,Channel 2 Status" "Low,High" textline " " bitfld.long 0x00 1. " C1S ,Channel 1 Status" "Low,High" rgroup.long 0x40++0x03 line.long 0x00 "SYS_SCR,Status and Control Register" bitfld.long 0x00 6.--7. " C3S ,Channel 3 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 4.--5. " C2S ,Channel 2 Status" "Not Present,Error,Idle,Busy" textline " " bitfld.long 0x00 2.--3. " C1S ,Channel 1 Status" "Not Present,Error,Idle,Busy" rgroup.long 0x3f0++0x03 line.long 0x00 "SYS_VER,Hardware Version and Revision Register" hexmask.long.byte 0x00 24.--31. 1. " V ,Hardware Version" hexmask.long.byte 0x00 16.--23. 1. " R ,Hardware Revision" hexmask.long.word 0x00 0.--15. 1. " S ,Hardware Sub-revision" rgroup.long 0x3fc++0x03 line.long 0x00 "SYS_HWID,Hardware ID Register" width 11. base asd:(asd:0x40000000+0x400) group.long 0x00++0x03 "Master Interface Registers" line.long 0x00 "HIF_MP,Memory Page Register" rgroup.long 0x300++0x03 line.long 0x00 "HIF_MSIZE,Memory Size Register" hexmask.long.tbyte 0x00 2.--16. 1. " S ,Size of the internal Memory in Bytes" group.long 0x304++0x13 line.long 0x00 "HIF_MBAR,Memory Base Address Register" hexmask.long.word 0x00 16.--31. 1. " B ,Base Address of the Internal Memory" line.long 0x04 "HIF_MCAR,Memory Control Register" bitfld.long 0x04 17. " DAIR ,Disable Auto Increment on Read" "No,Yes" bitfld.long 0x04 16. " DAIW ,Disable Auto Increment on Write" "No,Yes" bitfld.long 0x04 0. " EMM ,Enable Memory Mapping" "Disabled,Enabled" line.long 0x08 "HIF_MPBAR,Memory Page Base Address Register" hexmask.long.word 0x08 16.--31. 1. " B ,Base Address" hexmask.long.byte 0x08 9.--15. 1. " P ,Page Number" line.long 0x0c "HIF_MAAR,Memory Access Address Register" hexmask.long.word 0x0C 16.--31. 1. " B ,Memory Base Address" hexmask.long.word 0x0C 2.--15. 1. " A ,AHB slave accesses to the HIF_MADR" line.long 0x10 "HIF_MADR,Memory Access Data Register" group.long 0x344++0x07 line.long 0x00 "HIF_NBAR,Byte Bucket Base Address Register" hexmask.long.word 0x00 16.--31. 1. " B ,Base Address of the Byte Bucket" line.long 0x04 "HIF_NCR,Byte Bucket Control Register" bitfld.long 0x04 0. " ENM ,Enable Byte Bucket Mapping" "Disabled,Enabled" width 8. base asd:(asd:0x40000000+0x1000) group.long 0x00++0x03 "Instruction Dispatcher Registers" line.long 0x00 "ID_SCR,Status and Control Register" bitfld.long 0x00 30.--31. " IDS ,Instruction Dispatcher Status" "Not Present,Error,Idle,Run" bitfld.long 0x00 29. " BERR ,Bus Error" "No error,Error" bitfld.long 0x00 26. " CERR ,Channel Error" "No error,Error" textline " " bitfld.long 0x00 25. " CBSY ,Channel Busy" "Not busy,Busy" bitfld.long 0x00 24. " CDNX ,Channel Does Not Exist" "Exist,Not exist" bitfld.long 0x00 23. " IS ,Interrupt Status" "Not requested,Requested" textline " " bitfld.long 0x00 22. " IES ,Interrupt Enable on Stop" "No interrupt,Interrupt" bitfld.long 0x00 21. " IER ,Interrupt Enable on Error" "No interrupt,Interrupt" bitfld.long 0x00 20. " SSC ,Single Step Command" "Not executed,Executed" textline " " bitfld.long 0x00 19. " SSE ,Single Step Enable" "Disabled,Enabled" bitfld.long 0x00 17. " IGR ,Ignore Errors" "0,1" bitfld.long 0x00 16. " RST ,Reset Command" "No reset,Reset" textline " " bitfld.long 0x00 6.--7. " C3S ,Channel 3 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 4.--5. " C2S ,Channel 2 Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 2.--3. " C1S ,Channel 1 Status" "Not Present,Error,Idle,Busy" group.long 0x10++0x03 line.long 0x00 "ID_IP,Instruction Pointer Register" rgroup.long 0x20++0x0f line.long 0x0 "ID_IR0,Instruction Word 0 Register" line.long 0x4 "ID_IR1,Instruction Word 1 Register" line.long 0x8 "ID_IR2,Instruction Word 2 Register" line.long 0xC "ID_IR3,Instruction Word 3 Register" base asd:(asd:0x40000000+0x2400) width 19. group.long 0x00++0x13 "Data Encryption Standard Channel" line.long 0x00 "DES_DATAINOUT_HI,Data input/output Register High" line.long 0x04 "DES_DATAINOUT_LO,Data input/output Register Low" line.long 0x08 "DES_FEEDBACK_HI,Feedback Register High" line.long 0x0c "DES_FEEDBACK_LO,Feedback Register Low" line.long 0x10 "DES_CONTROLSTATUS,Control and Status Register" bitfld.long 0x10 2. " ED ,Encryption/Decryption" "Encryption,Decryption" bitfld.long 0x10 1. " MODE ,Mode of operation" "ECB,CBC" bitfld.long 0x10 0. " ALGO ,Algorithm" "DES,3DES" group.long 0x20++0x17 line.long (0x0) "DES_KEY1_HI,TKey Register 0" line.long (0x0+0x04) "DES_KEY1_LO,TKey Register 1" line.long (0x8) "DES_KEY2_HI,TKey Register 2" line.long (0x8+0x04) "DES_KEY2_LO,TKey Register 3" line.long (0x10) "DES_KEY3_HI,TKey Register 4" line.long (0x10+0x04) "DES_KEY3_LO,TKey Register 5" rgroup.long 0x3fc++0x03 line.long 0x00 "DES_ID,Channel ID Register" base asd:(asd:0x40000000+0x2800) group.long 0x00++0x2f "Advanced Encryption Standard Channel" line.long 0x0 "AES_DATAINOUT0,Data input/output Register 0" line.long 0x4 "AES_DATAINOUT1,Data input/output Register 1" line.long 0x8 "AES_DATAINOUT2,Data input/output Register 2" line.long 0xC "AES_DATAINOUT3,Data input/output Register 3" line.long 0x10 "AES_FEEDBACK0,Feedback Register 0" line.long 0x14 "AES_FEEDBACK1,Feedback Register 1" line.long 0x18 "AES_FEEDBACK2,Feedback Register 2" line.long 0x1C "AES_FEEDBACK3,Feedback Register 3" line.long 0x20 "AES_COUNTER0,Counter Register 0" line.long 0x24 "AES_COUNTER1,Counter Register 1" line.long 0x28 "AES_COUNTER2,Counter Register 2" line.long 0x2C "AES_COUNTER3,Counter Register 3" group.long 0x40++0x03 line.long 0x00 "AES_CONTROLSTATUS,Control and Status Register" bitfld.long 0x00 31. " ED ,Encryption/Decryption" "Decryption,Encryption" bitfld.long 0x00 29.--30. " KEYS ,Key Size" "128 bits,192 bits,256 bits,?..." bitfld.long 0x00 26.--28. " MODE ,- Mode of operation" "ECB,CBR,CTR,?..." textline " " bitfld.long 0x00 25. " KEYRDY ,Key ready" "Ready,Not ready" bitfld.long 0x00 23.--24. " CTXS ,Context Save/Restore" "None,Context restore,Context save,?..." group.long 0x50++0x01f line.long 0x0 "AES_KEY0,Key Registers 0" line.long 0x4 "AES_KEY1,Key Registers 1" line.long 0x8 "AES_KEY2,Key Registers 2" line.long 0xC "AES_KEY3,Key Registers 3" line.long 0x10 "AES_KEY4,Key Registers 4" line.long 0x14 "AES_KEY5,Key Registers 5" line.long 0x18 "AES_KEY6,Key Registers 6" line.long 0x1C "AES_KEY7,Key Registers 7" rgroup.long 0x3fc++0x03 line.long 0x00 "AES_ID,Channel ID Register" width 23. base asd:(asd:0x40000000+0x2c00) rgroup.long 0x3fc++0x03 "UNIFIED HASH WITH HMAC Channel" group.long 0x200++0x03 line.long 0x00 "UHH_CU_CONTROL_STATUS,Control and Status Register" bitfld.long 0x00 30.--31. " CS ,Channel Status" "Not Present,Error,Idle,Busy" bitfld.long 0x00 29. " BERR ,Bus Error" "No error,Error" bitfld.long 0x00 28. " DERR ,Dispatching Protocol Error" "No error,Error" textline " " bitfld.long 0x00 27. " PER ,Couple/Chaining Error" "No error,Error" bitfld.long 0x00 26. " IERR ,Instruction Decode Error" "No error,Error" bitfld.long 0x00 25. " AERR ,Alignment Error" "No error,Error" textline " " bitfld.long 0x00 16. " RST ,Reset Command" "No reset,Reset" group.long 0x0ec++0x03 line.long 0x00 "UHH_DATA_IN,Data input Register" group.long 0x200++0x03 line.long 0x00 "UHH_CB_CONTROL_STATUS,Control and Status Register" bitfld.long 0x00 26.--30. " N_BLW ,Number of Bits for the Last Word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 22.--25. " STAT ,CryptoBlock Internal Status" "BLOCK_IDLE,HASH_DO_RESET,HASH_REQUEST_DATA,HASH_PROCESS_DATA,HMAC_DO_RESET_SHORT_KEY,HMAC_DO_RESET_LONG_KEY,HMAC_REQUEST_IKEY_SHORT,HMAC_REQUEST_IKEY_LONG,HMAC_REQUEST_DATA,HMAC_PROCESS_DATA_SHORT_KEY,HMAC_PROCESS_DATA_LONG_KEY,HMAC_REQUEST_OKEY_SHORT,HMAC_REQUEST_OKEY_LONG,CONTEXT_SAVE,CONTEXT_RESTORE,?..." textline " " bitfld.long 0x00 21. " INVALID ,Data Input Valid" "Valid,Not valid" bitfld.long 0x00 20. " SHORT ,Short Output" "96 bits,Full length" textline " " bitfld.long 0x00 16.--17. " ALG ,Current Algorithm" "MD5,SHA-1,?..." width 10. group.long 0x20--0xef line.long 0x00 "UHH_SR,Core Status Register" bitfld.long 0x00 30.--31. " ALG ,Current Algorithm" "MD5,SHA-1,?..." textline " " bitfld.long 0x00 25.--26. " CPHA ,Current Phase" "0,1,2,3" textline " " bitfld.long 0x00 22.--24. " PST ,Padder State" "Idle state; no padding,Insert the first 1 after the end of the message,Insert extra zeros,Insert the length of the message,Insert extra key,Pause the padding,?..." textline " " bitfld.long 0x00 18.--21. " WCNT ,Number of Words" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 14.--17. " ST ,HMAC State" "Idle state; no work in progress,Get short inner key,Pad short inner key,Get message,Wait for the message digest,Get short outer key,Pad short outer key,Wait for the HMAC,HMAC value is ready,Get long inner key,Get long outer key,Wait for long inner key preparation,Wait for long outer key preparation,?..." textline " " bitfld.long 0x00 13. " LKEY ,Long Key" "Long,Short" textline " " bitfld.long 0x00 11.--12. " PHA ,Phase" "0,1,2,3" textline " " bitfld.long 0x00 9.--10. " CST ,Hash Core State" "Idle state; no work in progress,Compute the digest,Update the result,Computation ended" textline " " hexmask.long.byte 0x00 2.--8. 1. " SCNT ,Step Count" textline " " bitfld.long 0x00 1. " LAST ,Last Word Asserted" "Not passed,Passed" line.long 0x4 "UHH_HX0,Hash Status Register 0" line.long 0x8 "UHH_HX1,Hash Status Register 1" line.long 0xC "UHH_HX2,Hash Status Register 2" line.long 0x10 "UHH_HX3,Hash Status Register 3" line.long 0x14 "UHH_HX4,Hash Status Register 4" line.long 0x18 "UHH_HX5,Hash Status Register 5" line.long 0x1C "UHH_HX6,Hash Status Register 6" line.long 0x20 "UHH_HX7,Hash Status Register 7" line.long 0x24 "UHH_X0,Hash Working Register 0" line.long 0x28 "UHH_X1,Hash Working Register 1" line.long 0x2C "UHH_X2,Hash Working Register 2" line.long 0x30 "UHH_X3,Hash Working Register 3" line.long 0x34 "UHH_X4,Hash Working Register 4" line.long 0x38 "UHH_X5,Hash Working Register 5" line.long 0x3C "UHH_X6,Hash Working Register 6" line.long 0x40 "UHH_X7,Hash Working Register 7" line.long 0x44 "UHH_WX0,Message Scheduler Register 0" line.long 0x48 "UHH_WX1,Message Scheduler Register 1" line.long 0x4C "UHH_WX2,Message Scheduler Register 2" line.long 0x50 "UHH_WX3,Message Scheduler Register 3" line.long 0x54 "UHH_WX4,Message Scheduler Register 4" line.long 0x58 "UHH_WX5,Message Scheduler Register 5" line.long 0x5C "UHH_WX6,Message Scheduler Register 6" line.long 0x60 "UHH_WX7,Message Scheduler Register 7" line.long 0x64 "UHH_WX8,Message Scheduler Register 8" line.long 0x68 "UHH_WX9,Message Scheduler Register 9" line.long 0x6C "UHH_WX10,Message Scheduler Register 10" line.long 0x70 "UHH_WX11,Message Scheduler Register 11" line.long 0x74 "UHH_WX12,Message Scheduler Register 12" line.long 0x78 "UHH_WX13,Message Scheduler Register 13" line.long 0x7C "UHH_WX14,Message Scheduler Register 14" line.long 0x80 "UHH_WX15,Message Scheduler Register 15" line.long 0x84 "UHH_UHR,Current Hash Constant Register" line.long 0x88 "UHH_BCLO,Bit Count Register Low" line.long 0x8c "UHH_BCHI,Bit Count Register High" line.long 0x90 "UHH_RK0,HMAC Key Digest Register 0" line.long 0x94 "UHH_RK1,HMAC Key Digest Register 1" line.long 0x98 "UHH_RK2,HMAC Key Digest Register 2" line.long 0x9C "UHH_RK3,HMAC Key Digest Register 3" line.long 0xA0 "UHH_RK4,HMAC Key Digest Register 4" line.long 0xA4 "UHH_RK5,HMAC Key Digest Register 5" line.long 0xA8 "UHH_RK6,HMAC Key Digest Register 6" line.long 0xAC "UHH_RK7,HMAC Key Digest Register 7" line.long 0xB0 "UHH_RH0,HMAC Working Register 0" line.long 0xB4 "UHH_RH1,HMAC Working Register 1" line.long 0xB8 "UHH_RH2,HMAC Working Register 2" line.long 0xBC "UHH_RH3,HMAC Working Register 3" line.long 0xC0 "UHH_RH4,HMAC Working Register 4" line.long 0xC4 "UHH_RH5,HMAC Working Register 5" line.long 0xC8 "UHH_RH6,HMAC Working Register 6" line.long 0xCC "UHH_RH7,HMAC Working Register 7" width 0xb tree.end tree "Telecom Block" base asd:0x50000000 width 16. rgroup.long 0x00++0x03 line.long 0x00 "BOOT,BOOT Register" hexmask.long.byte 0x00 20.--27. 1. " H[7:0] ,Informs the boot software about the hardware" bitfld.long 0x00 16.--19. " B[3:0] ,Boot device" "USB,MAC address from I2C EEPROM,MAC address from SPI EEPROM,Serial NOR Flash,Parallel NOR Flash (8 bit data),Parallel NOR Flash (16 bit data),Nand Flash (8 bit data),Nand Flash (16 bit data),SPI EEPROM,I2C EEPROM,UART,?..." group.long 0x04++0x13 line.long 0x00 "TDM_CONF,TDM_CONF Register" bitfld.long 0x00 31. " LBIO ,Loopback from DIN to DOUT" "No loopback,Loopback" bitfld.long 0x00 30. " LBOI ,Loopback from DOUT to DIN" "No loopback,Loopback" textline " " bitfld.long 0x00 29. " LBSHIO ,Loopback from shift_in register to shift_out register" "No loopback,Loopback" bitfld.long 0x00 28. " LBSD ,Loopback from selected data to store_in register" "No loopback,Loopback" textline " " bitfld.long 0x00 27. " LBPD ,Loopback from parallel data" "No loopback,Loopback" bitfld.long 0x00 26. " ACT ,Activates the int_CLK clock" "Disabled,Enabled" textline " " bitfld.long 0x00 24.--25. " CLKO ,Output on the pins(PL_Clk2|PL_Clk3)" "0|0,Int_CLK|0,Int_CLK|/int_CLK,Int_CLK|Internal clock" textline " " bitfld.long 0x00 22.--23. " MIIC ,Clock to be output on PL_CLK1" "Reserved,Reserved,ClkR_P112,ClkR_Synt(3)" bitfld.long 0x00 19.--21. " ISRC ,Input source for the 7 bits divider" "0,CLKSM (pin TDM_CLK),ClkR_osc1,ClkR_Synt (3),PL_Clk4,0,0,0" textline " " hexmask.long.word 0x00 3.--18. 1. " DIV ,Value compared to the divider counter value" bitfld.long 0x00 2. " BYPASS ,Bypass" "Divider output,Osrc output" textline " " bitfld.long 0x00 1. " INV ,CLKSM signal inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " M/S ,Device Master/Slave mode" "Slave,Master" line.long 0x04 "GPIO8_DIR,GPIO8_DIR Register" bitfld.long 0x04 7. " DIR7 ,GPIO7 pin Input/Output" "Output,Input" bitfld.long 0x04 6. " DIR6 ,GPIO6 pin Input/Output" "Output,Input" bitfld.long 0x04 5. " DIR5 ,GPIO5 pin Input/Output" "Output,Input" bitfld.long 0x04 4. " DIR4 ,GPIO4 pin Input/Output" "Output,Input" textline " " bitfld.long 0x04 3. " DIR3 ,GPIO3 pin Input/Output" "Output,Input" bitfld.long 0x04 2. " DIR2 ,GPIO2 pin Input/Output" "Output,Input" bitfld.long 0x04 1. " DIR1 ,GPIO1 pin Input/Output" "Output,Input" bitfld.long 0x04 0. " DIR0 ,GPIO0 pin Input/Output" "Output,Input" line.long 0x08 "GPIO10_DIR,GPIO10_DIR Register" bitfld.long 0x08 9. " DIR9 ,GPIO9 pin Input/Output" "Output,Input" bitfld.long 0x08 8. " DIR8 ,GPIO8 pin Input/Output" "Output,Input" bitfld.long 0x08 7. " DIR7 ,GPIO7 pin Input/Output" "Output,Input" textline " " bitfld.long 0x08 6. " DIR6 ,GPIO6 pin Input/Output" "Output,Input" bitfld.long 0x08 5. " DIR5 ,GPIO5 pin Input/Output" "Output,Input" bitfld.long 0x08 4. " DIR4 ,GPIO4 pin Input/Output" "Output,Input" textline " " bitfld.long 0x08 3. " DIR3 ,GPIO3 pin Input/Output" "Output,Input" bitfld.long 0x08 2. " DIR2 ,GPIO2 pin Input/Output" "Output,Input" bitfld.long 0x08 1. " DIR1 ,GPIO1 pin Input/Output" "Output,Input" textline " " bitfld.long 0x08 0. " DIR0 ,GPIO0 pin Input/Output" "Output,Input" line.long 0x0c "GPIO8_OUT,GPIO8_out Register" bitfld.long 0x0c 7. " VAL7 ,Out on GPIO8_7 pin" "Low,High" bitfld.long 0x0c 6. " VAL6 ,Out on GPIO8_6 pin" "Low,High" bitfld.long 0x0c 5. " VAL5 ,Out on GPIO8_5 pin" "Low,High" bitfld.long 0x0c 4. " VAL4 ,Out on GPIO8_4 pin" "Low,High" textline " " bitfld.long 0x0c 3. " VAL3 ,Out on GPIO8_3 pin" "Low,High" bitfld.long 0x0c 2. " VAL2 ,Out on GPIO8_2 pin" "Low,High" bitfld.long 0x0c 1. " VAL1 ,Out on GPIO8_1 pin" "Low,High" bitfld.long 0x0c 0. " VAL0 ,Out on GPIO8_0 pin" "Low,High" line.long 0x10 "GPIO10_OUT,GPIO10_out Register" bitfld.long 0x10 9. " VAL9 ,Out on GPIO10_9 pin" "Low,High" bitfld.long 0x10 8. " VAL8 ,Out on GPIO10_8 pin" "Low,High" bitfld.long 0x10 7. " VAL7 ,Out on GPIO10_7 pin" "Low,High" bitfld.long 0x10 6. " VAL6 ,GOut on GPIO10_6 pin" "Low,High" textline " " bitfld.long 0x10 5. " VAL5 ,Out on GPIO10_5 pin" "Low,High" bitfld.long 0x10 4. " VAL4 ,Out on GPIO10_4 pin" "Low,High" bitfld.long 0x10 3. " VAL3 ,Out on GPIO10_3 pin" "Low,High" bitfld.long 0x10 2. " VAL2 ,Out on GPIO10_2 pin" "Low,High" textline " " bitfld.long 0x10 1. " VAL1 ,Out on GPIO10_1 pin" "Low,High" bitfld.long 0x10 0. " VAL0 ,Out on GPIO10_0 pin" "Low,High" rgroup.long 0x18++0x07 line.long 0x00 "GPIO8_IN,GPIO8_in Register" bitfld.long 0x00 7. " VAL7 ,Latched value from GPIO8_7 pin" "Low,High" bitfld.long 0x00 6. " VAL6 ,Latched value from GPIO8_6 pin" "Low,High" bitfld.long 0x00 5. " VAL5 ,Latched value from GPIO8_5 pin" "Low,High" textline " " bitfld.long 0x00 4. " VAL4 ,Latched value from GPIO8_4 pin" "Low,High" bitfld.long 0x00 3. " VAL3 ,Latched value from GPIO8_3 pin" "Low,High" bitfld.long 0x00 2. " VAL2 ,Latched value from GPIO8_2 pin" "Low,High" textline " " bitfld.long 0x00 1. " VAL1 ,Latched value from GPIO8_1 pin" "Low,High" bitfld.long 0x00 0. " VAL0 ,Latched value from GPIO8_0 pin" "Low,High" line.long 0x04 "GPIO10_IN,GPIO10_in Register" bitfld.long 0x04 9. " IN9 ,Latched value from GPIO10_9 pin" "Low,High" bitfld.long 0x04 8. " IN8 ,Latched value from GPIO10_8 pin" "Low,High" bitfld.long 0x04 7. " IN7 ,Latched value from GPIO10_7 pin" "Low,High" bitfld.long 0x04 6. " IN6 ,Latched value from GPIO10_6 pin" "Low,High" textline " " bitfld.long 0x04 5. " IN5 ,Latched value from GPIO10_5 pin" "Low,High" bitfld.long 0x04 4. " IN4 ,Latched value from GPIO10_4 pin" "Low,High" bitfld.long 0x04 3. " IN3 ,Latched value from GPIO10_3 pin" "Low,High" bitfld.long 0x04 2. " IN2 ,Latched value from GPIO10_2 pin" "Low,High" textline " " bitfld.long 0x04 1. " IN1 ,Latched value from GPIO10_1 pin" "Low,High" bitfld.long 0x04 0. " IN0 ,Latched value from GPIO10_0 pin" "Low,High" group.long 0x20++0x07 line.long 0x00 "DAC_CONF,DAC_CONF Register" bitfld.long 0x00 12. " ADCU ,ADC cell used or not" "Not used,Used" bitfld.long 0x00 11. " DACU ,DAC cell used or not" "Not used,Used" bitfld.long 0x00 10. " BIN ,Input is pure binary or 2 complement" "2 complement,Binary" textline " " bitfld.long 0x00 9. " SAT2 ,Noise shaper second integrator must be saturated or not" "Not saturated,Saturated" bitfld.long 0x00 8. " SAT1 ,Noise shaper first integrator must be saturated or not" "Not saturated,Saturated" bitfld.long 0x00 7. " NSORD ,Noise shaper limited to first/second order" "Second order,First order" textline " " bitfld.long 0x00 6. " KEEP ,Samples interpolated" "Not interpolated,Interpolated" bitfld.long 0x00 5. " O2 ,O2 outputs receive the output sign" "Not active,Sent" bitfld.long 0x00 4. " O1 ,O1 outputs receive the output sign" "Not active,Sent" textline " " bitfld.long 0x00 2.--3. " FR ,Frequency ratio between the output clock and the sample clock" "32,64,128,256" bitfld.long 0x00 0.--1. " FCLK ,Clock for the output toggling" "No clock,Int_CLK,Int_CLK/2,Int_CLK/4" line.long 0x04 "IT_GEN,IT-GEN Register" bitfld.long 0x04 23. " GPIO7 ,GPIO10_in(7)/IT(7) pin taken into account to generate interrupt" "IT(7),GPIO10_in(7)" bitfld.long 0x04 22. " GPIO6 ,GPIO10_in(6)/IT(6) pin taken into account to generate interrupt" "IT(6),GPIO10_in(6)" bitfld.long 0x04 21. " GPIO5 ,GPIO10_in(5)/IT(5) pin taken into account to generate interrupt" "IT(5),GPIO10_in(5)" textline " " bitfld.long 0x04 20. " GPIO4 ,GPIO10_in(4)/IT(4) pin taken into account to generate interrupt" "IT(4),GPIO10_in(4)" bitfld.long 0x04 19. " GPIO3 ,GPIO10_in(3)/IT(3) pin taken into account to generate interrupt" "IT(3),GPIO10_in(3)" bitfld.long 0x04 18. " GPIO2 ,GPIO10_in(2)/IT(2) pin taken into account to generate interrupt" "IT(2),GPIO10_in(2)" textline " " bitfld.long 0x04 17. " GPIO1 ,GPIO10_in(1)/IT(1) pin taken into account to generate interrupt" "IT(1),GPIO10_in(1)" bitfld.long 0x04 16. " GPIO0 ,GPIO10_in(0)/IT(0) pin taken into account to generate interrupt" "IT(0),GPIO10_in(0)" bitfld.long 0x04 15. " CH7 ,Interrupt on change on pin7" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " P7 ,Interrupt on stability of change 7" "No interrupt,Interrupt" bitfld.long 0x04 13. " CH6 ,Interrupt on change on pin 6" "No interrupt,Interrupt" bitfld.long 0x04 12. " P6 ,Interrupt on stability of change 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " CH5 ,Interrupt on change on pin 5" "No interrupt,Interrupt" bitfld.long 0x04 10. " P5 ,Interrupt on stability of change 5" "No interrupt,Interrupt" bitfld.long 0x04 9. " CH4 ,Interrupt on change on pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " P4 ,Interrupt on stability of change 4" "No interrupt,Interrupt" bitfld.long 0x04 7. " CH3 ,Interrupt on change on pin 3" "No interrupt,Interrupt" bitfld.long 0x04 6. " P3 ,Interrupt on stability of change 3" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " CH2 ,Interrupt on change on pin 2" "No interrupt,Interrupt" bitfld.long 0x04 4. " P2 ,Interrupt on stability of change 2" "No interrupt,Interrupt" bitfld.long 0x04 3. " CH1 ,Interrupt on change on pin 1" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " P1 ,Interrupt on stability of change 1" "No interrupt,Interrupt" bitfld.long 0x04 1. " CH0 ,Interrupt on change on pin 0" "No interrupt,Interrupt" bitfld.long 0x04 0. " P0 ,Interrupt on stability of change 0" "No interrupt,Interrupt" rgroup.long 0x28++0x07 line.long 0x00 "GPIOT,GPIOt Register" bitfld.long 0x00 7. " IT7 ,Value of the IT pin 7 latched by int_CLK" "0,1" bitfld.long 0x00 6. " IT6 ,Value of the IT pin 6 latched by int_CLK" "0,1" bitfld.long 0x00 5. " IT5 ,Value of the IT pin 5 latched by int_CLK" "0,1" bitfld.long 0x00 4. " IT4 ,Value of the IT pin 4 latched by int_CLK" "0,1" bitfld.long 0x00 3. " IT3 ,Value of the IT pin 3 latched by int_CLK" "0,1" bitfld.long 0x00 2. " IT2 ,Value of the IT pin 2 latched by int_CLK" "0,1" bitfld.long 0x00 1. " IT1 ,Value of the IT pin 1 latched by int_CLK" "0,1" bitfld.long 0x00 0. " IT0 ,Value of the IT pin 0 latched by int_CLK" "0,1" line.long 0x04 "GPIOTT,GPIOtt Register" bitfld.long 0x04 7. " IT7 ,Value of the GPIOt pin 7 latched by int_CLK" "0,1" bitfld.long 0x04 6. " IT6 ,Value of the GPIOt pin 6 latched by int_CLK" "0,1" bitfld.long 0x04 5. " IT5 ,Value of the GPIOt pin 5 latched by int_CLK" "0,1" bitfld.long 0x04 4. " IT4 ,Value of the GPIOt pin 4 latched by int_CLK" "0,1" bitfld.long 0x04 3. " IT3 ,Value of the GPIOt pin 3 latched by int_CLK" "0,1" bitfld.long 0x04 2. " IT2 ,Value of the GPIOt pin 2 latched by int_CLK" "0,1" bitfld.long 0x04 1. " IT1 ,Value of the GPIOt pin 1 latched by int_CLK" "0,1" bitfld.long 0x04 0. " IT0 ,Value of the GPIOt pin 0 latched by int_CLK" "0,1" group.long 0x30++0x0f line.long 0x00 "PERS_TIME,PERS_time Register" hexmask.long.byte 0x00 0.--7. 1. " PT ,Persistency time" line.long 0x04 "PERS_DATA,PERS_data Register" hexmask.long.byte 0x04 0.--7. 1. " PV ,Value of the stable data" line.long 0x08 "TDM_TSLOT_NBR,TDM_Timeslot_NBR Register" hexmask.long.word 0x08 0.--10. 1. " TSN ,Number of timeslot inside a frame" line.long 0x0c "TDM_FRAME_NBR,TDM_Frame_NBR Register" hexmask.long.word 0x0C 0.--14. 1. " FRN ,Buffer size for opened channels in bufferization mode" if (((data.long(asd:0x50000000+0x40))&0x40000000)==0x40000000) group.long 0x40++0x03 line.long 0x00 "TDM_SYNC_GEN,TDM_SYNC_GEN Register" bitfld.long 0x00 31. " NSH ,Value of the Nsh signal" "Not kept,Kept" bitfld.long 0x00 30. " BB ,Informs about the buffer bank" "2nd,1st" textline " " bitfld.long 0x00 29. " SB ,Informs about the switching bank (read/write)" "2nd/1st,1st/2nd" bitfld.long 0x00 28. " ABBM ,Automatic buffer bank management" "Full address,Overwritten" textline " " bitfld.long 0x00 27. " BBVAL ,Buffer bank value" "Low,High" bitfld.long 0x00 26. " BBFRZ ,Buffer banks frozen" "Not frozen,Frozen" textline " " bitfld.long 0x00 25. " NAHB_L ,Value to force for the lower buffer memory for the AHB" "Read/write,RAS" bitfld.long 0x00 24. " NAHB_H ,Value to force for the upper buffer memory for the AHB" "Read/write,RAS" textline " " bitfld.long 0x00 23. " S47 ,SYNC4to SYNC7 signals used externally" "Not used,Used" bitfld.long 0x00 21.--22. " BDEL3[1:0] ,Delay between the 3 synchro and the one of the previous channel" "No delay,1 byte,2 bytes,4 bytes" textline " " bitfld.long 0x00 20. " BDEL3 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" bitfld.long 0x00 17.--19. " USE3/WB3 ,Synchro type 3" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" textline " " bitfld.long 0x00 15.--16. " BDEL2[1:0] ,Delay between the 2 synchro and the one of the previous channel" "No delay,1 byte,2 bytes,4 bytes" bitfld.long 0x00 14. " BDEL2 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" textline " " bitfld.long 0x00 11.--13. " USE2/WB2 ,Synchro type 2" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" bitfld.long 0x00 9.--10. " BDEL1[1:0] ,Delay between the 1 synchro and the one of the previous channel" "No delay,1 byte,2 bytes,4 bytes" textline " " bitfld.long 0x00 8. " BDEL1 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" bitfld.long 0x00 5.--7. " USE1/WB1 ,Synchro type 1" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" textline " " bitfld.long 0x00 4. " BDEL0 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" bitfld.long 0x00 1.--3. " USE0/WB0 ,Synchro type 0" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" textline " " bitfld.long 0x00 0. " M/S00 ,Device master or slave" "Slave,Master" else group.long 0x40++0x03 line.long 0x00 "TDM_SYNC_GEN,TDM_SYNC_GEN Register" bitfld.long 0x00 31. " NSH ,Value of the Nsh signal" "Not kept,Kept" bitfld.long 0x00 30. " BB ,Informs about the buffer bank" "2nd,1st" textline " " bitfld.long 0x00 29. " SB ,Informs about the switching bank (read/write)" "2nd/1st,1st/2nd" bitfld.long 0x00 28. " ABBM ,Automatic buffer bank management" "Full address,Overwritten" textline " " bitfld.long 0x00 27. " BBVAL ,Buffer bank value" "Low,High" bitfld.long 0x00 26. " BBFRZ ,Buffer banks frozen" "Not frozen,Frozen" textline " " bitfld.long 0x00 25. " NAHB_L ,Value to force for the lower buffer memory for the AHB" "Read/write,AHB" bitfld.long 0x00 24. " NAHB_H ,Value to force for the upper buffer memory for the AHB" "Read/write,AHB" textline " " bitfld.long 0x00 23. " S47 ,SYNC4to SYNC7 signals used externally" "Not used,Used" bitfld.long 0x00 21.--22. " BDEL3[1:0] ,Delay between the 3 synchro and the one of the previous channel" "No delay,1 byte,2 bytes,4 bytes" textline " " bitfld.long 0x00 20. " BDEL3 ,Delay between the 3 synchro and the one of the previous channel" "Aligned,One bit before" bitfld.long 0x00 17.--19. " USE3/WB3 ,Synchro type 3" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFSd" textline " " bitfld.long 0x00 15.--16. " BDEL2[1:0] ,Delay between the 2 synchro and the one of the previous channel" "No delay,1 byte,2 bytes,4 bytes" bitfld.long 0x00 14. " BDEL2 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" textline " " bitfld.long 0x00 11.--13. " USE2/WB2 ,Synchro type 2" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" bitfld.long 0x00 9.--10. " BDEL1[1:0] ,Delay between the 1 synchro and the one of the previous channel" "No delay,1 byte,2 bytes,4 bytes" textline " " bitfld.long 0x00 8. " BDEL1 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" bitfld.long 0x00 5.--7. " USE1/WB1 ,Synchro type 1" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" textline " " bitfld.long 0x00 4. " BDEL0 ,Informs if the frame synch is for a delayed frame of non delayed frame" "Aligned,One bit before" bitfld.long 0x00 1.--3. " USE0/WB0 ,Synchro type 0" "Reserved,I2S,PCM/DSP-SFS,LFS,Reserved,Reserved,PCM wideband (SFS),LFS" textline " " bitfld.long 0x00 0. " M/S00 ,Device master or slave" "Slave,Master" endif group.long 0x44++0x0b line.long 0x00 "SPI_I2C_USAGE,SPI_I2C_usage Register" bitfld.long 0x00 7. " U7 ,Signal switch 7" "I2C_SCL,SS0_SS" bitfld.long 0x00 6. " U6 ,Signal switch 6" "I2C_SCL,SS0_SS" bitfld.long 0x00 5. " U5 ,Signal switch 5" "I2C_SCL,SS0_SS" bitfld.long 0x00 4. " U4 ,Signal switch 4" "I2C_SCL,SS0_SS" textline " " bitfld.long 0x00 3. " U3 ,Signal switch 3" "I2C_SCL,SS0_SS" bitfld.long 0x00 2. " U2 ,Signal switch 2" "I2C_SCL,SS0_SS" bitfld.long 0x00 1. " U1 ,Signal switch 1" "I2C_SCL,SS0_SS" bitfld.long 0x00 0. " U0 ,Signal switch 0" "I2C_SCL,SS0_SS" line.long 0x04 "SPI_I2C_ACTIVE,SPI_I2C_active Register" bitfld.long 0x04 7. " A7 ,Switched signal out" "Not out,Out" bitfld.long 0x04 6. " A6 ,Switched signal out" "Not out,Out" bitfld.long 0x04 5. " A5 ,Switched signal out" "Not out,Out" bitfld.long 0x04 4. " A4 ,Switched signal out" "Not out,Out" textline " " bitfld.long 0x04 3. " A3 ,Switched signal out" "Not out,Out" bitfld.long 0x04 2. " A2 ,Switched signal out" "Not out,Out" bitfld.long 0x04 1. " A1 ,Switched signal out" "Not out,Out" bitfld.long 0x04 0. " A0 ,Switched signal out" "Not out,Out" line.long 0x08 "I2S_CONF,I2S_CONF Register" bitfld.long 0x08 31. " I2S_IT ,I2S interrupt in progress" "No interrupt,Interrupt" bitfld.long 0x08 27. " BANK ,I2S memory bank access" "Low,High" textline " " bitfld.long 0x08 26. " FRC_BK ,Force bank" "2 banks,1 bank" bitfld.long 0x08 24.--25. " DTO ,Output transfer size" "8->32,16->32,24->32,32->32" textline " " bitfld.long 0x08 23. " INVINT ,Inversion of TDM internal sync" "Not inverted,Inverted" bitfld.long 0x08 22. " INTSEL ,TDM internal sync signal instead of the I2S generated one" "I2S sync,TDM internal sync" textline " " hexmask.long.word 0x08 12.--21. 1. " NS ,Number of samples to recover before switching bank" bitfld.long 0x08 10.--11. " DTI ,Input transfer size" "8->32,16->32,24->32,32->32" textline " " bitfld.long 0x08 8.--9. " DW ,Input data width" "8 bits,16 bits,24 bits,32 bits" bitfld.long 0x08 6.--7. " SW ,Width of the SYNC signal low" "8 bits,16 bits,24 bits,32 bits" textline " " bitfld.long 0x08 5. " LBGXD ,Loopback at memory level" "No loopback,Loopback" bitfld.long 0x08 4. " LBSOI ,Switch output to input" "No loopback,Loopback" textline " " bitfld.long 0x08 3. " LBSOI ,Switch input to output" "No loopback,Loopback" bitfld.long 0x08 2. " I_CLK ,Inverted clock" "Falling,Rising" textline " " bitfld.long 0x08 1. " M/S ,Master slave information for the synchronization signal" "Slave,Master" bitfld.long 0x08 0. " ACT ,Activation information (I2S cell)" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "I2S_CONF2,I2S_CONF2 Register" bitfld.long 0x00 24. " ST_MODE ,Data width storage" "32 bits,According size in I2S mem." bitfld.long 0x00 23. " MMDEL ,External LRCK generated in master mode delayed" "Not delayed,Delayed" textline " " bitfld.long 0x00 22. " VNDAT ,Data to be played on output pin" "0,1" bitfld.long 0x00 21. " LZNDAT ,Low impedance or high impedance during non data time" "High impedance,Low impedance" textline " " bitfld.long 0x00 20. " HZDAT ,Low impedance or high impedance during data is played" "Low impedance,High impedance" hexmask.long.word 0x00 8.--19. 1. " A ,Which written address will generate the IT_addr interrupt" textline " " bitfld.long 0x00 4.--7. " T ,Which bit generate the IT_tog interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 3. " IT_TOG ,Interrupt when address bit toggles from 0 to 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " IT_ADDR ,Interrupt when data is written at the A11-0 address" "No interrupt,Interrupt" bitfld.long 0x00 1. " NIT_BK ,Bank switching interrupt masked" "Interrupt,Masked" textline " " bitfld.long 0x00 0. " MEM ,Number of 1024*32 memories available for data bufferization" "2,1" group.long 0x50++0x03 line.long 0x00 "I2S_CLK_CONF,I2S_CLK_CONF Register" bitfld.long 0x00 26. " ACT ,Activates the internal I2S_CLK" "Disabled,Enabled" bitfld.long 0x00 24.--25. " CLKO ,Out on the pins (I2S_CLK)" "Reserved,Clock,/Clock,?..." textline " " bitfld.long 0x00 23. " INVINT ,Inversion of TDM_CLK" "No action,Inverted" bitfld.long 0x00 22. " INTSEL ,Select the TDM clock instead of the I2S clock" "I2S_CLK,TDM_CLK" textline " " bitfld.long 0x00 19.--21. " ISRC ,Input source for the 7 bits divider" "Reserved,CLKSM(pin I2S-CLK),ClkR_Synt(2),ClkR_osc1,PL_Clk4,?..." hexmask.long.word 0x00 3.--18. 1. " DIV ,Value compared to the divider counter value" textline " " bitfld.long 0x00 2. " BYPASS ,Bypass" "Input clock,Divider output" bitfld.long 0x00 1. " INV ,CLKSM pin signal internally inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 0. " M/S ,Device master or slave" "Slave,Master" rgroup.long 0x54++0x03 line.long 0x00 "IMR,Interrupt Mask Register" bitfld.long 0x00 11. " TSVD ,Tsvd Interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " GPIO_IT ,GPIO_IT Interrupt mask" "Not masked,Masked" bitfld.long 0x00 7. " KB_IT ,KB_IT Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 6. " ITCAMV ,ITcamv Interrupt mask" "Not masked,Masked" bitfld.long 0x00 5. " ITCAMF ,ITcamf Interrupt mask" "Not masked,Masked" bitfld.long 0x00 4. " ITCAML ,ITcaml Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " ITTDM ,ITtdm Interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " ITI2S ,ITi2s Interrupt mask" "Not masked,Masked" bitfld.long 0x00 1. " ITCH ,Itch Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 0. " ITP ,ITp Interrupt mask" "Not masked,Masked" group.long 0x58++0x07 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 30. " IT_RAW ,IT_raw Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " IT_GPIO_RAW ,IT_GPIO_raw Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IT_KB_RAW ,IT_KB_raw Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " ITCAMV_RAW ,ITcamv_raw Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " ITCAMF_RAW ,ITcamf_raw Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " ITCAML_RAW ,ITcaml_raw Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " ITTDM_RAW ,ITtdm_raw Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " ITI2S_RAW ,ITi2s_raw Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " ITCH_RAW ,Itch_raw Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " ITP_RAW ,ITp_raw Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " IT_GPIO ,IT_GPIO Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " IT_KB ,IT_KB Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " ITCAMV ,ITcamv Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " ITCAMF ,ITcamf Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " ITCAML ,ITcaml Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " ITTDM ,ITtdm Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " ITI2S ,ITi2S Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " ITCH ,Itch Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " ITP ,ITp Interrupt" "No interrupt,Interrupt" line.long 0x04 "CAM_CTRL,CAM_Control Register" bitfld.long 0x04 17. " CROP_EN ,Enables the CROP function" "Disabled,Enabled" bitfld.long 0x04 16. " EOL ,Line end indicator for embedded mode only" "0xFF0000,Byte FF at D7-0" textline " " bitfld.long 0x04 13.--15. " CLK ,Clock sent to the camera (CAMCLK|Latch CLK)" "HCLK|HCLK,HCLK/2|HCLK,HCLK/4|HCLK,HCLK/8|HCLK/2,HCLK/8|PxCLK,HCLK/16|HLCK/4,HCLK/16|PxCLK,HCLK/32|PxCLK" bitfld.long 0x04 12. " EMBT ,Embedded synchro type" "EXT-CSI,ITU656" textline " " bitfld.long 0x04 8.--11. " TRANS ,Received data type and the transformation to do before storage" "Interface inactive,1 byte received -> 4 bytes stored,4 byte received -> 4 bytes stored,3 byte received -> 4 bytes stored,4 byte received -> 4 bytes stored,RGB565 -> RGBI555,RGB555I,RGB444 -> RGB565 + noise,Bayer8 (2/4),Bayer9 (2/4),Bayer10 (2/4),Bayer 11 (2/4),Bayer12 (2/4),Bayer13 (2/4),Bayer14 (2/4),All registers with 3C" textline " " bitfld.long 0x04 7. " VS_POL ,Active state of the vertical synchro signal" "Active low,Active high" textline " " bitfld.long 0x04 6. " HS_POL ,Active state of the horizontal synchro signal" "Active low,Active high" bitfld.long 0x04 5. " PCK_POL ,Active edge of the pixel clock" "Rx rising/Latched falling,Rx falling/Latched rising" textline " " bitfld.long 0x04 4. " EMB ,Data recognized by HSYNC and VSYNC signals or embedded codes" "HSYNC&VSYNC,Embedded codes" if (((data.long(asd:0x50000000+0x5c))&0x1000)==0x00) group.long 0x60++0x03 line.long 0x00 "CAM_EMB_SYNC,CAM_Embedded_Sync Register" hexmask.long.byte 0x00 24.--31. 1. " FS ,Frame start" hexmask.long.byte 0x00 16.--23. 1. " FE ,Frame end" hexmask.long.byte 0x00 8.--15. 1. " LS ,Line start" hexmask.long.byte 0x00 0.--7. 1. " LE ,Line end" else group.long 0x60++0x03 line.long 0x00 "CAM_EMB_SYNC,CAM_Embedded_Sync Register" hexmask.long.byte 0x00 24.--31. 1. " SAVB ,SAV blanking" hexmask.long.byte 0x00 16.--23. 1. " EAVB ,EAV blanking" hexmask.long.byte 0x00 8.--15. 1. " SAV ,SAV" hexmask.long.byte 0x00 0.--7. 1. " EAV ,EAV" endif group.long 0x64++0x07 line.long 0x00 "CAM_CROP_START,CAM_Crop_Start Register" hexmask.long.word 0x00 16.--31. 1. " CS_V ,Line number" hexmask.long.word 0x00 0.--15. 1. " CS_H ,Pixel position" line.long 0x04 "CAM_CROP_END,CAM_Crop_End Register" hexmask.long.word 0x04 16.--31. 1. " CE_V ,Line number" hexmask.long.word 0x04 0.--15. 1. " CE_H ,Pixel position" base asd:0x50010000 group.long 0x00++0x03 line.long 0x00 "AMCD,Action Memory Content Description" bitfld.long 0x00 30.--31. " ADC ,How many input samples will be requested during a byte" "No Sample,1 sample on first bit,2 samples,4 samples" textline " " bitfld.long 0x00 29. " DAC ,New data sent to the DAC state machine" "No sample,New sample" bitfld.long 0x00 28. " LSBIN ,DIN data latched first bit in MSB/LSB" "MSB,LSB" bitfld.long 0x00 27. " LSBOUT ,DOUT data MSB/LSB in first bit" "MSB,LSB" textline " " bitfld.long 0x00 24.--26. " CHN ,Number of channels present" "DAC,Upto 1,Upto 2,Upto 16,Upto 4,Upto 16,Upto 16,Upto 8" bitfld.long 0x00 22.--23. " OFF ,Offset in b" "0,1,2,3" bitfld.long 0x00 20.--21. " NS ,Number of bytes to be stored in a frame for bufferized channels" "DAC usage,1 byte,2 bytes,4 bytes" textline " " bitfld.long 0x00 16.--19. " CH ,Channel number for the considered timeslot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 15. " LTSS ,Inform that the last timeslot is switched on timeslot 0" "Not occurred,Occurred" hexmask.long.word 0x00 5.--14. 1. " STS ,Timeslot number of the previous frame" textline " " bitfld.long 0x00 4. " BIN ,Channel Ch3-Ch0 bufferized" "Not bufferized,Bufferized" bitfld.long 0x00 3. " SIN ,Data stored stored in the switching memory" "Not stored,Stored" bitfld.long 0x00 2. " BOUT ,Data played come from the buffered channel" "Low,High" textline " " bitfld.long 0x00 1. " SOUT ,Data played come from the switched channel" "Low,High" bitfld.long 0x00 0. " LOWZ ,Timeslot high impedance on the DOUT" "Low impedance,High impedance" width 0xb tree.end tree "Keyboard Controller" base asd:0xa0000000 width 13. group.long 0x00++0x03 line.long 0x00 "MDCTRLREG,MDCTRLREG register" hexmask.long.byte 0x00 9.--15. 1. " PCLKFREQ ,Prescaler programmable value" bitfld.long 0x00 8. " KBSCANFLG ,Enable keyboard scanning" "Disabled,Enabled" bitfld.long 0x00 2.--3. " SCANRATE ,Keyboard scan rate" "10 ms,20 ms,40 ms,80 ms" textline " " bitfld.long 0x00 0.--1. " MODECTRL ,Mode selection" "Inactive,GPIO,Keyboard,?..." wgroup.long 0x04++0x03 line.long 0x00 "GPIODIRREG,GPIODIRREG register" bitfld.long 0x00 17. " GPIODI[17] ,Particular I/O pin 17" "Input,Output" bitfld.long 0x00 16. " GPIODI[16] ,Particular I/O pin 16" "Input,Output" bitfld.long 0x00 15. " GPIODI[15] ,Particular I/O pin 15" "Input,Output" textline " " bitfld.long 0x00 14. " GPIODI[14] ,Particular I/O pin 14" "Input,Output" bitfld.long 0x00 13. " GPIODI[13] ,Particular I/O pin 13" "Input,Output" bitfld.long 0x00 12. " GPIODI[12] ,Particular I/O pin 12" "Input,Output" textline " " bitfld.long 0x00 11. " GPIODI[11] ,Particular I/O pin 11" "Input,Output" bitfld.long 0x00 10. " GPIODI[10] ,Particular I/O pin 10" "Input,Output" bitfld.long 0x00 9. " GPIODI[09] ,Particular I/O pin 9" "Input,Output" textline " " bitfld.long 0x00 8. " GPIODI[08] ,Particular I/O pin 8" "Input,Output" bitfld.long 0x00 7. " GPIODI[07] ,Particular I/O pin 7" "Input,Output" bitfld.long 0x00 6. " GPIODI[06] ,Particular I/O pin 6" "Input,Output" textline " " bitfld.long 0x00 5. " GPIODI[05] ,Particular I/O pin 5" "Input,Output" bitfld.long 0x00 4. " GPIODI[04] ,Particular I/O pin 4" "Input,Output" bitfld.long 0x00 3. " GPIODI[03] ,Particular I/O pin 3" "Input,Output" textline " " bitfld.long 0x00 2. " GPIODI[02] ,Particular I/O pin 2" "Input,Output" bitfld.long 0x00 1. " GPIODI[01] ,Particular I/O pin 1" "Input,Output" bitfld.long 0x00 0. " GPIODI[00] ,Particular I/O pin 0" "Input,Output" group.long 0x08++0x07 line.long 0x00 "GPIODATAREG,GPIODATAREG register" bitfld.long 0x00 17. " GPIODATA[17] ,GPIO Data 17" "Low,High" bitfld.long 0x00 16. " GPIODATA[16] ,GPIO Data 16" "Low,High" bitfld.long 0x00 15. " GPIODATA[15] ,GPIO Data 15" "Low,High" textline " " bitfld.long 0x00 14. " GPIODATA[14] ,GPIO Data 14" "Low,High" bitfld.long 0x00 13. " GPIODATA[13] ,GPIO Data 13" "Low,High" bitfld.long 0x00 12. " GPIODATA[12] ,GPIO Data 12" "Low,High" textline " " bitfld.long 0x00 11. " GPIODATA[11] ,GPIO Data 11" "Low,High" bitfld.long 0x00 10. " GPIODATA[10] ,GPIO Data 10" "Low,High" bitfld.long 0x00 9. " GPIODATA[09] ,GPIO Data 9" "Low,High" textline " " bitfld.long 0x00 8. " GPIODATA[08] ,GPIO Data 8" "Low,High" bitfld.long 0x00 7. " GPIODATA[07] ,GPIO Data 7" "Low,High" bitfld.long 0x00 6. " GPIODATA[06] ,GPIO Data 6" "Low,High" textline " " bitfld.long 0x00 5. " GPIODATA[05] ,GPIO Data 5" "Low,High" bitfld.long 0x00 4. " GPIODATA[04] ,GPIO Data 4" "Low,High" bitfld.long 0x00 3. " GPIODATA[03] ,GPIO Data 3" "Low,High" textline " " bitfld.long 0x00 2. " GPIODATA[02] ,GPIO Data 2" "Low,High" bitfld.long 0x00 1. " GPIODATA[01] ,GPIO Data 1" "Low,High" bitfld.long 0x00 0. " GPIODATA[00] ,GPIO Data 0" "Low,High" line.long 0x04 "STATUSREG,STATUSREG register" bitfld.long 0x04 1. " KBNEWDATA ,New keyboard value available in KBREG" "Not available,Available" rgroup.long 0x10++0x03 line.long 0x00 "KBREG,KBREG Register" hexmask.long.byte 0x00 0.--7. 1. " KBPRDATA ,Key-code value" width 0xb tree.end tree "RAS (RAS Configuration Registers)" base asd:0x99000000 width 9. group.long 0x00++0x03 line.long 0x00 "RASREG1,RAS Register 1" bitfld.long 0x00 15. " INOUTCLK ,Clock from Pll2/ClkR_Synt(3) will be output on PL_CLK1" "CLCD clk input to RAS,Clk from Pll2/ClkR_Synt(3) output on PL_CLK1" textline " " bitfld.long 0x00 14. " FIRDA ,FIRDA" "RAS IP,Fixed part IP" bitfld.long 0x00 13. " I2C ,I2C" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 12. " SPIE ,SPI enhanced (CS(2-3-4))" "RAS IP,Fixed part IP" bitfld.long 0x00 11. " SPIB ,SPI Basic (no CS(2-3-4))" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 10. " MACE ,MAC Ethernet" "RAS IP,Fixed part IP" bitfld.long 0x00 9. " GPIO0 ,GPIO (0)" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 8. " GPIO1 ,GPIO(1)" "RAS IP,Fixed part IP" bitfld.long 0x00 7. " GPIO2 ,GPIO(2)" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 6. " GPIO3 ,GPIO(3)" "RAS IP,Fixed part IP" bitfld.long 0x00 5. " GPIO4 ,GPIO(4)" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 4. " GPIO5 ,GPIO(5)" "RAS IP,Fixed part IP" bitfld.long 0x00 3. " UARTE ,UART enhanced" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 2. " UARTB ,UART basic" "RAS IP,Fixed part IP" bitfld.long 0x00 1. " TIMERB ,Timer B (timers 3/4)" "RAS IP,Fixed part IP" textline " " bitfld.long 0x00 0. " TIMERA ,Timer A (timers 1/2)" "RAS IP,Fixed part IP" group.long 0x04++0x03 line.long 0x00 "RASREG2,RAS Register 2" bitfld.long 0x00 31. " SRCCLCD ,Configure the 48 MHz clock source for CLCD block" "48 MHz,PL_CLK1" bitfld.long 0x00 30. " EDWIN ,Configure the ExtDevWidth input port of FSMC" "8 bit,16 bit" textline " " bitfld.long 0x00 29. " ACSMEM ,Configure the accessibility of memory through either SDIO or I2S" "I2S,SDIO" bitfld.long 0x00 28. " MUXPORT ,Mux the DAC O1; O2 ports and the GPIO10_3 and GPIO10_2 ports from the telecom block" "GPIO10s from TELECOM,DAC ports" textline " " bitfld.long 0x00 27. " NANDNORBANK3 ,Dynamic selection of NAND or NOR on bank 3 of FSMC" "NAND,NOR" bitfld.long 0x00 26. " NANDNORBANK2 ,Dynamic selection of NAND or NOR on bank 2 of FSMC" "NAND,NOR" textline " " bitfld.long 0x00 25. " NANDNORBANK1 ,Dynamic selection of NAND or NOR on bank 1 of FSMC" "NAND,NOR" bitfld.long 0x00 24. " NANDNORBANK0 ,Dynamic selection of NAND or NOR on bank 0 of FSMC" "NAND,NOR" textline " " bitfld.long 0x00 23. " LHNUM ,Select between lower and higher numbered G8/G10 sets in modes where they are duplicated" "Low,High" bitfld.long 0x00 4. " TDAPIN ,TDM_DOUT available at Pin61" "SPI_I2C7,TDM_DOUT" textline " " bitfld.long 0x00 0.--3. " DIFF_MODE ,Selects different MODES" "NAND,NOR,PHOTO_FRAME,LEND_IP_PHONE,HEND_IP_PHONE,LEND_WIFI_PHONE,HEND_WIFI_PHONE,ATA_PABX_wI2S,ATA_PABX_I2S,Reserved,Reserved,Reserved,CAM1_LCDw,CAMu_LCD,CAMu_LCDw,CAM1_LCD" width 0xb tree.end endif sif (cpu()=="SPEAR310") tree "RAS (Reconfigurable array subsystem)" base asd:0xB4000000 width 16. rgroup.long 0x00++0x07 line.long 0x00 "BOOT_REG,Boot register" bitfld.long 0x00 7. " BOOT_REG[7] ,Endianness" "Little endian,Big endian" bitfld.long 0x00 6. " BOOT_REG[6] ,EMI Acknowledgement behavior" "ACK,GPIO" textline " " bitfld.long 0x00 5. " BOOT_REG[5] ,NAND Flash width" "8-bit,16-bit" bitfld.long 0x00 3.--4. " BOOT_REG[4:3] ,EMI CS0 bus width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 0.--2. " BOOT_REG[2:0] ,Boot device" "Serial NOR Flash,Parallel NOR Flash,Paraller NAND Flash,USB boot,?..." line.long 0x04 "ISR,Interrupt status register" bitfld.long 0x04 16. " ISR[16] ,RS485_2" "Not asserted,Asserted" bitfld.long 0x04 15. " ISR[15] ,RS485_1" "Not asserted,Asserted" textline " " bitfld.long 0x04 14. " ISR[14] ,TDM" "Not asserted,Asserted" bitfld.long 0x04 13. " ISR[13] ,EMI" "Not asserted,Asserted" textline " " bitfld.long 0x04 12. " ISR[12] ,Interrupt status of UART block 5" "Not asserted,Asserted" bitfld.long 0x04 11. " ISR[11] ,Interrupt status of UART block 4" "Not asserted,Asserted" textline " " bitfld.long 0x04 10. " ISR[10] ,Interrupt status of UART block 3" "Not asserted,Asserted" bitfld.long 0x04 9. " ISR[9] ,Interrupt status of UART block 2" "Not asserted,Asserted" textline " " bitfld.long 0x04 8. " ISR[8] ,Interrupt status of UART block 1" "Not asserted,Asserted" bitfld.long 0x04 7. " ISR[7] ,Wake-up on LAN interrupt status from SMII4" "Not asserted,Asserted" textline " " bitfld.long 0x04 6. " ISR[6] ,Wake-up on LAN interrupt status from SMII3" "Not asserted,Asserted" bitfld.long 0x04 5. " ISR[5] ,Wake-up on LAN interrupt status from SMII2" "Not asserted,Asserted" textline " " bitfld.long 0x04 4. " ISR[4] ,Wake-up on LAN interrupt status from SMII1" "Not asserted,Asserted" bitfld.long 0x04 3. " ISR[3] ,Interrupt status from SMII4" "Not asserted,Asserted" textline " " bitfld.long 0x04 2. " ISR[2] ,Interrupt status from SMII3" "Not asserted,Asserted" bitfld.long 0x04 1. " ISR[1] ,Interrupt status from SMII2" "Not asserted,Asserted" textline " " bitfld.long 0x04 0. " ISR[0] ,Interrupt status from SMII1" "Not asserted,Asserted" group.long 0x08++0x23 line.long 0x00 "FER,Function enable register" bitfld.long 0x00 14. " FER[14] ,FIrDA" "RAS_GPIO,Fixed part" bitfld.long 0x00 13. " FER[13] ,I2C" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 12. " FER[12] ,SSP enhanced" "RAS_GPIO,Fixed part" bitfld.long 0x00 11. " FER[11] ,SSP Basic" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 10. " FER[10] ,MAC Ethernet" "RAS_GPIO,Fixed part" bitfld.long 0x00 9. " FER[9] ,GPIO(0)" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 8. " FER[8] ,GPIO(1)" "RAS_GPIO,Fixed part" bitfld.long 0x00 7. " FER[7] ,GPIO(2)" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 6. " FER[6] ,GPIO(3)" "RAS_GPIO,Fixed part" bitfld.long 0x00 5. " FER[5] ,GPIO(4)" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 4. " FER[4] ,GPIO(5)" "RAS_GPIO,Fixed part" bitfld.long 0x00 3. " FER[3] ,UART enhanced" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 2. " FER[2] ,UART basic" "RAS_GPIO,Fixed part" bitfld.long 0x00 1. " FER[1] ,Timer B" "RAS_GPIO,Fixed part" textline " " bitfld.long 0x00 0. " FER[0] ,Timer A" "RAS_GPIO,Fixed part" line.long 0x04 "SMII_MAC_CFG,SMII MAC configuration register" bitfld.long 0x04 5. " SMII_MAC_CFG[5] ,Endianness SMII 4" "Little endian,Big endian" bitfld.long 0x04 4. " SMII_MAC_CFG[4] ,Endianness" "Little endian,Big endian" textline " " bitfld.long 0x04 3. " SMII_MAC_CFG[3] ,Endianness" "Little endian,Big endian" bitfld.long 0x04 2. " SMII_MAC_CFG[2] ,Endianness SMII 1" "Little endian,Big endian" textline " " bitfld.long 0x04 0.--1. " SMII_MAC_CFG[1:0] ,PHY Management" "SMII 1,SMII 2,SMII 3,SMII 4" line.long 0x08 "PL_GPIO_EN0,Enable PL_GPIO[31:0] function register" bitfld.long 0x08 31. " PL_GPIO[31] ,PL_GPIO[31] function bit (RAS IP/GPIO)" "BaseGPIO3,BaseGPIO3" bitfld.long 0x08 30. " PL_GPIO[30] ,PL_GPIO[30] function bit (RAS IP/GPIO)" "BaseGPIO2,BaseGPIO2" textline " " bitfld.long 0x08 29. " PL_GPIO[29] ,PL_GPIO[29] function bit (RAS IP/GPIO)" "BaseGPIO1,BaseGPIO1" bitfld.long 0x08 28. " PL_GPIO[28] ,PL_GPIO[28] function bit (RAS IP/GPIO)" "BaseGPIO0,BaseGPIO0" textline " " bitfld.long 0x08 27. " PL_GPIO[27] ,PL_GPIO[27] function bit (RAS IP/GPIO)" "MII_TX_CLK,GPIO4_7" bitfld.long 0x08 26. " PL_GPIO[26] ,PL_GPIO[26] function bit (RAS IP/GPIO)" "MII_TXD,GPIO4_6" textline " " bitfld.long 0x08 25. " PL_GPIO[25] ,PL_GPIO[25] function bit (RAS IP/GPIO)" "MII_TXD1,GPIO4_5" bitfld.long 0x08 24. " PL_GPIO[24] ,PL_GPIO[24] function bit (RAS IP/GPIO)" "MII_TXD2,GPIO4_4" textline " " bitfld.long 0x08 23. " PL_GPIO[23] ,PL_GPIO[23] function bit (RAS IP/GPIO)" "RS0_IN/MII_TXD3,GPIO4_3" bitfld.long 0x08 22. " PL_GPIO[22] ,PL_GPIO[22] function bit (RAS IP/GPIO)" "RS0_OUT/MII_TX_EN,GPIO4_2" textline " " bitfld.long 0x08 21. " PL_GPIO[21] ,PL_GPIO[21] function bit (RAS IP/GPIO)" "RS0_RXCLK/MII_TX_ER,GPIO4_1" bitfld.long 0x08 20. " PL_GPIO[20] ,PL_GPIO[20] function bit (RAS IP/GPIO)" "RS0_TXCLK/MII_RX_CLK,GPIO4_0" textline " " bitfld.long 0x08 19. " PL_GPIO[19] ,PL_GPIO[19] function bit (RAS IP/GPIO)" "RS0_CTS/MII_RX_DV,GPIO3_7" bitfld.long 0x08 18. " PL_GPIO[18] ,PL_GPIO[18] function bit (RAS IP/GPIO)" "RS1_IN/MII_RX_ERR,GPIO3_6" textline " " bitfld.long 0x08 17. " PL_GPIO[17] ,PL_GPIO[17] function bit (RAS IP/GPIO)" "RS1_OUT/MII_RXD0,GPIO3_5" bitfld.long 0x08 16. " PL_GPIO[16] ,PL_GPIO[16] function bit (RAS IP/GPIO)" "RS1_RXCLK/MII_RXD1,GPIO3_4" textline " " bitfld.long 0x08 15. " PL_GPIO[15] ,PL_GPIO[15] function bit (RAS IP/GPIO)" "RS1_TXCLK/MII_RXD2,GPIO3_3" bitfld.long 0x08 14. " PL_GPIO[14] ,PL_GPIO[14] function bit (RAS IP/GPIO)" "RS1_CTS/MII_RXD3,GPIO3_2" textline " " bitfld.long 0x08 13. " PL_GPIO[13] ,PL_GPIO[13] function bit (RAS IP/GPIO)" "TDM0_DTOUT/MII_COL,GPIO3_1" bitfld.long 0x08 12. " PL_GPIO[12] ,PL_GPIO[12] function bit (RAS IP/GPIO)" "TDM0_RSYNC/MII_CRS,GPIO3_0" textline " " bitfld.long 0x08 11. " PL_GPIO[11] ,PL_GPIO[11] function bit (RAS IP/GPIO)" "TDM0_TSYNC/MII_MDC,GPIO2_7" bitfld.long 0x08 10. " PL_GPIO[10] ,PL_GPIO[10] function bit (RAS IP/GPIO)" "TDM0_DTIN/MII_MDIO,GPIO2_6" textline " " bitfld.long 0x08 9. " PL_GPIO[9] ,PL_GPIO[9] function bit (RAS IP/GPIO)" "SSP_MOSI,GPIO2_5" bitfld.long 0x08 8. " PL_GPIO[8] ,PL_GPIO[8] function bit (RAS IP/GPIO)" "SSP_SCLK,GPIO2_4" textline " " bitfld.long 0x08 7. " PL_GPIO[7] ,PL_GPIO[7] function bit (RAS IP/GPIO)" "SSP_SS0,GPIO2_3" bitfld.long 0x08 6. " PL_GPIO[6] ,PL_GPIO[6] function bit (RAS IP/GPIO)" "SSP_MISO,GPIO2_2" textline " " bitfld.long 0x08 5. " PL_GPIO[5] ,PL_GPIO[5] function bit (RAS IP/GPIO)" "I2C_SDA,GPIO2_1" bitfld.long 0x08 4. " PL_GPIO[4] ,PL_GPIO[4] function bit (RAS IP/GPIO)" "I2C_SCL,GPIO2_0" textline " " bitfld.long 0x08 3. " PL_GPIO[3] ,PL_GPIO[3] function bit (RAS IP/GPIO)" "UART0_RX,GPIO1_7" bitfld.long 0x08 2. " PL_GPIO[2] ,PL_GPIO[2] function bit (RAS IP/GPIO)" "UART0_TX,GPIO1_6" textline " " bitfld.long 0x08 1. " PL_GPIO[1] ,PL_GPIO[1] function bit (RAS IP/GPIO)" "IRDA_RX,GPIO1_5" bitfld.long 0x08 0. " PL_GPIO[0] ,PL_GPIO[0] function bit (RAS IP/GPIO)" "IRDA_TX,GPIO1_4" line.long 0x0C "PL_GPIO_EN1,Enable GPIO function 1" bitfld.long 0x0C 31. " PL_GPIO[63] ,PL_GPIO[63] function bit (RAS IP/GPIO)" "EMI_ADDB_23,GPIO8_5" bitfld.long 0x0C 30. " PL_GPIO[62] ,PL_GPIO[62] function bit (RAS IP/GPIO)" "EMI_ADDB_24,GPIO8_4" textline " " bitfld.long 0x0C 29. " PL_GPIO[61] ,PL_GPIO[61] function bit (RAS IP/GPIO)" "EMI_ADDB_25,GPIO8_3" bitfld.long 0x0C 28. " PL_GPIO[60] ,PL_GPIO[60] function bit (RAS IP/GPIO)" "EMI_ADDB_26,GPIO8_2" textline " " bitfld.long 0x0C 27. " PL_GPIO[59] ,PL_GPIO[59] function bit (RAS IP/GPIO)" "EMI_ADDB_27,GPIO8_1" bitfld.long 0x0C 26. " PL_GPIO[58] ,PL_GPIO[58] function bit (RAS IP/GPIO)" "EMI_ADDB_28,GPIO8_0" textline " " bitfld.long 0x0C 25. " PL_GPIO[57] ,PL_GPIO[57] function bit (RAS IP/GPIO)" "EMI_ADDB_29,GPIO7_7" bitfld.long 0x0C 24. " PL_GPIO[56] ,PL_GPIO[56] function bit (RAS IP/GPIO)" "EMI_ADDB_30,GPIO7_6" textline " " bitfld.long 0x0C 23. " PL_GPIO[55] ,PL_GPIO[55] function bit (RAS IP/GPIO)" "EMI_ADDB_31,GPIO7_5" bitfld.long 0x0C 22. " PL_GPIO[54] ,PL_GPIO[54] function bit (RAS IP/GPIO)" "EMI_ADDB_12/FSMC_D12,GPIO7_4" textline " " bitfld.long 0x0C 21. " PL_GPIO[53] ,PL_GPIO[53] function bit (RAS IP/GPIO)" "EMI_ADDB_22,GPIO7_3" bitfld.long 0x0C 20. " PL_GPIO[52] ,PL_GPIO[52] function bit (RAS IP/GPIO)" "EMI_OE/FSMC_R,GPIO7_2" textline " " bitfld.long 0x0C 19. " PL_GPIO[51] ,PL_GPIO[51] function bit (RAS IP/GPIO)" "EMI_WE/FSMC_W,GPIO7_1" bitfld.long 0x0C 18. " PL_GPIO[50] ,PL_GPIO[50] function bit (RAS IP/GPIO)" "EMI_SC[0]/TMR_CPTR4,GPIO7_0" textline " " bitfld.long 0x0C 17. " PL_GPIO[49] ,PL_GPIO[49] function bit (RAS IP/GPIO)" "EMI_SC[1]/TMR_CPTR3,GPIO6_7" bitfld.long 0x0C 16. " PL_GPIO[48] ,PL_GPIO[48] function bit (RAS IP/GPIO)" "EMI_SC[2]/TMR_CPTR2,GPIO6_6" textline " " bitfld.long 0x0C 15. " PL_GPIO[47] ,PL_GPIO[47] function bit (RAS IP/GPIO)" "EMI_SC[3]/TMR_CPTR1,GPIO6_5" bitfld.long 0x0C 14. " PL_GPIO[46] ,PL_GPIO[46] function bit (RAS IP/GPIO)" "EMI_SC[4]/TMR_CLK4,GPIO6_4" textline " " bitfld.long 0x0C 13. " PL_GPIO[45] ,PL_GPIO[45] function bit (RAS IP/GPIO)" "EMI_SC[5]/TMR_CLK3,GPIO6_3" bitfld.long 0x0C 12. " PL_GPIO[44] ,PL_GPIO[44] function bit (RAS IP/GPIO)" "UART2_TX/TMR_CLK2,GPIO6_2" textline " " bitfld.long 0x0C 11. " PL_GPIO[43] ,PL_GPIO[43] function bit (RAS IP/GPIO)" "UART2_RX/TMR_CLK1,GPIO6_1" bitfld.long 0x0C 10. " PL_GPIO[42] ,PL_GPIO[42] function bit (RAS IP/GPIO)" "UART5_TX/UART0_DTR,GPIO6_0" textline " " bitfld.long 0x0C 9. " PL_GPIO[41] ,PL_GPIO[41] function bit (RAS IP/GPIO)" "UART5_RX/UART0_RI,GPIO5_7" bitfld.long 0x0C 8. " PL_GPIO[40] ,PL_GPIO[40] function bit (RAS IP/GPIO)" "UART4_TX/UART0_DSR,GPIO5_6" textline " " bitfld.long 0x0C 7. " PL_GPIO[39] ,PL_GPIO[39] function bit (RAS IP/GPIO)" "UART4_RX/UART0_DCD,GPIO5_5" bitfld.long 0x0C 6. " PL_GPIO[38] ,PL_GPIO[38] function bit (RAS IP/GPIO)" "UART3_TX/UART0_CTS,GPIO5_4" textline " " bitfld.long 0x0C 5. " PL_GPIO[37] ,PL_GPIO[37] function bit (RAS IP/GPIO)" "UART3_RX/UART0_RTS,GPIO5_3" bitfld.long 0x0C 4. " PL_GPIO[36] ,PL_GPIO[36] function bit (RAS IP/GPIO)" "FSMC_E1/SSP_CS4,GPIO5_2" textline " " bitfld.long 0x0C 3. " PL_GPIO[35] ,PL_GPIO[35] function bit (RAS IP/GPIO)" "FSMC_CL/SSP_CS3,GPIO5_1" bitfld.long 0x0C 2. " PL_GPIO[34] ,PL_GPIO[34] function bit (RAS IP/GPIO)" "FSMC_RB/SSP_CS2,GPIO5_0" textline " " bitfld.long 0x0C 1. " PL_GPIO[33] ,PL_GPIO[33] function bit (RAS IP/GPIO)" "BaseGPIO5,BaseGPIO5" bitfld.long 0x0C 0. " PL_GPIO[32] ,PL_GPIO[32] function bit (RAS IP/GPIO)" "BaseGPIO4,BaseGPIO4" line.long 0x10 "PL_GPIO_EN2,Enable GPIO function 2" bitfld.long 0x10 31. " PL_GPIO[95] ,PL_GPIO[95] function bit (RAS IP/GPIO)" "ETH1_TX,GPIO12_5" bitfld.long 0x10 30. " PL_GPIO[94] ,PL_GPIO[94] function bit (RAS IP/GPIO)" "ETH1_RX,GPIO12_4" textline " " bitfld.long 0x10 29. " PL_GPIO[93] ,PL_GPIO[93] function bit (RAS IP/GPIO)" "ETH2_TX,GPIO12_3" bitfld.long 0x10 28. " PL_GPIO[92] ,PL_GPIO[92] function bit (RAS IP/GPIO)" "ETH2_RX,GPIO12_2" textline " " bitfld.long 0x10 27. " PL_GPIO[91] ,PL_GPIO[91] function bit (RAS IP/GPIO)" "ETH3_TX,GPIO12_1" bitfld.long 0x10 26. " PL_GPIO[90] ,PL_GPIO[90] function bit (RAS IP/GPIO)" "ETH3_RX,GPIO12_0" textline " " bitfld.long 0x10 25. " PL_GPIO[89] ,PL_GPIO[89] function bit (RAS IP/GPIO)" "ETH_SYNC,GPIO11_7" bitfld.long 0x10 24. " PL_GPIO[88] ,PL_GPIO[88] function bit (RAS IP/GPIO)" "SMII_MDIO,GPIO11_6" textline " " bitfld.long 0x10 23. " PL_GPIO[87] ,PL_GPIO[87] function bit (RAS IP/GPIO)" "SMII_MDC,GPIO11_5" bitfld.long 0x10 22. " PL_GPIO[86] ,PL_GPIO[86] function bit (RAS IP/GPIO)" "EMI_ADDB_0/FSMC_D0,GPIO11_4" textline " " bitfld.long 0x10 21. " PL_GPIO[85] ,PL_GPIO[85] function bit (RAS IP/GPIO)" "EMI_ADDB_1/FSMC_D1,GPIO11_3" bitfld.long 0x10 20. " PL_GPIO[84] ,PL_GPIO[84] function bit (RAS IP/GPIO)" "EMI_ADDB_2/FSMC_D2,GPIO11_2" textline " " bitfld.long 0x10 19. " PL_GPIO[83] ,PL_GPIO[83] function bit (RAS IP/GPIO)" "EMI_ADDB_3/FSMC_D3,GPIO11_1" bitfld.long 0x10 18. " PL_GPIO[82] ,PL_GPIO[82] function bit (RAS IP/GPIO)" "EMI_ADDB_4/FSMC_D4,GPIO11_0" textline " " bitfld.long 0x10 17. " PL_GPIO[81] ,PL_GPIO[81] function bit (RAS IP/GPIO)" "EMI_ADDB_5/FSMC_D5,GPIO10_7" bitfld.long 0x10 16. " PL_GPIO[80] ,PL_GPIO[80] function bit (RAS IP/GPIO)" "EMI_ADDB_6/FSMC_D6,GPIO10_6" textline " " bitfld.long 0x10 15. " PL_GPIO[79] ,PL_GPIO[79] function bit (RAS IP/GPIO)" "EMI_ADDB_7/FSMC_D7,GPIO10_5" bitfld.long 0x10 14. " PL_GPIO[78] ,PL_GPIO[78] function bit (RAS IP/GPIO)" "EMI_ADDB_8/FSMC_D8,GPIO10_4" textline " " bitfld.long 0x10 13. " PL_GPIO[77] ,PL_GPIO[77] function bit (RAS IP/GPIO)" "EMI_ADDB_9/FSMC_D9,GPIO10_3" bitfld.long 0x10 12. " PL_GPIO[76] ,PL_GPIO[76] function bit (RAS IP/GPIO)" "EMI_ADDB_10/FSMC_D10,GPIO10_2" textline " " bitfld.long 0x10 11. " PL_GPIO[75] ,PL_GPIO[75] function bit (RAS IP/GPIO)" "EMI_ADDB_11/FSMC_D11,GPIO10_1" bitfld.long 0x10 10. " PL_GPIO[74] ,PL_GPIO[74] function bit (RAS IP/GPIO)" "EMI_ACK,GPIO10_0" textline " " bitfld.long 0x10 9. " PL_GPIO[73] ,PL_GPIO[73] function bit (RAS IP/GPIO)" "EMI_ADDB_13/FSMC_D13,GPIO9_7" bitfld.long 0x10 8. " PL_GPIO[72] ,PL_GPIO[72] function bit (RAS IP/GPIO)" "EMI_ADDB_14/FSMC_D14,GPIO9_6" textline " " bitfld.long 0x10 7. " PL_GPIO[71] ,PL_GPIO[71] function bit (RAS IP/GPIO)" "EMI_ADDB_15/FSMC_D15,GPIO9_5" bitfld.long 0x10 6. " PL_GPIO[70] ,PL_GPIO[70] function bit (RAS IP/GPIO)" "EMI_ADDB_16,GPIO9_4" textline " " bitfld.long 0x10 5. " PL_GPIO[69] ,PL_GPIO[69] function bit (RAS IP/GPIO)" "EMI_ADDB_17,GPIO9_3" bitfld.long 0x10 4. " PL_GPIO[68] ,PL_GPIO[68] function bit (RAS IP/GPIO)" "EMI_ADDB_18,GPIO9_2" textline " " bitfld.long 0x10 3. " PL_GPIO[67] ,PL_GPIO[67] function bit (RAS IP/GPIO)" "EMI_ADDB_19,GPIO9_1" bitfld.long 0x10 2. " PL_GPIO[66] ,PL_GPIO[66] function bit (RAS IP/GPIO)" "EMI_ADDB_20,GPIO9_0" textline " " bitfld.long 0x10 1. " PL_GPIO[65] ,PL_GPIO[65] function bit (RAS IP/GPIO)" "EMI_ADDB_21,GPIO8_7" bitfld.long 0x10 0. " PL_GPIO[64] ,PL_GPIO[64] function bit (RAS IP/GPIO)" "EMI_ADDLE/FSMC_AL,GPIO8_6" line.long 0x14 "PL_GPIO_EN3,Enable GPIO function 3" bitfld.long 0x14 5. " PLCLK4 ,PLCLK4 function bit (RAS IP/GPIO)" "TDM0_TCLK,GPIO1_3" bitfld.long 0x14 4. " PLCLK3 ,PLCLK3 function bit (RAS IP/GPIO)" "TDM0_RCLK,GPIO1_2" textline " " bitfld.long 0x14 3. " PLCLK2 ,PLCLK2 function bit (RAS IP/GPIO)" "ETH_CLKREF,GPIO1_1" bitfld.long 0x14 2. " PLCLK1 ,PLCLK1 function bit (RAS IP/GPIO)" "ETH_CLKIN,GPIO1_0" textline " " bitfld.long 0x14 1. " PL_GPIO[97] ,PL_GPIO[97] function bit (RAS IP/GPIO)" "ETH0_TX,GPIO12_7" bitfld.long 0x14 0. " PL_GPIO[96] ,PL_GPIO[96] function bit (RAS IP/GPIO)" "ETH0_RX,GPIO12_6" line.long 0x18 "GPIO_DATA_OUT0,Output data register 0" bitfld.long 0x18 31. " PL_GPIO[27] ,PL_GPIO[27] output bit" "Low,High" bitfld.long 0x18 30. " PL_GPIO[26] ,PL_GPIO[26] output bit" "Low,High" textline " " bitfld.long 0x18 29. " PL_GPIO[25] ,PL_GPIO[25] output bit" "Low,High" bitfld.long 0x18 28. " PL_GPIO[24] ,PL_GPIO[24] output bit" "Low,High" textline " " bitfld.long 0x18 27. " PL_GPIO[23] ,PL_GPIO[23] output bit" "Low,High" bitfld.long 0x18 26. " PL_GPIO[22] ,PL_GPIO[22] output bit" "Low,High" textline " " bitfld.long 0x18 25. " PL_GPIO[21] ,PL_GPIO[21] output bit" "Low,High" bitfld.long 0x18 24. " PL_GPIO[20] ,PL_GPIO[20] output bit" "Low,High" textline " " bitfld.long 0x18 23. " PL_GPIO[19] ,PL_GPIO[19] output bit" "Low,High" bitfld.long 0x18 22. " PL_GPIO[18] ,PL_GPIO[18] output bit" "Low,High" textline " " bitfld.long 0x18 21. " PL_GPIO[17] ,PL_GPIO[17] output bit" "Low,High" bitfld.long 0x18 20. " PL_GPIO[16] ,PL_GPIO[16] output bit" "Low,High" textline " " bitfld.long 0x18 19. " PL_GPIO[15] ,PL_GPIO[15] output bit" "Low,High" bitfld.long 0x18 18. " PL_GPIO[14] ,PL_GPIO[14] output bit" "Low,High" textline " " bitfld.long 0x18 17. " PL_GPIO[13] ,PL_GPIO[13] output bit" "Low,High" bitfld.long 0x18 16. " PL_GPIO[12] ,PL_GPIO[12] output bit" "Low,High" textline " " bitfld.long 0x18 15. " PL_GPIO[11] ,PL_GPIO[11] output bit" "Low,High" bitfld.long 0x18 14. " PL_GPIO[10] ,PL_GPIO[10] output bit" "Low,High" textline " " bitfld.long 0x18 13. " PL_GPIO[9] ,PL_GPIO[9] output bit" "Low,High" bitfld.long 0x18 12. " PL_GPIO[8] ,PL_GPIO[8] output bit" "Low,High" textline " " bitfld.long 0x18 11. " PL_GPIO[7] ,PL_GPIO[7] output bit" "Low,High" bitfld.long 0x18 10. " PL_GPIO[6] ,PL_GPIO[6] output bit" "Low,High" textline " " bitfld.long 0x18 9. " PL_GPIO[5] ,PL_GPIO[5] output bit" "Low,High" bitfld.long 0x18 8. " PL_GPIO[4] ,PL_GPIO[4] output bit" "Low,High" textline " " bitfld.long 0x18 7. " PL_GPIO[3] ,PL_GPIO[3] output bit" "Low,High" bitfld.long 0x18 6. " PL_GPIO[2] ,PL_GPIO[2] output bit" "Low,High" textline " " bitfld.long 0x18 5. " PL_GPIO[1] ,PL_GPIO[1] output bit" "Low,High" bitfld.long 0x18 4. " PL_GPIO[0] ,PL_GPIO[0] output bit" "Low,High" textline " " bitfld.long 0x18 3. " PLCLK1 ,PLCLK1 output bit" "Low,High" bitfld.long 0x18 2. " PLCLK2 ,PLCLK2 output bit" "Low,High" textline " " bitfld.long 0x18 1. " PLCLK3 ,PLCLK3 output bit" "Low,High" bitfld.long 0x18 0. " PLCLK4 ,PLCLK4 output bit" "Low,High" line.long 0x1C "GPIO_DATA_OUT1,Output data register 1" bitfld.long 0x1C 31. " PL_GPIO[65] ,PL_GPIO[65] output bit" "Low,High" bitfld.long 0x1C 30. " PL_GPIO[64] ,PL_GPIO[64] output bit" "Low,High" textline " " bitfld.long 0x1C 29. " PL_GPIO[63] ,PL_GPIO[63] output bit" "Low,High" bitfld.long 0x1C 28. " PL_GPIO[62] ,PL_GPIO[62] output bit" "Low,High" textline " " bitfld.long 0x1C 27. " PL_GPIO[61] ,PL_GPIO[61] output bit" "Low,High" bitfld.long 0x1C 26. " PL_GPIO[60] ,PL_GPIO[60] output bit" "Low,High" textline " " bitfld.long 0x1C 25. " PL_GPIO[59] ,PL_GPIO[59] output bit" "Low,High" bitfld.long 0x1C 24. " PL_GPIO[58] ,PL_GPIO[58] output bit" "Low,High" textline " " bitfld.long 0x1C 23. " PL_GPIO[57] ,PL_GPIO[57] output bit" "Low,High" bitfld.long 0x1C 22. " PL_GPIO[56] ,PL_GPIO[56] output bit" "Low,High" textline " " bitfld.long 0x1C 21. " PL_GPIO[55] ,PL_GPIO[55] output bit" "Low,High" bitfld.long 0x1C 20. " PL_GPIO[54] ,PL_GPIO[54] output bit" "Low,High" textline " " bitfld.long 0x1C 19. " PL_GPIO[53] ,PL_GPIO[53] output bit" "Low,High" bitfld.long 0x1C 18. " PL_GPIO[52] ,PL_GPIO[52] output bit" "Low,High" textline " " bitfld.long 0x1C 17. " PL_GPIO[51] ,PL_GPIO[51] output bit" "Low,High" bitfld.long 0x1C 16. " PL_GPIO[50] ,PL_GPIO[50] output bit" "Low,High" textline " " bitfld.long 0x1C 15. " PL_GPIO[49] ,PL_GPIO[49] output bit" "Low,High" bitfld.long 0x1C 14. " PL_GPIO[48] ,PL_GPIO[48] output bit" "Low,High" textline " " bitfld.long 0x1C 13. " PL_GPIO[47] ,PL_GPIO[47] output bit" "Low,High" bitfld.long 0x1C 12. " PL_GPIO[46] ,PL_GPIO[46] output bit" "Low,High" textline " " bitfld.long 0x1C 11. " PL_GPIO[45] ,PL_GPIO[45] output bit" "Low,High" bitfld.long 0x1C 10. " PL_GPIO[44] ,PL_GPIO[44] output bit" "Low,High" textline " " bitfld.long 0x1C 9. " PL_GPIO[43] ,PL_GPIO[43] output bit" "Low,High" bitfld.long 0x1C 8. " PL_GPIO[42] ,PL_GPIO[42] output bit" "Low,High" textline " " bitfld.long 0x1C 7. " PL_GPIO[41] ,PL_GPIO[41] output bit" "Low,High" bitfld.long 0x1C 6. " PL_GPIO[40] ,PL_GPIO[40] output bit" "Low,High" textline " " bitfld.long 0x1C 5. " PL_GPIO[39] ,PL_GPIO[39] output bit" "Low,High" bitfld.long 0x1C 4. " PL_GPIO[38] ,PL_GPIO[38] output bit" "Low,High" textline " " bitfld.long 0x1C 3. " PL_GPIO[37] ,PL_GPIO[37] output bit" "Low,High" bitfld.long 0x1C 2. " PL_GPIO[36] ,PL_GPIO[36] output bit" "Low,High" textline " " bitfld.long 0x1C 1. " PL_GPIO[35] ,PL_GPIO[35] output bit" "Low,High" bitfld.long 0x1C 0. " PL_GPIO[34] ,PL_GPIO[34] output bit" "Low,High" line.long 0x20 "GPIO_DATA_OUT2,Output data register 2" bitfld.long 0x20 31. " PL_GPIO[97] ,PL_GPIO[97] output bit" "Low,High" bitfld.long 0x20 30. " PL_GPIO[96] ,PL_GPIO[96] output bit" "Low,High" textline " " bitfld.long 0x20 29. " PL_GPIO[95] ,PL_GPIO[95] output bit" "Low,High" bitfld.long 0x20 28. " PL_GPIO[94] ,PL_GPIO[94] output bit" "Low,High" textline " " bitfld.long 0x20 27. " PL_GPIO[93] ,PL_GPIO[93] output bit" "Low,High" bitfld.long 0x20 26. " PL_GPIO[92] ,PL_GPIO[92] output bit" "Low,High" textline " " bitfld.long 0x20 25. " PL_GPIO[91] ,PL_GPIO[91] output bit" "Low,High" bitfld.long 0x20 24. " PL_GPIO[90] ,PL_GPIO[90] output bit" "Low,High" textline " " bitfld.long 0x20 23. " PL_GPIO[89] ,PL_GPIO[89] output bit" "Low,High" bitfld.long 0x20 22. " PL_GPIO[88] ,PL_GPIO[88] output bit" "Low,High" textline " " bitfld.long 0x20 21. " PL_GPIO[87] ,PL_GPIO[87] output bit" "Low,High" bitfld.long 0x20 20. " PL_GPIO[86] ,PL_GPIO[86] output bit" "Low,High" textline " " bitfld.long 0x20 19. " PL_GPIO[85] ,PL_GPIO[85] output bit" "Low,High" bitfld.long 0x20 18. " PL_GPIO[84] ,PL_GPIO[84] output bit" "Low,High" textline " " bitfld.long 0x20 17. " PL_GPIO[83] ,PL_GPIO[83] output bit" "Low,High" bitfld.long 0x20 16. " PL_GPIO[82] ,PL_GPIO[82] output bit" "Low,High" textline " " bitfld.long 0x20 15. " PL_GPIO[81] ,PL_GPIO[81] output bit" "Low,High" bitfld.long 0x20 14. " PL_GPIO[80] ,PL_GPIO[80] output bit" "Low,High" textline " " bitfld.long 0x20 13. " PL_GPIO[79] ,PL_GPIO[79] output bit" "Low,High" bitfld.long 0x20 12. " PL_GPIO[78] ,PL_GPIO[78] output bit" "Low,High" textline " " bitfld.long 0x20 11. " PL_GPIO[77] ,PL_GPIO[77] output bit" "Low,High" bitfld.long 0x20 10. " PL_GPIO[76] ,PL_GPIO[76] output bit" "Low,High" textline " " bitfld.long 0x20 9. " PL_GPIO[75] ,PL_GPIO[75] output bit" "Low,High" bitfld.long 0x20 8. " PL_GPIO[74] ,PL_GPIO[74] output bit" "Low,High" textline " " bitfld.long 0x20 7. " PL_GPIO[73] ,PL_GPIO[73] output bit" "Low,High" bitfld.long 0x20 6. " PL_GPIO[72] ,PL_GPIO[72] output bit" "Low,High" textline " " bitfld.long 0x20 5. " PL_GPIO[71] ,PL_GPIO[71] output bit" "Low,High" bitfld.long 0x20 4. " PL_GPIO[70] ,PL_GPIO[70] output bit" "Low,High" textline " " bitfld.long 0x20 3. " PL_GPIO[69] ,PL_GPIO[69] output bit" "Low,High" bitfld.long 0x20 2. " PL_GPIO[68] ,PL_GPIO[68] output bit" "Low,High" textline " " bitfld.long 0x20 1. " PL_GPIO[67] ,PL_GPIO[67] output bit" "Low,High" bitfld.long 0x20 0. " PL_GPIO[66] ,PL_GPIO[66] output bit" "Low,High" group.long 0x30++0x0B line.long 0x00 "GPIO_DIR0,Direction register 0" bitfld.long 0x00 31. " PL_GPIO[27] ,PL_GPIO[27] direction bit" "Output,Input" bitfld.long 0x00 30. " PL_GPIO[26] ,PL_GPIO[26] direction bit" "Output,Input" textline " " bitfld.long 0x00 29. " PL_GPIO[25] ,PL_GPIO[25] direction bit" "Output,Input" bitfld.long 0x00 28. " PL_GPIO[24] ,PL_GPIO[24] direction bit" "Output,Input" textline " " bitfld.long 0x00 27. " PL_GPIO[23] ,PL_GPIO[23] direction bit" "Output,Input" bitfld.long 0x00 26. " PL_GPIO[22] ,PL_GPIO[22] direction bit" "Output,Input" textline " " bitfld.long 0x00 25. " PL_GPIO[21] ,PL_GPIO[21] direction bit" "Output,Input" bitfld.long 0x00 24. " PL_GPIO[20] ,PL_GPIO[20] direction bit" "Output,Input" textline " " bitfld.long 0x00 23. " PL_GPIO[19] ,PL_GPIO[19] direction bit" "Output,Input" bitfld.long 0x00 22. " PL_GPIO[18] ,PL_GPIO[18] direction bit" "Output,Input" textline " " bitfld.long 0x00 21. " PL_GPIO[17] ,PL_GPIO[17] direction bit" "Output,Input" bitfld.long 0x00 20. " PL_GPIO[16] ,PL_GPIO[16] direction bit" "Output,Input" textline " " bitfld.long 0x00 19. " PL_GPIO[15] ,PL_GPIO[15] direction bit" "Output,Input" bitfld.long 0x00 18. " PL_GPIO[14] ,PL_GPIO[14] direction bit" "Output,Input" textline " " bitfld.long 0x00 17. " PL_GPIO[13] ,PL_GPIO[13] direction bit" "Output,Input" bitfld.long 0x00 16. " PL_GPIO[12] ,PL_GPIO[12] direction bit" "Output,Input" textline " " bitfld.long 0x00 15. " PL_GPIO[11] ,PL_GPIO[11] direction bit" "Output,Input" bitfld.long 0x00 14. " PL_GPIO[10] ,PL_GPIO[10] direction bit" "Output,Input" textline " " bitfld.long 0x00 13. " PL_GPIO[9] ,PL_GPIO[9] direction bit" "Output,Input" bitfld.long 0x00 12. " PL_GPIO[8] ,PL_GPIO[8] direction bit" "Output,Input" textline " " bitfld.long 0x00 11. " PL_GPIO[7] ,PL_GPIO[7] direction bit" "Output,Input" bitfld.long 0x00 10. " PL_GPIO[6] ,PL_GPIO[6] direction bit" "Output,Input" textline " " bitfld.long 0x00 9. " PL_GPIO[5] ,PL_GPIO[5] direction bit" "Output,Input" bitfld.long 0x00 8. " PL_GPIO[4] ,PL_GPIO[4] direction bit" "Output,Input" textline " " bitfld.long 0x00 7. " PL_GPIO[3] ,PL_GPIO[3] direction bit" "Output,Input" bitfld.long 0x00 6. " PL_GPIO[2] ,PL_GPIO[2] direction bit" "Output,Input" textline " " bitfld.long 0x00 5. " PL_GPIO[1] ,PL_GPIO[1] direction bit" "Output,Input" bitfld.long 0x00 4. " PL_GPIO[0] ,PL_GPIO[0] direction bit" "Output,Input" textline " " bitfld.long 0x00 3. " PLCLK1 ,PLCLK1 direction bit" "Output,Input" bitfld.long 0x00 2. " PLCLK2 ,PLCLK2 direction bit" "Output,Input" textline " " bitfld.long 0x00 1. " PLCLK3 ,PLCLK3 direction bit" "Output,Input" bitfld.long 0x00 0. " PLCLK4 ,PLCLK4 direction bit" "Output,Input" line.long 0x04 "GPIO_DIR1,Direction register 1" bitfld.long 0x04 31. " PL_GPIO[65] ,PL_GPIO[65] direction bit" "Output,Input" bitfld.long 0x04 30. " PL_GPIO[64] ,PL_GPIO[64] direction bit" "Output,Input" textline " " bitfld.long 0x04 29. " PL_GPIO[63] ,PL_GPIO[63] direction bit" "Output,Input" bitfld.long 0x04 28. " PL_GPIO[62] ,PL_GPIO[62] direction bit" "Output,Input" textline " " bitfld.long 0x04 27. " PL_GPIO[61] ,PL_GPIO[61] direction bit" "Output,Input" bitfld.long 0x04 26. " PL_GPIO[60] ,PL_GPIO[60] direction bit" "Output,Input" textline " " bitfld.long 0x04 25. " PL_GPIO[59] ,PL_GPIO[59] direction bit" "Output,Input" bitfld.long 0x04 24. " PL_GPIO[58] ,PL_GPIO[58] direction bit" "Output,Input" textline " " bitfld.long 0x04 23. " PL_GPIO[57] ,PL_GPIO[57] direction bit" "Output,Input" bitfld.long 0x04 22. " PL_GPIO[56] ,PL_GPIO[56] direction bit" "Output,Input" textline " " bitfld.long 0x04 21. " PL_GPIO[55] ,PL_GPIO[55] direction bit" "Output,Input" bitfld.long 0x04 20. " PL_GPIO[54] ,PL_GPIO[54] direction bit" "Output,Input" textline " " bitfld.long 0x04 19. " PL_GPIO[53] ,PL_GPIO[53] direction bit" "Output,Input" bitfld.long 0x04 18. " PL_GPIO[52] ,PL_GPIO[52] direction bit" "Output,Input" textline " " bitfld.long 0x04 17. " PL_GPIO[51] ,PL_GPIO[51] direction bit" "Output,Input" bitfld.long 0x04 16. " PL_GPIO[50] ,PL_GPIO[50] direction bit" "Output,Input" textline " " bitfld.long 0x04 15. " PL_GPIO[49] ,PL_GPIO[49] direction bit" "Output,Input" bitfld.long 0x04 14. " PL_GPIO[48] ,PL_GPIO[48] direction bit" "Output,Input" textline " " bitfld.long 0x04 13. " PL_GPIO[47] ,PL_GPIO[47] direction bit" "Output,Input" bitfld.long 0x04 12. " PL_GPIO[46] ,PL_GPIO[46] direction bit" "Output,Input" textline " " bitfld.long 0x04 11. " PL_GPIO[45] ,PL_GPIO[45] direction bit" "Output,Input" bitfld.long 0x04 10. " PL_GPIO[44] ,PL_GPIO[44] direction bit" "Output,Input" textline " " bitfld.long 0x04 9. " PL_GPIO[43] ,PL_GPIO[43] direction bit" "Output,Input" bitfld.long 0x04 8. " PL_GPIO[42] ,PL_GPIO[42] direction bit" "Output,Input" textline " " bitfld.long 0x04 7. " PL_GPIO[41] ,PL_GPIO[41] direction bit" "Output,Input" bitfld.long 0x04 6. " PL_GPIO[40] ,PL_GPIO[40] direction bit" "Output,Input" textline " " bitfld.long 0x04 5. " PL_GPIO[39] ,PL_GPIO[39] direction bit" "Output,Input" bitfld.long 0x04 4. " PL_GPIO[38] ,PL_GPIO[38] direction bit" "Output,Input" textline " " bitfld.long 0x04 3. " PL_GPIO[37] ,PL_GPIO[37] direction bit" "Output,Input" bitfld.long 0x04 2. " PL_GPIO[36] ,PL_GPIO[36] direction bit" "Output,Input" textline " " bitfld.long 0x04 1. " PL_GPIO[35] ,PL_GPIO[35] direction bit" "Output,Input" bitfld.long 0x04 0. " PL_GPIO[34] ,PL_GPIO[34] direction bit" "Output,Input" line.long 0x08 "GPIO_DIR2,Direction register 2" bitfld.long 0x08 31. " PL_GPIO[97] ,PL_GPIO[97] direction bit" "Output,Input" bitfld.long 0x08 30. " PL_GPIO[96] ,PL_GPIO[96] direction bit" "Output,Input" textline " " bitfld.long 0x08 29. " PL_GPIO[95] ,PL_GPIO[95] direction bit" "Output,Input" bitfld.long 0x08 28. " PL_GPIO[94] ,PL_GPIO[94] direction bit" "Output,Input" textline " " bitfld.long 0x08 27. " PL_GPIO[93] ,PL_GPIO[93] direction bit" "Output,Input" bitfld.long 0x08 26. " PL_GPIO[92] ,PL_GPIO[92] direction bit" "Output,Input" textline " " bitfld.long 0x08 25. " PL_GPIO[91] ,PL_GPIO[91] direction bit" "Output,Input" bitfld.long 0x08 24. " PL_GPIO[90] ,PL_GPIO[90] direction bit" "Output,Input" textline " " bitfld.long 0x08 23. " PL_GPIO[89] ,PL_GPIO[89] direction bit" "Output,Input" bitfld.long 0x08 22. " PL_GPIO[88] ,PL_GPIO[88] direction bit" "Output,Input" textline " " bitfld.long 0x08 21. " PL_GPIO[87] ,PL_GPIO[87] direction bit" "Output,Input" bitfld.long 0x08 20. " PL_GPIO[86] ,PL_GPIO[86] direction bit" "Output,Input" textline " " bitfld.long 0x08 19. " PL_GPIO[85] ,PL_GPIO[85] direction bit" "Output,Input" bitfld.long 0x08 18. " PL_GPIO[84] ,PL_GPIO[84] direction bit" "Output,Input" textline " " bitfld.long 0x08 17. " PL_GPIO[83] ,PL_GPIO[83] direction bit" "Output,Input" bitfld.long 0x08 16. " PL_GPIO[82] ,PL_GPIO[82] direction bit" "Output,Input" textline " " bitfld.long 0x08 15. " PL_GPIO[81] ,PL_GPIO[81] direction bit" "Output,Input" bitfld.long 0x08 14. " PL_GPIO[80] ,PL_GPIO[80] direction bit" "Output,Input" textline " " bitfld.long 0x08 13. " PL_GPIO[79] ,PL_GPIO[79] direction bit" "Output,Input" bitfld.long 0x08 12. " PL_GPIO[78] ,PL_GPIO[78] direction bit" "Output,Input" textline " " bitfld.long 0x08 11. " PL_GPIO[77] ,PL_GPIO[77] direction bit" "Output,Input" bitfld.long 0x08 10. " PL_GPIO[76] ,PL_GPIO[76] direction bit" "Output,Input" textline " " bitfld.long 0x08 9. " PL_GPIO[75] ,PL_GPIO[75] direction bit" "Output,Input" bitfld.long 0x08 8. " PL_GPIO[74] ,PL_GPIO[74] direction bit" "Output,Input" textline " " bitfld.long 0x08 7. " PL_GPIO[73] ,PL_GPIO[73] direction bit" "Output,Input" bitfld.long 0x08 6. " PL_GPIO[72] ,PL_GPIO[72] direction bit" "Output,Input" textline " " bitfld.long 0x08 5. " PL_GPIO[71] ,PL_GPIO[71] direction bit" "Output,Input" bitfld.long 0x08 4. " PL_GPIO[70] ,PL_GPIO[70] direction bit" "Output,Input" textline " " bitfld.long 0x08 3. " PL_GPIO[69] ,PL_GPIO[69] direction bit" "Output,Input" bitfld.long 0x08 2. " PL_GPIO[68] ,PL_GPIO[68] direction bit" "Output,Input" textline " " bitfld.long 0x08 1. " PL_GPIO[67] ,PL_GPIO[67] direction bit" "Output,Input" bitfld.long 0x08 0. " PL_GPIO[66] ,PL_GPIO[66] direction bit" "Output,Input" rgroup.long 0x40++0x0B line.long 0x00 "GPIO_INT_EN0,Input data register 0" bitfld.long 0x00 31. " PL_GPIO[27] ,PL_GPIO[27] input bit" "Low,High" bitfld.long 0x00 30. " PL_GPIO[26] ,PL_GPIO[26] input bit" "Low,High" textline " " bitfld.long 0x00 29. " PL_GPIO[25] ,PL_GPIO[25] input bit" "Low,High" bitfld.long 0x00 28. " PL_GPIO[24] ,PL_GPIO[24] input bit" "Low,High" textline " " bitfld.long 0x00 27. " PL_GPIO[23] ,PL_GPIO[23] input bit" "Low,High" bitfld.long 0x00 26. " PL_GPIO[22] ,PL_GPIO[22] input bit" "Low,High" textline " " bitfld.long 0x00 25. " PL_GPIO[21] ,PL_GPIO[21] input bit" "Low,High" bitfld.long 0x00 24. " PL_GPIO[20] ,PL_GPIO[20] input bit" "Low,High" textline " " bitfld.long 0x00 23. " PL_GPIO[19] ,PL_GPIO[19] input bit" "Low,High" bitfld.long 0x00 22. " PL_GPIO[18] ,PL_GPIO[18] input bit" "Low,High" textline " " bitfld.long 0x00 21. " PL_GPIO[17] ,PL_GPIO[17] input bit" "Low,High" bitfld.long 0x00 20. " PL_GPIO[16] ,PL_GPIO[16] input bit" "Low,High" textline " " bitfld.long 0x00 19. " PL_GPIO[15] ,PL_GPIO[15] input bit" "Low,High" bitfld.long 0x00 18. " PL_GPIO[14] ,PL_GPIO[14] input bit" "Low,High" textline " " bitfld.long 0x00 17. " PL_GPIO[13] ,PL_GPIO[13] input bit" "Low,High" bitfld.long 0x00 16. " PL_GPIO[12] ,PL_GPIO[12] input bit" "Low,High" textline " " bitfld.long 0x00 15. " PL_GPIO[11] ,PL_GPIO[11] input bit" "Low,High" bitfld.long 0x00 14. " PL_GPIO[10] ,PL_GPIO[10] input bit" "Low,High" textline " " bitfld.long 0x00 13. " PL_GPIO[9] ,PL_GPIO[9] input bit" "Low,High" bitfld.long 0x00 12. " PL_GPIO[8] ,PL_GPIO[8] input bit" "Low,High" textline " " bitfld.long 0x00 11. " PL_GPIO[7] ,PL_GPIO[7] input bit" "Low,High" bitfld.long 0x00 10. " PL_GPIO[6] ,PL_GPIO[6] input bit" "Low,High" textline " " bitfld.long 0x00 9. " PL_GPIO[5] ,PL_GPIO[5] input bit" "Low,High" bitfld.long 0x00 8. " PL_GPIO[4] ,PL_GPIO[4] input bit" "Low,High" textline " " bitfld.long 0x00 7. " PL_GPIO[3] ,PL_GPIO[3] input bit" "Low,High" bitfld.long 0x00 6. " PL_GPIO[2] ,PL_GPIO[2] input bit" "Low,High" textline " " bitfld.long 0x00 5. " PL_GPIO[1] ,PL_GPIO[1] input bit" "Low,High" bitfld.long 0x00 4. " PL_GPIO[0] ,PL_GPIO[0] input bit" "Low,High" textline " " bitfld.long 0x00 3. " PLCLK1 ,PLCLK1 input bit" "Low,High" bitfld.long 0x00 2. " PLCLK2 ,PLCLK2 input bit" "Low,High" textline " " bitfld.long 0x00 1. " PLCLK3 ,PLCLK3 input bit" "Low,High" bitfld.long 0x00 0. " PLCLK4 ,PLCLK4 input bit" "Low,High" line.long 0x04 "GPIO_INT_EN1,Input data register 1" bitfld.long 0x04 31. " PL_GPIO[65] ,PL_GPIO[65] input bit" "Low,High" bitfld.long 0x04 30. " PL_GPIO[64] ,PL_GPIO[64] input bit" "Low,High" textline " " bitfld.long 0x04 29. " PL_GPIO[63] ,PL_GPIO[63] input bit" "Low,High" bitfld.long 0x04 28. " PL_GPIO[62] ,PL_GPIO[62] input bit" "Low,High" textline " " bitfld.long 0x04 27. " PL_GPIO[61] ,PL_GPIO[61] input bit" "Low,High" bitfld.long 0x04 26. " PL_GPIO[60] ,PL_GPIO[60] input bit" "Low,High" textline " " bitfld.long 0x04 25. " PL_GPIO[59] ,PL_GPIO[59] input bit" "Low,High" bitfld.long 0x04 24. " PL_GPIO[58] ,PL_GPIO[58] input bit" "Low,High" textline " " bitfld.long 0x04 23. " PL_GPIO[57] ,PL_GPIO[57] input bit" "Low,High" bitfld.long 0x04 22. " PL_GPIO[56] ,PL_GPIO[56] input bit" "Low,High" textline " " bitfld.long 0x04 21. " PL_GPIO[55] ,PL_GPIO[55] input bit" "Low,High" bitfld.long 0x04 20. " PL_GPIO[54] ,PL_GPIO[54] input bit" "Low,High" textline " " bitfld.long 0x04 19. " PL_GPIO[53] ,PL_GPIO[53] input bit" "Low,High" bitfld.long 0x04 18. " PL_GPIO[52] ,PL_GPIO[52] input bit" "Low,High" textline " " bitfld.long 0x04 17. " PL_GPIO[51] ,PL_GPIO[51] input bit" "Low,High" bitfld.long 0x04 16. " PL_GPIO[50] ,PL_GPIO[50] input bit" "Low,High" textline " " bitfld.long 0x04 15. " PL_GPIO[49] ,PL_GPIO[49] input bit" "Low,High" bitfld.long 0x04 14. " PL_GPIO[48] ,PL_GPIO[48] input bit" "Low,High" textline " " bitfld.long 0x04 13. " PL_GPIO[47] ,PL_GPIO[47] input bit" "Low,High" bitfld.long 0x04 12. " PL_GPIO[46] ,PL_GPIO[46] input bit" "Low,High" textline " " bitfld.long 0x04 11. " PL_GPIO[45] ,PL_GPIO[45] input bit" "Low,High" bitfld.long 0x04 10. " PL_GPIO[44] ,PL_GPIO[44] input bit" "Low,High" textline " " bitfld.long 0x04 9. " PL_GPIO[43] ,PL_GPIO[43] input bit" "Low,High" bitfld.long 0x04 8. " PL_GPIO[42] ,PL_GPIO[42] input bit" "Low,High" textline " " bitfld.long 0x04 7. " PL_GPIO[41] ,PL_GPIO[41] input bit" "Low,High" bitfld.long 0x04 6. " PL_GPIO[40] ,PL_GPIO[40] input bit" "Low,High" textline " " bitfld.long 0x04 5. " PL_GPIO[39] ,PL_GPIO[39] input bit" "Low,High" bitfld.long 0x04 4. " PL_GPIO[38] ,PL_GPIO[38] input bit" "Low,High" textline " " bitfld.long 0x04 3. " PL_GPIO[37] ,PL_GPIO[37] input bit" "Low,High" bitfld.long 0x04 2. " PL_GPIO[36] ,PL_GPIO[36] input bit" "Low,High" textline " " bitfld.long 0x04 1. " PL_GPIO[35] ,PL_GPIO[35] input bit" "Low,High" bitfld.long 0x04 0. " PL_GPIO[34] ,PL_GPIO[34] input bit" "Low,High" line.long 0x08 "GPIO_INT_EN2,Input data register 2" bitfld.long 0x08 31. " PL_GPIO[97] ,PL_GPIO[97] input bit" "Low,High" bitfld.long 0x08 30. " PL_GPIO[96] ,PL_GPIO[96] input bit" "Low,High" textline " " bitfld.long 0x08 29. " PL_GPIO[95] ,PL_GPIO[95] input bit" "Low,High" bitfld.long 0x08 28. " PL_GPIO[94] ,PL_GPIO[94] input bit" "Low,High" textline " " bitfld.long 0x08 27. " PL_GPIO[93] ,PL_GPIO[93] input bit" "Low,High" bitfld.long 0x08 26. " PL_GPIO[92] ,PL_GPIO[92] input bit" "Low,High" textline " " bitfld.long 0x08 25. " PL_GPIO[91] ,PL_GPIO[91] input bit" "Low,High" bitfld.long 0x08 24. " PL_GPIO[90] ,PL_GPIO[90] input bit" "Low,High" textline " " bitfld.long 0x08 23. " PL_GPIO[89] ,PL_GPIO[89] input bit" "Low,High" bitfld.long 0x08 22. " PL_GPIO[88] ,PL_GPIO[88] input bit" "Low,High" textline " " bitfld.long 0x08 21. " PL_GPIO[87] ,PL_GPIO[87] input bit" "Low,High" bitfld.long 0x08 20. " PL_GPIO[86] ,PL_GPIO[86] input bit" "Low,High" textline " " bitfld.long 0x08 19. " PL_GPIO[85] ,PL_GPIO[85] input bit" "Low,High" bitfld.long 0x08 18. " PL_GPIO[84] ,PL_GPIO[84] input bit" "Low,High" textline " " bitfld.long 0x08 17. " PL_GPIO[83] ,PL_GPIO[83] input bit" "Low,High" bitfld.long 0x08 16. " PL_GPIO[82] ,PL_GPIO[82] input bit" "Low,High" textline " " bitfld.long 0x08 15. " PL_GPIO[81] ,PL_GPIO[81] input bit" "Low,High" bitfld.long 0x08 14. " PL_GPIO[80] ,PL_GPIO[80] input bit" "Low,High" textline " " bitfld.long 0x08 13. " PL_GPIO[79] ,PL_GPIO[79] input bit" "Low,High" bitfld.long 0x08 12. " PL_GPIO[78] ,PL_GPIO[78] input bit" "Low,High" textline " " bitfld.long 0x08 11. " PL_GPIO[77] ,PL_GPIO[77] input bit" "Low,High" bitfld.long 0x08 10. " PL_GPIO[76] ,PL_GPIO[76] input bit" "Low,High" textline " " bitfld.long 0x08 9. " PL_GPIO[75] ,PL_GPIO[75] input bit" "Low,High" bitfld.long 0x08 8. " PL_GPIO[74] ,PL_GPIO[74] input bit" "Low,High" textline " " bitfld.long 0x08 7. " PL_GPIO[73] ,PL_GPIO[73] input bit" "Low,High" bitfld.long 0x08 6. " PL_GPIO[72] ,PL_GPIO[72] input bit" "Low,High" textline " " bitfld.long 0x08 5. " PL_GPIO[71] ,PL_GPIO[71] input bit" "Low,High" bitfld.long 0x08 4. " PL_GPIO[70] ,PL_GPIO[70] input bit" "Low,High" textline " " bitfld.long 0x08 3. " PL_GPIO[69] ,PL_GPIO[69] input bit" "Low,High" bitfld.long 0x08 2. " PL_GPIO[68] ,PL_GPIO[68] input bit" "Low,High" textline " " bitfld.long 0x08 1. " PL_GPIO[67] ,PL_GPIO[67] input bit" "Low,High" bitfld.long 0x08 0. " PL_GPIO[66] ,PL_GPIO[66] input bit" "Low,High" group.long 0x50++0x0B line.long 0x00 "GPIO_DATA_IN0,Interrupt mask register 0" bitfld.long 0x00 31. " PL_GPIO[27] ,PL_GPIO[27] mask bit" "Not masked,Masked" bitfld.long 0x00 30. " PL_GPIO[26] ,PL_GPIO[26] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 29. " PL_GPIO[25] ,PL_GPIO[25] mask bit" "Not masked,Masked" bitfld.long 0x00 28. " PL_GPIO[24] ,PL_GPIO[24] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 27. " PL_GPIO[23] ,PL_GPIO[23] mask bit" "Not masked,Masked" bitfld.long 0x00 26. " PL_GPIO[22] ,PL_GPIO[22] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 25. " PL_GPIO[21] ,PL_GPIO[21] mask bit" "Not masked,Masked" bitfld.long 0x00 24. " PL_GPIO[20] ,PL_GPIO[20] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 23. " PL_GPIO[19] ,PL_GPIO[19] mask bit" "Not masked,Masked" bitfld.long 0x00 22. " PL_GPIO[18] ,PL_GPIO[18] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 21. " PL_GPIO[17] ,PL_GPIO[17] mask bit" "Not masked,Masked" bitfld.long 0x00 20. " PL_GPIO[16] ,PL_GPIO[16] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 19. " PL_GPIO[15] ,PL_GPIO[15] mask bit" "Not masked,Masked" bitfld.long 0x00 18. " PL_GPIO[14] ,PL_GPIO[14] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 17. " PL_GPIO[13] ,PL_GPIO[13] mask bit" "Not masked,Masked" bitfld.long 0x00 16. " PL_GPIO[12] ,PL_GPIO[12] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 15. " PL_GPIO[11] ,PL_GPIO[11] mask bit" "Not masked,Masked" bitfld.long 0x00 14. " PL_GPIO[10] ,PL_GPIO[10] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 13. " PL_GPIO[9] ,PL_GPIO[9] mask bit" "Not masked,Masked" bitfld.long 0x00 12. " PL_GPIO[8] ,PL_GPIO[8] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 11. " PL_GPIO[7] ,PL_GPIO[7] mask bit" "Not masked,Masked" bitfld.long 0x00 10. " PL_GPIO[6] ,PL_GPIO[6] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 9. " PL_GPIO[5] ,PL_GPIO[5] mask bit" "Not masked,Masked" bitfld.long 0x00 8. " PL_GPIO[4] ,PL_GPIO[4] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 7. " PL_GPIO[3] ,PL_GPIO[3] mask bit" "Not masked,Masked" bitfld.long 0x00 6. " PL_GPIO[2] ,PL_GPIO[2] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 5. " PL_GPIO[1] ,PL_GPIO[1] mask bit" "Not masked,Masked" bitfld.long 0x00 4. " PL_GPIO[0] ,PL_GPIO[0] mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PLCLK1 ,PLCLK1 mask bit" "Not masked,Masked" bitfld.long 0x00 2. " PLCLK2 ,PLCLK2 mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PLCLK3 ,PLCLK3 mask bit" "Not masked,Masked" bitfld.long 0x00 0. " PLCLK4 ,PLCLK4 mask bit" "Not masked,Masked" line.long 0x04 "GPIO_DATA_IN1,Interrupt mask register 1" bitfld.long 0x04 31. " PL_GPIO[65] ,PL_GPIO[65] mask bit" "Not masked,Masked" bitfld.long 0x04 30. " PL_GPIO[64] ,PL_GPIO[64] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 29. " PL_GPIO[63] ,PL_GPIO[63] mask bit" "Not masked,Masked" bitfld.long 0x04 28. " PL_GPIO[62] ,PL_GPIO[62] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 27. " PL_GPIO[61] ,PL_GPIO[61] mask bit" "Not masked,Masked" bitfld.long 0x04 26. " PL_GPIO[60] ,PL_GPIO[60] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 25. " PL_GPIO[59] ,PL_GPIO[59] mask bit" "Not masked,Masked" bitfld.long 0x04 24. " PL_GPIO[58] ,PL_GPIO[58] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 23. " PL_GPIO[57] ,PL_GPIO[57] mask bit" "Not masked,Masked" bitfld.long 0x04 22. " PL_GPIO[56] ,PL_GPIO[56] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 21. " PL_GPIO[55] ,PL_GPIO[55] mask bit" "Not masked,Masked" bitfld.long 0x04 20. " PL_GPIO[54] ,PL_GPIO[54] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 19. " PL_GPIO[53] ,PL_GPIO[53] mask bit" "Not masked,Masked" bitfld.long 0x04 18. " PL_GPIO[52] ,PL_GPIO[52] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 17. " PL_GPIO[51] ,PL_GPIO[51] mask bit" "Not masked,Masked" bitfld.long 0x04 16. " PL_GPIO[50] ,PL_GPIO[50] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 15. " PL_GPIO[49] ,PL_GPIO[49] mask bit" "Not masked,Masked" bitfld.long 0x04 14. " PL_GPIO[48] ,PL_GPIO[48] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 13. " PL_GPIO[47] ,PL_GPIO[47] mask bit" "Not masked,Masked" bitfld.long 0x04 12. " PL_GPIO[46] ,PL_GPIO[46] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 11. " PL_GPIO[45] ,PL_GPIO[45] mask bit" "Not masked,Masked" bitfld.long 0x04 10. " PL_GPIO[44] ,PL_GPIO[44] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 9. " PL_GPIO[43] ,PL_GPIO[43] mask bit" "Not masked,Masked" bitfld.long 0x04 8. " PL_GPIO[42] ,PL_GPIO[42] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 7. " PL_GPIO[41] ,PL_GPIO[41] mask bit" "Not masked,Masked" bitfld.long 0x04 6. " PL_GPIO[40] ,PL_GPIO[40] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 5. " PL_GPIO[39] ,PL_GPIO[39] mask bit" "Not masked,Masked" bitfld.long 0x04 4. " PL_GPIO[38] ,PL_GPIO[38] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 3. " PL_GPIO[37] ,PL_GPIO[37] mask bit" "Not masked,Masked" bitfld.long 0x04 2. " PL_GPIO[36] ,PL_GPIO[36] mask bit" "Not masked,Masked" textline " " bitfld.long 0x04 1. " PL_GPIO[35] ,PL_GPIO[35] mask bit" "Not masked,Masked" bitfld.long 0x04 0. " PL_GPIO[34] ,PL_GPIO[34] mask bit" "Not masked,Masked" line.long 0x08 "GPIO_DATA_IN2,Interrupt mask register 2" bitfld.long 0x08 31. " PL_GPIO[97] ,PL_GPIO[97] mask bit" "Not masked,Masked" bitfld.long 0x08 30. " PL_GPIO[96] ,PL_GPIO[96] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 29. " PL_GPIO[95] ,PL_GPIO[95] mask bit" "Not masked,Masked" bitfld.long 0x08 28. " PL_GPIO[94] ,PL_GPIO[94] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 27. " PL_GPIO[93] ,PL_GPIO[93] mask bit" "Not masked,Masked" bitfld.long 0x08 26. " PL_GPIO[92] ,PL_GPIO[92] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 25. " PL_GPIO[91] ,PL_GPIO[91] mask bit" "Not masked,Masked" bitfld.long 0x08 24. " PL_GPIO[90] ,PL_GPIO[90] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 23. " PL_GPIO[89] ,PL_GPIO[89] mask bit" "Not masked,Masked" bitfld.long 0x08 22. " PL_GPIO[88] ,PL_GPIO[88] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 21. " PL_GPIO[87] ,PL_GPIO[87] mask bit" "Not masked,Masked" bitfld.long 0x08 20. " PL_GPIO[86] ,PL_GPIO[86] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 19. " PL_GPIO[85] ,PL_GPIO[85] mask bit" "Not masked,Masked" bitfld.long 0x08 18. " PL_GPIO[84] ,PL_GPIO[84] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 17. " PL_GPIO[83] ,PL_GPIO[83] mask bit" "Not masked,Masked" bitfld.long 0x08 16. " PL_GPIO[82] ,PL_GPIO[82] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 15. " PL_GPIO[81] ,PL_GPIO[81] mask bit" "Not masked,Masked" bitfld.long 0x08 14. " PL_GPIO[80] ,PL_GPIO[80] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 13. " PL_GPIO[79] ,PL_GPIO[79] mask bit" "Not masked,Masked" bitfld.long 0x08 12. " PL_GPIO[78] ,PL_GPIO[78] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 11. " PL_GPIO[77] ,PL_GPIO[77] mask bit" "Not masked,Masked" bitfld.long 0x08 10. " PL_GPIO[76] ,PL_GPIO[76] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 9. " PL_GPIO[75] ,PL_GPIO[75] mask bit" "Not masked,Masked" bitfld.long 0x08 8. " PL_GPIO[74] ,PL_GPIO[74] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 7. " PL_GPIO[73] ,PL_GPIO[73] mask bit" "Not masked,Masked" bitfld.long 0x08 6. " PL_GPIO[72] ,PL_GPIO[72] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 5. " PL_GPIO[71] ,PL_GPIO[71] mask bit" "Not masked,Masked" bitfld.long 0x08 4. " PL_GPIO[70] ,PL_GPIO[70] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 3. " PL_GPIO[69] ,PL_GPIO[69] mask bit" "Not masked,Masked" bitfld.long 0x08 2. " PL_GPIO[68] ,PL_GPIO[68] mask bit" "Not masked,Masked" textline " " bitfld.long 0x08 1. " PL_GPIO[67] ,PL_GPIO[67] mask bit" "Not masked,Masked" bitfld.long 0x08 0. " PL_GPIO[66] ,PL_GPIO[66] mask bit" "Not masked,Masked" rgroup.long 0x60++0x0B line.long 0x00 "GPIO_INT_STS0,Interrupt mask status register 0" bitfld.long 0x00 31. " PL_GPIO[27] ,PL_GPIO[27] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 30. " PL_GPIO[26] ,PL_GPIO[26] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 29. " PL_GPIO[25] ,PL_GPIO[25] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 28. " PL_GPIO[24] ,PL_GPIO[24] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 27. " PL_GPIO[23] ,PL_GPIO[23] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 26. " PL_GPIO[22] ,PL_GPIO[22] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 25. " PL_GPIO[21] ,PL_GPIO[21] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 24. " PL_GPIO[20] ,PL_GPIO[20] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 23. " PL_GPIO[19] ,PL_GPIO[19] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 22. " PL_GPIO[18] ,PL_GPIO[18] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 21. " PL_GPIO[17] ,PL_GPIO[17] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 20. " PL_GPIO[16] ,PL_GPIO[16] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 19. " PL_GPIO[15] ,PL_GPIO[15] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 18. " PL_GPIO[14] ,PL_GPIO[14] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 17. " PL_GPIO[13] ,PL_GPIO[13] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 16. " PL_GPIO[12] ,PL_GPIO[12] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 15. " PL_GPIO[11] ,PL_GPIO[11] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 14. " PL_GPIO[10] ,PL_GPIO[10] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 13. " PL_GPIO[9] ,PL_GPIO[9] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 12. " PL_GPIO[8] ,PL_GPIO[8] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 11. " PL_GPIO[7] ,PL_GPIO[7] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 10. " PL_GPIO[6] ,PL_GPIO[6] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 9. " PL_GPIO[5] ,PL_GPIO[5] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 8. " PL_GPIO[4] ,PL_GPIO[4] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 7. " PL_GPIO[3] ,PL_GPIO[3] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 6. " PL_GPIO[2] ,PL_GPIO[2] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 5. " PL_GPIO[1] ,PL_GPIO[1] mask bit" "Interrupt,No interrupt" bitfld.long 0x00 4. " PL_GPIO[0] ,PL_GPIO[0] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 3. " PLCLK1 ,PLCLK1 mask bit" "Interrupt,No interrupt" bitfld.long 0x00 2. " PLCLK2 ,PLCLK2 mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x00 1. " PLCLK3 ,PLCLK3 mask bit" "Interrupt,No interrupt" bitfld.long 0x00 0. " PLCLK4 ,PLCLK4 mask bit" "Interrupt,No interrupt" line.long 0x04 "GPIO_INT_STS1,Interrupt mask status register 1" bitfld.long 0x04 31. " PL_GPIO[65] ,PL_GPIO[65] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 30. " PL_GPIO[64] ,PL_GPIO[64] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 29. " PL_GPIO[63] ,PL_GPIO[63] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 28. " PL_GPIO[62] ,PL_GPIO[62] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 27. " PL_GPIO[61] ,PL_GPIO[61] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 26. " PL_GPIO[60] ,PL_GPIO[60] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 25. " PL_GPIO[59] ,PL_GPIO[59] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 24. " PL_GPIO[58] ,PL_GPIO[58] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 23. " PL_GPIO[57] ,PL_GPIO[57] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 22. " PL_GPIO[56] ,PL_GPIO[56] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 21. " PL_GPIO[55] ,PL_GPIO[55] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 20. " PL_GPIO[54] ,PL_GPIO[54] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 19. " PL_GPIO[53] ,PL_GPIO[53] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 18. " PL_GPIO[52] ,PL_GPIO[52] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 17. " PL_GPIO[51] ,PL_GPIO[51] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 16. " PL_GPIO[50] ,PL_GPIO[50] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 15. " PL_GPIO[49] ,PL_GPIO[49] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 14. " PL_GPIO[48] ,PL_GPIO[48] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 13. " PL_GPIO[47] ,PL_GPIO[47] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 12. " PL_GPIO[46] ,PL_GPIO[46] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 11. " PL_GPIO[45] ,PL_GPIO[45] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 10. " PL_GPIO[44] ,PL_GPIO[44] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 9. " PL_GPIO[43] ,PL_GPIO[43] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 8. " PL_GPIO[42] ,PL_GPIO[42] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 7. " PL_GPIO[41] ,PL_GPIO[41] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 6. " PL_GPIO[40] ,PL_GPIO[40] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 5. " PL_GPIO[39] ,PL_GPIO[39] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 4. " PL_GPIO[38] ,PL_GPIO[38] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 3. " PL_GPIO[37] ,PL_GPIO[37] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 2. " PL_GPIO[36] ,PL_GPIO[36] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x04 1. " PL_GPIO[35] ,PL_GPIO[35] mask bit" "Interrupt,No interrupt" bitfld.long 0x04 0. " PL_GPIO[34] ,PL_GPIO[34] mask bit" "Interrupt,No interrupt" line.long 0x08 "GPIO_INT_STS2,Interrupt mask status register 2" bitfld.long 0x08 31. " PL_GPIO[97] ,PL_GPIO[97] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 30. " PL_GPIO[96] ,PL_GPIO[96] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 29. " PL_GPIO[95] ,PL_GPIO[95] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 28. " PL_GPIO[94] ,PL_GPIO[94] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 27. " PL_GPIO[93] ,PL_GPIO[93] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 26. " PL_GPIO[92] ,PL_GPIO[92] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 25. " PL_GPIO[91] ,PL_GPIO[91] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 24. " PL_GPIO[90] ,PL_GPIO[90] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 23. " PL_GPIO[89] ,PL_GPIO[89] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 22. " PL_GPIO[88] ,PL_GPIO[88] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 21. " PL_GPIO[87] ,PL_GPIO[87] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 20. " PL_GPIO[86] ,PL_GPIO[86] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 19. " PL_GPIO[85] ,PL_GPIO[85] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 18. " PL_GPIO[84] ,PL_GPIO[84] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 17. " PL_GPIO[83] ,PL_GPIO[83] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 16. " PL_GPIO[82] ,PL_GPIO[82] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 15. " PL_GPIO[81] ,PL_GPIO[81] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 14. " PL_GPIO[80] ,PL_GPIO[80] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 13. " PL_GPIO[79] ,PL_GPIO[79] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 12. " PL_GPIO[78] ,PL_GPIO[78] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 11. " PL_GPIO[77] ,PL_GPIO[77] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 10. " PL_GPIO[76] ,PL_GPIO[76] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 9. " PL_GPIO[75] ,PL_GPIO[75] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 8. " PL_GPIO[74] ,PL_GPIO[74] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 7. " PL_GPIO[73] ,PL_GPIO[73] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 6. " PL_GPIO[72] ,PL_GPIO[72] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 5. " PL_GPIO[71] ,PL_GPIO[71] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 4. " PL_GPIO[70] ,PL_GPIO[70] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 3. " PL_GPIO[69] ,PL_GPIO[69] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 2. " PL_GPIO[68] ,PL_GPIO[68] mask bit" "Interrupt,No interrupt" textline " " bitfld.long 0x08 1. " PL_GPIO[67] ,PL_GPIO[67] mask bit" "Interrupt,No interrupt" bitfld.long 0x08 0. " PL_GPIO[66] ,PL_GPIO[66] mask bit" "Interrupt,No interrupt" width 0x0b tree.end endif sif (cpu()=="SPEAR320"||cpu()=="SPEAR320S") tree "RAS (Reconfigurable array subsystem)" base asd:0xB3000000 width 18. rgroup.long 0x00++0x03 line.long 0x00 "BOOT_STRAP,Boot strap register" sif (cpu()=="SPEAR320S") hexmask.long.byte 0x0 4.--11. 1. " H[7:0] ,Boot strap bits" textline " " endif hexmask.long.byte 0x0 0.--3. 1. " B[3:0] ,Boot strap bits" sif (cpu()=="SPEAR320S") group.long 0x04++0x03 line.long 0x00 "IRQ_STAT,Interrupt status register" bitfld.long 0x00 27. " RS485_INTR ,RS485 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " UART6_INTR ,UART6 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " UART5_INTR ,UART5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " UART4_INTR ,UART4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " UART3_INTR ,UART3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 22. " I2C2_INTR ,I2C2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " I2C1_INTR ,I2C1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " MACB2_WOL ,MACB2 Wake on LAN detected interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " MACB1_WOL ,MACB1 Wake on LAN detected interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " MACB2_ETHERNET ,MACB2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " MACB1_ETHERNET ,MACB1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " SSP2_INTR ,SSP2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SSP1_INTR ,SSP1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " UART2_INTR ,UART2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " UART1_INTR ,UART1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " L_CCAN_INTR ,CAN1 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " U_CCAN_INTR ,CAN0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " SDIO_INT_TO_ARM ,SDIO interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " SPP_INTR ,SPP interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " CLCD_INTR ,CLCD interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " EMI_INT ,EMI interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " NGPIO_INTR ,NGPIO interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " TX_OR_INTR ,I2S interrupt on Transmit FIFO overrun" "No interrupt,Interrupt" bitfld.long 0x00 4. " TX_EMP_INTR ,I2S interrupt on Transmit FIFO empty" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RX_OR_INTR ,I2S interrupt on Receive FIFO overrun" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX_DA_INTR ,I2S interrupt on data available in Receive FIFO" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO_INTR ,Legacy interrupt from GPIO ports" "No interrupt,Interrupt" else rgroup.long 0x04++0x03 line.long 0x00 "IRQ_STAT,Interrupt status register" bitfld.long 0x00 21. " IC_INT ,IC_INT interrupt status" "Low,High" bitfld.long 0x00 20. " SMII_1_WON ,SMII 1 WON interrupt status" "Low,High" textline " " bitfld.long 0x00 19. " SMII_0_WON ,SMII 0 WON interrupt status" "Low,High" bitfld.long 0x00 18. " SMII_1_ETHERNET ,SMII 1 Ethernet interrupt status" "Low,High" textline " " bitfld.long 0x00 17. " SMII_0_ETHERNET ,SMII 0 Ethernet interrupt status" "Low,High" bitfld.long 0x00 16. " SSP2 ,SSP2 interrupt status" "Low,High" textline " " bitfld.long 0x00 15. " SSP1 ,SSP1 interrupt status" "Low,High" bitfld.long 0x00 14. " UART2 ,UART2 interrupt status" "Low,High" textline " " bitfld.long 0x00 13. " UART1 ,UART1 interrupt status" "Low,High" bitfld.long 0x00 12. " 1_CAN ,1_CAN interrupt status" "Low,High" textline " " bitfld.long 0x00 11. " U_CAN ,U_CAN interrupt status" "Low,High" bitfld.long 0x00 10. " SDIO ,SDIO interrupt status" "Low,High" textline " " bitfld.long 0x00 9. " SPP ,SPP interrupt status" "Low,High" bitfld.long 0x00 8. " CLCD ,CLCD interrupt status" "Low,High" textline " " bitfld.long 0x00 7. " EMI ,EMI interrupt status" "Low,High" bitfld.long 0x00 0. " GPOINT ,GPOINT interrupt status" "Low,High" endif group.long 0x08++0x03 line.long 0x00 "IRQ_MSK,Interrupt mask register" bitfld.long 0x00 0. " GPOINT ,GPOINT mask/clear" "Not masked,Masked" group.long 0x0c++0x03 line.long 0x00 "RAS_SEL,RAS select register" bitfld.long 0x00 14. " FIRDAv ,FIrda alternate function enable" "RAS enabled,IrDA enabled" bitfld.long 0x00 13. " I2C ,I2C alternate function enable" "RAS enabled,I2C0 enabled" textline " " bitfld.long 0x00 12. " SPI_ENHANCED ,SSP0 enhanced alternate function enable" "RAS enabled,SSP0 enabled" bitfld.long 0x00 11. " SPI_BASIC ,SSP0 basic alternate function enable" "RAS enabled,SSP0 enabled" textline " " bitfld.long 0x00 10. " MAC_ETHERNET ,Mac Etherner alternate function enable" "RAS enabled,MII0 enabled" bitfld.long 0x00 9. " GPIO_0 ,Base GPIO 0 alternate function enable" "RAS enabled,GPIO0 enabled" textline " " bitfld.long 0x00 8. " GPIO_1 ,Base GPIO 1 alternate function enable" "RAS enabled,GPIO1 enabled" bitfld.long 0x00 7. " GPIO_2 ,Base GPIO 2 alternate function enable" "RAS enabled,GPIO2 enabled" textline " " bitfld.long 0x00 6. " GPIO_3 ,Base GPIO 3 alternate function enable" "RAS enabled,GPIO3 enabled" bitfld.long 0x00 5. " GPIO_4 ,Base GPIO 4 alternate function enable" "RAS enabled,GPIO4 enabled" textline " " bitfld.long 0x00 4. " GPIO_5 ,Base GPIO 5 alternate function enable" "RAS enabled,GPIO5 enabled" bitfld.long 0x00 3. " UART_ENHANCED ,UART0 enhanced alternate function enable" "RAS enabled,UART0 enabled" textline " " bitfld.long 0x00 2. " UART_BASIC ,UART0 basic alternate function enable" "RAS enabled,UART0 enabled" bitfld.long 0x00 1. " GPT2_TIMER ,Timer B alternate function enable" "RAS enabled,TimerB enabled" textline " " bitfld.long 0x00 0. " GPT1_TIMER ,Timer A alternate function enable" "RAS enabled,TimerA enabled" group.long 0x10++0x03 line.long 0x00 "CTRL,Control register" sif (cpu()=="SPEAR320") bitfld.long 0x00 18. " SMII_CLKOUT_SEL ,SMII_CLKOUT select" "RAS_CLK_SYNT1,PLL2_CLKOUT" textline " " endif bitfld.long 0x00 17. " EMI_FSMC_SEL ,EMI/FSMC select" "EMI,FSMC" textline " " bitfld.long 0x00 16. " LED_PWM2_SEL ,LED/PWM2_OUT select" "SDIO_LED,PWM2_OUT" bitfld.long 0x00 15. " SDIO_CLK_SEL ,SDIO input clock select" "CLK48MHz,RAS_CLK_SYNT4" textline " " sif (cpu()=="SPEAR320S") bitfld.long 0x00 14. " U_CAN_MEM_CLK_S ,CAN0 memory clock select" "Inverted PCLK,Not inverted PCLK" bitfld.long 0x00 13. " L_CAN_MEM_CLK_S ,CAN1 memory clock select" "Inverted PCLK,Not inverted PCLK" textline " " endif bitfld.long 0x00 9. " CLCD_CLFP_SEL ,CLCD CLFP select" "CLFP,DE" textline " " sif (cpu()=="SPEAR320S") bitfld.long 0x00 8. " AUDIOCLK_SEL ,Audio CLK select" "PLL2_CLKOUT,RAS_CLK_SYNT3" textline " " endif bitfld.long 0x00 7. " TOUCHSCREEN_EN ,Touchscreen enable" "Disabled,Enabled" textline " " sif (cpu()=="SPEAR320S") bitfld.long 0x00 6. " UARTCLK_SEL ,UART_CLK select" "RAS_CLK_SYNT2,PCLK" bitfld.long 0x00 5. " RMII_MDIO_SEL ,RMII_MDIO_SEL" "RMII1,RMII2" textline " " bitfld.long 0x00 4. " RMII2_ENDIAN ,RMII2 endian" "Little endian,Big endian" bitfld.long 0x00 3. " RMII1_ENDIAN ,RMII1 endian" "Little endian,Big endian" textline " " bitfld.long 0x00 0.--2. " MODE_SEL[2:0] ,Mode select" "HMI automation,MII automation networking,Expanded automation,Printer,?..." else bitfld.long 0x00 6. " UART1_2CLK_SEL ,UART1_2CLK select" "RAS_CLK_SYNT2,PCLK" bitfld.long 0x00 5. " SMII_MDIO_NO_SEL ,SMII_MDIO_NO" "0,1" textline " " bitfld.long 0x00 4. " SMII_1_ENDIAN_SEL ,SMII 1 endian" "Little endian,Big endian" bitfld.long 0x00 3. " SMII_0_ENDIAN_SEL ,SMII 0 endian" "Little endian,Big endian" textline " " bitfld.long 0x00 0.--2. " MODE_SEL[2:0] ,Mode select" "Automation networking SMII,Automation networking MII,Automation expansions,Small printers,Automation networking SMII,Automation networking SMII,Automation networking SMII,Automation networking SMII" endif group.long 0x14++0x03 line.long 0x00 "TSCR_DUR,Touchscreen duration register" sif (cpu()=="SPEAR320S") group.long 0x18++0x03 line.long 0x00 "EXTCTRL,Extended control register" bitfld.long 0x00 18.--19. " MAC2_MODE_SEL[19:18] ,MAC2 mode select in extended mode" "MII,RMII,?..." bitfld.long 0x00 16.--17. " MAC1_MODE_SEL[17:16] ,MAC1 mode select in extended mode" "MII,RMII,?..." textline " " bitfld.long 0x00 14. " RS485_OE[14] ,RS485 OE signal to GPIO" "0,1" bitfld.long 0x00 13. " RS485CLK_SEL[13] ,RS485CLK select" "RAS_CLK_SYNT2,PCLK" textline " " bitfld.long 0x00 12. " UART6CLK_SEL[12] ,UART6CLK select" "RAS_CLK_SYNT2,PCLK" bitfld.long 0x00 11. " UART5CLK_SEL[11] ,UART5CLK select" "RAS_CLK_SYNT2,PCLK" textline " " bitfld.long 0x00 10. " UART4CLK_SEL[10] ,UART4CLK select" "RAS_CLK_SYNT2,PCLK" bitfld.long 0x00 9. " UART3CLK_SEL[9] ,UART3CLK select" "RAS_CLK_SYNT2,PCLK" textline " " bitfld.long 0x00 8. " UART2CLK_SEL[8] ,UART2CLK select" "RAS_CLK_SYNT2,PCLK" bitfld.long 0x00 5. " DYN_SEL[5] ,Dynamic multiplexing of EMI and FSMC ports select" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MDIO_IO_SEL[4] ,MDIO port connection select" "GPIO_10/GPIO_11,GPIO_81" bitfld.long 0x00 0. " EXT_MODE[0] ,Extended mode select" "Legacy,Extended" endif group.long 0x24++0x03 line.long 0x00 "GPIO_SELECT0,GPIO 0 function enable" bitfld.long 0x00 31. " PL_GPIO[31] ,PL_GPIO[31] function bit" "RAS IP,GPIO" bitfld.long 0x00 30. " PL_GPIO[30] ,PL_GPIO[30] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 29. " PL_GPIO[29] ,PL_GPIO[29] function bit" "RAS IP,GPIO" bitfld.long 0x00 28. " PL_GPIO[28] ,PL_GPIO[28] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 27. " PL_GPIO[27] ,PL_GPIO[27] function bit" "RAS IP,GPIO" bitfld.long 0x00 26. " PL_GPIO[26] ,PL_GPIO[26] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 25. " PL_GPIO[25] ,PL_GPIO[25] function bit" "RAS IP,GPIO" bitfld.long 0x00 24. " PL_GPIO[24] ,PL_GPIO[24] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 23. " PL_GPIO[23] ,PL_GPIO[23] function bit" "RAS IP,GPIO" bitfld.long 0x00 22. " PL_GPIO[22] ,PL_GPIO[22] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 21. " PL_GPIO[21] ,PL_GPIO[21] function bit" "RAS IP,GPIO" bitfld.long 0x00 20. " PL_GPIO[20] ,PL_GPIO[20] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 19. " PL_GPIO[19] ,PL_GPIO[19] function bit" "RAS IP,GPIO" bitfld.long 0x00 18. " PL_GPIO[18] ,PL_GPIO[18] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 17. " PL_GPIO[17] ,PL_GPIO[17] function bit" "RAS IP,GPIO" bitfld.long 0x00 16. " PL_GPIO[16] ,PL_GPIO[16] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 15. " PL_GPIO[15] ,PL_GPIO[15] function bit" "RAS IP,GPIO" bitfld.long 0x00 14. " PL_GPIO[14] ,PL_GPIO[14] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 13. " PL_GPIO[13] ,PL_GPIO[13] function bit" "RAS IP,GPIO" bitfld.long 0x00 12. " PL_GPIO[12] ,PL_GPIO[12] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 11. " PL_GPIO[11] ,PL_GPIO[11] function bit" "RAS IP,GPIO" bitfld.long 0x00 10. " PL_GPIO[10] ,PL_GPIO[10] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 9. " PL_GPIO[9] ,PL_GPIO[9] function bit" "RAS IP,GPIO" bitfld.long 0x00 8. " PL_GPIO[8] ,PL_GPIO[8] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 7. " PL_GPIO[7] ,PL_GPIO[7] function bit" "RAS IP,GPIO" bitfld.long 0x00 6. " PL_GPIO[6] ,PL_GPIO[6] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 5. " PL_GPIO[5] ,PL_GPIO[5] function bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_GPIO[4] ,PL_GPIO[4] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_GPIO[3] ,PL_GPIO[3] function bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_GPIO[2] ,PL_GPIO[2] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[1] ,PL_GPIO[1] function bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[0] ,PL_GPIO[0] function bit" "RAS IP,GPIO" group.long 0x28++0x03 line.long 0x00 "GPIO_SELECT1,GPIO 1 function enable" bitfld.long 0x00 31. " PL_GPIO[63] ,PL_GPIO[63] function bit" "RAS IP,GPIO" bitfld.long 0x00 30. " PL_GPIO[62] ,PL_GPIO[62] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 29. " PL_GPIO[61] ,PL_GPIO[61] function bit" "RAS IP,GPIO" bitfld.long 0x00 28. " PL_GPIO[60] ,PL_GPIO[60] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 27. " PL_GPIO[59] ,PL_GPIO[59] function bit" "RAS IP,GPIO" bitfld.long 0x00 26. " PL_GPIO[58] ,PL_GPIO[58] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 25. " PL_GPIO[57] ,PL_GPIO[57] function bit" "RAS IP,GPIO" bitfld.long 0x00 24. " PL_GPIO[56] ,PL_GPIO[56] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 23. " PL_GPIO[55] ,PL_GPIO[55] function bit" "RAS IP,GPIO" bitfld.long 0x00 22. " PL_GPIO[54] ,PL_GPIO[54] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 21. " PL_GPIO[53] ,PL_GPIO[53] function bit" "RAS IP,GPIO" bitfld.long 0x00 20. " PL_GPIO[52] ,PL_GPIO[52] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 19. " PL_GPIO[51] ,PL_GPIO[51] function bit" "RAS IP,GPIO" bitfld.long 0x00 18. " PL_GPIO[50] ,PL_GPIO[50] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 17. " PL_GPIO[49] ,PL_GPIO[49] function bit" "RAS IP,GPIO" bitfld.long 0x00 16. " PL_GPIO[48] ,PL_GPIO[48] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 15. " PL_GPIO[47] ,PL_GPIO[47] function bit" "RAS IP,GPIO" bitfld.long 0x00 14. " PL_GPIO[46] ,PL_GPIO[46] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 13. " PL_GPIO[45] ,PL_GPIO[45] function bit" "RAS IP,GPIO" bitfld.long 0x00 12. " PL_GPIO[44] ,PL_GPIO[44] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 11. " PL_GPIO[43] ,PL_GPIO[43] function bit" "RAS IP,GPIO" bitfld.long 0x00 10. " PL_GPIO[42] ,PL_GPIO[42] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 9. " PL_GPIO[41] ,PL_GPIO[41] function bit" "RAS IP,GPIO" bitfld.long 0x00 8. " PL_GPIO[40] ,PL_GPIO[40] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 7. " PL_GPIO[39] ,PL_GPIO[39] function bit" "RAS IP,GPIO" bitfld.long 0x00 6. " PL_GPIO[38] ,PL_GPIO[38] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 5. " PL_GPIO[37] ,PL_GPIO[37] function bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_GPIO[36] ,PL_GPIO[36] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_GPIO[35] ,PL_GPIO[35] function bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_GPIO[34] ,PL_GPIO[34] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[33] ,PL_GPIO[33] function bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[32] ,PL_GPIO[32] function bit" "RAS IP,GPIO" group.long 0x2c++0x03 line.long 0x00 "GPIO_SELECT2,GPIO 2 function enable" bitfld.long 0x00 31. " PL_GPIO[95] ,PL_GPIO[95] function bit" "RAS IP,GPIO" bitfld.long 0x00 30. " PL_GPIO[94] ,PL_GPIO[94] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 29. " PL_GPIO[93] ,PL_GPIO[93] function bit" "RAS IP,GPIO" bitfld.long 0x00 28. " PL_GPIO[92] ,PL_GPIO[92] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 27. " PL_GPIO[91] ,PL_GPIO[91] function bit" "RAS IP,GPIO" bitfld.long 0x00 26. " PL_GPIO[90] ,PL_GPIO[90] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 25. " PL_GPIO[89] ,PL_GPIO[89] function bit" "RAS IP,GPIO" bitfld.long 0x00 24. " PL_GPIO[88] ,PL_GPIO[88] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 23. " PL_GPIO[87] ,PL_GPIO[87] function bit" "RAS IP,GPIO" bitfld.long 0x00 22. " PL_GPIO[86] ,PL_GPIO[86] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 21. " PL_GPIO[85] ,PL_GPIO[85] function bit" "RAS IP,GPIO" bitfld.long 0x00 20. " PL_GPIO[84] ,PL_GPIO[84] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 19. " PL_GPIO[83] ,PL_GPIO[83] function bit" "RAS IP,GPIO" bitfld.long 0x00 18. " PL_GPIO[82] ,PL_GPIO[82] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 17. " PL_GPIO[81] ,PL_GPIO[81] function bit" "RAS IP,GPIO" bitfld.long 0x00 16. " PL_GPIO[80] ,PL_GPIO[80] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 15. " PL_GPIO[79] ,PL_GPIO[79] function bit" "RAS IP,GPIO" bitfld.long 0x00 14. " PL_GPIO[78] ,PL_GPIO[78] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 13. " PL_GPIO[77] ,PL_GPIO[77] function bit" "RAS IP,GPIO" bitfld.long 0x00 12. " PL_GPIO[76] ,PL_GPIO[76] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 11. " PL_GPIO[75] ,PL_GPIO[75] function bit" "RAS IP,GPIO" bitfld.long 0x00 10. " PL_GPIO[74] ,PL_GPIO[74] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 9. " PL_GPIO[73] ,PL_GPIO[73] function bit" "RAS IP,GPIO" bitfld.long 0x00 8. " PL_GPIO[72] ,PL_GPIO[72] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 7. " PL_GPIO[71] ,PL_GPIO[71] function bit" "RAS IP,GPIO" bitfld.long 0x00 6. " PL_GPIO[70] ,PL_GPIO[70] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 5. " PL_GPIO[69] ,PL_GPIO[69] function bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_GPIO[68] ,PL_GPIO[68] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_GPIO[67] ,PL_GPIO[67] function bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_GPIO[66] ,PL_GPIO[66] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[65] ,PL_GPIO[65] function bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[64] ,PL_GPIO[64] function bit" "RAS IP,GPIO" group.long 0x30++0x03 line.long 0x00 "GPIO_SELECT3,GPIO 3 function enable" bitfld.long 0x00 5. " PL_CLK[4] ,PL_CLK[4] function bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_CLK[3] ,PL_CLK[3] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_CLK[2] ,PL_CLK[2] function bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_CLK[1] ,PL_CLK[1] function bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[97] ,PL_GPIO[97] function bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[96] ,PL_GPIO[96] function bit" "RAS IP,GPIO" group.long 0x34++0x03 line.long 0x00 "GPIO_OUT0,GPIO 0 output register" bitfld.long 0x00 31. " PL_GPIO[31] ,PL_GPIO[31] output bit" "RAS IP,GPIO" bitfld.long 0x00 30. " PL_GPIO[30] ,PL_GPIO[30] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 29. " PL_GPIO[29] ,PL_GPIO[29] output bit" "RAS IP,GPIO" bitfld.long 0x00 28. " PL_GPIO[28] ,PL_GPIO[28] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 27. " PL_GPIO[27] ,PL_GPIO[27] output bit" "RAS IP,GPIO" bitfld.long 0x00 26. " PL_GPIO[26] ,PL_GPIO[26] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 25. " PL_GPIO[25] ,PL_GPIO[25] output bit" "RAS IP,GPIO" bitfld.long 0x00 24. " PL_GPIO[24] ,PL_GPIO[24] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 23. " PL_GPIO[23] ,PL_GPIO[23] output bit" "RAS IP,GPIO" bitfld.long 0x00 22. " PL_GPIO[22] ,PL_GPIO[22] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 21. " PL_GPIO[21] ,PL_GPIO[21] output bit" "RAS IP,GPIO" bitfld.long 0x00 20. " PL_GPIO[20] ,PL_GPIO[20] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 19. " PL_GPIO[19] ,PL_GPIO[19] output bit" "RAS IP,GPIO" bitfld.long 0x00 18. " PL_GPIO[18] ,PL_GPIO[18] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 17. " PL_GPIO[17] ,PL_GPIO[17] output bit" "RAS IP,GPIO" bitfld.long 0x00 16. " PL_GPIO[16] ,PL_GPIO[16] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 15. " PL_GPIO[15] ,PL_GPIO[15] output bit" "RAS IP,GPIO" bitfld.long 0x00 14. " PL_GPIO[14] ,PL_GPIO[14] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 13. " PL_GPIO[13] ,PL_GPIO[13] output bit" "RAS IP,GPIO" bitfld.long 0x00 12. " PL_GPIO[12] ,PL_GPIO[12] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 11. " PL_GPIO[11] ,PL_GPIO[11] output bit" "RAS IP,GPIO" bitfld.long 0x00 10. " PL_GPIO[10] ,PL_GPIO[10] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 9. " PL_GPIO[9] ,PL_GPIO[9] output bit" "RAS IP,GPIO" bitfld.long 0x00 8. " PL_GPIO[8] ,PL_GPIO[8] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 7. " PL_GPIO[7] ,PL_GPIO[7] output bit" "RAS IP,GPIO" bitfld.long 0x00 6. " PL_GPIO[6] ,PL_GPIO[6] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 5. " PL_GPIO[5] ,PL_GPIO[5] output bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_GPIO[4] ,PL_GPIO[4] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_GPIO[3] ,PL_GPIO[3] output bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_GPIO[2] ,PL_GPIO[2] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[1] ,PL_GPIO[1] output bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[0] ,PL_GPIO[0] output bit" "RAS IP,GPIO" group.long 0x38++0x03 line.long 0x00 "GPIO_OUT1,GPIO 1 output register" bitfld.long 0x00 31. " PL_GPIO[63] ,PL_GPIO[63] output bit" "RAS IP,GPIO" bitfld.long 0x00 30. " PL_GPIO[62] ,PL_GPIO[62] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 29. " PL_GPIO[61] ,PL_GPIO[61] output bit" "RAS IP,GPIO" bitfld.long 0x00 28. " PL_GPIO[60] ,PL_GPIO[60] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 27. " PL_GPIO[59] ,PL_GPIO[59] output bit" "RAS IP,GPIO" bitfld.long 0x00 26. " PL_GPIO[58] ,PL_GPIO[58] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 25. " PL_GPIO[57] ,PL_GPIO[57] output bit" "RAS IP,GPIO" bitfld.long 0x00 24. " PL_GPIO[56] ,PL_GPIO[56] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 23. " PL_GPIO[55] ,PL_GPIO[55] output bit" "RAS IP,GPIO" bitfld.long 0x00 22. " PL_GPIO[54] ,PL_GPIO[54] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 21. " PL_GPIO[53] ,PL_GPIO[53] output bit" "RAS IP,GPIO" bitfld.long 0x00 20. " PL_GPIO[52] ,PL_GPIO[52] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 19. " PL_GPIO[51] ,PL_GPIO[51] output bit" "RAS IP,GPIO" bitfld.long 0x00 18. " PL_GPIO[50] ,PL_GPIO[50] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 17. " PL_GPIO[49] ,PL_GPIO[49] output bit" "RAS IP,GPIO" bitfld.long 0x00 16. " PL_GPIO[48] ,PL_GPIO[48] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 15. " PL_GPIO[47] ,PL_GPIO[47] output bit" "RAS IP,GPIO" bitfld.long 0x00 14. " PL_GPIO[46] ,PL_GPIO[46] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 13. " PL_GPIO[45] ,PL_GPIO[45] output bit" "RAS IP,GPIO" bitfld.long 0x00 12. " PL_GPIO[44] ,PL_GPIO[44] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 11. " PL_GPIO[43] ,PL_GPIO[43] output bit" "RAS IP,GPIO" bitfld.long 0x00 10. " PL_GPIO[42] ,PL_GPIO[42] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 9. " PL_GPIO[41] ,PL_GPIO[41] output bit" "RAS IP,GPIO" bitfld.long 0x00 8. " PL_GPIO[40] ,PL_GPIO[40] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 7. " PL_GPIO[39] ,PL_GPIO[39] output bit" "RAS IP,GPIO" bitfld.long 0x00 6. " PL_GPIO[38] ,PL_GPIO[38] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 5. " PL_GPIO[37] ,PL_GPIO[37] output bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_GPIO[36] ,PL_GPIO[36] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_GPIO[35] ,PL_GPIO[35] output bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_GPIO[34] ,PL_GPIO[34] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[33] ,PL_GPIO[33] output bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[32] ,PL_GPIO[32] output bit" "RAS IP,GPIO" group.long 0x3c++0x03 line.long 0x00 "GPIO_OUT2,GPIO 2 output register" bitfld.long 0x00 31. " PL_GPIO[95] ,PL_GPIO[95] output bit" "RAS IP,GPIO" bitfld.long 0x00 30. " PL_GPIO[94] ,PL_GPIO[94] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 29. " PL_GPIO[93] ,PL_GPIO[93] output bit" "RAS IP,GPIO" bitfld.long 0x00 28. " PL_GPIO[92] ,PL_GPIO[92] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 27. " PL_GPIO[91] ,PL_GPIO[91] output bit" "RAS IP,GPIO" bitfld.long 0x00 26. " PL_GPIO[90] ,PL_GPIO[90] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 25. " PL_GPIO[89] ,PL_GPIO[89] output bit" "RAS IP,GPIO" bitfld.long 0x00 24. " PL_GPIO[88] ,PL_GPIO[88] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 23. " PL_GPIO[87] ,PL_GPIO[87] output bit" "RAS IP,GPIO" bitfld.long 0x00 22. " PL_GPIO[86] ,PL_GPIO[86] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 21. " PL_GPIO[85] ,PL_GPIO[85] output bit" "RAS IP,GPIO" bitfld.long 0x00 20. " PL_GPIO[84] ,PL_GPIO[84] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 19. " PL_GPIO[83] ,PL_GPIO[83] output bit" "RAS IP,GPIO" bitfld.long 0x00 18. " PL_GPIO[82] ,PL_GPIO[82] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 17. " PL_GPIO[81] ,PL_GPIO[81] output bit" "RAS IP,GPIO" bitfld.long 0x00 16. " PL_GPIO[80] ,PL_GPIO[80] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 15. " PL_GPIO[79] ,PL_GPIO[79] output bit" "RAS IP,GPIO" bitfld.long 0x00 14. " PL_GPIO[78] ,PL_GPIO[78] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 13. " PL_GPIO[77] ,PL_GPIO[77] output bit" "RAS IP,GPIO" bitfld.long 0x00 12. " PL_GPIO[76] ,PL_GPIO[76] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 11. " PL_GPIO[75] ,PL_GPIO[75] output bit" "RAS IP,GPIO" bitfld.long 0x00 10. " PL_GPIO[74] ,PL_GPIO[74] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 9. " PL_GPIO[73] ,PL_GPIO[73] output bit" "RAS IP,GPIO" bitfld.long 0x00 8. " PL_GPIO[72] ,PL_GPIO[72] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 7. " PL_GPIO[71] ,PL_GPIO[71] output bit" "RAS IP,GPIO" bitfld.long 0x00 6. " PL_GPIO[70] ,PL_GPIO[70] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 5. " PL_GPIO[69] ,PL_GPIO[69] output bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_GPIO[68] ,PL_GPIO[68] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_GPIO[67] ,PL_GPIO[67] output bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_GPIO[66] ,PL_GPIO[66] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[65] ,PL_GPIO[65] output bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[64] ,PL_GPIO[64] output bit" "RAS IP,GPIO" group.long 0x40++0x03 line.long 0x00 "GPIO_OUT3,GPIO 3 output register" bitfld.long 0x00 5. " PL_CLK[4] ,PL_CLK[4] output bit" "RAS IP,GPIO" bitfld.long 0x00 4. " PL_CLK[3] ,PL_CLK[3] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 3. " PL_CLK[2] ,PL_CLK[2] output bit" "RAS IP,GPIO" bitfld.long 0x00 2. " PL_CLK[1] ,PL_CLK[1] output bit" "RAS IP,GPIO" textline " " bitfld.long 0x00 1. " PL_GPIO[97] ,PL_GPIO[97] output bit" "RAS IP,GPIO" bitfld.long 0x00 0. " PL_GPIO[96] ,PL_GPIO[96] output bit" "RAS IP,GPIO" group.long 0x44++0x03 line.long 0x00 "GPIO_EN0,GPIO 0 pad enable register" bitfld.long 0x00 31. " PL_GPIO[31] ,PL_GPIO[31] input/output pad mode" "Output,Input" bitfld.long 0x00 30. " PL_GPIO[30] ,PL_GPIO[30] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 29. " PL_GPIO[29] ,PL_GPIO[29] input/output pad mode" "Output,Input" bitfld.long 0x00 28. " PL_GPIO[28] ,PL_GPIO[28] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 27. " PL_GPIO[27] ,PL_GPIO[27] input/output pad mode" "Output,Input" bitfld.long 0x00 26. " PL_GPIO[26] ,PL_GPIO[26] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 25. " PL_GPIO[25] ,PL_GPIO[25] input/output pad mode" "Output,Input" bitfld.long 0x00 24. " PL_GPIO[24] ,PL_GPIO[24] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 23. " PL_GPIO[23] ,PL_GPIO[23] input/output pad mode" "Output,Input" bitfld.long 0x00 22. " PL_GPIO[22] ,PL_GPIO[22] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 21. " PL_GPIO[21] ,PL_GPIO[21] input/output pad mode" "Output,Input" bitfld.long 0x00 20. " PL_GPIO[20] ,PL_GPIO[20] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 19. " PL_GPIO[19] ,PL_GPIO[19] input/output pad mode" "Output,Input" bitfld.long 0x00 18. " PL_GPIO[18] ,PL_GPIO[18] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 17. " PL_GPIO[17] ,PL_GPIO[17] input/output pad mode" "Output,Input" bitfld.long 0x00 16. " PL_GPIO[16] ,PL_GPIO[16] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 15. " PL_GPIO[15] ,PL_GPIO[15] input/output pad mode" "Output,Input" bitfld.long 0x00 14. " PL_GPIO[14] ,PL_GPIO[14] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 13. " PL_GPIO[13] ,PL_GPIO[13] input/output pad mode" "Output,Input" bitfld.long 0x00 12. " PL_GPIO[12] ,PL_GPIO[12] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 11. " PL_GPIO[11] ,PL_GPIO[11] input/output pad mode" "Output,Input" bitfld.long 0x00 10. " PL_GPIO[10] ,PL_GPIO[10] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 9. " PL_GPIO[9] ,PL_GPIO[9] input/output pad mode" "Output,Input" bitfld.long 0x00 8. " PL_GPIO[8] ,PL_GPIO[8] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 7. " PL_GPIO[7] ,PL_GPIO[7] input/output pad mode" "Output,Input" bitfld.long 0x00 6. " PL_GPIO[6] ,PL_GPIO[6] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 5. " PL_GPIO[5] ,PL_GPIO[5] input/output pad mode" "Output,Input" bitfld.long 0x00 4. " PL_GPIO[4] ,PL_GPIO[4] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 3. " PL_GPIO[3] ,PL_GPIO[3] input/output pad mode" "Output,Input" bitfld.long 0x00 2. " PL_GPIO[2] ,PL_GPIO[2] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 1. " PL_GPIO[1] ,PL_GPIO[1] input/output pad mode" "Output,Input" bitfld.long 0x00 0. " PL_GPIO[0] ,PL_GPIO[0] input/output pad mode" "Output,Input" group.long 0x48++0x03 line.long 0x00 "GPIO_EN1,GPIO 1 pad enable register" bitfld.long 0x00 31. " PL_GPIO[63] ,PL_GPIO[63] input/output pad mode" "Output,Input" bitfld.long 0x00 30. " PL_GPIO[62] ,PL_GPIO[62] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 29. " PL_GPIO[61] ,PL_GPIO[61] input/output pad mode" "Output,Input" bitfld.long 0x00 28. " PL_GPIO[60] ,PL_GPIO[60] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 27. " PL_GPIO[59] ,PL_GPIO[59] input/output pad mode" "Output,Input" bitfld.long 0x00 26. " PL_GPIO[58] ,PL_GPIO[58] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 25. " PL_GPIO[57] ,PL_GPIO[57] input/output pad mode" "Output,Input" bitfld.long 0x00 24. " PL_GPIO[56] ,PL_GPIO[56] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 23. " PL_GPIO[55] ,PL_GPIO[55] input/output pad mode" "Output,Input" bitfld.long 0x00 22. " PL_GPIO[54] ,PL_GPIO[54] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 21. " PL_GPIO[53] ,PL_GPIO[53] input/output pad mode" "Output,Input" bitfld.long 0x00 20. " PL_GPIO[52] ,PL_GPIO[52] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 19. " PL_GPIO[51] ,PL_GPIO[51] input/output pad mode" "Output,Input" bitfld.long 0x00 18. " PL_GPIO[50] ,PL_GPIO[50] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 17. " PL_GPIO[49] ,PL_GPIO[49] input/output pad mode" "Output,Input" bitfld.long 0x00 16. " PL_GPIO[48] ,PL_GPIO[48] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 15. " PL_GPIO[47] ,PL_GPIO[47] input/output pad mode" "Output,Input" bitfld.long 0x00 14. " PL_GPIO[46] ,PL_GPIO[46] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 13. " PL_GPIO[45] ,PL_GPIO[45] input/output pad mode" "Output,Input" bitfld.long 0x00 12. " PL_GPIO[44] ,PL_GPIO[44] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 11. " PL_GPIO[43] ,PL_GPIO[43] input/output pad mode" "Output,Input" bitfld.long 0x00 10. " PL_GPIO[42] ,PL_GPIO[42] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 9. " PL_GPIO[41] ,PL_GPIO[41] input/output pad mode" "Output,Input" bitfld.long 0x00 8. " PL_GPIO[40] ,PL_GPIO[40] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 7. " PL_GPIO[39] ,PL_GPIO[39] input/output pad mode" "Output,Input" bitfld.long 0x00 6. " PL_GPIO[38] ,PL_GPIO[38] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 5. " PL_GPIO[37] ,PL_GPIO[37] input/output pad mode" "Output,Input" bitfld.long 0x00 4. " PL_GPIO[36] ,PL_GPIO[36] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 3. " PL_GPIO[35] ,PL_GPIO[35] input/output pad mode" "Output,Input" bitfld.long 0x00 2. " PL_GPIO[34] ,PL_GPIO[34] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 1. " PL_GPIO[33] ,PL_GPIO[33] input/output pad mode" "Output,Input" bitfld.long 0x00 0. " PL_GPIO[32] ,PL_GPIO[32] input/output pad mode" "Output,Input" group.long 0x4c++0x03 line.long 0x00 "GPIO_EN2,GPIO 2 pad enable register" bitfld.long 0x00 31. " PL_GPIO[95] ,PL_GPIO[95] input/output pad mode" "Output,Input" bitfld.long 0x00 30. " PL_GPIO[94] ,PL_GPIO[94] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 29. " PL_GPIO[93] ,PL_GPIO[93] input/output pad mode" "Output,Input" bitfld.long 0x00 28. " PL_GPIO[92] ,PL_GPIO[92] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 27. " PL_GPIO[91] ,PL_GPIO[91] input/output pad mode" "Output,Input" bitfld.long 0x00 26. " PL_GPIO[90] ,PL_GPIO[90] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 25. " PL_GPIO[89] ,PL_GPIO[89] input/output pad mode" "Output,Input" bitfld.long 0x00 24. " PL_GPIO[88] ,PL_GPIO[88] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 23. " PL_GPIO[87] ,PL_GPIO[87] input/output pad mode" "Output,Input" bitfld.long 0x00 22. " PL_GPIO[86] ,PL_GPIO[86] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 21. " PL_GPIO[85] ,PL_GPIO[85] input/output pad mode" "Output,Input" bitfld.long 0x00 20. " PL_GPIO[84] ,PL_GPIO[84] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 19. " PL_GPIO[83] ,PL_GPIO[83] input/output pad mode" "Output,Input" bitfld.long 0x00 18. " PL_GPIO[82] ,PL_GPIO[82] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 17. " PL_GPIO[81] ,PL_GPIO[81] input/output pad mode" "Output,Input" bitfld.long 0x00 16. " PL_GPIO[80] ,PL_GPIO[80] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 15. " PL_GPIO[79] ,PL_GPIO[79] input/output pad mode" "Output,Input" bitfld.long 0x00 14. " PL_GPIO[78] ,PL_GPIO[78] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 13. " PL_GPIO[77] ,PL_GPIO[77] input/output pad mode" "Output,Input" bitfld.long 0x00 12. " PL_GPIO[76] ,PL_GPIO[76] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 11. " PL_GPIO[75] ,PL_GPIO[75] input/output pad mode" "Output,Input" bitfld.long 0x00 10. " PL_GPIO[74] ,PL_GPIO[74] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 9. " PL_GPIO[73] ,PL_GPIO[73] input/output pad mode" "Output,Input" bitfld.long 0x00 8. " PL_GPIO[72] ,PL_GPIO[72] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 7. " PL_GPIO[71] ,PL_GPIO[71] input/output pad mode" "Output,Input" bitfld.long 0x00 6. " PL_GPIO[70] ,PL_GPIO[70] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 5. " PL_GPIO[69] ,PL_GPIO[69] input/output pad mode" "Output,Input" bitfld.long 0x00 4. " PL_GPIO[68] ,PL_GPIO[68] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 3. " PL_GPIO[67] ,PL_GPIO[67] input/output pad mode" "Output,Input" bitfld.long 0x00 2. " PL_GPIO[66] ,PL_GPIO[66] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 1. " PL_GPIO[65] ,PL_GPIO[65] input/output pad mode" "Output,Input" bitfld.long 0x00 0. " PL_GPIO[64] ,PL_GPIO[64] input/output pad mode" "Output,Input" group.long 0x50++0x03 line.long 0x00 "GPIO_EN3,GPIO 3 pad enable register" bitfld.long 0x00 5. " PL_CLK[4] ,PL_CLK[4] input/output pad mode" "Output,Input" bitfld.long 0x00 4. " PL_CLK[3] ,PL_CLK[3] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 3. " PL_CLK[2] ,PL_CLK[2] input/output pad mode" "Output,Input" bitfld.long 0x00 2. " PL_CLK[1] ,PL_CLK[1] input/output pad mode" "Output,Input" textline " " bitfld.long 0x00 1. " PL_GPIO[97] ,PL_GPIO[97] input/output pad mode" "Output,Input" bitfld.long 0x00 0. " PL_GPIO[96] ,PL_GPIO[96] input/output pad mode" "Output,Input" rgroup.long 0x54++0x03 line.long 0x00 "GPIO_IN0,GPIO 0 input register" bitfld.long 0x00 31. " PL_GPIO[31] ,PL_GPIO[31] input bit" "Low,High" bitfld.long 0x00 30. " PL_GPIO[30] ,PL_GPIO[30] input bit" "Low,High" textline " " bitfld.long 0x00 29. " PL_GPIO[29] ,PL_GPIO[29] input bit" "Low,High" bitfld.long 0x00 28. " PL_GPIO[28] ,PL_GPIO[28] input bit" "Low,High" textline " " bitfld.long 0x00 27. " PL_GPIO[27] ,PL_GPIO[27] input bit" "Low,High" bitfld.long 0x00 26. " PL_GPIO[26] ,PL_GPIO[26] input bit" "Low,High" textline " " bitfld.long 0x00 25. " PL_GPIO[25] ,PL_GPIO[25] input bit" "Low,High" bitfld.long 0x00 24. " PL_GPIO[24] ,PL_GPIO[24] input bit" "Low,High" textline " " bitfld.long 0x00 23. " PL_GPIO[23] ,PL_GPIO[23] input bit" "Low,High" bitfld.long 0x00 22. " PL_GPIO[22] ,PL_GPIO[22] input bit" "Low,High" textline " " bitfld.long 0x00 21. " PL_GPIO[21] ,PL_GPIO[21] input bit" "Low,High" bitfld.long 0x00 20. " PL_GPIO[20] ,PL_GPIO[20] input bit" "Low,High" textline " " bitfld.long 0x00 19. " PL_GPIO[19] ,PL_GPIO[19] input bit" "Low,High" bitfld.long 0x00 18. " PL_GPIO[18] ,PL_GPIO[18] input bit" "Low,High" textline " " bitfld.long 0x00 17. " PL_GPIO[17] ,PL_GPIO[17] input bit" "Low,High" bitfld.long 0x00 16. " PL_GPIO[16] ,PL_GPIO[16] input bit" "Low,High" textline " " bitfld.long 0x00 15. " PL_GPIO[15] ,PL_GPIO[15] input bit" "Low,High" bitfld.long 0x00 14. " PL_GPIO[14] ,PL_GPIO[14] input bit" "Low,High" textline " " bitfld.long 0x00 13. " PL_GPIO[13] ,PL_GPIO[13] input bit" "Low,High" bitfld.long 0x00 12. " PL_GPIO[12] ,PL_GPIO[12] input bit" "Low,High" textline " " bitfld.long 0x00 11. " PL_GPIO[11] ,PL_GPIO[11] input bit" "Low,High" bitfld.long 0x00 10. " PL_GPIO[10] ,PL_GPIO[10] input bit" "Low,High" textline " " bitfld.long 0x00 9. " PL_GPIO[9] ,PL_GPIO[9] input bit" "Low,High" bitfld.long 0x00 8. " PL_GPIO[8] ,PL_GPIO[8] input bit" "Low,High" textline " " bitfld.long 0x00 7. " PL_GPIO[7] ,PL_GPIO[7] input bit" "Low,High" bitfld.long 0x00 6. " PL_GPIO[6] ,PL_GPIO[6] input bit" "Low,High" textline " " bitfld.long 0x00 5. " PL_GPIO[5] ,PL_GPIO[5] input bit" "Low,High" bitfld.long 0x00 4. " PL_GPIO[4] ,PL_GPIO[4] input bit" "Low,High" textline " " bitfld.long 0x00 3. " PL_GPIO[3] ,PL_GPIO[3] input bit" "Low,High" bitfld.long 0x00 2. " PL_GPIO[2] ,PL_GPIO[2] input bit" "Low,High" textline " " bitfld.long 0x00 1. " PL_GPIO[1] ,PL_GPIO[1] input bit" "Low,High" bitfld.long 0x00 0. " PL_GPIO[0] ,PL_GPIO[0] input bit" "Low,High" rgroup.long 0x58++0x03 line.long 0x00 "GPIO_IN1,GPIO 1 input register" bitfld.long 0x00 31. " PL_GPIO[63] ,PL_GPIO[63] input bit" "Low,High" bitfld.long 0x00 30. " PL_GPIO[62] ,PL_GPIO[62] input bit" "Low,High" textline " " bitfld.long 0x00 29. " PL_GPIO[61] ,PL_GPIO[61] input bit" "Low,High" bitfld.long 0x00 28. " PL_GPIO[60] ,PL_GPIO[60] input bit" "Low,High" textline " " bitfld.long 0x00 27. " PL_GPIO[59] ,PL_GPIO[59] input bit" "Low,High" bitfld.long 0x00 26. " PL_GPIO[58] ,PL_GPIO[58] input bit" "Low,High" textline " " bitfld.long 0x00 25. " PL_GPIO[57] ,PL_GPIO[57] input bit" "Low,High" bitfld.long 0x00 24. " PL_GPIO[56] ,PL_GPIO[56] input bit" "Low,High" textline " " bitfld.long 0x00 23. " PL_GPIO[55] ,PL_GPIO[55] input bit" "Low,High" bitfld.long 0x00 22. " PL_GPIO[54] ,PL_GPIO[54] input bit" "Low,High" textline " " bitfld.long 0x00 21. " PL_GPIO[53] ,PL_GPIO[53] input bit" "Low,High" bitfld.long 0x00 20. " PL_GPIO[52] ,PL_GPIO[52] input bit" "Low,High" textline " " bitfld.long 0x00 19. " PL_GPIO[51] ,PL_GPIO[51] input bit" "Low,High" bitfld.long 0x00 18. " PL_GPIO[50] ,PL_GPIO[50] input bit" "Low,High" textline " " bitfld.long 0x00 17. " PL_GPIO[49] ,PL_GPIO[49] input bit" "Low,High" bitfld.long 0x00 16. " PL_GPIO[48] ,PL_GPIO[48] input bit" "Low,High" textline " " bitfld.long 0x00 15. " PL_GPIO[47] ,PL_GPIO[47] input bit" "Low,High" bitfld.long 0x00 14. " PL_GPIO[46] ,PL_GPIO[46] input bit" "Low,High" textline " " bitfld.long 0x00 13. " PL_GPIO[45] ,PL_GPIO[45] input bit" "Low,High" bitfld.long 0x00 12. " PL_GPIO[44] ,PL_GPIO[44] input bit" "Low,High" textline " " bitfld.long 0x00 11. " PL_GPIO[43] ,PL_GPIO[43] input bit" "Low,High" bitfld.long 0x00 10. " PL_GPIO[42] ,PL_GPIO[42] input bit" "Low,High" textline " " bitfld.long 0x00 9. " PL_GPIO[41] ,PL_GPIO[41] input bit" "Low,High" bitfld.long 0x00 8. " PL_GPIO[40] ,PL_GPIO[40] input bit" "Low,High" textline " " bitfld.long 0x00 7. " PL_GPIO[39] ,PL_GPIO[39] input bit" "Low,High" bitfld.long 0x00 6. " PL_GPIO[38] ,PL_GPIO[38] input bit" "Low,High" textline " " bitfld.long 0x00 5. " PL_GPIO[37] ,PL_GPIO[37] input bit" "Low,High" bitfld.long 0x00 4. " PL_GPIO[36] ,PL_GPIO[36] input bit" "Low,High" textline " " bitfld.long 0x00 3. " PL_GPIO[35] ,PL_GPIO[35] input bit" "Low,High" bitfld.long 0x00 2. " PL_GPIO[34] ,PL_GPIO[34] input bit" "Low,High" textline " " bitfld.long 0x00 1. " PL_GPIO[33] ,PL_GPIO[33] input bit" "Low,High" bitfld.long 0x00 0. " PL_GPIO[32] ,PL_GPIO[32] input bit" "Low,High" rgroup.long 0x5c++0x03 line.long 0x00 "GPIO_IN2,GPIO 2 input register" bitfld.long 0x00 31. " PL_GPIO[95] ,PL_GPIO[95] input bit" "Low,High" bitfld.long 0x00 30. " PL_GPIO[94] ,PL_GPIO[94] input bit" "Low,High" textline " " bitfld.long 0x00 29. " PL_GPIO[93] ,PL_GPIO[93] input bit" "Low,High" bitfld.long 0x00 28. " PL_GPIO[92] ,PL_GPIO[92] input bit" "Low,High" textline " " bitfld.long 0x00 27. " PL_GPIO[91] ,PL_GPIO[91] input bit" "Low,High" bitfld.long 0x00 26. " PL_GPIO[90] ,PL_GPIO[90] input bit" "Low,High" textline " " bitfld.long 0x00 25. " PL_GPIO[89] ,PL_GPIO[89] input bit" "Low,High" bitfld.long 0x00 24. " PL_GPIO[88] ,PL_GPIO[88] input bit" "Low,High" textline " " bitfld.long 0x00 23. " PL_GPIO[87] ,PL_GPIO[87] input bit" "Low,High" bitfld.long 0x00 22. " PL_GPIO[86] ,PL_GPIO[86] input bit" "Low,High" textline " " bitfld.long 0x00 21. " PL_GPIO[85] ,PL_GPIO[85] input bit" "Low,High" bitfld.long 0x00 20. " PL_GPIO[84] ,PL_GPIO[84] input bit" "Low,High" textline " " bitfld.long 0x00 19. " PL_GPIO[83] ,PL_GPIO[83] input bit" "Low,High" bitfld.long 0x00 18. " PL_GPIO[82] ,PL_GPIO[82] input bit" "Low,High" textline " " bitfld.long 0x00 17. " PL_GPIO[81] ,PL_GPIO[81] input bit" "Low,High" bitfld.long 0x00 16. " PL_GPIO[80] ,PL_GPIO[80] input bit" "Low,High" textline " " bitfld.long 0x00 15. " PL_GPIO[79] ,PL_GPIO[79] input bit" "Low,High" bitfld.long 0x00 14. " PL_GPIO[78] ,PL_GPIO[78] input bit" "Low,High" textline " " bitfld.long 0x00 13. " PL_GPIO[77] ,PL_GPIO[77] input bit" "Low,High" bitfld.long 0x00 12. " PL_GPIO[76] ,PL_GPIO[76] input bit" "Low,High" textline " " bitfld.long 0x00 11. " PL_GPIO[75] ,PL_GPIO[75] input bit" "Low,High" bitfld.long 0x00 10. " PL_GPIO[74] ,PL_GPIO[74] input bit" "Low,High" textline " " bitfld.long 0x00 9. " PL_GPIO[73] ,PL_GPIO[73] input bit" "Low,High" bitfld.long 0x00 8. " PL_GPIO[72] ,PL_GPIO[72] input bit" "Low,High" textline " " bitfld.long 0x00 7. " PL_GPIO[71] ,PL_GPIO[71] input bit" "Low,High" bitfld.long 0x00 6. " PL_GPIO[70] ,PL_GPIO[70] input bit" "Low,High" textline " " bitfld.long 0x00 5. " PL_GPIO[69] ,PL_GPIO[69] input bit" "Low,High" bitfld.long 0x00 4. " PL_GPIO[68] ,PL_GPIO[68] input bit" "Low,High" textline " " bitfld.long 0x00 3. " PL_GPIO[67] ,PL_GPIO[67] input bit" "Low,High" bitfld.long 0x00 2. " PL_GPIO[66] ,PL_GPIO[66] input bit" "Low,High" textline " " bitfld.long 0x00 1. " PL_GPIO[65] ,PL_GPIO[65] input bit" "Low,High" bitfld.long 0x00 0. " PL_GPIO[64] ,PL_GPIO[64] input bit" "Low,High" rgroup.long 0x60++0x03 line.long 0x00 "GPIO_IN3,GPIO 3 input register" bitfld.long 0x00 5. " PL_CLK[4] ,PL_CLK[4] input bit" "Low,High" bitfld.long 0x00 4. " PL_CLK[3] ,PL_CLK[3] input bit" "Low,High" textline " " bitfld.long 0x00 3. " PL_CLK[2] ,PL_CLK[2] input bit" "Low,High" bitfld.long 0x00 2. " PL_CLK[1] ,PL_CLK[1] input bit" "Low,High" textline " " bitfld.long 0x00 1. " PL_GPIO[97] ,PL_GPIO[97] input bit" "Low,High" bitfld.long 0x00 0. " PL_GPIO[96] ,PL_GPIO[96] input bit" "Low,High" group.long 0x64++0x03 line.long 0x00 "GPIO_IRQ_MASK0,GPIO 0 interrupt mask register" bitfld.long 0x00 31. " PL_GPIO[31] ,PL_GPIO[31] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 30. " PL_GPIO[30] ,PL_GPIO[30] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 29. " PL_GPIO[29] ,PL_GPIO[29] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 28. " PL_GPIO[28] ,PL_GPIO[28] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 27. " PL_GPIO[27] ,PL_GPIO[27] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 26. " PL_GPIO[26] ,PL_GPIO[26] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 25. " PL_GPIO[25] ,PL_GPIO[25] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 24. " PL_GPIO[24] ,PL_GPIO[24] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 23. " PL_GPIO[23] ,PL_GPIO[23] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 22. " PL_GPIO[22] ,PL_GPIO[22] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 21. " PL_GPIO[21] ,PL_GPIO[21] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 20. " PL_GPIO[20] ,PL_GPIO[20] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 19. " PL_GPIO[19] ,PL_GPIO[19] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 18. " PL_GPIO[18] ,PL_GPIO[18] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 17. " PL_GPIO[17] ,PL_GPIO[17] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 16. " PL_GPIO[16] ,PL_GPIO[16] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 15. " PL_GPIO[15] ,PL_GPIO[15] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 14. " PL_GPIO[14] ,PL_GPIO[14] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 13. " PL_GPIO[13] ,PL_GPIO[13] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 12. " PL_GPIO[12] ,PL_GPIO[12] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 11. " PL_GPIO[11] ,PL_GPIO[11] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 10. " PL_GPIO[10] ,PL_GPIO[10] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 9. " PL_GPIO[9] ,PL_GPIO[9] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 8. " PL_GPIO[8] ,PL_GPIO[8] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 7. " PL_GPIO[7] ,PL_GPIO[7] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 6. " PL_GPIO[6] ,PL_GPIO[6] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 5. " PL_GPIO[5] ,PL_GPIO[5] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 4. " PL_GPIO[4] ,PL_GPIO[4] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PL_GPIO[3] ,PL_GPIO[3] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 2. " PL_GPIO[2] ,PL_GPIO[2] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PL_GPIO[1] ,PL_GPIO[1] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " PL_GPIO[0] ,PL_GPIO[0] interrupt mask bit" "Not masked,Masked" group.long 0x68++0x03 line.long 0x00 "GPIO_IRQ_MASK1,GPIO 1 interrupt mask register" bitfld.long 0x00 31. " PL_GPIO[63] ,PL_GPIO[63] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 30. " PL_GPIO[62] ,PL_GPIO[62] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 29. " PL_GPIO[61] ,PL_GPIO[61] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 28. " PL_GPIO[60] ,PL_GPIO[60] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 27. " PL_GPIO[59] ,PL_GPIO[59] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 26. " PL_GPIO[58] ,PL_GPIO[58] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 25. " PL_GPIO[57] ,PL_GPIO[57] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 24. " PL_GPIO[56] ,PL_GPIO[56] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 23. " PL_GPIO[55] ,PL_GPIO[55] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 22. " PL_GPIO[54] ,PL_GPIO[54] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 21. " PL_GPIO[53] ,PL_GPIO[53] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 20. " PL_GPIO[52] ,PL_GPIO[52] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 19. " PL_GPIO[51] ,PL_GPIO[51] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 18. " PL_GPIO[50] ,PL_GPIO[50] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 17. " PL_GPIO[49] ,PL_GPIO[49] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 16. " PL_GPIO[48] ,PL_GPIO[48] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 15. " PL_GPIO[47] ,PL_GPIO[47] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 14. " PL_GPIO[46] ,PL_GPIO[46] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 13. " PL_GPIO[45] ,PL_GPIO[45] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 12. " PL_GPIO[44] ,PL_GPIO[44] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 11. " PL_GPIO[43] ,PL_GPIO[43] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 10. " PL_GPIO[42] ,PL_GPIO[42] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 9. " PL_GPIO[41] ,PL_GPIO[41] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 8. " PL_GPIO[40] ,PL_GPIO[40] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 7. " PL_GPIO[39] ,PL_GPIO[39] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 6. " PL_GPIO[38] ,PL_GPIO[38] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 5. " PL_GPIO[37] ,PL_GPIO[37] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 4. " PL_GPIO[36] ,PL_GPIO[36] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PL_GPIO[35] ,PL_GPIO[35] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 2. " PL_GPIO[34] ,PL_GPIO[34] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PL_GPIO[33] ,PL_GPIO[33] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " PL_GPIO[32] ,PL_GPIO[32] interrupt mask bit" "Not masked,Masked" group.long 0x6c++0x03 line.long 0x00 "GPIO_IRQ_MASK2,GPIO 2 interrupt mask register" bitfld.long 0x00 31. " PL_GPIO[95] ,PL_GPIO[95] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 30. " PL_GPIO[94] ,PL_GPIO[94] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 29. " PL_GPIO[93] ,PL_GPIO[93] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 28. " PL_GPIO[92] ,PL_GPIO[92] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 27. " PL_GPIO[91] ,PL_GPIO[91] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 26. " PL_GPIO[90] ,PL_GPIO[90] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 25. " PL_GPIO[89] ,PL_GPIO[89] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 24. " PL_GPIO[88] ,PL_GPIO[88] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 23. " PL_GPIO[87] ,PL_GPIO[87] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 22. " PL_GPIO[86] ,PL_GPIO[86] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 21. " PL_GPIO[85] ,PL_GPIO[85] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 20. " PL_GPIO[84] ,PL_GPIO[84] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 19. " PL_GPIO[83] ,PL_GPIO[83] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 18. " PL_GPIO[82] ,PL_GPIO[82] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 17. " PL_GPIO[81] ,PL_GPIO[81] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 16. " PL_GPIO[80] ,PL_GPIO[80] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 15. " PL_GPIO[79] ,PL_GPIO[79] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 14. " PL_GPIO[78] ,PL_GPIO[78] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 13. " PL_GPIO[77] ,PL_GPIO[77] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 12. " PL_GPIO[76] ,PL_GPIO[76] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 11. " PL_GPIO[75] ,PL_GPIO[75] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 10. " PL_GPIO[74] ,PL_GPIO[74] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 9. " PL_GPIO[73] ,PL_GPIO[73] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 8. " PL_GPIO[72] ,PL_GPIO[72] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 7. " PL_GPIO[71] ,PL_GPIO[71] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 6. " PL_GPIO[70] ,PL_GPIO[70] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 5. " PL_GPIO[69] ,PL_GPIO[69] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 4. " PL_GPIO[68] ,PL_GPIO[68] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PL_GPIO[67] ,PL_GPIO[67] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 2. " PL_GPIO[66] ,PL_GPIO[66] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PL_GPIO[65] ,PL_GPIO[65] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " PL_GPIO[64] ,PL_GPIO[64] interrupt mask bit" "Not masked,Masked" group.long 0x70++0x03 line.long 0x00 "GPIO_IRQ_MASK3,GPIO 3 interrupt mask register" bitfld.long 0x00 5. " PL_CLK[4] ,PL_CLK[4] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 4. " PL_CLK[3] ,PL_CLK[3] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PL_CLK[2] ,PL_CLK[2] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 2. " PL_CLK[1] ,PL_CLK[1] interrupt mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PL_GPIO[97] ,PL_GPIO[97] interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " PL_GPIO[96] ,PL_GPIO[96] interrupt mask bit" "Not masked,Masked" rgroup.long 0x74++0x03 line.long 0x00 "GPIO_MASKED_INT0,Legacy GPIO 0 interrupt status register" bitfld.long 0x00 31. " PL_GPIO[31] ,PL_GPIO[31] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 30. " PL_GPIO[30] ,PL_GPIO[30] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " PL_GPIO[29] ,PL_GPIO[29] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 28. " PL_GPIO[28] ,PL_GPIO[28] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " PL_GPIO[27] ,PL_GPIO[27] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_GPIO[26] ,PL_GPIO[26] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " PL_GPIO[25] ,PL_GPIO[25] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_GPIO[24] ,PL_GPIO[24] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " PL_GPIO[23] ,PL_GPIO[23] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 22. " PL_GPIO[22] ,PL_GPIO[22] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " PL_GPIO[21] ,PL_GPIO[21] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 20. " PL_GPIO[20] ,PL_GPIO[20] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PL_GPIO[19] ,PL_GPIO[19] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 18. " PL_GPIO[18] ,PL_GPIO[18] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " PL_GPIO[17] ,PL_GPIO[17] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 16. " PL_GPIO[16] ,PL_GPIO[16] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " PL_GPIO[15] ,PL_GPIO[15] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 14. " PL_GPIO[14] ,PL_GPIO[14] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PL_GPIO[13] ,PL_GPIO[13] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 12. " PL_GPIO[12] ,PL_GPIO[12] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PL_GPIO[11] ,PL_GPIO[11] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 10. " PL_GPIO[10] ,PL_GPIO[10] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PL_GPIO[9] ,PL_GPIO[9] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 8. " PL_GPIO[8] ,PL_GPIO[8] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " PL_GPIO[7] ,PL_GPIO[7] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 6. " PL_GPIO[6] ,PL_GPIO[6] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " PL_GPIO[5] ,PL_GPIO[5] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 4. " PL_GPIO[4] ,PL_GPIO[4] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " PL_GPIO[3] ,PL_GPIO[3] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " PL_GPIO[2] ,PL_GPIO[2] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " PL_GPIO[1] ,PL_GPIO[1] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 0. " PL_GPIO[0] ,PL_GPIO[0] interrupt status bit" "No interrupt,Interrupt" rgroup.long 0x78++0x03 line.long 0x00 "GPIO_MASKED_INT1,Legacy GPIO 1 interrupt status register" bitfld.long 0x00 31. " PL_GPIO[63] ,PL_GPIO[63] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 30. " PL_GPIO[62] ,PL_GPIO[62] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " PL_GPIO[61] ,PL_GPIO[61] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 28. " PL_GPIO[60] ,PL_GPIO[60] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " PL_GPIO[59] ,PL_GPIO[59] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_GPIO[58] ,PL_GPIO[58] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " PL_GPIO[57] ,PL_GPIO[57] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_GPIO[56] ,PL_GPIO[56] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " PL_GPIO[55] ,PL_GPIO[55] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 22. " PL_GPIO[54] ,PL_GPIO[54] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " PL_GPIO[53] ,PL_GPIO[53] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 20. " PL_GPIO[52] ,PL_GPIO[52] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PL_GPIO[51] ,PL_GPIO[51] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 18. " PL_GPIO[50] ,PL_GPIO[50] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " PL_GPIO[49] ,PL_GPIO[49] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 16. " PL_GPIO[48] ,PL_GPIO[48] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " PL_GPIO[47] ,PL_GPIO[47] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 14. " PL_GPIO[46] ,PL_GPIO[46] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PL_GPIO[45] ,PL_GPIO[45] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 12. " PL_GPIO[44] ,PL_GPIO[44] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PL_GPIO[43] ,PL_GPIO[43] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 10. " PL_GPIO[42] ,PL_GPIO[42] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PL_GPIO[41] ,PL_GPIO[41] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 8. " PL_GPIO[40] ,PL_GPIO[40] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " PL_GPIO[39] ,PL_GPIO[39] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 6. " PL_GPIO[38] ,PL_GPIO[38] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " PL_GPIO[37] ,PL_GPIO[37] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 4. " PL_GPIO[36] ,PL_GPIO[36] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " PL_GPIO[35] ,PL_GPIO[35] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " PL_GPIO[34] ,PL_GPIO[34] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " PL_GPIO[33] ,PL_GPIO[33] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 0. " PL_GPIO[32] ,PL_GPIO[32] interrupt status bit" "No interrupt,Interrupt" rgroup.long 0x7c++0x03 line.long 0x00 "GPIO_MASKED_INT2,Legacy GPIO 2 interrupt status register" bitfld.long 0x00 31. " PL_GPIO[95] ,PL_GPIO[95] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 30. " PL_GPIO[94] ,PL_GPIO[94] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " PL_GPIO[93] ,PL_GPIO[93] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 28. " PL_GPIO[92] ,PL_GPIO[92] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " PL_GPIO[91] ,PL_GPIO[91] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 26. " PL_GPIO[90] ,PL_GPIO[90] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " PL_GPIO[89] ,PL_GPIO[89] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 24. " PL_GPIO[88] ,PL_GPIO[88] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " PL_GPIO[87] ,PL_GPIO[87] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 22. " PL_GPIO[86] ,PL_GPIO[86] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " PL_GPIO[85] ,PL_GPIO[85] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 20. " PL_GPIO[84] ,PL_GPIO[84] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " PL_GPIO[83] ,PL_GPIO[83] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 18. " PL_GPIO[82] ,PL_GPIO[82] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " PL_GPIO[81] ,PL_GPIO[81] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 16. " PL_GPIO[80] ,PL_GPIO[80] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " PL_GPIO[79] ,PL_GPIO[79] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 14. " PL_GPIO[78] ,PL_GPIO[78] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PL_GPIO[77] ,PL_GPIO[77] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 12. " PL_GPIO[76] ,PL_GPIO[76] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PL_GPIO[75] ,PL_GPIO[75] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 10. " PL_GPIO[74] ,PL_GPIO[74] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PL_GPIO[73] ,PL_GPIO[73] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 8. " PL_GPIO[72] ,PL_GPIO[72] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " PL_GPIO[71] ,PL_GPIO[71] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 6. " PL_GPIO[70] ,PL_GPIO[70] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " PL_GPIO[69] ,PL_GPIO[69] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 4. " PL_GPIO[68] ,PL_GPIO[68] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " PL_GPIO[67] ,PL_GPIO[67] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " PL_GPIO[66] ,PL_GPIO[66] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " PL_GPIO[65] ,PL_GPIO[65] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 0. " PL_GPIO[64] ,PL_GPIO[64] interrupt status bit" "No interrupt,Interrupt" rgroup.long 0x80++0x03 line.long 0x00 "GPIO_MASKED_INT3,Legacy GPIO 3 interrupt status register" bitfld.long 0x00 5. " PL_CLK[4] ,PL_CLK[4] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 4. " PL_CLK[3] ,PL_CLK[3] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " PL_CLK[2] ,PL_CLK[2] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " PL_CLK[1] ,PL_CLK[1] interrupt status bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " PL_GPIO[97] ,PL_GPIO[97] interrupt status bit" "No interrupt,Interrupt" bitfld.long 0x00 0. " PL_GPIO[96] ,PL_GPIO[96] interrupt status bit" "No interrupt,Interrupt" sif (cpu()=="SPEAR320S") group.long 0x84++0x03 line.long 0x00 "GPIO_IRQ0,Interrupt status for GPIO_0 to GPIO_31" bitfld.long 0x00 31. " GPIO[31] ,GPIO[31] interrupt status bit" "Not received,Received" bitfld.long 0x00 30. " GPIO[30] ,GPIO[30] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 29. " GPIO[29] ,GPIO[29] interrupt status bit" "Not received,Received" bitfld.long 0x00 28. " GPIO[28] ,GPIO[28] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 27. " GPIO[27] ,GPIO[27] interrupt status bit" "Not received,Received" bitfld.long 0x00 26. " GPIO[26] ,GPIO[26] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 25. " GPIO[25] ,GPIO[25] interrupt status bit" "Not received,Received" bitfld.long 0x00 24. " GPIO[24] ,GPIO[24] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 23. " GPIO[23] ,GPIO[23] interrupt status bit" "Not received,Received" bitfld.long 0x00 22. " GPIO[22] ,GPIO[22] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 21. " GPIO[21] ,GPIO[21] interrupt status bit" "Not received,Received" bitfld.long 0x00 20. " GPIO[20] ,GPIO[20] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 19. " GPIO[19] ,GPIO[19] interrupt status bit" "Not received,Received" bitfld.long 0x00 18. " GPIO[18] ,GPIO[18] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 17. " GPIO[17] ,GPIO[17] interrupt status bit" "Not received,Received" bitfld.long 0x00 16. " GPIO[16] ,GPIO[16] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 15. " GPIO[15] ,GPIO[15] interrupt status bit" "Not received,Received" bitfld.long 0x00 14. " GPIO[14] ,GPIO[14] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 13. " GPIO[13] ,GPIO[13] interrupt status bit" "Not received,Received" bitfld.long 0x00 12. " GPIO[12] ,GPIO[12] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 11. " GPIO[11] ,GPIO[11] interrupt status bit" "Not received,Received" bitfld.long 0x00 10. " GPIO[10] ,GPIO[10] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 9. " GPIO[9] ,GPIO[9] interrupt status bit" "Not received,Received" bitfld.long 0x00 8. " GPIO[8] ,GPIO[8] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 7. " GPIO[7] ,GPIO[7] interrupt status bit" "Not received,Received" bitfld.long 0x00 6. " GPIO[6] ,GPIO[6] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 5. " GPIO[5] ,GPIO[5] interrupt status bit" "Not received,Received" bitfld.long 0x00 4. " GPIO[4] ,GPIO[4] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 3. " GPIO[3] ,GPIO[3] interrupt status bit" "Not received,Received" bitfld.long 0x00 2. " GPIO[2] ,GPIO[2] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 1. " GPIO[1] ,GPIO[1] interrupt status bit" "Not received,Received" bitfld.long 0x00 0. " GPIO[0] ,GPIO[0] interrupt status bit" "Not received,Received" group.long 0x88++0x03 line.long 0x00 "GPIO_IRQ1,Interrupt status for GPIO_32 to GPIO_63" bitfld.long 0x00 31. " GPIO[63] ,GPIO[63] interrupt status bit" "Not received,Received" bitfld.long 0x00 30. " GPIO[62] ,GPIO[62] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 29. " GPIO[61] ,GPIO[61] interrupt status bit" "Not received,Received" bitfld.long 0x00 28. " GPIO[60] ,GPIO[60] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 27. " GPIO[59] ,GPIO[59] interrupt status bit" "Not received,Received" bitfld.long 0x00 26. " GPIO[58] ,GPIO[58] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 25. " GPIO[57] ,GPIO[57] interrupt status bit" "Not received,Received" bitfld.long 0x00 24. " GPIO[56] ,GPIO[56] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 23. " GPIO[55] ,GPIO[55] interrupt status bit" "Not received,Received" bitfld.long 0x00 22. " GPIO[54] ,GPIO[54] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 21. " GPIO[53] ,GPIO[53] interrupt status bit" "Not received,Received" bitfld.long 0x00 20. " GPIO[52] ,GPIO[52] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 19. " GPIO[51] ,GPIO[51] interrupt status bit" "Not received,Received" bitfld.long 0x00 18. " GPIO[50] ,GPIO[50] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 17. " GPIO[49] ,GPIO[49] interrupt status bit" "Not received,Received" bitfld.long 0x00 16. " GPIO[48] ,GPIO[48] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 15. " GPIO[47] ,GPIO[47] interrupt status bit" "Not received,Received" bitfld.long 0x00 14. " GPIO[46] ,GPIO[46] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 13. " GPIO[45] ,GPIO[45] interrupt status bit" "Not received,Received" bitfld.long 0x00 12. " GPIO[44] ,GPIO[44] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 11. " GPIO[43] ,GPIO[43] interrupt status bit" "Not received,Received" bitfld.long 0x00 10. " GPIO[42] ,GPIO[42] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 9. " GPIO[41] ,GPIO[41] interrupt status bit" "Not received,Received" bitfld.long 0x00 8. " GPIO[40] ,GPIO[40] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 7. " GPIO[39] ,GPIO[39] interrupt status bit" "Not received,Received" bitfld.long 0x00 6. " GPIO[38] ,GPIO[38] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 5. " GPIO[37] ,GPIO[37] interrupt status bit" "Not received,Received" bitfld.long 0x00 4. " GPIO[36] ,GPIO[36] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 3. " GPIO[35] ,GPIO[35] interrupt status bit" "Not received,Received" bitfld.long 0x00 2. " GPIO[34] ,GPIO[34] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 1. " GPIO[33] ,GPIO[33] interrupt status bit" "Not received,Received" bitfld.long 0x00 0. " GPIO[32] ,GPIO[32] interrupt status bit" "Not received,Received" group.long 0x8c++0x03 line.long 0x00 "GPIO_IRQ2,Interrupt status for GPIO_64 to GPIO_95" bitfld.long 0x00 31. " GPIO[95] ,GPIO[95] interrupt status bit" "Not received,Received" bitfld.long 0x00 30. " GPIO[94] ,GPIO[94] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 29. " GPIO[93] ,GPIO[93] interrupt status bit" "Not received,Received" bitfld.long 0x00 28. " GPIO[92] ,GPIO[92] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 27. " GPIO[91] ,GPIO[91] interrupt status bit" "Not received,Received" bitfld.long 0x00 26. " GPIO[90] ,GPIO[90] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 25. " GPIO[89] ,GPIO[89] interrupt status bit" "Not received,Received" bitfld.long 0x00 24. " GPIO[88] ,GPIO[88] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 23. " GPIO[87] ,GPIO[87] interrupt status bit" "Not received,Received" bitfld.long 0x00 22. " GPIO[86] ,GPIO[86] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 21. " GPIO[85] ,GPIO[85] interrupt status bit" "Not received,Received" bitfld.long 0x00 20. " GPIO[84] ,GPIO[84] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 19. " GPIO[83] ,GPIO[83] interrupt status bit" "Not received,Received" bitfld.long 0x00 18. " GPIO[82] ,GPIO[82] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 17. " GPIO[81] ,GPIO[81] interrupt status bit" "Not received,Received" bitfld.long 0x00 16. " GPIO[80] ,GPIO[80] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 15. " GPIO[79] ,GPIO[79] interrupt status bit" "Not received,Received" bitfld.long 0x00 14. " GPIO[78] ,GPIO[78] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 13. " GPIO[77] ,GPIO[77] interrupt status bit" "Not received,Received" bitfld.long 0x00 12. " GPIO[76] ,GPIO[76] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 11. " GPIO[75] ,GPIO[75] interrupt status bit" "Not received,Received" bitfld.long 0x00 10. " GPIO[74] ,GPIO[74] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 9. " GPIO[73] ,GPIO[73] interrupt status bit" "Not received,Received" bitfld.long 0x00 8. " GPIO[72] ,GPIO[72] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 7. " GPIO[71] ,GPIO[71] interrupt status bit" "Not received,Received" bitfld.long 0x00 6. " GPIO[70] ,GPIO[70] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 5. " GPIO[69] ,GPIO[69] interrupt status bit" "Not received,Received" bitfld.long 0x00 4. " GPIO[68] ,GPIO[68] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 3. " GPIO[67] ,GPIO[67] interrupt status bit" "Not received,Received" bitfld.long 0x00 2. " GPIO[66] ,GPIO[66] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 1. " GPIO[65] ,GPIO[65] interrupt status bit" "Not received,Received" bitfld.long 0x00 0. " GPIO[64] ,GPIO[64] interrupt status bit" "Not received,Received" group.long 0x90++0x03 line.long 0x00 "GPIO_IRQ3,Interrupt status for GPIO_96 to GPIO_101" bitfld.long 0x00 5. " CLK[4] ,CLK[4] interrupt status bit" "Not received,Received" bitfld.long 0x00 4. " CLK[3] ,CLK[3] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 3. " CLK[2] ,CLK[2] interrupt status bit" "Not received,Received" bitfld.long 0x00 2. " CLK[1] ,CLK[1] interrupt status bit" "Not received,Received" textline " " bitfld.long 0x00 1. " GPIO[97] ,GPIO[97] interrupt status bit" "Not received,Received" bitfld.long 0x00 0. " GPIO[96] ,GPIO[96] interrupt status bit" "Not received,Received" group.long 0x94++0x03 line.long 0x00 "GPIO_IRQ_EDGE0,Interrupt edge programmability for GPIO_0 to GPIO_31" bitfld.long 0x00 31. " GPIO[31] ,GPIO[31] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 30. " GPIO[30] ,GPIO[30] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 29. " GPIO[29] ,GPIO[29] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 28. " GPIO[28] ,GPIO[28] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 27. " GPIO[27] ,GPIO[27] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 26. " GPIO[26] ,GPIO[26] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 25. " GPIO[25] ,GPIO[25] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 24. " GPIO[24] ,GPIO[24] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 23. " GPIO[23] ,GPIO[23] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 22. " GPIO[22] ,GPIO[22] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 21. " GPIO[21] ,GPIO[21] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 20. " GPIO[20] ,GPIO[20] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 19. " GPIO[19] ,GPIO[19] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 18. " GPIO[18] ,GPIO[18] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 17. " GPIO[17] ,GPIO[17] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 16. " GPIO[16] ,GPIO[16] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 15. " GPIO[15] ,GPIO[15] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 14. " GPIO[14] ,GPIO[14] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 13. " GPIO[13] ,GPIO[13] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 12. " GPIO[12] ,GPIO[12] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 11. " GPIO[11] ,GPIO[11] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 10. " GPIO[10] ,GPIO[10] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 9. " GPIO[9] ,GPIO[9] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 8. " GPIO[8] ,GPIO[8] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 7. " GPIO[7] ,GPIO[7] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 6. " GPIO[6] ,GPIO[6] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 5. " GPIO[5] ,GPIO[5] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 4. " GPIO[4] ,GPIO[4] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 3. " GPIO[3] ,GPIO[3] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 2. " GPIO[2] ,GPIO[2] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " GPIO[1] ,GPIO[1] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 0. " GPIO[0] ,GPIO[0] interrupt edge bit" "Falling edge,Rising edge" group.long 0x98++0x03 line.long 0x00 "GPIO_IRQ_EDGE1,Interrupt edge programmability for GPIO_32 to GPIO_63" bitfld.long 0x00 31. " GPIO[63] ,GPIO[63] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 30. " GPIO[62] ,GPIO[62] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 29. " GPIO[61] ,GPIO[61] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 28. " GPIO[60] ,GPIO[60] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 27. " GPIO[59] ,GPIO[59] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 26. " GPIO[58] ,GPIO[58] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 25. " GPIO[57] ,GPIO[57] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 24. " GPIO[56] ,GPIO[56] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 23. " GPIO[55] ,GPIO[55] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 22. " GPIO[54] ,GPIO[54] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 21. " GPIO[53] ,GPIO[53] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 20. " GPIO[52] ,GPIO[52] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 19. " GPIO[51] ,GPIO[51] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 18. " GPIO[50] ,GPIO[50] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 17. " GPIO[49] ,GPIO[49] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 16. " GPIO[48] ,GPIO[48] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 15. " GPIO[47] ,GPIO[47] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 14. " GPIO[46] ,GPIO[46] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 13. " GPIO[45] ,GPIO[45] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 12. " GPIO[44] ,GPIO[44] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 11. " GPIO[43] ,GPIO[43] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 10. " GPIO[42] ,GPIO[42] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 9. " GPIO[41] ,GPIO[41] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 8. " GPIO[40] ,GPIO[40] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 7. " GPIO[39] ,GPIO[39] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 6. " GPIO[38] ,GPIO[38] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 5. " GPIO[37] ,GPIO[37] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 4. " GPIO[36] ,GPIO[36] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 3. " GPIO[35] ,GPIO[35] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 2. " GPIO[34] ,GPIO[34] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " GPIO[33] ,GPIO[33] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 0. " GPIO[32] ,GPIO[32] interrupt edge bit" "Falling edge,Rising edge" group.long 0x9c++0x03 line.long 0x00 "GPIO_IRQ_EDGE2,Interrupt edge programmability for GPIO_64 to GPIO_95" bitfld.long 0x00 31. " GPIO[95] ,GPIO[95] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 30. " GPIO[94] ,GPIO[94] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 29. " GPIO[93] ,GPIO[93] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 28. " GPIO[92] ,GPIO[92] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 27. " GPIO[91] ,GPIO[91] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 26. " GPIO[90] ,GPIO[90] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 25. " GPIO[89] ,GPIO[89] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 24. " GPIO[88] ,GPIO[88] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 23. " GPIO[87] ,GPIO[87] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 22. " GPIO[86] ,GPIO[86] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 21. " GPIO[85] ,GPIO[85] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 20. " GPIO[84] ,GPIO[84] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 19. " GPIO[83] ,GPIO[83] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 18. " GPIO[82] ,GPIO[82] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 17. " GPIO[81] ,GPIO[81] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 16. " GPIO[80] ,GPIO[80] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 15. " GPIO[79] ,GPIO[79] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 14. " GPIO[78] ,GPIO[78] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 13. " GPIO[77] ,GPIO[77] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 12. " GPIO[76] ,GPIO[76] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 11. " GPIO[75] ,GPIO[75] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 10. " GPIO[74] ,GPIO[74] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 9. " GPIO[73] ,GPIO[73] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 8. " GPIO[72] ,GPIO[72] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 7. " GPIO[71] ,GPIO[71] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 6. " GPIO[70] ,GPIO[70] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 5. " GPIO[69] ,GPIO[69] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 4. " GPIO[68] ,GPIO[68] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 3. " GPIO[67] ,GPIO[67] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 2. " GPIO[66] ,GPIO[66] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " GPIO[65] ,GPIO[65] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 0. " GPIO[64] ,GPIO[64] interrupt edge bit" "Falling edge,Rising edge" group.long 0xa0++0x03 line.long 0x00 "GPIO_IRQ_EDGE3,Interrupt edge programmability for GPIO_96 to GPIO_101" bitfld.long 0x00 5. " CLK[4] ,CLK[4] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 4. " CLK[3] ,CLK[3] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 3. " CLK[2] ,CLK[2] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 2. " CLK[1] ,CLK[1] interrupt edge bit" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " GPIO[97] ,GPIO[97] interrupt edge bit" "Falling edge,Rising edge" bitfld.long 0x00 0. " GPIO[96] ,GPIO[96] interrupt edge bit" "Falling edge,Rising edge" group.long 0xa4++0x03 line.long 0x00 "RAS_IOSEL_REG0,IP Port select for GPIO_0 to GPIO_9 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_9 ,IP Port select for GPIO_9" "GPIO,UART3_TX,PWM0,GPIO,I2C1_SDA,?..." bitfld.long 0x00 24.--26. " RAS_SEL_8 ,IP Port select for GPIO_8" "GPIO,UART3_RX,PWM1,GPIO,I2C1_SCL,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_7 ,IP Port select for GPIO_7" "GPIO,UART4_TX,PWM2,GPIO,UART1_CTS,?..." bitfld.long 0x00 18.--20. " RAS_SEL_6 ,IP Port select for GPIO_6" "GPIO,UART4_RX,PWM3,GPIO,UART1_DTR,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_5 ,IP Port select for GPIO_5" "Touchscreen_Y,UART5_TX,GPIO,GPIO,UART1_RI,?..." bitfld.long 0x00 12.--14. " RAS_SEL_4 ,IP Port select for GPIO_4" "GPIO,UART5_RX,GPIO,GPIO,UART1_DCD,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_3 ,IP Port select for GPIO_3" "I2C2_SDA,UART6_TX,GPIO,GPIO,UART1_DSR,?..." bitfld.long 0x00 6.--8. " RAS_SEL_2 ,IP Port select for GPIO_2" "I2C2_SCL,UART6_RX,GPIO,GPIO,UART1_RTS,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_1 ,IP Port select for GPIO_1" "UART2_TX,UART2_TX,UART2_TX,UART2_TX,I2C2_SDA,?..." bitfld.long 0x00 0.--2. " RAS_SEL_0 ,IP Port select for GPIO_0" "UART2_RX,UART2_RX,UART2_RX,UART2_RX,I2C1_SCL,?..." group.long 0xa8++0x03 line.long 0x00 "RAS_IOSEL_REG1,IP Port select for GPIO_10 to GPIO_19 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_19 ,IP Port select for GPIO_19" "SSP1_CLK,I2C2_SCL,GPIO,SSP1_CLK,RMII1_CRS_DV,?..." bitfld.long 0x00 24.--26. " RAS_SEL_18 ,IP Port select for GPIO_18" "SSP1_SS0,GPIO,GPIO,SSP1_SS0,RMII1_RX_ER,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_17 ,IP Port select for GPIO_17" "SSP1_MISO,GPIO,GPIO,SSP1_MISO,RMII0_TXD1,?..." bitfld.long 0x00 18.--20. " RAS_SEL_16 ,IP Port select for GPIO_16" "SSP2_MOSI,GPIO,GPIO,RMII0_TX_EN,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_15 ,IP Port select for GPIO_15" "SSP2_MOSI,UART3_TX,GPIO,GPIO,RMII0_RXD1,?..." bitfld.long 0x00 12.--14. " RAS_SEL_14 ,IP Port select for GPIO_14" "SSP2_SS0,UART4_TX,PWM1,PWM1,RMII_CRS_DV,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_13 ,IP Port select for GPIO_13" "SSP2_MISO,UART4_RX,PWM2,PWM2,RMII0_RX_ER,?..." bitfld.long 0x00 6.--8. " RAS_SEL_12 ,IP Port select for GPIO_12" "PWM3,GPIO,PWM3,PWM3,SD_CD,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_11 ,IP Port select for GPIO_11" "MDIO,GPIO,MDIO,MDIO,RMII_MDC,?..." bitfld.long 0x00 0.--2. " RAS_SEL_10 ,IP Port select for GPIO_10" "MDC,GPIO,MDC,MDC,RMII_MDIO,?..." group.long 0xac++0x03 line.long 0x00 "RAS_IOSEL_REG2,IP Port select for GPIO_20 to GPIO_29 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_29 ,IP Port select for GPIO_29" "UART1_TX,UART1_TX,UART1_TX,UART1_TX,PWM2,?..." bitfld.long 0x00 24.--26. " RAS_SEL_28 ,IP Port select for GPIO_28" "UART1_RX,UART1_RX,UART1_RX,UART1_RX,PWM3,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_27 ,IP Port select for GPIO_27" "Reserved,GPIO,Reserved,Reserved,RMII0_TXD0,?..." bitfld.long 0x00 18.--20. " RAS_SEL_26 ,IP Port select for GPIO_26" "Reserved,GPIO,Reserved,Reserved,RMII0_RXD0,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_25 ,IP Port select for GPIO_25" "Reserved,GPIO,GPIO,Reserved,RMII1_TXD0,?..." bitfld.long 0x00 12.--14. " RAS_SEL_24 ,IP Port select for GPIO_24" "Reserved,GPIO,GPIO,Reserved,RMII1_RXD0,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_23 ,IP Port select for GPIO_23" "Reserved,GPIO,Reserved,Reserved,RMII1_TX_EN,?..." bitfld.long 0x00 6.--8. " RAS_SEL_22 ,IP Port select for GPIO_22" "Reserved,GPIO,Reserved,Reserved,RMII_REF_CLK,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_21 ,IP Port select for GPIO_21" "Reserved,GPIO,Reserved,Reserved,RMII1_TXD1,?..." bitfld.long 0x00 0.--2. " RAS_SEL_20 ,IP Port select for GPIO_20" "SSP1_MOSI,I2C2_SDA,GPIO,SSP1_MOSI,RMII1_RXD1,?..." group.long 0xb0++0x03 line.long 0x00 "RAS_IOSEL_REG3,IP Port select for GPIO_30 to GPIO_39 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_39 ,IP Port select for GPIO_39" "I2S_CLK,I2S_CLK,UART4_RX,GPIO,SSP1_MOSI,?..." bitfld.long 0x00 24.--26. " RAS_SEL_38 ,IP Port select for GPIO_38" "PWM0,PWM0,UART5_TX,GPIO,SSP1_CLK,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_37 ,IP Port select for GPIO_37" "PWM1,PWM1,UART5_RX,GPIO,SSP1_SS0,?..." bitfld.long 0x00 18.--20. " RAS_SEL_36 ,IP Port select for GPIO_36" "Touchscreen_X,GPIO,UART1_CTS,UART1_CTS,SSP1_SS0,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_35 ,IP Port select for GPIO_35" "Audio_over_samp_clk,Audio_over_samp_clk,UART1_DTR,UART1_DTR,SSP2_MOSI,?..." bitfld.long 0x00 12.--14. " RAS_SEL_34 ,IP Port select for GPIO_34" "SD_LED/PWM2,SD_LED/PWM2,UART1_RI,UART1_RI,SSP2_CLK,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_33 ,IP Port select for GPIO_33" "CAN0_TX,CAN0_TX,CAN0_TX,UART1_DCD,SSP2_SS0,?..." bitfld.long 0x00 6.--8. " RAS_SEL_32 ,IP Port select for GPIO_32" "CAN0_RX,CAN0_RX,CAN0_RX,UART1_DSR,SSP2_MISO,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_31 ,IP Port select for GPIO_31" "CAN1_TX,CAN1_TX,CAN1_TX,UART1_RTS,PWM0,?..." bitfld.long 0x00 0.--2. " RAS_SEL_30 ,IP Port select for GPIO_30" "CAN1_RX,CAN1_RX,CAN1_RX,GPIO,PWM1,?..." group.long 0xb4++0x03 line.long 0x00 "RAS_IOSEL_REG4,IP Port select for GPIO_40 to GPIO_49 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_49 ,IP Port select for GPIO_49" "SD_DAT6,SD_DAT6,EMI_D12/FSMC_D12,SD_DAT6,SSP1_SS0,?..." bitfld.long 0x00 24.--26. " RAS_SEL_48 ,IP Port select for GPIO_48" "SD_DAT5,SD_DAT5,EMI_D13/FSMC_D13,SD_DAT5,SSP1_MISO,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_47 ,IP Port select for GPIO_47" "SD_DAT4,SD_DAT4,EMI_D14/FSMC_D14,SD_DAT4,SSP2_MOSI,?..." bitfld.long 0x00 18.--20. " RAS_SEL_46 ,IP Port select for GPIO_46" "SD_DAT3,SD_DAT3,EMI_D15/FSMC_D15,SD_DAT3,SSP2_CLK,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_45 ,IP Port select for GPIO_45" "SD_DAT2,SD_DAT2,UART1_DCD,SD_DAT2,SSP2_SS0,?..." bitfld.long 0x00 12.--14. " RAS_SEL_44 ,IP Port select for GPIO_44" "SD_DAT1,SD_DAT1,UART1_DSR,SD_DAT1,SSP2_MISO,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_43 ,IP Port select for GPIO_43" "SD_DAT0,SD_DAT0,UART1_RTS,SD_DAT0,PWM0,?..." bitfld.long 0x00 6.--8. " RAS_SEL_42 ,IP Port select for GPIO_42" "I2S_RX,I2S_RX,UART3_TX,GPIO,PWM1,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_41 ,IP Port select for GPIO_41" "I2S_TX,I2S_TX,UART3_RX,GPIO,PWM2,?..." bitfld.long 0x00 0.--2. " RAS_SEL_40 ,IP Port select for GPIO_40" "I2S_LR,I2S_LR,UART4_TX,GPIO,PWM3,?..." group.long 0xb8++0x03 line.long 0x00 "RAS_IOSEL_REG5,IP Port select for GPIO_50 to GPIO_59 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_59 ,IP Port select for GPIO_59" "FSMC_WE,FSMC_WE,EMI_WE,FSMC_WE,PWM1,?..." bitfld.long 0x00 24.--26. " RAS_SEL_58 ,IP Port select for GPIO_58" "FSMC_RE,FSMC_RE,EMI_OE,FSMC_RE,PWM2,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_57 ,IP Port select for GPIO_57" "FSMC_CMD_LE,FSMC_CMD_LE,FSMC_CMD_LE,FSMC_CMD_LE,PWM3,?..." bitfld.long 0x00 18.--20. " RAS_SEL_56 ,IP Port select for GPIO_56" "FSMC_RDZ/BSZ,FSMC_RDZ/BSZ,FSMC_RDZ/BSZ,FSMC_RDZ/BSZ,GPIO,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_55 ,IP Port select for GPIO_55" "FSMC_CS0,FSMC_CS0,EMI_CE_0,FSMC_CS0,GPIO,?..." bitfld.long 0x00 12.--14. " RAS_SEL_54 ,IP Port select for GPIO_54" "FSMC_CS1,FSMC_CS1,EMI_CE_1,FSMC_CS1,GPIO,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_53 ,IP Port select for GPIO_53" "FSMC_CS2,FSMC_CS2,EMI_CE_2,FSMC_CS2,UART3_TX,?..." bitfld.long 0x00 6.--8. " RAS_SEL_52 ,IP Port select for GPIO_52" "FSMC_CS3,FSMC_CS3,EMI_CE_3,FSMC_CS3,UART3_RX,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_51 ,IP Port select for GPIO_51" "SD_CD,SD_CD,EMI_BYTEN_0,SD_CD,SSP1_MOSI,?..." bitfld.long 0x00 0.--2. " RAS_SEL_50 ,IP Port select for GPIO_50" "SD_DAT7,SD_DAT7,EMI_BYTEN_1,SD_DAT7,SSP1_CLK,?..." group.long 0xbc++0x03 line.long 0x00 "RAS_IOSEL_REG6,IP Port select for GPIO_60 to GPIO_69 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_69 ,IP Port select for GPIO_69" "CLCD_CLPOWER,GPIO,EMI_WAIT,SPP_SELINn,UART5_RX,?..." bitfld.long 0x00 24.--26. " RAS_SEL_68 ,IP Port select for GPIO_68" "FSMC_D00,FSMC_D00,EMI_D0,FSMC_D00,SSP1_MOSI,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_67 ,IP Port select for GPIO_67" "FSMC_D01,FSMC_D01,EMI_D1,FSMC_D01,SSP1_CLK,?..." bitfld.long 0x00 18.--20. " RAS_SEL_66 ,IP Port select for GPIO_66" "FSMC_D02,FSMC_D02,EMI_D2,FSMC_D02,SSP1_SS0,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_65 ,IP Port select for GPIO_65" "FSMC_D03,FSMC_D03,EMI_D3,FSMC_D03,SSP1_MISO,?..." bitfld.long 0x00 12.--14. " RAS_SEL_64 ,IP Port select for GPIO_64" "FSMC_D04,FSMC_D04,EMI_D4,FSMC_D04,SSP2_MOSI,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_63 ,IP Port select for GPIO_63" "FSMC_D05,FSMC_D05,EMI_D5,FSMC_D05,SSP2_CLK,?..." bitfld.long 0x00 6.--8. " RAS_SEL_62 ,IP Port select for GPIO_62" "FSMC_D06,FSMC_D06,EMI_D6,FSMC_D06,SSP2_SS0,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_61 ,IP Port select for GPIO_61" "FSMC_D07,FSMC_D07,EMI_D7,FSMC_D07,SSP2_MISO,?..." bitfld.long 0x00 0.--2. " RAS_SEL_60 ,IP Port select for GPIO_60" "FSMC_ADDR_LE,FSMC_ADDR_LE,FSMC_ADDR_LE,FSMC_ADDR_LE,PWM0,?..." group.long 0xc0++0x03 line.long 0x00 "RAS_IOSEL_REG7,IP Port select for GPIO_70 to GPIO_79 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_79 ,IP Port select for GPIO_79" "CLCD_CLD18,GPIO,EMI_A18,SPP_DATA6,UART_RS485_TX,?..." bitfld.long 0x00 24.--26. " RAS_SEL_78 ,IP Port select for GPIO_78" "CLCD_CLD19,GPIO,EMI_A19,SPP_DATA7,UART_RS485_RX,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_77 ,IP Port select for GPIO_77" "CLCD_CLD20,GPIO,EMI_A20,SPP_STRBn,UART_RS485_OE,?..." bitfld.long 0x00 18.--20. " RAS_SEL_76 ,IP Port select for GPIO_76" "CLCD_CLD21,GPIO,EMI_A21,SPP_ACKn,I2C2_SDA,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_75 ,IP Port select for GPIO_75" "CLCD_CLD22,GPIO,EMI_A22,SPP_BUSY,I2C2_SCL,?..." bitfld.long 0x00 12.--14. " RAS_SEL_74 ,IP Port select for GPIO_74" "CLCD_CLD23,GPIO,EMI_A23,SPP_PERROR,UART3_TX,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_73 ,IP Port select for GPIO_73" "CLCD_CLAC,GPIO,EMI_D8,SPP_SELECT,UART3_RX,?..." bitfld.long 0x00 6.--8. " RAS_SEL_72 ,IP Port select for GPIO_72" "CLCD_CLFP,GPIO,EMI_D9,SPP_AUTOFDn,UART4_TX,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_71 ,IP Port select for GPIO_71" "CLCD_CLLP,GPIO,EMI_D10,SPP_FAULTn,UART4_RX,?..." bitfld.long 0x00 0.--2. " RAS_SEL_70 ,IP Port select for GPIO_70" "CLCD_CLLE,GPIO,EMI_D11,SPP_INITn,UART5_TX,?..." group.long 0xc4++0x03 line.long 0x00 "RAS_IOSEL_REG8,IP Port select for GPIO_80 to GPIO_89 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_89 ,IP Port select for GPIO_89" "CLCD_CLD8,MII1_RXDV,EMI_A8,UART6_TX,PWM0,?..." bitfld.long 0x00 24.--26. " RAS_SEL_88 ,IP Port select for GPIO_88" "CLCD_CLD9,MII1_RXER,EMI_A9,UART6_RX,PWM1,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_87 ,IP Port select for GPIO_87" "CLCD_CLD10,MII1_RXD0,EMI_A10,GPIO,PWM2,?..." bitfld.long 0x00 18.--20. " RAS_SEL_86 ,IP Port select for GPIO_86" "CLCD_CLD11,MII1_RXD1,EMI_A11,GPIO,PWM3,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_85 ,IP Port select for GPIO_85" "CLCD_CLD12,MII1_RXD2,EMI_A12,SPP_DATA0,UART1_CTS,?..." bitfld.long 0x00 12.--14. " RAS_SEL_84 ,IP Port select for GPIO_84" "CLCD_CLD13,MII1_RXD3,EMI_A13,SPP_DATA1,UART1_DTR,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_83 ,IP Port select for GPIO_83" "CLCD_CLD14,MII1_COL,EMI_A14,SPP_DATA2,UART1_RI,?..." bitfld.long 0x00 6.--8. " RAS_SEL_82 ,IP Port select for GPIO_82" "CLCD_CLD15,MII1_CRS,EMI_A15,SPP_DATA3,UART1_DCD,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_81 ,IP Port select for GPIO_81" "CLCD_CLD16,MII1_MDIO,EMI_A16,SPP_DATA4,UART1_DSR,?..." bitfld.long 0x00 0.--2. " RAS_SEL_80 ,IP Port select for GPIO_80" "CLCD_CLD17,MII1_MDC,EMI_A17,SPP_DATA5,UART1_RTS,?..." group.long 0xc8++0x03 line.long 0x00 "RAS_IOSEL_REG9,IP Port select for GPIO_90 to GPIO_99 in extended mode" bitfld.long 0x00 27.--29. " RAS_SEL_99 ,IP Port select for PL_CLK2" "SD_CLK,SD_CLK,I2C1_SCL,SD_CLK,UART3_RX,?..." bitfld.long 0x00 24.--26. " RAS_SEL_98 ,IP Port select for PL_CLK1" "CLCD_CLCP,GPIO,I2C1_SDA,SD_LED,UART3_TX,?..." textline " " bitfld.long 0x00 21.--23. " RAS_SEL_97 ,IP Port select for GPIO_97" "CLCD_CLD0,MII1_TXCLK,EMI_A0,I2C2_SDA,SSP1_MOSI,?..." bitfld.long 0x00 18.--20. " RAS_SEL_96 ,IP Port select for GPIO_96" "CLCD_CLD1,MII1_TXD0,EMI_A1,I2C2_SCL,SSP1_CLK,?..." textline " " bitfld.long 0x00 15.--17. " RAS_SEL_95 ,IP Port select for GPIO_95" "CLCD_CLD2,MII1_TXD1,EMI_A2,UART3_TX,SSP1_SS0,?..." bitfld.long 0x00 12.--14. " RAS_SEL_94 ,IP Port select for GPIO_94" "CLCD_CLD3,MII1_TXD2,EMI_A3,UART3_RX,SSP1_MISO,?..." textline " " bitfld.long 0x00 9.--11. " RAS_SEL_93 ,IP Port select for GPIO_93" "CLCD_CLD4,MII1_TXD3,EMI_A4,UART4_TX,SSP2_MOSI,?..." bitfld.long 0x00 6.--8. " RAS_SEL_92 ,IP Port select for GPIO_92" "CLCD_CLD5,MII1_TXEN,EMI_A5,UART4_RX,SSP2_CLK,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_91 ,IP Port select for GPIO_91" "CLCD_CLD6,MII1_TXER,EMI_A6,UART5_TX,SSP2_SS0,?..." bitfld.long 0x00 0.--2. " RAS_SEL_90 ,IP Port select for GPIO_90" "CLCD_CLD7,MII1_RXCLK,EMI_A7,UART5_RX,SSP2_MISO,?..." if (((data.long(asd:0xB3000000+0x10))&0x07)==0x01) group.long 0xCC++0x03 line.long 0x00 "RAS_IOSEL_REG10,IP Port select for PL_CLK3 PLCLK4 and directing IP Ports on multiple GPIOs in extended mode" bitfld.long 0x00 29. " SD_CD_IO ,SDIO Card detect signal off pin" "GPIO_12,GPIO_51" bitfld.long 0x00 26.--28. " I2C2_IO ,I2C2 SDA and SCL signals pins" "SDA-GPIO_97/SCL-GPIO_96,SDA-GPIO_76/SCL-GPIO_75,SDA-GPIO_20/SCL-GPIO_19,SDA-GPIO_3/SCL-GPIO_2,SDA-GPIO_1/SCL-GPIO_0,?..." textline " " bitfld.long 0x00 25. " I2C1_IO ,I2C1 SDA and SCL signals pins" "SDA-GPIO_9/SCL-GPIO_8,SDA-GPIO_98/SCL-GPIO_99" bitfld.long 0x00 24. " UART6_IO ,UART6_RX signal pin" "GPIO_88,GPIO_2" textline " " bitfld.long 0x00 22.--23. " UART5_IO ,UART5_RX signal pin" "GPIO_90,GPIO_69,GPIO_37,GPIO_4" bitfld.long 0x00 19.--21. " UART4_IO ,UART4_RX signal pin" "GPIO_13,GPIO_6,GPIO_13,GPIO_6,GPIO_13,GPIO_6,GPIO_13,GPIO_6" textline " " bitfld.long 0x00 16.--18. " UART3_IO ,UART3_RX signal pin" "GPIO_15,GPIO_8,GPIO_15,GPIO_8,GPIO_15,GPIO_8,GPIO_15,GPIO_8" bitfld.long 0x00 14.--15. " UART1_IO ,UART1_DSR/DCD/RI and CTS signals pin" "GPIO_81/82/83/85,GPIO_44/45/34/36,GPIO_32/33/34/36,GPIO_3/4/5/7" textline " " bitfld.long 0x00 11.--13. " SSP2_IO ,SSP2_MISO/SS0/CLK and MOSI signals pin" "GPIO_90/91/92/93,GPIO_61/62/63/64,GPIO_44/45/46/47,GPIO_32/33/34/35,GPIO_13/14/15/16,?..." bitfld.long 0x00 8.--10. " SSP1_IO ,SSP1_MISO/SS0/CLK and MOSI signals pin" "GPIO_94/95/96/97,GPIO_65/66/67/68,GPIO_48/49/50/51,GPIO_36/37/38/39,GPIO_17/18/19/20,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_101 ,IP Port select for PL_CLK4" "SD_CMD,SD_CMD,GPIO,SD_CMD,UART4_RX,?..." bitfld.long 0x00 0.--2. " RAS_SEL_100 ,IP Port select for PL_CLK3" "SD_WP,SD_WP,GPIO,SD_WP,UART4_TX,?..." elif (((data.long(asd:0xB3000000+0x10))&0x07)==0x02) group.long 0xCC++0x03 line.long 0x00 "RAS_IOSEL_REG10,IP Port select for PL_CLK3 PLCLK4 and directing IP Ports on multiple GPIOs in extended mode" bitfld.long 0x00 29. " SD_CD_IO ,SDIO Card detect signal off pin" "GPIO_12,GPIO_51" bitfld.long 0x00 26.--28. " I2C2_IO ,I2C2 SDA and SCL signals pins" "SDA-GPIO_97/SCL-GPIO_96,SDA-GPIO_76/SCL-GPIO_75,SDA-GPIO_20/SCL-GPIO_19,SDA-GPIO_3/SCL-GPIO_2,SDA-GPIO_1/SCL-GPIO_0,?..." textline " " bitfld.long 0x00 25. " I2C1_IO ,I2C1 SDA and SCL signals pins" "SDA-GPIO_9/SCL-GPIO_8,SDA-GPIO_98/SCL-GPIO_99" bitfld.long 0x00 24. " UART6_IO ,UART6_RX signal pin" "GPIO_88,GPIO_2" textline " " bitfld.long 0x00 22.--23. " UART5_IO ,UART5_RX signal pin" "GPIO_90,GPIO_69,GPIO_37,GPIO_4" bitfld.long 0x00 19.--21. " UART4_IO ,UART4_RX signal pin" "GPIO_92,GPIO_71,GPIO_39,GPIO_13,GPIO_6,PL_CLK4,?..." textline " " bitfld.long 0x00 16.--18. " UART3_IO ,UART3_RX signal pin" "GPIO_94,GPIO_73,GPIO_52,GPIO_41,GPIO_15,GPIO_8,GPIO_99,?..." bitfld.long 0x00 14.--15. " UART1_IO ,UART1_DSR/DCD/RI and CTS signals pin" "GPIO_81/82/83/85,GPIO_44/45/34/36,GPIO_32/33/34/36,GPIO_3/4/5/7" textline " " bitfld.long 0x00 11.--13. " SSP2_IO ,SSP2_MISO/SS0/CLK and MOSI signals pin" "GPIO_90/91/92/93,GPIO_61/62/63/64,GPIO_44/45/46/47,GPIO_32/33/34/35,GPIO_13/14/15/16,?..." bitfld.long 0x00 8.--10. " SSP1_IO ,SSP1_MISO/SS0/CLK and MOSI signals pin" "GPIO_94/95/96/97,GPIO_65/66/67/68,GPIO_48/49/50/51,GPIO_36/37/38/39,GPIO_17/18/19/20,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_101 ,IP Port select for PL_CLK4" "SD_CMD,SD_CMD,GPIO,SD_CMD,UART4_RX,?..." bitfld.long 0x00 0.--2. " RAS_SEL_100 ,IP Port select for PL_CLK3" "SD_WP,SD_WP,GPIO,SD_WP,UART4_TX,?..." else group.long 0xCC++0x03 line.long 0x00 "RAS_IOSEL_REG10,IP Port select for PL_CLK3 PLCLK4 and directing IP Ports on multiple GPIOs in extended mode" bitfld.long 0x00 29. " SD_CD_IO ,SDIO Card detect signal off pin" "GPIO_12,GPIO_51" bitfld.long 0x00 26.--28. " I2C2_IO ,I2C2 SDA and SCL signals pins" "SDA-GPIO_97/SCL-GPIO_96,SDA-GPIO_76/SCL-GPIO_75,SDA-GPIO_20/SCL-GPIO_19,SDA-GPIO_3/SCL-GPIO_2,SDA-GPIO_1/SCL-GPIO_0,?..." textline " " bitfld.long 0x00 25. " I2C1_IO ,I2C1 SDA and SCL signals pins" "SDA-GPIO_9/SCL-GPIO_8,SDA-GPIO_98/SCL-GPIO_99" bitfld.long 0x00 24. " UART6_IO ,UART6_RX signal pin" "GPIO_88,GPIO_2" textline " " bitfld.long 0x00 22.--23. " UART5_IO ,UART5_RX signal pin" "GPIO_90,GPIO_69,GPIO_37,GPIO_4" bitfld.long 0x00 14.--15. " UART1_IO ,UART1_DSR/DCD/RI and CTS signals pin" "GPIO_81/82/83/85,GPIO_44/45/34/36,GPIO_32/33/34/36,GPIO_3/4/5/7" textline " " bitfld.long 0x00 11.--13. " SSP2_IO ,SSP2_MISO/SS0/CLK and MOSI signals pin" "GPIO_90/91/92/93,GPIO_61/62/63/64,GPIO_44/45/46/47,GPIO_32/33/34/35,GPIO_13/14/15/16,?..." bitfld.long 0x00 8.--10. " SSP1_IO ,SSP1_MISO/SS0/CLK and MOSI signals pin" "GPIO_94/95/96/97,GPIO_65/66/67/68,GPIO_48/49/50/51,GPIO_36/37/38/39,GPIO_17/18/19/20,?..." textline " " bitfld.long 0x00 3.--5. " RAS_SEL_101 ,IP Port select for PL_CLK4" "SD_CMD,SD_CMD,GPIO,SD_CMD,UART4_RX,?..." bitfld.long 0x00 0.--2. " RAS_SEL_100 ,IP Port select for PL_CLK3" "SD_WP,SD_WP,GPIO,SD_WP,UART4_TX,?..." endif endif width 0x0b tree.end endif textline ""