; --------------------------------------------------------------------------------
; @Title: TXZ4 Specific Menu
; @Props: Released
; @Author: KWI, PIW
; @Changelog: 2020-03-06 KWI
;             2022-01-29 PIW
; @Manufacturer: TOSHIBA - Toshiba
; @Core: Cortex-M4F
; @Chip: TMPM4G*, TMPM4K*, TMPM4L*
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mentxz4.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "DMACA"            "per , ""DMACA (DMA Controller),DMACA"""
menuitem "DMACB"            "per , ""DMACB (DMA Controller),DMACB"""
menuitem "SMI"              "per , ""SMI,SMI"""
)
menuitem "IA"                   "per , ""IA (Interrupt control A Register),IA"""
menuitem "RLM"                  "per , ""RLM (Reset Low power Managiment Register),RLM"""
menuitem "LVD"                  "per , ""LVD (LVD0),LVD"""
menuitem "TSEL"                 "per , ""TSEL (TRGSEL),TSEL"""
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "LTT"              "per , ""LTT (Long Term Timer(LTTMR)),LTT"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*"))
(
popup "TSPI (Serial Interface (TSPI))"
(
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "TSPI0"    "per , ""TSPI (Serial Interface (TSPI)),TSPI0"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "TSPI1"    "per , ""TSPI (Serial Interface (TSPI)),TSPI1"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "TSPI2"    "per , ""TSPI (Serial Interface (TSPI)),TSPI2"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K4A*"))
(
menuitem "TSPI3"    "per , ""TSPI (Serial Interface (TSPI)),TSPI3"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
(
menuitem "TSPI4"    "per , ""TSPI (Serial Interface (TSPI)),TSPI4"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
(
menuitem "TSPI5"    "per , ""TSPI (Serial Interface (TSPI)),TSPI5"""
menuitem "TSPI6"    "per , ""TSPI (Serial Interface (TSPI)),TSPI6"""
)
menuitem "TSPI7"        "per , ""TSPI (Serial Interface (TSPI)),TSPI7"""
menuitem "TSPI8"        "per , ""TSPI (Serial Interface (TSPI)),TSPI8"""
)
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "EXB"              "per , ""EXB (External Bus Interface(EXB)),EXB"""
)
menuitem "CG"                   "per , ""CG (Clock Generator (CG)),CG"""
menuitem "IB"                   "per , ""IB (Interrupt Control B Register),IB"""
menuitem "IMN"                  "per , ""IMN (Interrupt Monitor Register),IMN"""
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "DNFA"             "per , ""DNFA (DNF),DNFA"""
menuitem "DNFB"             "per , ""DNFB (DNF),DNFB"""
)
menuitem "SIWD"                 "per , ""SIWD (Watchdog Timer (WD)),SIWD"""
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K4A*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "NBD"              "per , ""NBD,NBD"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "MDMA"             "per , ""MDMA (Malti Porpose Direct Memory Accsess(MDMA)),MDMA"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*"))
(
popup "FURT (ARM Prime Cell PL011)"
(
menuitem "FURT0"        "per , ""FURT (ARM Prime Cell PL011),FURT0"""
menuitem "FURT1"        "per , ""FURT (ARM Prime Cell PL011),FURT1"""
)
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "AD"               "per , ""AD (ADC),AD"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
popup "DA (Digital analog converter (DAC))"
(
menuitem "DA0"          "per , ""DA (Digital analog converter (DAC)),DA0"""
menuitem "DA1"          "per , ""DA (Digital analog converter (DAC)),DA1"""
)
popup "T32A (32-bit Timer Event Counter (T32A))"
(
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "T32A0"    "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A0"""
menuitem "T32A1"    "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A1"""
menuitem "T32A2"    "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A2"""
menuitem "T32A3"    "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A3"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "T32A4"    "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A4"""
menuitem "T32A5"    "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A5"""
)
menuitem "T32A6"        "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A6"""
menuitem "T32A7"        "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A7"""
menuitem "T32A8"        "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A8"""
menuitem "T32A9"        "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A9"""
menuitem "T32A10"       "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A10"""
menuitem "T32A11"       "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A11"""
menuitem "T32A12"       "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A12"""
menuitem "T32A13"       "per , ""T32A (32-bit Timer Event Counter (T32A)),T32A13"""
)
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*"))
(
popup "UART (Universal Asynchronous Receiver/Transmitter)"
(
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "UART0"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART0"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "UART1"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "UART2"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART2"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4K4A*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "UART3"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
)
menuitem "UART4"        "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
menuitem "UART5"        "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART5"""
)
popup "I2C (Inter-Integrated Circuit)"
(
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "I2C0"     "per , ""I2C (Inter-Integrated Circuit),I2C0"""
menuitem "I2C1"     "per , ""I2C (Inter-Integrated Circuit),I2C1"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
(
menuitem "I2C2"     "per , ""I2C (Inter-Integrated Circuit),I2C2"""
)
if (cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4G9*"))
(
menuitem "I2C3"     "per , ""I2C (Inter-Integrated Circuit),I2C3"""
)
menuitem "I2C4"         "per , ""I2C (Inter-Integrated Circuit),I2C4"""
)
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "PA"               "per , ""PA (Port A),PA"""
menuitem "PB"               "per , ""PB (Port B),PB"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "PC"               "per , ""PC (Port C),PC"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "PD"               "per , ""PD (Port D),PD"""
)
menuitem "PE"                   "per , ""PE (Port E),PE"""
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "PF"               "per , ""PF (Port F),PF"""
)
menuitem "PG"                   "per , ""PG (Port G),PG"""
menuitem "PH"                   "per , ""PH (Port H),PH"""
if (cpuis("TMPM4G9*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "PJ"               "per , ""PJ (Port J),PJ"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*"))
(
menuitem "PK"               "per , ""PK (Port K),PK"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PL"               "per , ""PL (Port L),PL"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G8*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PM"               "per , ""PM (Port M),PM"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PN"               "per , ""PN (Port N),PN"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PP"               "per , ""PP (Port P),PP"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KQ*"))
(
menuitem "PR"               "per , ""PR (Port R),PR"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PT"               "per , ""PT (Port T),PT"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PU"               "per , ""PU (Port U),PU"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "PV"               "per , ""PV (Port V),PV"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4KQ*"))
(
menuitem "PW"               "per , ""PW (Port W),PW"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "PY"               "per , ""PY (Port Y),PY"""
menuitem "TRMOSC"           "per , ""TRMOSC (Internal High-speed Oscillation Adjustment),TRMOSC"""
)
menuitem "OFD"                  "per , ""OFD (Oscillation Frequency Detector (OFD)),OFD"""
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "RTC"              "per , ""RTC (Real-time Counter),RTC"""
menuitem "CEC"              "per , ""CEC (Consumer Electronics Control (CEC)),CEC"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*"))
(
popup "RMC (Remote Control Signal Preprocessor (RMC))"
(
menuitem "RMC0"         "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC0"""
menuitem "RMC1"         "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC1"""
)
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "PMD"              "per , ""PMD,PMD"""
)
if (cpuis("TMPM4G9*")||cpuis("TMPM4G7*")||cpuis("TMPM4G7*")||cpuis("TMPM4G8*"))
(
menuitem "SDA"              "per , ""SDA (SD),SDA"""
menuitem "SDB"              "per , ""SDB (SD),SDB"""
menuitem "SDC"              "per , ""SDC (SD),SDC"""
)
menuitem "FC"                   "per , ""FC,FC"""
if (cpuis("TMPM4G7*")||cpuis("TMPM4G7*"))
(
menuitem "FURT"             "per , ""FURT (ARM Prime Cell PL011),FURT"""
)
if (cpuis("TMPM4G8*"))
(
menuitem "RMC"              "per , ""RMC (Remote Control Signal Preprocessor (RMC)),RMC"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "DMA"              "per , ""DMA (DMA Controller),DMA"""
)
if (cpuis("TMPM4K0A*"))
(
menuitem "TSPI"             "per , ""TSPI (Serial Interface (TSPI)),TSPI"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*"))
(
menuitem "SH"               "per , ""SH (Sampl-and-hold circuit),SH"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "DNF"              "per , ""DNF,DNF"""
menuitem "RPAR"             "per , ""RPAR (RAM Parity),RPAR"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "CRC"              "per , ""CRC,CRC"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
menuitem "AMP"              "per , ""AMP,AMP"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "TRM"              "per , ""TRM (TRIM),TRM"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
popup "PMD (A-PMD)"
(
menuitem "PMD0"         "per , ""PMD (A-PMD),PMD0"""
menuitem "PMD1"         "per , ""PMD (A-PMD),PMD1"""
)
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "EN"               "per , ""EN (Encoder Input (ENC)),EN"""
)
if (cpuis("TMPM4K0A*")||cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*")||cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*")||cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "VE"               "per , ""VE,VE"""
)
if (cpuis("TMPM4K1A*")||cpuis("TMPM4K2A*")||cpuis("TMPM4K4A*"))
(
menuitem "I2C"              "per , ""I2C (Inter-Integrated Circuit),I2C"""
)
if (cpuis("TMPM4L*")||cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
popup "CANMB (CAN Controller Mailbox RAM (CANMB))"
(
menuitem "CANMB0"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB0"""
menuitem "CANMB1"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB1"""
menuitem "CANMB2"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB2"""
menuitem "CANMB3"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB3"""
menuitem "CANMB4"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB4"""
menuitem "CANMB5"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB5"""
menuitem "CANMB6"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB6"""
menuitem "CANMB7"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB7"""
menuitem "CANMB8"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB8"""
menuitem "CANMB9"       "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB9"""
menuitem "CANMB10"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB10"""
menuitem "CANMB11"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB11"""
menuitem "CANMB12"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB12"""
menuitem "CANMB13"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB13"""
menuitem "CANMB14"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB14"""
menuitem "CANMB15"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB15"""
menuitem "CANMB16"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB16"""
menuitem "CANMB17"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB17"""
menuitem "CANMB18"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB18"""
menuitem "CANMB19"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB19"""
menuitem "CANMB20"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB20"""
menuitem "CANMB21"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB21"""
menuitem "CANMB22"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB22"""
menuitem "CANMB23"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB23"""
menuitem "CANMB24"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB24"""
menuitem "CANMB25"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB25"""
menuitem "CANMB26"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB26"""
menuitem "CANMB27"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB27"""
menuitem "CANMB28"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB28"""
menuitem "CANMB29"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB29"""
menuitem "CANMB30"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB30"""
menuitem "CANMB31"      "per , ""CANMB (CAN Controller Mailbox RAM (CANMB)),CANMB31"""
)
menuitem "CAN"              "per , ""CAN (CAN Controller (CAN)),CAN"""
popup "RPAR (RAM Parity (RAMP))"
(
menuitem "RPAR0"        "per , ""RPAR (RAM Parity (RAMP)),RPAR0"""
menuitem "RPAR1"        "per , ""RPAR (RAM Parity (RAMP)),RPAR1"""
)
menuitem "DNFC"             "per , ""DNFC (Digital Noise Filter (DNF)),DNFC"""
menuitem "ADA"              "per , ""ADA (12-bit Analog to Digital Converter(ADC)),ADA"""
menuitem "ADB"              "per , ""ADB (12-bit Analog to Digital Converter(ADC)),ADB"""
menuitem "ADC"              "per , ""ADC (12-bit Analog to Digital Converter(ADC)),ADC"""
menuitem "PMD2"             "per , ""PMD2 (Advanced Progammable Motor Control Circuit (A-PMD)),PMD2"""
)
if (cpuis("TMPM4M*")||cpuis("TMPM4KN*")||cpuis("TMPM4KP*")||cpuis("TMPM4KQ*"))
(
popup "EN (Advanced Encoder Input (A-ENC32))"
(
menuitem "EN0"          "per , ""EN (Advanced Encoder Input (A-ENC32)),EN0"""
menuitem "EN1"          "per , ""EN (Advanced Encoder Input (A-ENC32)),EN1"""
menuitem "EN2"          "per , ""EN (Advanced Encoder Input (A-ENC32)),EN2"""
)
)
if (cpuis("TMPM4L2*")||cpuis("TMPM4L2*"))
(
menuitem "GP"               "per , ""GP (General Purpose Register),GP"""
)
)
)