; -------------------------------------------------------------------------------- ; @Title: iMX28 Specific Menu ; @Props: Released ; @Author: HUB, SLA, SOL ; @Changelog: 2012-02-21 ; @Manufacturer: NXP ; @Core: ARM926EJ-S ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menmcimx28.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( menuitem "[:chip]ID Registers" "per , ""ARM Core Registers,ID Registers""" menuitem "[:chip]MMU Control and Configuration" "per , ""ARM Core Registers,MMU Control and Configuration""" menuitem "[:chip]Cache Control and Configuration" "per , ""ARM Core Registers,Cache Control and Configuration""" menuitem "[:chip]TCM Control and Configuration" "per , ""ARM Core Registers,TCM Control and Configuration""" menuitem "[:chip]Test and Debug" "per , ""ARM Core Registers,Test and Debug""" menuitem "[:chip]ICEbreaker" "per , ""ARM Core Registers,ICEbreaker""" separator menuitem "ICOLL" "per , ""ICOLL (Interrupt Collector)""" menuitem "APBHDMA" "per , ""APBHDMA (AHB-to-APBH Bridge with DMA)""" menuitem "APBXDMA" "per , ""APBXDMA (AHB-to-APBX Bridge with DMA)""" menuitem "GPIO" "per , ""GPIO (Pin Control and GPIO)""" menuitem "CLKCTL" "per , ""CLKCTL (Clock Controller)""" menuitem "Power Supply" "per , ""Power Supply""" menuitem "DCP" "per , ""DCP (Data Co-Processor)""" menuitem "EMI" "per , ""EMI (External Memory Interface)""" menuitem "GPMI" "per , ""GPMI (General-Purpose Media Interface)""" menuitem "BCH" "per , ""BCH (20-Bit Correcting ECC Accelerator)""" menuitem "SSP" "per , ""SSP (Synchronous Serial Ports)""" menuitem "DIGCTL" "per , ""DIGCTL (Digital Control and On-Chip RAM)""" menuitem "OCOTP" "per , ""OCOTP (On-Chip OTP Controller)""" menuitem "PERFMON" "per , ""PERFMON (Performance Monitor)""" menuitem "RTC" "per , ""RTC (Real Time Clock)""" menuitem "TIMROT" "per , ""TIMROT (Timers and Rotary Decoder)""" menuitem "DUART" "per , ""DUART (Debug Universal Asynchronous Receiver and Transmitter)""" if (cpu()!="iMX283") ( menuitem "FlexCAN" "per , ""FlexCAN (Controller Area Network)""" ) menuitem "ENET" "per , ""ENET (Ethernet Controller)""" menuitem "I2C" "per , ""I2C (Inter-Intergrated Circuit)""" menuitem "PWM" "per , ""PWM (Pulse-Width Modulator)""" if (cpu()=="iMX287") ( menuitem "SWITCH" "per , ""SWITCH (Programmable 3-Port Ethernet Switch with QOS)""" ) menuitem "UARTAPP" "per , ""UARTAPP (Application Universal Asynchronous Receiver and Transmitter)""" menuitem "USB" "per , ""USB (USB High-Speed On-the-Go Host)""" menuitem "USBPHY" "per , ""USBPHY (USB Physical Interface)""" if (cpu()!="iMX281") ( menuitem "LCDIF" "per , ""LCDIF (LCD Interface)""" ) menuitem "PXP" "per , ""PXP (Pixel Pipeline)""" menuitem "SAIF" "per , ""SAIF (Serial Audio Interface)""" if (cpu()!="iMX283") ( menuitem "SPDIF" "per , ""SPDIF (Sony/Philips Digital Interface)""" ) menuitem "HSADC" "per , ""HSADC (High-Speed ADC)""" menuitem "LRADC" "per , ""LRADC (Low-Resolution ADC and Touch-Screen Interface)""" ) )