; -------------------------------------------------------------------------------- ; @Title: iMX25 Specific Menu ; @Props: Released ; @Author: ADI, BOB ; @Changelog: ; 2009-01-26 ; 2010-02-06 ; @Manufacturer: NXP ; @Core: ARM926EJ-S ; @Chip: IMX25 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menmcimx25.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Peripherals" ( menuitem "[:chip]ID Registers" "per , ""ARM Core Registers,ID Registers""" menuitem "[:chip]MMU Control and Configuration" "per , ""ARM Core Registers,MMU Control and Configuration""" menuitem "[:chip]Cache Control and Configuration" "per , ""ARM Core Registers,Cache Control and Configuration""" menuitem "[:chip]TCM Control and Configuration" "per , ""ARM Core Registers,TCM Control and Configuration""" menuitem "[:chip]Test and Debug" "per , ""ARM Core Registers,Test and Debug""" menuitem "[:chip]ICEbreaker" "per , ""ARM Core Registers,ICEbreaker""" ) separator popup "IOMUXC" ( menuitem "SW_MUX_CTL_PAD" "per , ""IOMUXC (IOMUX Controller),SW_MUX_CTL_PAD (Software Mux Control Registers)""" menuitem "SW_PAD_CTL" "per , ""IOMUXC (IOMUX Controller),SW_PAD_CTL (Software Pad Control Registers)""" menuitem "SW_PAD_CTL_GRP" "per , ""IOMUXC (IOMUX Controller),SW_PAD_CTL_GRP (Software Pad Group Control Registers)""" menuitem "SW_SELECT_INPUT" "per , ""IOMUXC (IOMUX Controller),SW_SELECT_INPUT Registers""" menuitem "Special Functionality" "per , ""IOMUXC (IOMUX Controller),Special Functionality""" ) menuitem "AAPE" "per , ""AAPE (ARM Abort Processing Engine)""" menuitem "ASIC" "per , ""ASIC (ARM Simple Interrupt Controller)""" menuitem "CLKCTL" "per , ""CLKCTL (Clock Control Module)""" menuitem "MAX" "per , ""MAX (Multi-Layer AHB Crossbar Switch)""" if (cpu()=="iMX251"||cpu()=="iMX255"||cpu()=="iMX258") ( menuitem "IIM" "per , ""IIM (IC Identification)""" ) popup "EMI" ( menuitem "ESDCTL" "per , ""EMI (External Memory Interface),ESDCTL (Enhanced SDRAM Controller)""" menuitem "M3IF" "per , ""EMI (External Memory Interface),M3IF (Multi-Master Memory Interface)""" menuitem "NFC" "per , ""EMI (External Memory Interface),NFC (NAND Flash Controller)""" menuitem "WEIM" "per , ""EMI (External Memory Interface),WEIM (Wireless External Interface Module)""" ) menuitem "1-Wire" "per , ""1-Wire""" if (cpu()!="iMX251") ( popup "ATA" ( menuitem "CPU Side" "per , ""ATA (Advanced Technology Attachment),CPU Side""" menuitem "SDMA port" "per , ""ATA (Advanced Technology Attachment),SDMA port""" ) ) if (cpu()!="iMX253") ( popup "FlexCAN" ( menuitem "CAN 1" "per , ""FlexCAN (Controller Area Network),CAN 1""" menuitem "CAN 2" "per , ""FlexCAN (Controller Area Network),CAN 2""" ) ) popup "CSPI" ( menuitem "CSPI 1" "per , ""CSPI (Configurable Serial Peripheral Interface),CSPI 1""" menuitem "CSPI 2" "per , ""CSPI (Configurable Serial Peripheral Interface),CSPI 2""" menuitem "CSPI 3" "per , ""CSPI (Configurable Serial Peripheral Interface),CSPI 3""" ) popup "eSDHC" ( menuitem "eSDHC 1" "per , ""eSDHC (Enhanced Secure Digital Host Controller),eSDHC 1""" menuitem "eSDHC 2" "per , ""eSDHC (Enhanced Secure Digital Host Controller),eSDHC 2""" ) popup "FEC" ( menuitem "Control/Status Registers" "per , ""FEC (Fast Ethernet Controller),Control/Status Registers""" menuitem "MIB Block Counters" "per , ""FEC (Fast Ethernet Controller),MIB Block Counters""" menuitem "MIIGSK Registers" "per , ""FEC (Fast Ethernet Controller),MIIGSK Registers""" ) popup "GPIO" ( menuitem "GPIO 1" "per , ""GPIO (General Purpose Input/Output),GPIO 1""" menuitem "GPIO 2" "per , ""GPIO (General Purpose Input/Output),GPIO 2""" menuitem "GPIO 3" "per , ""GPIO (General Purpose Input/Output),GPIO 3""" menuitem "GPIO 4" "per , ""GPIO (General Purpose Input/Output),GPIO 4""" ) popup "I2C" ( menuitem "I2C 1" "per , ""I2C (Inter IC),I2C1""" menuitem "I2C 2" "per , ""I2C (Inter IC),I2C2""" menuitem "I2C 3" "per , ""I2C (Inter IC),I2C3""" ) menuitem "KPP" "per , ""KPP (Keypad Port)""" popup "PWM" ( menuitem "PWM 1" "per , ""PWM (Pulse-Width Modulator),PWM 1""" menuitem "PWM 2" "per , ""PWM (Pulse-Width Modulator),PWM 2""" menuitem "PWM 3" "per , ""PWM (Pulse-Width Modulator),PWM 3""" menuitem "PWM 4" "per , ""PWM (Pulse-Width Modulator),PWM 4""" ) popup "SIM" ( menuitem "SIM 1" "per , ""SIM (Subscriber Identification Module),SIM 1""" menuitem "SIM 2" "per , ""SIM (Subscriber Identification Module),SIM 2""" ) popup "UART" ( menuitem "UART 1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 1""" menuitem "UART 2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 2""" menuitem "UART 3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 3""" menuitem "UART 4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 4""" menuitem "UART 5" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 5""" ) popup "USBOH" ( menuitem "Common Registers" "per , ""USBOH (Universal Serial Bus OTG HOST),Common Registers""" menuitem "OTG USB" "per , ""USBOH (Universal Serial Bus OTG HOST),OTG USB""" menuitem "Host 1" "per , ""USBOH (Universal Serial Bus OTG HOST),Host 1""" ) popup "EPIT" ( menuitem "EPIT 1" "per , ""EPIT (Enhanced Periodic Interrupt Timer),EPIT 1""" menuitem "EPIT 2" "per , ""EPIT (Enhanced Periodic Interrupt Timer),EPIT 2""" ) popup "GPT" ( menuitem "GPT 1" "per , ""GPT (General Porpose Timer),GPT 1""" menuitem "GPT 2" "per , ""GPT (General Porpose Timer),GPT 2""" menuitem "GPT 3" "per , ""GPT (General Porpose Timer),GPT 3""" menuitem "GPT 4" "per , ""GPT (General Porpose Timer),GPT 4""" ) menuitem "WDOG" "per , ""WDOG (Watchdog Timer)""" menuitem "CCM" "per , ""CCM (Clock Controller Module)""" popup "ECT" ( menuitem "ECT (IP BUS A)" "per , ""ECT (Embedded Cross Trigger),ECT (IP BUS A)""" menuitem "ECT (IP BUS B)" "per , ""ECT (Embedded Cross Trigger),ECT (IP BUS B)""" ) menuitem "SDMA" "per , ""SDMA (Smart Direct Memory Access)""" popup "SPBA" ( menuitem "Peripherial Right Register 0-15" "per , ""SPBA (Shared Peripheral Bus Arbiter),Peripheral Right Register 0-15""" menuitem "Peripherial Right Register 16-31" "per , ""SPBA (Shared Peripheral Bus Arbiter),Peripheral Right Register 16-31""" ) if (cpu()!="iMX253") ( menuitem "CSI" "per , ""CSI (CMOS Sensor Interface)""" ) menuitem "AUDMUX" "per , ""AUDMUX (Digital Audio Mux)""" if (cpu()!="iMX253") ( menuitem "ESAI" "per , ""ESAI (Enhanced Synchronous Audio Interface)""" ) if (cpu()!="iMX251") ( menuitem "LCDC" "per , ""LCDC (Liquid Crystal Display Controller)""" ) if ((cpu()!="iMX251")&&(cpu()!="iMX253")) ( menuitem "SLCDC" "per , ""SLCDC (Smart Liquid Crystal Display Controller)""" ) popup "SSI" ( menuitem "SSI1" "per , ""SSI (Synchronous Serial Interface),SSI1""" menuitem "SSI2" "per , ""SSI (Synchronous Serial Interface),SSI2""" ) if ((cpu()!="iMX251")||(cpu()!="iMX253")) ( menuitem "TSC and ADC" "per , ""TSC and ADC (Touch Screen Controller and Analog-to-Digital Converter)""" ) ) )