; -------------------------------------------------------------------------------- ; @Title: IMXRT6XX Specific Menu ; @Props: Released ; @Author: KWI, JON ; @Changelog: 2020-08-26 KWI ; 2022-01-20 JON ; @Manufacturer: NXP - NXP Semiconductors ; @Core: Cortex-M33F ; @Chip: IMXRT633, IMXRT635, IMXRT685-CM33 ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menimxrt6xx.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M33F)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)""" menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)""" menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "ADC0" "per , ""ADC""" menuitem "AHB_SECURE_CTRL" "per , ""AHB_SECURE_CTRL,AHB_SECURE_CTRL""" menuitem "CACHE64" "per , ""CACHE64""" menuitem "CACHE64_POLSEL" "per , ""CACHE64_POLSEL""" menuitem "CASPER" "per , ""CASPER,CASPER""" popup "CLKCTL" ( menuitem "CLKCTL0" "per , ""CLKCTL,CLKCTL0""" menuitem "CLKCTL1" "per , ""CLKCTL,CLKCTL1""" ) menuitem "CMP" "per , ""CMP""" menuitem "CRC_ENGINE" "per , ""CRC""" popup "CTIMER" ( menuitem "CTIMER0" "per , ""CTIMER,CTIMER0""" menuitem "CTIMER1" "per , ""CTIMER,CTIMER1""" menuitem "CTIMER2" "per , ""CTIMER,CTIMER2""" menuitem "CTIMER3" "per , ""CTIMER,CTIMER3""" menuitem "CTIMER4" "per , ""CTIMER,CTIMER4""" ) popup "DMA" ( menuitem "DMA0" "per , ""DMA,DMA0""" menuitem "DMA1" "per , ""DMA,DMA1""" ) menuitem "DMIC0" "per , ""DMIC""" popup "FLEXCOMM" ( menuitem "FLEXCOMM0" "per , ""FLEXCOMM,FLEXCOMM0""" menuitem "FLEXCOMM1" "per , ""FLEXCOMM,FLEXCOMM1""" menuitem "FLEXCOMM2" "per , ""FLEXCOMM,FLEXCOMM2""" menuitem "FLEXCOMM3" "per , ""FLEXCOMM,FLEXCOMM3""" menuitem "FLEXCOMM4" "per , ""FLEXCOMM,FLEXCOMM4""" menuitem "FLEXCOMM5" "per , ""FLEXCOMM,FLEXCOMM5""" menuitem "FLEXCOMM6" "per , ""FLEXCOMM,FLEXCOMM6""" menuitem "FLEXCOMM7" "per , ""FLEXCOMM,FLEXCOMM7""" menuitem "FLEXCOMM14" "per , ""FLEXCOMM,FLEXCOMM14""" menuitem "FLEXCOMM15" "per , ""FLEXCOMM,FLEXCOMM15""" ) menuitem "FLEXSPI" "per , ""FLEXSPI""" menuitem "FREQME" "per , ""FREQME""" popup "GPIO" ( menuitem "GPIO" "per , ""GPIO,GPIO""" menuitem "SECGPIO" "per , ""GPIO,SECGPIO""" ) menuitem "HASHCRYPT" "per , ""HASHCRYPT,HASHCRYPT""" popup "I2C" ( menuitem "I2C0" "per , ""I2C,I2C0""" menuitem "I2C1" "per , ""I2C,I2C1""" menuitem "I2C2" "per , ""I2C,I2C2""" menuitem "I2C3" "per , ""I2C,I2C3""" menuitem "I2C4" "per , ""I2C,I2C4""" menuitem "I2C5" "per , ""I2C,I2C5""" menuitem "I2C6" "per , ""I2C,I2C6""" menuitem "I2C7" "per , ""I2C,I2C7""" menuitem "I2C15" "per , ""I2C,I2C15""" ) popup "I2S" ( menuitem "I2S0" "per , ""I2S,I2S0""" menuitem "I2S1" "per , ""I2S,I2S1""" menuitem "I2S2" "per , ""I2S,I2S2""" menuitem "I2S3" "per , ""I2S,I2S3""" menuitem "I2S4" "per , ""I2S,I2S4""" menuitem "I2S5" "per , ""I2S,I2S5""" menuitem "I2S6" "per , ""I2S,I2S6""" menuitem "I2S7" "per , ""I2S,I2S7""" ) menuitem "I3C" "per , ""I3C""" menuitem "INPUTMUX" "per , ""INPUTMUX""" menuitem "IOPCTL" "per , ""IOPCTL""" menuitem "MRT0" "per , ""MRT""" popup "MU" ( menuitem "MUA" "per , ""MU,MUA""" menuitem "MUB" "per , ""MU,MUB""" ) menuitem "OCOTP" "per , ""OCOTP""" popup "OSTIMER" ( menuitem "OSTIMER0" "per , ""OSTIMER,OSTIMER0""" menuitem "OSTIMER1" "per , ""OSTIMER,OSTIMER1""" ) menuitem "OTFAD" "per , ""OTFAD""" menuitem "PINT" "per , ""PINT""" menuitem "POWERQUAD" "per , ""POWERQUAD,POWERQUAD""" menuitem "PUF" "per , ""PUF""" popup "RSTCTL" ( menuitem "RSTCTL0" "per , ""RSTCTL,RSTCTL0""" menuitem "RSTCTL1" "per , ""RSTCTL,RSTCTL1""" ) menuitem "RTC" "per , ""RTC""" menuitem "SCT0" "per , ""SCT,SCT0""" menuitem "SEMA42" "per , ""SEMA42""" popup "SPI" ( menuitem "SPI0" "per , ""SPI,SPI0""" menuitem "SPI1" "per , ""SPI,SPI1""" menuitem "SPI2" "per , ""SPI,SPI2""" menuitem "SPI3" "per , ""SPI,SPI3""" menuitem "SPI4" "per , ""SPI,SPI4""" menuitem "SPI5" "per , ""SPI,SPI5""" menuitem "SPI6" "per , ""SPI,SPI6""" menuitem "SPI7" "per , ""SPI,SPI7""" menuitem "SPI14" "per , ""SPI,SPI14""" ) popup "SYSCTL" ( menuitem "SYSCTL0" "per , ""SYSCTL,SYSCTL0""" menuitem "SYSCTL1" "per , ""SYSCTL,SYSCTL1""" ) menuitem "TRNG" "per , ""TRNG""" popup "USART" ( menuitem "USART0" "per , ""USART,USART0""" menuitem "USART1" "per , ""USART,USART1""" menuitem "USART2" "per , ""USART,USART2""" menuitem "USART3" "per , ""USART,USART3""" menuitem "USART4" "per , ""USART,USART4""" menuitem "USART5" "per , ""USART,USART5""" menuitem "USART6" "per , ""USART,USART6""" menuitem "USART7" "per , ""USART,USART7""" ) menuitem "USBHSD" "per , ""USBHSD,USBHSD""" menuitem "USBHSDCD" "per , ""USBHSDCD,USBHSDCD""" menuitem "USBHSH" "per , ""USBHSH,USBHSH""" menuitem "USBPHY" "per , ""USBPHY""" popup "USDHC" ( menuitem "USDHC0" "per , ""USDHC,USDHC0""" menuitem "USDHC1" "per , ""USDHC,USDHC1""" ) menuitem "UTICK0" "per , ""UTICK""" popup "WWDT" ( menuitem "WWDT0" "per , ""WWDT,WWDT0""" menuitem "WWDT1" "per , ""WWDT,WWDT1""" ) ) )