; --------------------------------------------------------------------------------
; @Title: IMX7ULP Specific Menu
; @Props: Released
; @Author: JMI, RSA
; @Changelog: 2019-11-28 JMI
;             2022-02-21 RSA
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-A7, Cortex-M4F
; @Chip: IMX7ULP-CA7, IMX7ULP-CM4
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menimx7ulp.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if CORENAME()=="CORTEXM4F"
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
else if CORENAME()=="CORTEXA7MPCORE"
(
popup "[:chip]Core Registers (Cortex-A7MPCore)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-A7MPCore),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-A7MPCore),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit"            "per , ""Core Registers (Cortex-A7MPCore),Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions"         "per , ""Core Registers (Cortex-A7MPCore),Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-A7MPCore),Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-A7MPCore),System Performance Monitor"""
menuitem "[:chip]System Timer Register"             "per , ""Core Registers (Cortex-A7MPCore),System Timer Register"""
separator
menuitem "[:chip]Debug Registers"                   "per , ""Core Registers (Cortex-A7MPCore),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"              "per , ""Core Registers (Cortex-A7MPCore),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"      "per , ""Core Registers (Cortex-A7MPCore),Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller"              "per , ""Core Registers (Cortex-A7MPCore),Interrupt Controller"""
)
)
separator
menuitem "FB"                                   "per , ""FB"""
popup "USB (Universal Serial Bus)"
(
menuitem "USB0"                             "per , ""USB (Universal Serial Bus),USB0"""
menuitem "USB1"                             "per , ""USB (Universal Serial Bus),USB1"""
)
popup "USBNC (Universal Serial Bus)"
(
menuitem "USBNC0"                           "per , ""USBNC (Universal Serial Bus),USBNC0"""
menuitem "USBNC1"                           "per , ""USBNC (Universal Serial Bus),USBNC1"""
)
menuitem "USBPHY"                               "per , ""USBPHY (USBPHY Register Reference Index)"""
menuitem "DCD"                                  "per , ""DCD (USBDCD),DCD"""
popup "USDHC (Ultra Secured Digital Host Controller)"
(
menuitem "USDHC0"                           "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC0"""
menuitem "USDHC1"                           "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC1"""
)
popup "TRGMUX"
(
menuitem "TRGMUX1"                          "per , ""TRGMUX,TRGMUX1"""
menuitem "TRGMUX0"                          "per , ""TRGMUX,TRGMUX0"""
)
popup "SCG"
(
menuitem "SCG1"                             "per , ""SCG,SCG1"""
menuitem "SCG0"                             "per , ""SCG,SCG0"""
)
popup "PCC"
(
menuitem "PCC2"                             "per , ""PCC,PCC2"""
menuitem "PCC3"                             "per , ""PCC,PCC3"""
menuitem "PCC0"                             "per , ""PCC,PCC0"""
menuitem "PCC1"                             "per , ""PCC,PCC1"""
)
menuitem "PMC1"                                 "per , ""PMC1 (PMC)"""
menuitem "VIU"                                  "per , ""VIU"""
menuitem "MIPI_DSI_HOST0"                       "per , ""MIPI_DSI_HOST (MIPI DSI HOST)"""
menuitem "MIPI_DSI_HOST_DPI_INTFC0"             "per , ""MIPI_DSI_HOST_DPI_INTFC (MIPI DSI HOST DPI INTFC)"""
menuitem "MIPI_DSI_HOST_APB_PKT_IF0"            "per , ""MIPI_DSI_HOST_APB_PKT_IF (MIPI DSI HOST APB PKT IF)"""
menuitem "MIPI_DSI_HOST_FSL_IP1_DPHY_INTFC0"    "per , ""MIPI_DSI_HOST_FSL_IP1_DPHY_INTFC (MIPI DSI HOST FSL IP1 DPHY INTFC)"""
menuitem "LCDIF0"                               "per , ""LCDIF (LCD Interface)"""
menuitem "MMDC0"                                "per , ""MMDC"""
menuitem "IOMUXC1"                              "per , ""IOMUXC1 (IOMUXC1 Register Index)"""
menuitem "IOMUXC1_DDR"                          "per , ""IOMUXC1_DDR (IOMUXC1_DDR Register Index)"""
popup "PORT"
(
menuitem "PORTD"                            "per , ""PORT,PORTD"""
menuitem "PORTE"                            "per , ""PORT,PORTE"""
menuitem "PORTA"                            "per , ""PORT,PORTA"""
menuitem "PORTB"                            "per , ""PORT,PORTB"""
menuitem "PORTC"                            "per , ""PORT,PORTC"""
menuitem "PORTF"                            "per , ""PORT,PORTF"""
)
popup "DMA"
(
menuitem "DMA0"                             "per , ""DMA,DMA0"""
menuitem "DMA1"                             "per , ""DMA,DMA1"""
)
popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
(
menuitem "GPIOA"                            "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
menuitem "GPIOC"                            "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
menuitem "GPIOD"                            "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOD"""
menuitem "GPIOE"                            "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOE"""
menuitem "GPIOF"                            "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOF"""
menuitem "GPIOB"                            "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
)
menuitem "XRDC"                                 "per , ""XRDC"""
popup "SEMA42"
(
menuitem "SEMA42_0"                         "per , ""SEMA42 (sema42_ips),SEMA42_0"""
menuitem "SEMA42_1"                         "per , ""SEMA42 (sema42_ips),SEMA42_1"""
)
popup "DMA_CH_MUX"
(
menuitem "DMA_CH_MUX0"                      "per , ""DMA_CH_MUX,DMA_CH_MUX0"""
menuitem "DMA_CH_MUX1"                      "per , ""DMA_CH_MUX,DMA_CH_MUX1"""
)
menuitem "LLWU"                                 "per , ""LLWU"""
if (cpuis("IMX7ULP-CM4"))
(
menuitem "MUA"                              "per , ""MU (MUA),MUA"""
)
popup "WDOG (Watchdog Timer Unit)"
(
menuitem "WDOG0"                            "per , ""WDOG (Watchdog Timer Unit),WDOG0"""
menuitem "WDOG1"                            "per , ""WDOG (Watchdog Timer Unit),WDOG1"""
menuitem "WDOG2"                            "per , ""WDOG (Watchdog Timer Unit),WDOG2"""
)
menuitem "CRC0"                                 "per , ""CRC"""
menuitem "LTC0"                                 "per , ""LTC"""
menuitem "TRNG0"                                "per , ""TRNG (TRNG0)"""
popup "LPIT"
(
menuitem "LPIT0"                            "per , ""LPIT,LPIT0"""
menuitem "LPIT1"                            "per , ""LPIT,LPIT1"""
)
popup "LPTIMER (LPTMR)"
(
menuitem "LPTMR0"                           "per , ""LPTIMER (LPTMR),LPTMR0"""
menuitem "LPTMR1"                           "per , ""LPTIMER (LPTMR),LPTMR1"""
)
popup "TPM"
(
menuitem "TPM0"                             "per , ""TPM,TPM0"""
menuitem "TPM4"                             "per , ""TPM,TPM4"""
menuitem "TPM5"                             "per , ""TPM,TPM5"""
menuitem "TPM6"                             "per , ""TPM,TPM6"""
menuitem "TPM7"                             "per , ""TPM,TPM7"""
menuitem "TPM1"                             "per , ""TPM,TPM1"""
menuitem "TPM2"                             "per , ""TPM,TPM2"""
menuitem "TPM3"                             "per , ""TPM,TPM3"""
)
popup "FLEXIO"
(
menuitem "FLEXIO0"                          "per , ""FLEXIO,FLEXIO0"""
menuitem "FLEXIO1"                          "per , ""FLEXIO,FLEXIO1"""
)
popup "LPI2C"
(
menuitem "LPI2C0"                           "per , ""LPI2C,LPI2C0"""
menuitem "LPI2C4"                           "per , ""LPI2C,LPI2C4"""
menuitem "LPI2C5"                           "per , ""LPI2C,LPI2C5"""
menuitem "LPI2C6"                           "per , ""LPI2C,LPI2C6"""
menuitem "LPI2C7"                           "per , ""LPI2C,LPI2C7"""
menuitem "LPI2C1"                           "per , ""LPI2C,LPI2C1"""
menuitem "LPI2C2"                           "per , ""LPI2C,LPI2C2"""
menuitem "LPI2C3"                           "per , ""LPI2C,LPI2C3"""
)
popup "I2S (Inter-Integrated Sound Bus Controller)"
(
menuitem "I2S0"                             "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S0"""
menuitem "I2S1"                             "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S1"""
)
popup "LPSPI"
(
menuitem "LPSPI0"                           "per , ""LPSPI,LPSPI0"""
menuitem "LPSPI2"                           "per , ""LPSPI,LPSPI2"""
menuitem "LPSPI3"                           "per , ""LPSPI,LPSPI3"""
menuitem "LPSPI1"                           "per , ""LPSPI,LPSPI1"""
)
popup "LPUART"
(
menuitem "LPUART0"                          "per , ""LPUART,LPUART0"""
menuitem "LPUART4"                          "per , ""LPUART,LPUART4"""
menuitem "LPUART5"                          "per , ""LPUART,LPUART5"""
menuitem "LPUART6"                          "per , ""LPUART,LPUART6"""
menuitem "LPUART7"                          "per , ""LPUART,LPUART7"""
menuitem "LPUART1"                          "per , ""LPUART,LPUART1"""
menuitem "LPUART2"                          "per , ""LPUART,LPUART2"""
menuitem "LPUART3"                          "per , ""LPUART,LPUART3"""
)
menuitem "IOMUXC0"                              "per , ""IOMUXC0 (IOMUXC1 Register Index)"""
popup "ADC"
(
menuitem "ADC0"                             "per , ""ADC,ADC0"""
menuitem "ADC1"                             "per , ""ADC,ADC1"""
)
popup "CMP"
(
menuitem "CMP0"                             "per , ""CMP,CMP0"""
menuitem "CMP1"                             "per , ""CMP,CMP1"""
)
popup "DAC"
(
menuitem "DAC0"                             "per , ""DAC,DAC0"""
menuitem "DAC1"                             "per , ""DAC,DAC1"""
)
menuitem "SNVS"                                 "per , ""SVNS (Secure Non-Volatile Storage)"""
popup "ROMC"
(
menuitem "ROMC0"                            "per , ""ROMC,ROMC0"""
menuitem "ROMC1"                            "per , ""ROMC,ROMC1"""
)
menuitem "EWM"                                  "per , ""EWM"""
menuitem "PMC0"                                 "per , ""PMC0 (PMC)"""
menuitem "SIM"                                  "per , ""SIM (SIM Memory Map)"""
menuitem "TSTMRA"                               "per , ""TSTMRA"""
menuitem "TSTMRB"                               "per , ""TSTMRB"""
popup "MSMC (SMC)"
(
menuitem "MSMC0"                            "per , ""MSMC (SMC),MSMC0"""
menuitem "MSMC1"                            "per , ""MSMC (SMC),MSMC1"""
)
menuitem "QUADSPI0"                             "per , ""QUADSPI (QuadSPI)"""
menuitem "OTFAD"                                "per , ""OTFAD"""
menuitem "OCOTP_CTRL"                           "per , ""OCOTP_CTRL (OCOTP)"""
if (cpuis("IMX7ULP-CM4"))
(
menuitem "MCM"                              "per , ""MCM (Core Platform Miscellaneous Control Module),MCM"""
menuitem "MMCAU"                            "per , ""MMCAU (CAU),MMCAU"""
menuitem "LMEM"                             "per , ""LMEM (LMEM64),LMEM"""
)
popup "FGPIO (GPIO)"
(
menuitem "FGPIOA"                           "per , ""FGPIO (GPIO),FGPIOA"""
menuitem "FGPIOB"                           "per , ""FGPIO (GPIO),FGPIOB"""
)
if (cpuis("IMX7ULP-CA7"))
(
menuitem "MUB"                              "per , ""MUB (Messaging Unit Processor B-side),MUB"""
)
)
)