; -------------------------------------------------------------------------------- ; @Title: Freescale QorIQ LS1043A RDB eMMC FLASH Programming Template ; @Description: ; eMMC FLASH is connected to eSDHC ; ; The RCW_SRC field (SDHC_BASE, 371 bits) should be 0y0 , ; The RCW_SRC field (SDHC_EXT, 363-365 bits) also be 0y000 ; This script uses SYStem.Option.HRCWOVerRide to set a custom RCW for the flash ; programming phase. This should allow access to the SoC even if the flash is ; empty/corrupted and the RCW/PBL is not valid. The RCW is a template and is not ; guaranteed to work on every board. ; ; Internal SRAM : 0x1000_1000 ; eSDHC base : 0x156_0000 ; ; @Author: jjeong ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; @Chip: LS1043A ; @Keywords: Flash eMMC ; -------------------------------------------------------------------------------- ; $Id: ls1043-emmc-rcwovr.cmm 11733 2023-01-16 08:55:12Z bschroefel $ LOCAL &arg1 ENTRY &arg1 &arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY" &MMC_BASE=0x1560000 RESet SYStem.RESet SYStem.CPU LS1043A SYStem.Option HRCWOVerRide OFF SYStem.Option TRST OFF SYStem.Option EnReset ON CORE.ASSIGN 1. ; select only master core Trace.DISable SYStem.JtagClock CTCK 10MHz ; ; temporarily override the RCW. The RCW is fetched while the boot phase and defines initial ; pinmux/serdes/qspi/nor/nand/... configurations. ; The RCW override requires to reset the SoC. Two methods are supported. ; Method 1: EnReset OFF && HRCWOVerRide ON /PORESET - do not assert the nReset line, issue a JTAG based PORESET ; Method 2: EnReset ON && HRCWOVerRide ON - assert the nReset line ; Steps - Override RCW_SRC only ; * set EnReset & HRCWOVerRide - Method 1/2 ; * switch to SYStem.Mode Prepare ; * write the RCW_SRC value to EDBG:0x42000040 ; * switch to SYStem.Up ; Steps - Override RCW completely ; * set EnReset & HRCWOVerRide - Method 1/2 ; * switch to SYStem.Mode Prepare ; * write the RCW_SRC value HARDCODED to EDBG:0x42000040 ; * write the RCW itself to EDBG:0x42000000 onwards ; * ensure in RCW[6]/EDBG:0x42000018 the PBL_SRC is reserved e.g. 0xfb8????? ; * switch to SYStem.Up ; The following RCW is used to connect to the device even with a empty flash. ; The pinmux is configured to map the eMMC pins. SYStem.Option EnReset OFF SYStem.Option HRCWOVerRide ON /PORESET SYStem.Mode.Prepare ; override RCW_SRC = Hardcoded Data.Set EDBG:0x42000040 %Long 0x9e ; override the RCW itself - values as in uboot mainline LS1043A QDS SD+QSPI Data.Set EDBG:0x42000000 %Long 0x08100010 Data.Set EDBG:0x42000004 %Long 0x0A000000 Data.Set EDBG:0x42000008 %Long 0x00000000 Data.Set EDBG:0x4200000c %Long 0x00000000 Data.Set EDBG:0x42000010 %Long 0x14550002 Data.Set EDBG:0x42000014 %Long 0x80004012 ;Data.Set EDBG:0x42000018 %Long 0x60040000 ; PBL=SD/MMC, IFC=0x04 Data.Set EDBG:0x42000018 %Long 0xFB804000 ; PBL_SRC=reserved, IFC=0x04 Data.Set EDBG:0x4200001C %Long 0xc1002000 Data.Set EDBG:0x42000020 %Long 0x00000000 Data.Set EDBG:0x42000024 %Long 0x00000000 Data.Set EDBG:0x42000028 %Long 0x00000000 Data.Set EDBG:0x4200002C %Long 0x00038800 Data.Set EDBG:0x42000030 %Long 0x20124000 Data.Set EDBG:0x42000034 %Long 0x00001100 Data.Set EDBG:0x42000038 %Long 0x00000096 Data.Set EDBG:0x4200003C %Long 0x00000001 ; SYStem.Up Register.Set M 0x5 ;EL1h MAP.BE &MMC_BASE++0xFFFF ; -------------------------------------------------------------------------------- ; Config SDHC ; -------------------------------------------------------------------------------- Data.Set A:&MMC_BASE+0x04 %BE %Long 0x00010200 ; blk size,cnt Data.Set A:&MMC_BASE+0x28 %BE %Long 0x08800020 ; bus width, endian Data.Set A:&MMC_BASE+0x2C %BE %Long 0x008E8088 ; 400KHz clk Data.Set A:&MMC_BASE+0x34 %BE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable Data.Set A:&MMC_BASE+0x38 %BE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable Data.Set A:&MMC_BASE+0x44 %BE %Long 0x00100010 ;read/write fifo threshold level 64bytes GOSUB READ_ID_TEST LOCAL &pdd &pdd=OS.PresentDemoDirectory() Break.RESet FLASHFILE.RESet ;FLASHFILE.CONFIG <0x0> <0x0> FLASHFILE.CONFIG &MMC_BASE 0x0 0x0 ; FLASHFILE.TARGET FLASHFILE.TARGET 0x10001000++0x2FFF 0x10005000++0x3FFF &pdd/flash/byte/emmc_ls10xx.bin /KEEP /STACKSIZE 0x200 Data.Set A:&MMC_BASE+0x2C %BE %Long 0x008E8088 ; 400KHz clk FLASHFILE.GETID Data.Set A:0x1560000+0x2C %BE %Long 0x008E0228 ; increase mmc clk FLASHFILE.GETEXTCSD //End of the test prepareonly IF "&arg1"=="PREPAREONLY" ENDDO ;FLASHFILE.SETEXTCSD 179. 0x8 ;access partition block 0 ;FLASHFILE.SETEXTCSD 179. 0x9 ;access partition block 1 ;FLASHFILE.SETEXTCSD 179. 0xA ;access partition block 2 FLASHFILE.DUMP 0x0 ; Read Flash ;FLASHFILE.ERASE 0x0--0xFFFFF ; Erase Flash ;FLASHFILE.LOAD * 0x0 ; Write Flash ENDDO READ_ID_TEST: ( //CMD0 RePeaT 2. ( Data.Set A:&MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status Data.Set A:&MMC_BASE+0x8 %Long 0x0 ;arg Data.Set A:&MMC_BASE+0xc %Long 0x0 ;cmd WAIT 100.ms ) //CMD1 RePeaT 10. ( Data.Set A:&MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status Data.Set A:&MMC_BASE+0x8 %Long 0x40FF8000 ;arg Data.Set A:&MMC_BASE+0xc %Long 0x01020000 ;cmd1 WAIT 100.ms &resp=Data.Long(A:(&MMC_BASE+0x10)) ;print "CMD1 resp: 0x" &resp IF (&resp&0x80000000)==0x80000000 ( GOTO jump_cmd2 ) ) PRINT "CMD1 fail" END jump_cmd2: //CMD2 Data.Set A:&MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status Data.Set A:&MMC_BASE+0x8 %Long 0x0 ;arg Data.Set A:&MMC_BASE+0xc %Long 0x02010000 ;cmd2 WAIT 10.ms //CMD3 Data.Set A:&MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status Data.Set A:&MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.) Data.Set A:&MMC_BASE+0xc %Long 0x03020000 ;cmd3 WAIT 10.ms //CMD10 Data.Set A:&MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status Data.Set A:&MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.) Data.Set A:&MMC_BASE+0xc %Long 0x0A010000 ;cmd10 WAIT 10.ms //Response2 PRINT "CID register" PRINT "[127:104] 0x" Data.Long(A:(&MMC_BASE+0x1c)) PRINT "[103:72] 0x" Data.Long(A:(&MMC_BASE+0x18)) PRINT "[71:40] 0x" Data.Long(A:(&MMC_BASE+0x14)) PRINT "[39:8] 0x" Data.Long(A:(&MMC_BASE+0x10)) RETURN )