; --------------------------------------------------------------------------------
; @Title:  IMX8MQ(ARM, Cortex-A53) on IMX8MQ-EVK Board QSPI FLASH Program script
; @Description:
; The N25Q256 is on the QSPIA_SS0_B
;
; SRAM: 0x900000
; QuadSPI(controller) Base: 0x30BB0000
; FLASH APB BASE ADDRESS: 0x08000000
;
; @Keywords: Flash SPI QuadSPI
; @Author: jjeong
; @Board: IMX8MQ-EVK
; @Chip: IMX8MQ*
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: imx8m-qspi.cmm 12049 2023-04-20 12:32:16Z bschroefel $

LOCAL &arg1
ENTRY &arg1
&arg1=STRing.UPpeR("&arg1")  // for example "PREPAREONLY"

&QSPI_BASE=0x30BB0000
&QSPI_AMBA_BASE=0x08000000  

RESet
SYStem.RESet
SYStem.CPU IMX8MQ
SYStem.JtagClock CTCK 10MHz
SYStem.Option ResBreak OFF
SYStem.Option WaitIDCODE 1.5s
Trace.DISable
CORE.ASSIGN 1.
SYStem.Up

// CCM_TARGET_ROOTn : Address: 3038_0000h base + 8000h offset + (128d x i), where i=0d to 124d
// i=87. QSPI_CLK_ROOT
Data.Set A:0x303842F8 %LE %Long 0x3  ;CCM_CCGR47_CLEAR, clock gating register CCM_CCGR47
Data.Set A:(0x30388000+0x2B80) %LE %Long 0x11000002 ;  (SYSTEM_PLL1_DIV2)/2 = 40Mhz
Data.Set A:0x303842F4 %LE %Long 0x3  ;CCM_CCGR47_SET, clock gating register CCM_CCGR47

Data.Set AMD:0x303300F4 %LE %Long 0x1   ; IOMUXC_SW_MUX_CTL_PAD_NAND_ALE, ALT1_QSPI_A_SCLK 
Data.Set AMD:0x303300F8 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_CE0_B), ALT1_QSPI_A_SS0_B
Data.Set AMD:0x303300FC %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_CE1_B), ALT1_QSPI_A_SS1_B
Data.Set AMD:0x30330100 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_CE2_B), ALT1_QSPI_B_SS0_B
Data.Set AMD:0x30330104 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_CE3_B), ALT1_QSPI_B_SS1_B
Data.Set AMD:0x30330108 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_CLE), ALT1_QSPI_B_SCLK
Data.Set AMD:0x3033010C %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_DATA00), ALT1_QSPI_A_DATA0
Data.Set AMD:0x30330110 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_DATA01), ALT1_QSPI_A_DATA1
Data.Set AMD:0x30330114 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_DATA02), ALT1_QSPI_A_DATA2
Data.Set AMD:0x30330118 %LE %Long 0x1   ; (IOMUXC_SW_MUX_CTL_PAD_NAND_DATA03), ALT1_QSPI_A_DATA3

//qspi controller
Data.Set A:(&QSPI_BASE)       %Long 0x0F400C
Data.Set A:(&QSPI_BASE+0x30)  %Long 0x0
Data.Set A:(&QSPI_BASE+0x180) %Long (&QSPI_AMBA_BASE+0x04000000) ; Serial Flash A1 Top Address(QuadSPIx_SFA1AD)
Data.Set A:(&QSPI_BASE+0x184) %Long (&QSPI_AMBA_BASE+0x08000000) ; Serial Flash A2 Top Address(QuadSPIx_SFA2AD)
Data.Set A:(&QSPI_BASE+0x188) %Long (&QSPI_AMBA_BASE+0x0C000000) ; Serial Flash B1Top Address (QuadSPIx_SFB1AD)
Data.Set A:(&QSPI_BASE+0x18C) %Long (&QSPI_AMBA_BASE+0x10000000) ; Serial Flash B2Top Address (QuadSPIx_SFB2AD)

Data.Set A:(&QSPI_BASE+0x10) %Long 0x0E
Data.Set A:(&QSPI_BASE+0x14) %Long 0x0E
Data.Set A:(&QSPI_BASE+0x18) %Long 0x0E

Data.Set A:(&QSPI_BASE+0x1C)  %Long  0x80002000      ;QuadSPI_BUF3CR
Data.Set A:(&QSPI_BASE+0x100) %Long &QSPI_AMBA_BASE  ;QuadSPI_SFAR
Data.Set A:(&QSPI_BASE+0x160) %Long 0xFFFFFFFF       ;clear the Flag Register

//QSPI AHB(A:0x08000000) read configuration
//3byte read at &QSPI_AMBA_BASE
D.S A:(&QSPI_BASE+0x310) %Long (0x08180400|0x3)  ;default
D.S A:(&QSPI_BASE+0x314) %Long 0x24001C08
D.S A:(&QSPI_BASE+0x318) %Long 0x0               ;STOP

//4byte read for spansion flash memory
;D.S A:(&QSPI_BASE+0x310) %Long (0x08200400|0x13)  ;ADDR(32bits) 0 & CMD(0x13)
;D.S A:(&QSPI_BASE+0x314) %Long  0x24001C08        ;JMP_ON_CS(inst 0)& READ(8bytes)
;D.S A:(&QSPI_BASE+0x318) %Long 0x0                ;STOP

Data.Set A:(&QSPI_BASE)       %Long 0x0F000C

//FLASH READ ID TEST
GOSUB READ_ID_TEST

LOCAL &pdd
&pdd=OS.PresentDemoDirectory()

Break.RESet

FLASH.RESet
FLASH.Create   &QSPI_AMBA_BASE++0x01ffffff    0x10000   TARGET   Byte
FLASH.TARGET   0x900000   0x902000   0x1000  &pdd/flash/byte/snor_imx8.bin 

FLASH.List

DIALOG.YESNO "Program flash memory?"
LOCAL &progflash
ENTRY &progflash
IF &progflash
( 
  FLASH.ReProgram.ALL
  Data.LOAD.auto *
  ;Data.LOAD.Binary * 0x08000000
  FLASH.ReProgram.off
)

ENDDO


READ_ID_TEST:

&cmd=0x9F; read ID JEDEC Manufacture ID and JEDEC CFI

&temp=Data.Long(A:&QSPI_BASE)
Data.Set A:&QSPI_BASE %Long (&temp|0x0c00)   //clear Tx/Rx buffer

Data.Set A:(&QSPI_BASE+0x300) %LE %Long 0x5AF05AF0  ;  LUTKEY
Data.Set A:(&QSPI_BASE+0x304) %LE %Long 0x2  ;  LCKCR

//0. read id
Data.Set A:(&QSPI_BASE+0x360) %LE %Long (0x1c040400)|&cmd   ; LUT0, SEQID0
Data.Set A:(&QSPI_BASE+0x364) %LE %Long 0x0
Data.Set A:(&QSPI_BASE+0x368) %LE %Long 0x0
Data.Set A:(&QSPI_BASE+0x36C) %LE %Long 0x0

Data.Set A:(&QSPI_BASE+0x100) %Long  &QSPI_AMBA_BASE  ; SFAR , FLASH BASE ADDRESS

// assert Read id command
Data.Set A:(&QSPI_BASE+0x008) %Long  (0x5<<24.) ;    (5.<<24.)
WAIT 100.ms

&temp=Data.Long(A:&QSPI_BASE)
Data.Set A:&QSPI_BASE %Long (&temp|0x0800)   //clear Tx buffer

PRINT "1st 0x" Data.Long(A:(&QSPI_BASE+0x200))&0xFF        " (Manufacturer)"
PRINT "2nd 0x" (Data.Long(A:(&QSPI_BASE+0x200))>>8.)&0xFF " (Device ID)"
PRINT "3rd 0x" (Data.Long(A:(&QSPI_BASE+0x200))>>16.)&0xFF 
PRINT "4th 0x" (Data.Long(A:(&QSPI_BASE+0x200))>>24.)&0xFF 

RETURN