; --------------------------------------------------------------------------------
; @Title: Cyclone V SoCrates Board Quad SPI FLASH Program script
; @Description:
;   The EPCQ256 (Altera Quad SPI flash) is on the HPSQSPI0_SS0
;
;   SRAM: 0x0FFF1000
;   QuadSPI(controller) Base: 0xFF705000
;
; @Author: jjeong
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; @Chip: cyclone*
; @Keywords: EPCQ256 altera Flash SPI QuadSPI
; --------------------------------------------------------------------------------
; $Id: cyclone5_socrates-spi64.cmm 11733 2023-01-16 08:55:12Z bschroefel $
;
LOCAL &arg1
ENTRY &arg1
&arg1=STRing.UPpeR("&arg1")  // for example "PREPAREONLY"


;Please check BSEL[2:0] value if it is 0x6 or 0x7
;The boot select field specifies the boot source. It is read by the Boot ROM code on a cold or warm reset to determine the boot source. 
;The HPS BSEL pins value are sampled upon deassertion of cold reset.
;Value Description
;0x0 Reserved
;0x1 FPGA (HPS2FPGA Bridge)
;0x2 NAND Flash (1.8v)
;0x3 NAND Flash (3.0v)
;0x4 SD/MMC External Transceiver (1.8v)
;0x5 SD/MMC Internal Transceiver (3.0v)
;0x6 QSPI Flash (1.8v)
;0x7 QSPI Flash (3.0v)

&QSPI_BASE=0xFF705000

RESet
SYStem.CPU CYCLONEVSOC
CORE.ASSIGN 1                             ; "1" = first core, "2" = second core, "1 2" = both cores (SMP)

SYStem.CONFIG.DAPIRPOST 0.
SYStem.CONFIG.DAPIRPRE 10.
SYStem.CONFIG.DAPDRPOST 0.
SYStem.CONFIG.DAPDRPRE 1.

SYStem.Up

Data.Set C15:0x1 %Long  (Data.Long(C15:0x1)&~(0x1005))  ; disable interrupt and mmu

PRINT "BSEL[2:0] 0x" (Data.Long(A:0xFFD08014)&0x7)

Data.Set A:0xFFD05014 %LE %Long (0x3<<6.)       ;reset watchdog module & disable
Data.Set A:&QSPI_BASE %LE %Long 0x80583807   ; Enable Qspi: bit[0] and qspi clock configure bit[22:19]

//FLASH READ ID TEST
AREA.CLEAR
AREA.view
GOSUB READ_ID_TEST
DIALOG.YESNO "the flash id is correct on AREA window?"
ENTRY &result
IF !&result
(
  PRINT "pls, check your register configuration to enable your flash controller"
  ENDDO
)

//S(D)RAM TEST for algorithm file
GOSUB SDRAM_INIT
Data.Test 0xFFFF0000++0x3FFF  /Prime ;s(d)ram test
IF FOUND()
( 
  PRINT "s(d)ram is NOT initialized around 0x" ADDRESS.OFFSET(TRACK.ADDRESS())
  ENDDO
)

FLASHFILE.RESet
FLASHFILE.CONFIG A:&QSPI_BASE 0x0 0x0
FLASHFILE.TARGET AZSD:0xFFFF0000++0x1FFF  AZSD:0xFFFF2000++0x1FFF  ~~/demo/arm/flash/byte/spi4b64_cyclone5qspi.bin  /KEEP

FLASHFILE.GETID

//End of the test prepareonly
IF "&arg1"=="PREPAREONLY"
  ENDDO

FLASHFILE.UNLOCK 0x0--0xFFFFFF

FLASHFILE.DUMP 0x0

//Erase Serial FLASH  
;FLASHFILE.ERASE 0x0--0xFFFFF

//Write
;FLASHFILE.LOAD   * 0x0
;FLASHFILE.LOAD   * 0x0  /ComPare   ;verify

ENDDO

READ_ID_TEST:

  &cmd=0x9F; read ID JEDEC Manufacture ID and JEDEC CFI

  &temp=(&cmd<<24.)      ; cmd
  &temp=&temp|(1<<23.)   ; enable read
  &temp=&temp|(3.<<20.)  ; read length

  Data.Set A:(&QSPI_BASE+0x90) %Long (&temp|0x1)  ; execute command

  PRINT "1st 0x" Data.Long(A:(&QSPI_BASE+0xA0))&0xFF        " (Manufacturer)"
  PRINT "2nd 0x" (Data.Long(A:(&QSPI_BASE+0xA0))>>8.)&0xFF " (Device ID)"
  PRINT "3rd 0x" (Data.Long(A:(&QSPI_BASE+0xA0))>>16.)&0xFF 
  PRINT "4th 0x" (Data.Long(A:(&QSPI_BASE+0xA0))>>24.)&0xFF 

  RETURN


SDRAM_INIT:

  RETURN