; --------------------------------------------------------------------------------
; @Title: ARM CoreSight Module: Secure Debug Channel (sdc600_apbcom_ext)
; @Props: Released
; @Author: PEG
; @Changelog: 2023-04-19
; @Manufacturer: ARM
; @Doc: coresight_sdc_600_technical_reference_manual_101130_0002_02_en.pdf
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: persdc.per 16011 2023-04-20 16:40:33Z pegold $

entry &sdcbase=ad:0x0
sif (&sdcbase==ad:0x0&&COMPonent.AVAILABLE("SDC")==FALSE())
textline "  Error: No valid SDC base address specified!"
textline "         Either specify a SDC base address including the access class as a parameter"
textline "         or configure a SDC module for this chip."
textline ""
textline "  Syntax: 'PER ~~/persdc.per <access_class>:<address>' or"
textline "          'SYStem.CONFIG SDC.Base <access_class>:<address>'"
else
sif (&sdcbase==ad:0x0&&COMPonent.AVAILABLE("SDC")==TRUE())
base e:component.base("SDC",-1)
config 16. 8.
width 7.
group 0xd00--0xd03 "SDC-600 APBCOM Module"
line.long 0x0 "VIDR,Version ID Register"
bitfld.long 0x0 4.--7. "PROTVERSION ,APBCOM protocol version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. "  PMVERSION ,APBCOM programmers model version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group 0xd08--0xd0b
line.long 0x0 "FIDTXR, Feature ID TxEngine Register"
bitfld.long 0x0 16.--19. "TXFD ,TxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
bitfld.long 0x0 10. "  TXSZ32 ,TxEngine 32-bit write support" "no,yes"
bitfld.long 0x0 9. "  TXSZ16 ,TxEngine 16-bit write support" "no,yes"
bitfld.long 0x0 8. "  TXSZ8 ,TxEngine 8-bit write support" "no,yes"
bitfld.long 0x0 4.--7. "  TXW ,TxEngine width" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes"
bitfld.long 0x0 1. "  TXINT ,TxEngine interrupts implemented" "no,yes"
bitfld.long 0x0 0. "  TXI ,TxEngine implemented" "no,yes"
group 0xd0c--0xd0f
line.long 0x0 "FIDRXR,ID RxEngine Register"
bitfld.long 0x0 16.--19. "RXFD ,RxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
bitfld.long 0x0 10. "  RXSZ32 ,RxEngine 32-bit write support" "no,yes"
bitfld.long 0x0 9. "  RXSZ16 ,RxEngine 16-bit write support" "no,yes"
bitfld.long 0x0 8. "  RXSZ8 ,RxEngine 8-bit write support" "no,yes"
bitfld.long 0x0 1. "                RXINT ,RxEngine interrupts implemented" "no,yes"
bitfld.long 0x0 0. "  RXI ,RxEngine implemented" "no,yes"
group 0xd10--0xd13
line.long 0x0 "ICSR,Interrupt Control Status Register"
bitfld.long 0x0 31. "RXFIS ,RxEngine FIFO interrupt status" "no,yes"
bitfld.long 0x0 16.--19. "  RXFIL ,RxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 15. "  TXFIS ,TxEngine FIFO interrupt status" "no,yes"
bitfld.long 0x0 0.--3. "  TXFIL ,TxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup 0xd20--0xd23
hide.long 0x0 "DR,Data Register"
in
hgroup 0xd30--0xd33
hide.long 0x0 "DBR,Data Blocking Register"
in
group 0xd3c--0xd3f
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 31. "PEN ,COM port component enabled status" "no,yes"
bitfld.long 0x0 30. "  RXLE ,RxEngine link error detected" "no,yes"
hexmask.long.byte 0x0 16.--23. 1. "  RXF ,RxEngine FIFO fill level"
bitfld.long 0x0 15. "  TRINPROG ,Transfer in progress" "no,yes"
bitfld.long 0x0 14. "  TXLE ,TxEngine link error detected" "no,yes"
bitfld.long 0x0 13. "  TXOE ,TxEngine FIFO overflow" "no,yes"
bitfld.long 0x0 12. "  RRDIS ,Remote reboot requests disabled" "enabled,disabled"
hexmask.long.byte 0x0 0.--7. 1. "  TXS ,TxEngine FIFO space"
width 11.
tree "CoreSight Management Registers"
group 0xefc--0xeff
line.long 0x0 "ITSTATUS,Integration Mode Status Register"
bitfld.long 0x0 0. "DPABORT ,Rising Edge on DP_ABORT Detected" "no,yes"
group 0xf00--0xf03
line.long 0x0 "ITCTRL,Integration Mode Control Register"
bitfld.long 0x0 0. "IME ,Integration Mode Enabled" "no,yes"
group 0xfa0--0xfa3
line.long 0x0 "CLAIMSET,Claim Tag Set"
eventfld.long 0x0 7. "SETCTV7 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 6. "  SETCTV6 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 5. "  SETCTV5 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 4. "  SETCTV4 ,Set Claim Tag Value" "-,Available (Set)"
textline "                    "
eventfld.long 0x0 3. "SETCTV3 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 2. "  SETCTV2 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 1. "  SETCTV1 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 0. "  SETCTV0 ,Set Claim Tag Value" "-,Available (Set)"
group 0xfa4--0xfa7
line.long 0x0 "CLAIMCLR,Claim Tag Clear"
eventfld.long 0x0 7. "CLRCTV7 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 6. "  CLRCTV6 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 5. "  CLRCTV5 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 4. "  CLRCTV4 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
textline "                    "
eventfld.long 0x0 3. "CLRCTV3 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 2. "  CLRCTV2 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 1. "  CLRCTV1 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 0. "  CLRCTV0 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
group 0xfa8--0xfab
line.long 0x0 "DEVAFF0,Device Affinity Register 0"
group 0xfac--0xfaf
line.long 0x0 "DEVAFF1,Device Affinity Register 1"
group 0xfb0--0xfb3
line.long 0x0 "LAR,Lock Access Register"
hexmask.long.long 0x0 0.--31. 1. "AC ,Access Code"
group 0xfb4--0xfbb
line.long 0x0 "LSR,Lock Status Register"
bitfld.long 0x0 2. "ILR ,Implemented Lock Register" "32-bit,8-bit"
bitfld.long 0x0 1. "  LS ,Lock Status" "Locked,Granted"
bitfld.long 0x0 0. "  LCM ,Lock Control Mechanism Exists" "Not implemented,Implemented"
group 0xfb8--0xfbb
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
bitfld.long 0x0 3. "NIDV ,Value of Noninvasive Debug Enable Signals" "Low,High"
bitfld.long 0x0 2. "  NIDC ,Noninvasive Debug Controlled" "Low,High"
bitfld.long 0x0 1. "  IDV ,Value of Invasive Debug Enable Signals" "Low,High"
bitfld.long 0x0 0. "  IDC ,Invasive Debug Controlled" "Low,High"
group 0xfbc--0xfbf
line.long 0x0 "DEVARCH,Device Architecture Register"
group 0xfc8--0xfcb
line.long 0x0 "DEVID,Device Configuration Register"
bitfld.long 0x0 6.--6. "CP ,COM port functionality present" "no,yes"
bitfld.long 0x0 5.--5. "  PRR ,Powerup request functionality included" "no,yes"
bitfld.long 0x0 4.--4. "  SYSMEM ,System memory present on bus to ROM table" "no,yes"
bitfld.long 0x0 0.--3. "  FORMAT ,ROM format" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group 0xfc4--0xfc7
line.long 0x0 "DEVID1,Device Configuration Register 1"
group 0xfc0--0xfc3
line.long 0x0 "DEVID2,Device Configuration Register 2"
group 0xfcc--0xfcf
line.long 0x0 "DEVTYPE,Device Type Identification Register"
group 0xfe0--0xfe3
line.long 0x0 "PIDR0,Peripheral Identification Register 0"
hexmask.long.byte 0x0 0.--7. 1. "PartNumber[7:0] ,Part Number[7:0]"
group 0xfe4--0xfe7
line.long 0x0 "PIDR1,Peripheral Identification Register 1"
bitfld.long 0x0 4.--7. "JEP106ID[3:0] ,JEP106 Identity Code [3:0]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0x0 0.--3. "  PartNumber[11:8] ,Part Number [11:8]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group 0xfe8--0xfeb
line.long 0x0 "PIDR2,Peripheral Identification Register 2"
bitfld.long 0x0 4.--7. "REVISION ,Revision Number of Peripherial" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 3. "  JEP106USED ,Indicating a JEP106 Value Used" "Not used,Used"
bitfld.long 0x0 0.--2. "  JEP106ID[6:4] ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
group 0xfec--0xfef
line.long 0x0 "PIDR3,Peripheral Identification Register 3"
bitfld.long 0x0 4.--7. "REVAND ,Manufacturer Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. "  CMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group 0xfd0--0xfd3
line.long 0x0 "PIDR4,Peripheral Identification Register 4"
bitfld.long 0x0 4.--7. "4KBCOUNT ,Number of 4KB Block Used" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
bitfld.long 0x0 0.--3. "  JEP106CC ,JEP Continuation Code" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group 0xfd4--0xfd7
line.long 0x0 "PIDR5,Peripheral ID5 Register (Reserved for Future)"
group 0xfd8--0xfdb
line.long 0x0 "PIDR6,Peripheral ID6 Register (Reserved for Future)"
group 0xfdc--0xfdf
line.long 0x0 "PIDR7,Peripheral ID7 Register (Reserved for Future)"
group 0xff0--0xff3
line.long 0x0 "CIDR0,Component Identification Register 0"
hexmask.long.byte 0x0 0.--7. 1. "COMPID0 ,Preamble"
group 0xff4--0xff7
line.long 0x0 "CIDR1,Component Identification Register 1"
bitfld.long 0x0 4.--7.  "CLASS ,Component class" "Verification,ROM Table,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CoreSight Component,Reserved,Peripheral Test,Reserved,Reserved,Generic IP,No Standardized"
hexmask.long.byte 0x0 0.--3. 1. "  COMPID1 ,Preamble"
group 0xff8--0xffb
line.long 0x0 "CIDR2,Component Identification Register 2"
hexmask.long.byte 0x0 0.--7. 1. "COMPID2 ,Preamble"
group 0xffc--0xfff
line.long 0x0 "CIDR3,Component Identification Register 3"
hexmask.long.byte 0x0 0.--7. 1. "COMPID3 ,Preamble"
tree.end
textline ""
else
base &sdcbase
config 16. 8.
width 7.
group 0xd00--0xd03 "SDC-600 APBCOM Module"
line.long 0x0 "VIDR,Version ID Register"
bitfld.long 0x0 4.--7. "PROTVERSION ,APBCOM protocol version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. "  PMVERSION ,APBCOM programmers model version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group 0xd08--0xd0b
line.long 0x0 "FIDTXR, Feature ID TxEngine Register"
bitfld.long 0x0 16.--19. "TXFD ,TxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
bitfld.long 0x0 10. "  TXSZ32 ,TxEngine 32-bit write support" "no,yes"
bitfld.long 0x0 9. "  TXSZ16 ,TxEngine 16-bit write support" "no,yes"
bitfld.long 0x0 8. "  TXSZ8 ,TxEngine 8-bit write support" "no,yes"
bitfld.long 0x0 4.--7. "  TXW ,TxEngine width" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes"
bitfld.long 0x0 1. "  TXINT ,TxEngine interrupts implemented" "no,yes"
bitfld.long 0x0 0. "  TXI ,TxEngine implemented" "no,yes"
group 0xd0c--0xd0f
line.long 0x0 "FIDRXR,ID RxEngine Register"
bitfld.long 0x0 16.--19. "RXFD ,RxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
bitfld.long 0x0 10. "  RXSZ32 ,RxEngine 32-bit write support" "no,yes"
bitfld.long 0x0 9. "  RXSZ16 ,RxEngine 16-bit write support" "no,yes"
bitfld.long 0x0 8. "  RXSZ8 ,RxEngine 8-bit write support" "no,yes"
bitfld.long 0x0 1. "                RXINT ,RxEngine interrupts implemented" "no,yes"
bitfld.long 0x0 0. "  RXI ,RxEngine implemented" "no,yes"
group 0xd10--0xd13
line.long 0x0 "ICSR,Interrupt Control Status Register"
bitfld.long 0x0 31. "RXFIS ,RxEngine FIFO interrupt status" "no,yes"
bitfld.long 0x0 16.--19. "  RXFIL ,RxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 15. "  TXFIS ,TxEngine FIFO interrupt status" "no,yes"
bitfld.long 0x0 0.--3. "  TXFIL ,TxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup 0xd20--0xd23
hide.long 0x0 "DR,Data Register"
in
hgroup 0xd30--0xd33
hide.long 0x0 "DBR,Data Blocking Register"
in
group 0xd3c--0xd3f
line.long 0x0 "SR,Status Register"
bitfld.long 0x0 31. "PEN ,COM port component enabled status" "no,yes"
bitfld.long 0x0 30. "  RXLE ,RxEngine link error detected" "no,yes"
hexmask.long.byte 0x0 16.--23. 1. "  RXF ,RxEngine FIFO fill level"
bitfld.long 0x0 15. "  TRINPROG ,Transfer in progress" "no,yes"
bitfld.long 0x0 14. "  TXLE ,TxEngine link error detected" "no,yes"
bitfld.long 0x0 13. "  TXOE ,TxEngine FIFO overflow" "no,yes"
bitfld.long 0x0 12. "  RRDIS ,Remote reboot requests disabled" "enabled,disabled"
hexmask.long.byte 0x0 0.--7. 1. "  TXS ,TxEngine FIFO space"
width 11.
tree "CoreSight Management Registers"
group 0xefc--0xeff
line.long 0x0 "ITSTATUS,Integration Mode Status Register"
bitfld.long 0x0 0. "DPABORT ,Rising Edge on DP_ABORT Detected" "no,yes"
group 0xf00--0xf03
line.long 0x0 "ITCTRL,Integration Mode Control Register"
bitfld.long 0x0 0. "IME ,Integration Mode Enabled" "no,yes"
group 0xfa0--0xfa3
line.long 0x0 "CLAIMSET,Claim Tag Set"
eventfld.long 0x0 7. "SETCTV7 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 6. "  SETCTV6 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 5. "  SETCTV5 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 4. "  SETCTV4 ,Set Claim Tag Value" "-,Available (Set)"
textline "                    "
eventfld.long 0x0 3. "SETCTV3 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 2. "  SETCTV2 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 1. "  SETCTV1 ,Set Claim Tag Value" "-,Available (Set)"
eventfld.long 0x0 0. "  SETCTV0 ,Set Claim Tag Value" "-,Available (Set)"
group 0xfa4--0xfa7
line.long 0x0 "CLAIMCLR,Claim Tag Clear"
eventfld.long 0x0 7. "CLRCTV7 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 6. "  CLRCTV6 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 5. "  CLRCTV5 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 4. "  CLRCTV4 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
textline "                    "
eventfld.long 0x0 3. "CLRCTV3 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 2. "  CLRCTV2 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 1. "  CLRCTV1 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
eventfld.long 0x0 0. "  CLRCTV0 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
group 0xfa8--0xfab
line.long 0x0 "DEVAFF0,Device Affinity Register 0"
group 0xfac--0xfaf
line.long 0x0 "DEVAFF1,Device Affinity Register 1"
group 0xfb0--0xfb3
line.long 0x0 "LAR,Lock Access Register"
hexmask.long.long 0x0 0.--31. 1. "AC ,Access Code"
group 0xfb4--0xfbb
line.long 0x0 "LSR,Lock Status Register"
bitfld.long 0x0 2. "ILR ,Implemented Lock Register" "32-bit,8-bit"
bitfld.long 0x0 1. "  LS ,Lock Status" "Locked,Granted"
bitfld.long 0x0 0. "  LCM ,Lock Control Mechanism Exists" "Not implemented,Implemented"
group 0xfb8--0xfbb
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
bitfld.long 0x0 3. "NIDV ,Value of Noninvasive Debug Enable Signals" "Low,High"
bitfld.long 0x0 2. "  NIDC ,Noninvasive Debug Controlled" "Low,High"
bitfld.long 0x0 1. "  IDV ,Value of Invasive Debug Enable Signals" "Low,High"
bitfld.long 0x0 0. "  IDC ,Invasive Debug Controlled" "Low,High"
group 0xfbc--0xfbf
line.long 0x0 "DEVARCH,Device Architecture Register"
group 0xfc8--0xfcb
line.long 0x0 "DEVID,Device Configuration Register"
bitfld.long 0x0 6.--6. "CP ,COM port functionality present" "no,yes"
bitfld.long 0x0 5.--5. "  PRR ,Powerup request functionality included" "no,yes"
bitfld.long 0x0 4.--4. "  SYSMEM ,System memory present on bus to ROM table" "no,yes"
bitfld.long 0x0 0.--3. "  FORMAT ,ROM format" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group 0xfc4--0xfc7
line.long 0x0 "DEVID1,Device Configuration Register 1"
group 0xfc0--0xfc3
line.long 0x0 "DEVID2,Device Configuration Register 2"
group 0xfcc--0xfcf
line.long 0x0 "DEVTYPE,Device Type Identification Register"
group 0xfe0--0xfe3
line.long 0x0 "PIDR0,Peripheral Identification Register 0"
hexmask.long.byte 0x0 0.--7. 1. "PartNumber[7:0] ,Part Number[7:0]"
group 0xfe4--0xfe7
line.long 0x0 "PIDR1,Peripheral Identification Register 1"
bitfld.long 0x0 4.--7. "JEP106ID[3:0] ,JEP106 Identity Code [3:0]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
bitfld.long 0x0 0.--3. "  PartNumber[11:8] ,Part Number [11:8]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group 0xfe8--0xfeb
line.long 0x0 "PIDR2,Peripheral Identification Register 2"
bitfld.long 0x0 4.--7. "REVISION ,Revision Number of Peripherial" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 3. "  JEP106USED ,Indicating a JEP106 Value Used" "Not used,Used"
bitfld.long 0x0 0.--2. "  JEP106ID[6:4] ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
group 0xfec--0xfef
line.long 0x0 "PIDR3,Peripheral Identification Register 3"
bitfld.long 0x0 4.--7. "REVAND ,Manufacturer Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. "  CMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group 0xfd0--0xfd3
line.long 0x0 "PIDR4,Peripheral Identification Register 4"
bitfld.long 0x0 4.--7. "4KBCOUNT ,Number of 4KB Block Used" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
bitfld.long 0x0 0.--3. "  JEP106CC ,JEP Continuation Code" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
group 0xfd4--0xfd7
line.long 0x0 "PIDR5,Peripheral ID5 Register (Reserved for Future)"
group 0xfd8--0xfdb
line.long 0x0 "PIDR6,Peripheral ID6 Register (Reserved for Future)"
group 0xfdc--0xfdf
line.long 0x0 "PIDR7,Peripheral ID7 Register (Reserved for Future)"
group 0xff0--0xff3
line.long 0x0 "CIDR0,Component Identification Register 0"
hexmask.long.byte 0x0 0.--7. 1. "COMPID0 ,Preamble"
group 0xff4--0xff7
line.long 0x0 "CIDR1,Component Identification Register 1"
bitfld.long 0x0 4.--7.  "CLASS ,Component class" "Verification,ROM Table,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CoreSight Component,Reserved,Peripheral Test,Reserved,Reserved,Generic IP,No Standardized"
hexmask.long.byte 0x0 0.--3. 1. "  COMPID1 ,Preamble"
group 0xff8--0xffb
line.long 0x0 "CIDR2,Component Identification Register 2"
hexmask.long.byte 0x0 0.--7. 1. "COMPID2 ,Preamble"
group 0xffc--0xfff
line.long 0x0 "CIDR3,Component Identification Register 3"
hexmask.long.byte 0x0 0.--7. 1. "COMPID3 ,Preamble"
tree.end
textline ""
endif
endif
textline " "