; -------------------------------------------------------------------------------- ; @Title: PXA250 (Cotulla) and PXA210 (Sabinal) with XScale-Core On chip peripherals ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chip: ; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perpxa.per 15970 2023-04-14 10:04:42Z bschroefel $ config 16. 8. width 8. ;begin include file xscale/cp15.ph ;parameters: ; -------------------------------------------------------------------------------- ; 80200, 80321, IXP2400, IXP2800, PXA210, PXA250, PXA800F ; not impl.: IXP425, IXP2850, IXC1100, Bulverde tree "CP15" ; State: ok ; -------------------------------------------------------------------------------- ; -------------------------------------------------------------------------------- ; Intel 80200 ; -------------------------------------------------------------------------------- if (d.l(c15:0x0)&0xffffe3f0)==0x69052000 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80200,80200" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,C-0,D-0,res,res,res,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel 80321 or IOP321 (Verde) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80321 (400MHz),80321 (600MHz)" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,B-0,B-1,res,res,res,res,res,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel 80331 or IOP331 (Dobson) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054090 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80331,80331" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel 80332 or IOP332 *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054010 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80332,80332" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1/A-2,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel PXA210 (Sabinal), PXA250 (Cotulla) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA250,PXA210" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,B-2,C-0,res,res,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel PXA27x (Bulverde) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA27x,PXA27x" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,C-0,res,res,C-5,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel IXP2400 (Sausolito), IXP2800 (Castine) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 12.--15. "CoreGen ,Core Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x0 4.--7. "ProdNum ,Product Number" "res,res,res,res,res,res,res,res,res,IXP2400,IXP2800,res,res,res,res,res" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" ; -------------------------------------------------------------------------------- ; *** Intel PXA800F (Manitoba) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA800F,PXA800F" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** Intel IXP4xx, IXC1100 *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x690541f0 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "IXP4xx/IXC1100,IXP4xx/IXC1100" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69052000 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..." textline " " bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number" hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69054000 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..." textline " " bitfld.long 0x0 12.--12. "CoreGen ,Core Generation" "XScale,XScale" bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long 0x0 4.--7. 1. "ProdNum ,Product Number" hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision" ; -------------------------------------------------------------------------------- ; *** any else *** ; -------------------------------------------------------------------------------- else group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" ; 0x41 = ARM, 0x44 = Digital, 0x69 = Intel hexmask.long 0x0 24.--31. 1. "Implementor ,Implementation Trademark" hexmask.long 0x0 20.--23. 1. " Variant ,Implementation defined variant number" textline " " hexmask.long 0x0 16.--19. 1. "Architecture ,Architecture Version Code" hexmask.long 0x0 13.--15. 1. " Primary part number ,Core Generation" textline " " hexmask.long 0x0 0.--3. 1. "Revision ,Product Revision" endif ; -------------------------------------------------------------------------------- group c15:0x100--0x100 line.long 0x0 "CTYPE,Cache Type Register (read only)" bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes" textline " " bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k" bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16" textline " " bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k" bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16" group c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 13. "V ,Exception Vector Relocation" "0x00000000,0xffff0000" bitfld.long 0x0 12. " I ,Instruction Cache" "disable,enable" bitfld.long 0x0 11. " Z ,Branch Target Buffer" "disable,enable" bitfld.long 0x0 9. " R ,ROM Protection" "off,on" bitfld.long 0x0 8. " S ,System Protection" "off,on" textline " " bitfld.long 0x0 7. "B ,Endianism" "little,big" bitfld.long 0x0 2. " C ,Data Cache" "disable,enable" bitfld.long 0x0 1. " A ,Alignment Fault" "disable,enable" bitfld.long 0x0 0. " M ,Memory Management Unit" "disable,enable" group c15:0x101--0x101 line.long 0x0 "AuxCR,Auxiliary Control Register" bitfld.long 0x0 4.--5. "MD ,Mini Data Cache Attributes" "write back - read allocate,write back - read/write allocate,write through - read allocate,unpredictable" bitfld.long 0x0 1. " P ,Page Table Memory Attribute" "0,1" bitfld.long 0x0 0. " K ,Write Buffer Coalescing Disable" "enable,disable" group c15:0x2--0x2 line.long 0x0 "TTB,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address" group c15:0x3--0x3 line.long 0x0 "DAC,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager" textline " " bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager" textline " " bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager" textline " " bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager" group c15:0x5--0x5 line.long 0x0 "FSR,Fault Status Register" bitfld.long 0x0 10. "X ,Status Field Extension" "0,1" bitfld.long 0x0 9. " D ,Debug event" "no,yes" bitfld.long 0x0 4.--7. " Domain ,Domain for Data Abort" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " Status ,Status X=0/X=1" "reserved/IMMU Exception,alignment/reserved,reserved,alignment/reserved,reserved/lock abort,transl_sect/reserved,reserved/external,transl_page,reserved/cache parity,domain_sect/reserved,reserved,domain_page,trans_lev_1/reserved,permission_sect/reserved,trans_lev_2/reserved,permission_page" group c15:0x6--0x6 line.long 0x0 "FAR,Fault Address Registerr" group c15:0x29--0x29 line.long 0x0 "DCLR, Data Cache Lock Register" bitfld.long 0x0 0. "L ,Data Cache Lock Register" "no locking,fill with lock" group c15:0xd--0xd line.long 0x0 "PID,Process Identifier" hexmask.long 0x0 25.--31. 0x2000000 "PID ,Process Identifier" group c15:0x8e--0x8e line.long 0x0 "IBCR0,Inctruction Breakpoint Register 0" hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA" bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable" group c15:0x9e--0x9e line.long 0x0 "IBCR1,Inctruction Breakpoint Register 1" hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA" bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable" group c15:0x0e--0x0e line.long 0x0 "DBR0,Data Breakpoint Register 0" group c15:0x3e--0x3e line.long 0x0 "DBR1,Data Breakpoint Register 1" group c15:0x4e--0x4e line.long 0x0 "DBCON,Data Breakpoint Configuration Register" bitfld.long 0x0 8. "M ,DBR1 Mode" "Data Breakpoint Address,Data Address Mask" bitfld.long 0x0 2.--3. " E1 ,DBR1 Breakpoint Enable" "disable,enable store,enable load/store,enable load" bitfld.long 0x0 0.--1. " E0 ,DBR0 Enable" "disable,enable store,enable load/store,enable load" ; -------------------------------------------------------------------------------- ; *** Intel 80200 *** ; -------------------------------------------------------------------------------- if (d.l(c15:0x0)&0xffffe3f0)==0x69052000 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel 80321 (IOP321) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel PXA210, PXA250 (Sabinal, Cotulla) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel PXA27x (Bulverde) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 1. "CP1 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel (Manitoba) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel IXP2400, IXP2800 (Sausolito, Castine) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffff41a0)==0x69052120 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; *** includes XScale IXP425, because no product ID is available now *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69054000 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69052000 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** any else *** ; -------------------------------------------------------------------------------- else group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- endif tree.end ;end include file xscale/cp15.ph ;begin include file xscale/cp14.ph ;parameters: ; -------------------------------------------------------------------------------- ; 80200, PXA210, PXA250 ; not impl.: 80321, IXP425, IXP2400, IXP2800, Bulverde, Manitoba tree "CP14" ; State: preliminary ; -------------------------------------------------------------------------------- group c14:0x00--0x03 "Performance Monitoring" line.long 4*0x00 "PMNC, Performance Monitor control Register" bitfld.long 4*0x00 20.--27. "EvtCnt1 ,Source of Events that PMN1 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..." bitfld.long 4*0x00 12.--19. " EvtCnt0 ,Source of Events that PMN0 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..." textline " " bitfld.long 4*0x00 10. "CCNT-OV ,Clock Counter Overflow Flag" "no,yes" bitfld.long 4*0x00 9. " PMN1-OV ,Performace Counter 1 Overflow Flag" "no,yes" bitfld.long 4*0x00 8. " PMN0-OV ,Performace Counter 0 Overflow Flag" "no,yes" textline " " bitfld.long 4*0x00 6. "CCNT-IE ,Clock Counter Interrupt" "disable,enable" bitfld.long 4*0x00 5. " PMN1-IE ,Performace Counter 1 Interrupt" "disable,enable" bitfld.long 4*0x00 4. " PMN0-IE ,Performace Counter 0 Interrupt" "disable,enable" textline " " bitfld.long 4*0x00 3. "D ,Clock Count Divider" "1,64" bitfld.long 4*0x00 2. " C ,Clock Counter Reset" "no action,reset to 0" bitfld.long 4*0x00 1. " P ,Performace Counter Reset (both)" "no action,reset to 0" bitfld.long 4*0x00 0. " E ,Enable all 3 Counters" "disable,enable" line.long 4*0x01 "CCNT, 32-bit clock counter" line.long 4*0x02 "PMN0, 32-bit event counter" line.long 4*0x03 "PMN1, 32-bit event counter" ; -------------------------------------------------------------------------------- ; *** Intel 80200 *** ; -------------------------------------------------------------------------------- if (d.l(c15:0x0)&0xffffe3f0)==0x69052000 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" bitfld.long 4*0x00 0.--3. "CCLKCFG ,Core Clock Configuration" "res,3,4,5,6,7,8,9,res,res,res,res,res,res,res,res" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,IDLE,res,SLEEP" ; -------------------------------------------------------------------------------- ; *** Intel 80321 or IOP321 (Verde) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** Intel PXA210, PXA250 (Sabinal, Cotulla) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" bitfld.long 4*0x00 1.--1. "FCS ,Frequency Change Sequence" "do not enter,enter" bitfld.long 4*0x00 0.--0. " TURBO ,Turbo Mode" "exit,enter" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "Run/Turbo,Idle,res,Sleep/Deep Sleep" ; -------------------------------------------------------------------------------- ; *** Intel (Bulverde) *** ; -------------------------------------------------------------------------------- ; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!) elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** Intel IXP2400, IXP2800 (Sausolito, Castine) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** Intel (Manitoba) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69052000 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; *** includes XScale IXP425 *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69054000 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** any other XScale *** ; -------------------------------------------------------------------------------- else group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" endif group c14:0x08--0x0d "Software Debug" line.long 4*0x02 "DCSR,Debug Control and Status Register" bitfld.long 4*0x02 31. "GE ,Global Enable" "disable,enable" bitfld.long 4*0x02 30. " H ,Halt Mode" "Monitor Mode,Halt Mode" textline " " bitfld.long 4*0x02 23. "TF ,Trap FIQ" "disable,enable" bitfld.long 4*0x02 22. " TI ,Trap IRQ" "disable,enable" bitfld.long 4*0x02 20. " TD ,Trap Data Abort" "disable,enable" textline " " bitfld.long 4*0x02 19. "TA ,Trap Prefetch Abort" "disable,enable" bitfld.long 4*0x02 18. " TS ,Trap Software Interrupt" "disable,enable" bitfld.long 4*0x02 17. " TU ,Trap Undefined Instruction" "disable,enable" bitfld.long 4*0x02 16. " TR ,Trap Reset" "disable,enable" textline " " bitfld.long 4*0x02 5. "SA ,Sticky Abort" "no,yes" bitfld.long 4*0x02 2.--4. " MOE ,Method of Entry" "Reset,Inst Bkpt, Data Bkpt, BKPT Inst, Ext Debug Event, Vector Trap, Trace Buffer full, reserved" bitfld.long 4*0x02 1. " M ,Trace Buffer Mode" "wrap around,fill-once" bitfld.long 4*0x02 0. " E ,Trace Buffer Enable" "no,yes" line.long 4*0x04 "CHKPT0,Checkpoint 0 Register" line.long 4*0x05 "CHKPT1,Checkpoint 1 Register" tree.end ;end include file xscale/cp14.ph ;begin include file xscale/cotulla-dma.ph ;parameters: 250 ; -------------------------------------------------------------------------------- ; PXA210, PXA250, PXA255,PXA26x ; State: ok ; -------------------------------------------------------------------------------- tree "DMA Controller" ; -------------------------------------------------------------------------------- group asd:0x40000000--0x4000003f "DMA Control/Status Register" line.long 0x00 "DCSR0,DCSR Channel 0" bitfld.long 0x00 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x00 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x00 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x00 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x00 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x00 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x00 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x00 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x04 "DCSR1,DCSR Channel 1" bitfld.long 0x04 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x04 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x04 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x04 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x04 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x04 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x04 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x04 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x08 "DCSR2,DCSR Channel 2" bitfld.long 0x08 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x08 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x08 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x08 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x08 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x08 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x08 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x08 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x0c "DCSR3,DCSR Channel 3" bitfld.long 0x0c 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x0c 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x0c 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x0c 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x0c 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x0c 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x0c 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x0c 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x10 "DCSR4,DCSR Channel 4" bitfld.long 0x10 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x10 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x10 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x10 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x10 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x10 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x10 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x10 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x14 "DCSR5,DCSR Channel 5" bitfld.long 0x14 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x14 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x14 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x14 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x14 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x14 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x14 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x14 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x18 "DCSR6,DCSR Channel 6" bitfld.long 0x18 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x18 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x18 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x18 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x18 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x18 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x18 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x18 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x1c "DCSR7,DCSR Channel 7" bitfld.long 0x1c 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x1c 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x1c 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x1c 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x1c 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x1c 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x1c 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x1c 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x20 "DCSR8,DCSR Channel 8" bitfld.long 0x20 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x20 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x20 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x20 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x20 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x20 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x20 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x20 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x24 "DCSR9,DCSR Channel 9" bitfld.long 0x24 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x24 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x24 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x24 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x24 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x24 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x24 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x24 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x28 "DCSR10,DCSR Channel 10" bitfld.long 0x28 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x28 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x28 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x28 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x28 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x28 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x28 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x28 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x2c "DCSR11,DCSR Channel 11" bitfld.long 0x2c 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x2c 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x2c 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x2c 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x2c 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x2c 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x2c 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x2c 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x30 "DCSR12,DCSR Channel 12" bitfld.long 0x30 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x30 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x30 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x30 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x30 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x30 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x30 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x30 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x34 "DCSR13,DCSR Channel 13" bitfld.long 0x34 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x34 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x34 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x34 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x34 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x34 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x34 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x34 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x38 "DCSR14,DCSR Channel 14" bitfld.long 0x38 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x38 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x38 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x38 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x38 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x38 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x38 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x38 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" line.long 0x3c "DCSR15,DCSR Channel 15" bitfld.long 0x3c 31.--31. " RUN ,Run Bit" "stop,start " bitfld.long 0x3c 30.--30. " NODESCFETCH ,Descriptor Fetch Mode" "yes,no" bitfld.long 0x3c 29.--29. " STOPIRQEN ,Stop Interrupt Enable" "dis,ena" bitfld.long 0x3c 8.--8. " REQPEND ,Request Pending" "no,yes" textline " " bitfld.long 0x3c 3.--3. "STOPSTATE ,Stop State" "running,stopped" bitfld.long 0x3c 2.--2. " ENDINTR ,End Interrupt" "no,yes" bitfld.long 0x3c 1.--1. " STARTINTR ,Start Interrupt" "no,yes" bitfld.long 0x3c 0.--0. " BUSERRINTR ,Bus Error Interrupt" "no,yes" textline " " group asd:0x400000f0++0x03 line.long 0x0 "DINT,DMA Interrupt Register" bitfld.long 0x00 15.--15. " CHLINTR15 ,Channel 15 Interrupt" "no,yes" bitfld.long 0x00 14.--14. " CHLINTR14 ,Channel 14 Interrupt" "no,yes" bitfld.long 0x00 13.--13. " CHLINTR13 ,Channel 13 Interrupt" "no,yes" bitfld.long 0x00 12.--12. " CHLINTR12 ,Channel 12 Interrupt" "no,yes" textline " " bitfld.long 0x00 11.--11. "CHLINTR11 ,Channel 11 Interrupt" "no,yes" bitfld.long 0x00 10.--10. " CHLINTR10 ,Channel 10 Interrupt" "no,yes" bitfld.long 0x00 9.--9. " CHLINTR9 ,Channel 9 Interrupt" "no,yes" bitfld.long 0x00 8.--8. " CHLINTR8 ,Channel 8 Interrupt" "no,yes" textline " " bitfld.long 0x00 7.--7. "CHLINTR7 ,Channel 7 Interrupt" "no,yes" bitfld.long 0x00 6.--6. " CHLINTR6 ,Channel 6 Interrupt" "no,yes" bitfld.long 0x00 5.--5. " CHLINTR5 ,Channel 5 Interrupt" "no,yes" bitfld.long 0x00 4.--4. " CHLINTR4 ,Channel 4 Interrupt" "no,yes" textline " " bitfld.long 0x00 3.--3. "CHLINTR3 ,Channel 3 Interrupt" "no,yes" bitfld.long 0x00 2.--2. " CHLINTR2 ,Channel 2 Interrupt" "no,yes" bitfld.long 0x00 1.--1. " CHLINTR1 ,Channel 1 Interrupt" "no,yes" bitfld.long 0x00 0.--0. " CHLINTR0 ,Channel 0 Interrupt" "no,yes" group asd:0x40000100++0x07 "DREQ, DMA Request to Channel Map Register" line.long 0x00 "DRCMR0,DRCMR for DREQ0" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR1,DRCMR for DREQ1" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x40000108++0x07 "I2S, DMA Request to Channel Map Register" line.long 0x00 "DRCMR2,DRCMR for I2S receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR3,DRCMR for I2S transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x40000110++0x07 "BTUART, DMA Request to Channel Map Register" line.long 0x00 "DRCMR4,DRCMR for BTUART receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR5,DRCMR for BTUART transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x40000118++0x07 "FFUART, DMA Request to Channel Map Register" line.long 0x00 "DRCMR6,DRCMR for FFUART receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR7,DRCMR for FFUART transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x40000120++0x13 "AC97, DMA Request to Channel Map Register" line.long 0x00 "DRCMR8,DRCMR for AC97 microphone Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR9,DRCMR for AC97 modem receive Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DRCMR10,DRCMR for AC97 modem transmit Request" bitfld.long 0x08 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x08 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0c "DRCMR11,DRCMR for AC97 audio receive Request" bitfld.long 0x0c 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x0c 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DRCMR12,DRCMR for AC97 audio transmit Request" bitfld.long 0x10 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x10 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x40000134++0x07 "SSP, DMA Request to Channel Map Register" line.long 0x00 "DRCMR13,DRCMR for SSP receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR14,DRCMR for SSP transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; DRCMR15 is reserved ; DRCMR16 is reserved ; ----- Chip pxa26x -------------------------------------------------------------- if "250"=="26x" group asd:0x4000013c++0x07 "NSSP, DMA Request to Channel Map Register" line.long 0x00 "DRCMR15,DRCMR for NSSP receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR16,DRCMR for NSSP transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group asd:0x40000144++0x07 "SSP, DMA Request to Channel Map Register" line.long 0x00 "DRCMR17,DRCMR for ICP receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR18,DRCMR for ICP transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x4000014c++0x07 "STUART, DMA Request to Channel Map Register" line.long 0x00 "DRCMR19,DRCMR for STUART receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR20,DRCMR for STUART transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:0x40000154++0x07 "MMC, DMA Request to Channel Map Register" line.long 0x00 "DRCMR21,DRCMR for MMC receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR22,DRCMR for MMC transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; DRCMR23 is reserved ; DRCMR24 is reserved ; ----- Chip pxa26x -------------------------------------------------------------- if "250"=="26x" group asd:0x4000015c++0x07 "MMC, DMA Request to Channel Map Register" line.long 0x00 "DRCMR23,DRCMR for ASSP receive Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR24,DRCMR for ASSP transmit Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group asd:0x40000164++0x3b "USB, DMA Request to Channel Map Register" line.long 0x00 "DRCMR25,DRCMR for USB endpoint 1 Request" bitfld.long 0x00 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x00 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DRCMR26,DRCMR for USB endpoint 2 Request" bitfld.long 0x04 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x04 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DRCMR27,DRCMR for USB endpoint 3 Request" bitfld.long 0x08 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x08 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0c "DRCMR28,DRCMR for USB endpoint 4 Request" bitfld.long 0x0c 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x0c 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; DRCMR29 is reserved line.long 0x14 "DRCMR30,DRCMR for USB endpoint 6 Request" bitfld.long 0x14 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x14 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "DRCMR31,DRCMR for USB endpoint 7 Request" bitfld.long 0x18 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x18 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1c "DRCMR32,DRCMR for USB endpoint 8 Request" bitfld.long 0x1c 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x1c 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "DRCMR33,DRCMR for USB endpoint 9 Request" bitfld.long 0x20 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x20 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; DRCMR34 is reserved line.long 0x28 "DRCMR35,DRCMR for USB endpoint 11 Request" bitfld.long 0x28 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x28 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2c "DRCMR36,DRCMR for USB endpoint 12 Request" bitfld.long 0x2c 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x2c 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "DRCMR37,DRCMR for USB endpoint 13 Request" bitfld.long 0x30 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x30 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "DRCMR38,DRCMR for USB endpoint 14 Request" bitfld.long 0x34 7.--7. " MAPVLD ,Map Valid" "unmapped,mapped" bitfld.long 0x34 0.--3. " CHLNUM ,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" ; DRCMR39 is reserved group asd:0x40000200++0x0f "Channel 0" line.long 0x00 "DDADR,DMA Descriptor Address Register" hexmask.long 0x00 4.--31. 0x10 " DESADDR ,Address of next Descriptor" bitfld.long 0x00 7.--7. " STOP ,Stop" "run,stop" line.long 0x04 "DSADR,DMA Source Address Register" hexmask.long 0x04 2.--31. 0x04 " SRCADDR ,Source Address" line.long 0x08 "DTADR,DMA Target Address Register" hexmask.long 0x08 2.--31. 0x04 " TRGADDR ,Target Address" line.long 0x0c "DCMD,DMA Command Address Register" bitfld.long 0x0c 31.--31. " INCSRCADDR ,Source Address Increment Setting" "no,yes" bitfld.long 0x0c 30.--30. " INCTRGADDR ,Target Address Increment Setting" "no,yes" bitfld.long 0x0c 29.--29. " FLOWSRC ,Flow Control by the Source" "start,wait" bitfld.long 0x0c 28.--28. " FLOWTRG ,Flow Control by the Target" "start,wait" bitfld.long 0x0c 22.--22. " STARTIRQEN ,Start Interrupt Enable, Reserved for No-Descriptor Fetch Mode" "no,yes" textline " " bitfld.long 0x0c 21.--21. "ENDIRQEN ,End Interrupt Enable" "no,yes" bitfld.long 0x0c 18.--18. " ENDIAN ,Device Endian-ness" "little,big" bitfld.long 0x0c 16.--17. " SIZE ,Maximum Burst Size of each data transferred" "res,8 Bytes,16 Bytes,32 Bytes" bitfld.long 0x0c 14.--15. " WIDTH ,Width of the on-chip peripheral" "res,1 Byte,2 Bytes,4 Bytes" hexmask.long 0x0c 0.--12. 0x01 " LENGTH ,Length of transfer in bytes" group asd:0x40000210++0x0f "Channel 1" copy group asd:0x40000220++0x0f "Channel 2" copy group asd:0x40000230++0x0f "Channel 3" copy group asd:0x40000240++0x0f "Channel 4" copy group asd:0x40000250++0x0f "Channel 5" copy group asd:0x40000260++0x0f "Channel 6" copy group asd:0x40000270++0x0f "Channel 7" copy group asd:0x40000280++0x0f "Channel 8" copy group asd:0x40000290++0x0f "Channel 9" copy group asd:0x400002a0++0x0f "Channel 10" copy group asd:0x400002b0++0x0f "Channel 11" copy group asd:0x400002c0++0x0f "Channel 12" copy group asd:0x400002d0++0x0f "Channel 13" copy group asd:0x400002e0++0x0f "Channel 14" copy group asd:0x400002f0++0x0f "Channel 15" copy tree.end ;end include file xscale/cotulla-dma.ph ;begin include file xscale/cotulla-uart.ph ;parameters: 0x40100000 FF "Full Function UART" ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; ; UART ; ; %1 Base Address ; %2 UART Abbreviation ; %3..%5 UART Full Name ; -------------------------------------------------------------------------------- tree "Full Function UART" ; -------------------------------------------------------------------------------- if (d.l(asd:0x40100000+0x0c)&0x80)==0x80 ; DLAB == 1 group asd:(0x40100000+0x00)++0x03 line.long 0x00 "FFDLL,Divisor Latch Low Register" hexmask.long 0x00 0.--7. 0x01 "DLL ,Divisor Latch Low Register" group asd:(0x40100000+0x04)++0x03 line.long 0x00 "FFDLH,Divisor Latch High Register" hexmask.long 0x00 0.--7. 0x100 "DLH ,Divisor Latch High Register" else ; DLAB == 0 width 18. group asd:(0x40100000+0x00)++0x03 line.long 0x00 "FFRBR(r)/FFTHR(w),read: Receive Buffer Register / write: Transmit Holding Register" hexmask.long 0x00 0.--7. 0x01 "RBR/THR ,Data byte received/transmitted" group asd:(0x40100000+0x04)++0x03 line.long 0x00 "FFIER,Interrupt Enable Register" bitfld.long 0x00 7.--7. "DMAE ,DMA Request Enable" "dis,ena" bitfld.long 0x00 6.--6. " UUE ,UART Unit Enable" "dis,ena" bitfld.long 0x00 5.--5. " NRZE ,NRZ Coding Enable" "dis,ena" bitfld.long 0x00 4.--4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena" bitfld.long 0x00 3.--3. " MIE ,Modem Interrupt Enable" "dis,ena" textline " " bitfld.long 0x00 2.--2. "RLSE ,Receiver Line status Interrupt Enable" "dis,ena" bitfld.long 0x00 1.--1. " TIE ,Tranmit Data Request Interrupt Enable" "dis,ena" bitfld.long 0x00 0.--0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena" width 8. endif width 18. if "FF"=="HW" group asd:(0x40100000+0x08)++0x03 line.long 0x00 "FFIIR(r)/FFFCR(w),read: Interrupt ID Register / write: FIFO Control Register" textline " " bitfld.long 0x00 6.--7. "FFIIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 4.--4. " ABL ,AUTOBAUD LOCK" "no,yes" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" textline " " bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "Modem Status,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" textline " " bitfld.long 0x00 6.--7. "FFFCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "no,clear" bitfld.long 0x00 3.--3. " TIL ,TRANSMITTER INTERRUPT LEVEL" "hlfEmpt,empty" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "no,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" else group asd:(0x40100000+0x08)++0x03 line.long 0x00 "FFIIR(r)/FFFCR(w),read: Interrupt ID Register / write: FIFO Control Register" textline " " bitfld.long 0x00 6.--7. "FFIIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" textline " " bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "Modem Status,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" textline " " bitfld.long 0x00 6.--7. "FFFCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "no,clear" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "no,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" endif width 8. group asd:(0x40100000+0x0c)++0x03 line.long 0x00 "FFLCR,Line Control Register" bitfld.long 0x00 7.--7. "DLAB ,Divisor Latch Access Bit" "THR-RBR-IER,DLL-DLH" bitfld.long 0x00 6.--6. " SB ,Set Break" "no effect,TXD out to 0" bitfld.long 0x00 5.--5. " STKYP ,Sticky Parity" "no effect,opposite of EPS" textline " " bitfld.long 0x00 4.--4. "EPS ,Even Parity Select" "odd,even" bitfld.long 0x00 3.--3. " PEN ,Parity Enable" "dis,ena" bitfld.long 0x00 2.--2. " STB ,Stop Bits" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" if ("FF"=="BT")&&(d.l(asd:0x40100000+0x010)&0x10)==0x10 ; Bluetooth UART, LOOP == 1 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "FFMSR[DCD]=0,FFMSR[DCD]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("FF"=="BT")&&(d.l(asd:0x40100000+0x010)&0x10)==0x00 ; Bluetooth UART, LOOP == 0 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("FF"=="ST")&&(d.l(asd:0x40100000+0x010)&0x10)==0x10 ; Standard UART, LOOP == 1 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "FFMSR[DCD]=0,FFMSR[DCD]=1" elif ("FF"=="ST")&&(d.l(asd:0x40100000+0x010)&0x10)==0x00 ; Standard UART, LOOP == 0 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" elif ("FF"=="HW")&&(d.l(asd:0x40100000+0x010)&0x10)==0x10 ; Hardware UART, LOOP == 1 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 5.--5. "AFE ,AUTOFLOW CONTROL ENABLE" "dis,ena" bitfld.long 0x00 4.--4. " LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "intToProcessor,?..." textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("FF"=="HW")&&(d.l(asd:0x40100000+0x010)&0x10)==0x00 ; Hardware UART, LOOP == 0 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 5.--5. "AFE ,AUTOFLOW CONTROL ENABLE" "dis,ena" bitfld.long 0x00 4.--4. " LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "intEna,intDis" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif (d.l(asd:0x40100000+0x010)&0x10)==0x10 ; Full Function UART, LOOP == 1 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "FFMSR[DCD]=0,FFMSR[DCD]=1" bitfld.long 0x00 2.--2. " OUT1 ,Test Bit" "FFMSR[RI]=0,FFMSR[RI]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" bitfld.long 0x00 0.--0. " DTR ,Data Terminal Ready" "nDTR is 1,nDTR is 0" elif (d.l(asd:0x40100000+0x010)&0x10)==0x00 ; Full Function UART, LOOP == 0 group asd:(0x40100000+0x10)++0x03 line.long 0x00 "FFMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" bitfld.long 0x00 2.--2. " OUT1 ,Test Bit" "FFMSR[RI]=0,FFMSR[RI]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" bitfld.long 0x00 0.--0. " DTR ,Data Terminal Ready" "nDTR is 1,nDTR is 0" endif group asd:(0x40100000+0x14)++0x03 line.long 0x00 "FFLSR,Line Status Register" bitfld.long 0x00 7.--7. "FIFOE ,FIFO Error Status" "no,yes" bitfld.long 0x00 6.--6. " TEMT ,Transmitter Empty" "no,yes" bitfld.long 0x00 5.--5. " TDRQ ,Transmit Data Request" "no,yes" bitfld.long 0x00 4.--4. " BI ,Break Interrupt" "no,yes" bitfld.long 0x00 3.--3. " FE ,Framing Error" "no,yes" bitfld.long 0x00 2.--2. " PE ,Parity Error" "no,yes" bitfld.long 0x00 1.--1. " OE ,Overrun Error" "no,yes" bitfld.long 0x00 0.--0. " DR ,Data Ready" "no,yes" if ("FF"=="BT")||("FF"=="HW") ; Bluetooth UART or Hardware UART group asd:(0x40100000+0x18)++0x03 line.long 0x00 "FFMSR,Modem Status Register" bitfld.long 0x00 4.--4. "CTS ,Clear To Send" "no,yes" bitfld.long 0x00 0.--0. " DCTS ,Delta Clear To Send" "no,yes" else ; Standard and Full Function UART group asd:(0x40100000+0x18)++0x03 line.long 0x00 "FFMSR,Modem Status Register" bitfld.long 0x00 7.--7. "DCD ,Data Carrier Detect" "no,yes" bitfld.long 0x00 6.--6. " RI ,Ring Indicator" "no,yes" bitfld.long 0x00 5.--5. " DSR ,Data Set Ready" "no,yes" bitfld.long 0x00 4.--4. " CTS ,Clear To Send" "no,yes" bitfld.long 0x00 3.--3. " DDCD ,Delta Data Carrier Detect" "no,yes" bitfld.long 0x00 2.--2. " TERI ,Trailing Edge Ring Indicator" "no,yes" bitfld.long 0x00 1.--1. " DDSR ,Delta Data Set Ready" "no,yes" bitfld.long 0x00 0.--0. " DCTS ,Delta Clear To Send" "no,yes" endif group asd:(0x40100000+0x1c)++0x03 line.long 0x00 "FFSPR,Scratch Pad Register" hexmask.long 0x00 0.--7. 0x01 "SP ,Scratch Pad" group asd:(0x40100000+0x20)++0x03 line.long 0x00 "FFISR,Infrared Selection Register" bitfld.long 0x00 4.--4. "RXPL ,Receive Data Polarity" "pos=zero,neg=zero" bitfld.long 0x00 3.--3. " TXPL ,Transmit Data Polarity" "pos=zero,neg=zero" bitfld.long 0x00 2.--2. " XMODE ,Transmit Pulse Width Select" "3/16 bit,1.6 us" textline " " bitfld.long 0x00 1.--1. "RCVIEIR ,Receiver SIR Enable" "UART,infrared" bitfld.long 0x00 0.--0. " XMITIR ,Transmitter SIR Enable" "UART,infrared" if "FF"=="HW" ; Hardware UART group asd:(0x40100000+0x24)++0x03 line.long 0x00 "FFFOR,Receive FIFO Occupancy Register" hexmask.long 0x00 0.--6. 1. "BC ,Number of bytes (0-64) remaining in the receiver FIFO" group asd:(0x40100000+0x28)++0x03 line.long 0x00 "FFABR,Auto-Baud Control Register" bitfld.long 0x00 3. "ABT ,AUTOBAUD TABLE" "table,formula" bitfld.long 0x00 2. " ABUP ,AUTOBAUD UART PROGRAM" "prcsrProDvr,UARTProDvr" bitfld.long 0x00 1. " ABLIE ,AUTOBAUD LOCK INTERRUPT ENABLE" "dis,ena" bitfld.long 0x00 0. " ABE ,AUTOBAUD ENABLE" "dis,ena" group asd:(0x40100000+0x2c)++0x03 line.long 0x00 "FFACR,Auto-Baud Count Register" hexmask.long 0x00 0.--15. 1. "ACR ,AUTO-BAUD COUNT REGISTER BITS 0-15" endif tree.end ;end include file xscale/cotulla-uart.ph ;begin include file xscale/cotulla-uart.ph ;parameters: 0x40200000 BT "Bluetooth UART " ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; ; UART ; ; %1 Base Address ; %2 UART Abbreviation ; %3..%5 UART Full Name ; -------------------------------------------------------------------------------- tree "Bluetooth UART " ; -------------------------------------------------------------------------------- if (d.l(asd:0x40200000+0x0c)&0x80)==0x80 ; DLAB == 1 group asd:(0x40200000+0x00)++0x03 line.long 0x00 "BTDLL,Divisor Latch Low Register" hexmask.long 0x00 0.--7. 0x01 "DLL ,Divisor Latch Low Register" group asd:(0x40200000+0x04)++0x03 line.long 0x00 "BTDLH,Divisor Latch High Register" hexmask.long 0x00 0.--7. 0x100 "DLH ,Divisor Latch High Register" else ; DLAB == 0 width 18. group asd:(0x40200000+0x00)++0x03 line.long 0x00 "BTRBR(r)/BTTHR(w),read: Receive Buffer Register / write: Transmit Holding Register" hexmask.long 0x00 0.--7. 0x01 "RBR/THR ,Data byte received/transmitted" group asd:(0x40200000+0x04)++0x03 line.long 0x00 "BTIER,Interrupt Enable Register" bitfld.long 0x00 7.--7. "DMAE ,DMA Request Enable" "dis,ena" bitfld.long 0x00 6.--6. " UUE ,UART Unit Enable" "dis,ena" bitfld.long 0x00 5.--5. " NRZE ,NRZ Coding Enable" "dis,ena" bitfld.long 0x00 4.--4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena" bitfld.long 0x00 3.--3. " MIE ,Modem Interrupt Enable" "dis,ena" textline " " bitfld.long 0x00 2.--2. "RLSE ,Receiver Line status Interrupt Enable" "dis,ena" bitfld.long 0x00 1.--1. " TIE ,Tranmit Data Request Interrupt Enable" "dis,ena" bitfld.long 0x00 0.--0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena" width 8. endif width 18. if "BT"=="HW" group asd:(0x40200000+0x08)++0x03 line.long 0x00 "BTIIR(r)/BTFCR(w),read: Interrupt ID Register / write: FIFO Control Register" textline " " bitfld.long 0x00 6.--7. "BTIIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 4.--4. " ABL ,AUTOBAUD LOCK" "no,yes" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" textline " " bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "Modem Status,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" textline " " bitfld.long 0x00 6.--7. "BTFCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "no,clear" bitfld.long 0x00 3.--3. " TIL ,TRANSMITTER INTERRUPT LEVEL" "hlfEmpt,empty" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "no,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" else group asd:(0x40200000+0x08)++0x03 line.long 0x00 "BTIIR(r)/BTFCR(w),read: Interrupt ID Register / write: FIFO Control Register" textline " " bitfld.long 0x00 6.--7. "BTIIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" textline " " bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "Modem Status,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" textline " " bitfld.long 0x00 6.--7. "BTFCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "no,clear" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "no,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" endif width 8. group asd:(0x40200000+0x0c)++0x03 line.long 0x00 "BTLCR,Line Control Register" bitfld.long 0x00 7.--7. "DLAB ,Divisor Latch Access Bit" "THR-RBR-IER,DLL-DLH" bitfld.long 0x00 6.--6. " SB ,Set Break" "no effect,TXD out to 0" bitfld.long 0x00 5.--5. " STKYP ,Sticky Parity" "no effect,opposite of EPS" textline " " bitfld.long 0x00 4.--4. "EPS ,Even Parity Select" "odd,even" bitfld.long 0x00 3.--3. " PEN ,Parity Enable" "dis,ena" bitfld.long 0x00 2.--2. " STB ,Stop Bits" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" if ("BT"=="BT")&&(d.l(asd:0x40200000+0x010)&0x10)==0x10 ; Bluetooth UART, LOOP == 1 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "BTMSR[DCD]=0,BTMSR[DCD]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("BT"=="BT")&&(d.l(asd:0x40200000+0x010)&0x10)==0x00 ; Bluetooth UART, LOOP == 0 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("BT"=="ST")&&(d.l(asd:0x40200000+0x010)&0x10)==0x10 ; Standard UART, LOOP == 1 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "BTMSR[DCD]=0,BTMSR[DCD]=1" elif ("BT"=="ST")&&(d.l(asd:0x40200000+0x010)&0x10)==0x00 ; Standard UART, LOOP == 0 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" elif ("BT"=="HW")&&(d.l(asd:0x40200000+0x010)&0x10)==0x10 ; Hardware UART, LOOP == 1 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 5.--5. "AFE ,AUTOFLOW CONTROL ENABLE" "dis,ena" bitfld.long 0x00 4.--4. " LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "intToProcessor,?..." textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("BT"=="HW")&&(d.l(asd:0x40200000+0x010)&0x10)==0x00 ; Hardware UART, LOOP == 0 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 5.--5. "AFE ,AUTOFLOW CONTROL ENABLE" "dis,ena" bitfld.long 0x00 4.--4. " LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "intEna,intDis" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif (d.l(asd:0x40200000+0x010)&0x10)==0x10 ; Full Function UART, LOOP == 1 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "BTMSR[DCD]=0,BTMSR[DCD]=1" bitfld.long 0x00 2.--2. " OUT1 ,Test Bit" "BTMSR[RI]=0,BTMSR[RI]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" bitfld.long 0x00 0.--0. " DTR ,Data Terminal Ready" "nDTR is 1,nDTR is 0" elif (d.l(asd:0x40200000+0x010)&0x10)==0x00 ; Full Function UART, LOOP == 0 group asd:(0x40200000+0x10)++0x03 line.long 0x00 "BTMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" bitfld.long 0x00 2.--2. " OUT1 ,Test Bit" "BTMSR[RI]=0,BTMSR[RI]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" bitfld.long 0x00 0.--0. " DTR ,Data Terminal Ready" "nDTR is 1,nDTR is 0" endif group asd:(0x40200000+0x14)++0x03 line.long 0x00 "BTLSR,Line Status Register" bitfld.long 0x00 7.--7. "FIFOE ,FIFO Error Status" "no,yes" bitfld.long 0x00 6.--6. " TEMT ,Transmitter Empty" "no,yes" bitfld.long 0x00 5.--5. " TDRQ ,Transmit Data Request" "no,yes" bitfld.long 0x00 4.--4. " BI ,Break Interrupt" "no,yes" bitfld.long 0x00 3.--3. " FE ,Framing Error" "no,yes" bitfld.long 0x00 2.--2. " PE ,Parity Error" "no,yes" bitfld.long 0x00 1.--1. " OE ,Overrun Error" "no,yes" bitfld.long 0x00 0.--0. " DR ,Data Ready" "no,yes" if ("BT"=="BT")||("BT"=="HW") ; Bluetooth UART or Hardware UART group asd:(0x40200000+0x18)++0x03 line.long 0x00 "BTMSR,Modem Status Register" bitfld.long 0x00 4.--4. "CTS ,Clear To Send" "no,yes" bitfld.long 0x00 0.--0. " DCTS ,Delta Clear To Send" "no,yes" else ; Standard and Full Function UART group asd:(0x40200000+0x18)++0x03 line.long 0x00 "BTMSR,Modem Status Register" bitfld.long 0x00 7.--7. "DCD ,Data Carrier Detect" "no,yes" bitfld.long 0x00 6.--6. " RI ,Ring Indicator" "no,yes" bitfld.long 0x00 5.--5. " DSR ,Data Set Ready" "no,yes" bitfld.long 0x00 4.--4. " CTS ,Clear To Send" "no,yes" bitfld.long 0x00 3.--3. " DDCD ,Delta Data Carrier Detect" "no,yes" bitfld.long 0x00 2.--2. " TERI ,Trailing Edge Ring Indicator" "no,yes" bitfld.long 0x00 1.--1. " DDSR ,Delta Data Set Ready" "no,yes" bitfld.long 0x00 0.--0. " DCTS ,Delta Clear To Send" "no,yes" endif group asd:(0x40200000+0x1c)++0x03 line.long 0x00 "BTSPR,Scratch Pad Register" hexmask.long 0x00 0.--7. 0x01 "SP ,Scratch Pad" group asd:(0x40200000+0x20)++0x03 line.long 0x00 "BTISR,Infrared Selection Register" bitfld.long 0x00 4.--4. "RXPL ,Receive Data Polarity" "pos=zero,neg=zero" bitfld.long 0x00 3.--3. " TXPL ,Transmit Data Polarity" "pos=zero,neg=zero" bitfld.long 0x00 2.--2. " XMODE ,Transmit Pulse Width Select" "3/16 bit,1.6 us" textline " " bitfld.long 0x00 1.--1. "RCVIEIR ,Receiver SIR Enable" "UART,infrared" bitfld.long 0x00 0.--0. " XMITIR ,Transmitter SIR Enable" "UART,infrared" if "BT"=="HW" ; Hardware UART group asd:(0x40200000+0x24)++0x03 line.long 0x00 "BTFOR,Receive FIFO Occupancy Register" hexmask.long 0x00 0.--6. 1. "BC ,Number of bytes (0-64) remaining in the receiver FIFO" group asd:(0x40200000+0x28)++0x03 line.long 0x00 "BTABR,Auto-Baud Control Register" bitfld.long 0x00 3. "ABT ,AUTOBAUD TABLE" "table,formula" bitfld.long 0x00 2. " ABUP ,AUTOBAUD UART PROGRAM" "prcsrProDvr,UARTProDvr" bitfld.long 0x00 1. " ABLIE ,AUTOBAUD LOCK INTERRUPT ENABLE" "dis,ena" bitfld.long 0x00 0. " ABE ,AUTOBAUD ENABLE" "dis,ena" group asd:(0x40200000+0x2c)++0x03 line.long 0x00 "BTACR,Auto-Baud Count Register" hexmask.long 0x00 0.--15. 1. "ACR ,AUTO-BAUD COUNT REGISTER BITS 0-15" endif tree.end ;end include file xscale/cotulla-uart.ph ;begin include file xscale/cotulla-i2c.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; -------------------------------------------------------------------------------- tree "I2C" ; -------------------------------------------------------------------------------- group asd:0x40301680++0x03 line.long 0x00 "IBMR,I2C Bus Monitor Register" bitfld.long 0x00 1.--1. " SCLS ,SCL Pin Status" "low,high" bitfld.long 0x00 0.--0. " SDAS ,SDA Pin Status" "low,high" group asd:0x40301688++0x03 line.long 0x00 "IDBR,I2C Data Buffer Register" hexmask.long 0x00 0.--7. 0x01 " IDB ,I2C Data Buffer for I2C bus send/receive data" group asd:0x40301690++0x03 line.long 0x00 "ICR,I2C Control Register" bitfld.long 0x00 15.--15. " FM ,Fast Mode" "100kBit/s,400kBit/s" bitfld.long 0x00 14.--14. " UR ,Unit Reset" "no,yes" bitfld.long 0x00 13.--13. " SADIE ,Slave Address Detected Interrupt Enable" "dis,ena" bitfld.long 0x00 12.--12. " ALDIE ,Arbitration Loss Detected Interrupt Enable" "dis,ena" bitfld.long 0x00 11.--11. " SSDIE ,Slave STOP Detected Interrupt Enable" "dis,ena" textline " " bitfld.long 0x00 10.--10. " BEIE ,Bus Error Interrupt Enable" "dis,ena" bitfld.long 0x00 9.--9. " IRFIE ,IDBR Reveice Full Interrupt Enable" "dis,ena" bitfld.long 0x00 8.--8. " ITEIE ,IDBR Tranmit Empty Interrupt Enable" "dis,ena" bitfld.long 0x00 7.--7. " GCD ,General Call Disable" "ena,dis" bitfld.long 0x00 6.--6. " IUE ,I2C Unit Enable" "dis,ena" bitfld.long 0x00 5.--5. " SCLE ,SCL Enable" "dis,ena" textline " " bitfld.long 0x00 4.--4. " MA ,Master Abort" "STOP ICR bit,STOP w/o data" bitfld.long 0x00 3.--3. " TB ,Transfer Byte" "no,yes" bitfld.long 0x00 2.--2. " ACKNAK ,ACK/NAK Control" "ACK,NAK" bitfld.long 0x00 1.--1. " STOP ,STOP" "no,yes" bitfld.long 0x00 0.--0. " START ,START" "no,yes" group asd:0x40301698++0x03 line.long 0x00 "ISR,I2C Status Register" bitfld.long 0x00 10.--10. " BED ,Bus Error Detected" "no,yes" bitfld.long 0x00 9.--9. " SAD ,Slave Address Detected" "no,yes" bitfld.long 0x00 8.--8. " GCAD ,General Call address Detected" "no,yes" bitfld.long 0x00 7.--7. " IRF ,IDBR Reveice Full" "no,yes" bitfld.long 0x00 6.--6. " ITE ,IDBR Tranmit Empty" "no,yes" bitfld.long 0x00 5.--5. " ALD ,Arbitration Loss Detected" "no,yes" bitfld.long 0x00 4.--4. " SSD ,Slave STOP Detected" "no,yes" textline " " bitfld.long 0x00 3.--3. " IBB ,I2C Bus Busy" "no,yes" bitfld.long 0x00 2.--2. " UB ,Unit Busy" "no,yes" bitfld.long 0x00 1.--1. " ACKNAK ,ACK/NAK Status" "ACK,NAK" bitfld.long 0x00 0.--0. " RWM ,Read/Write Mode" "mstrTrans/slvRec,mstrRec/slvTrans" group asd:0x403016a0++0x03 line.long 0x00 "ISAR,I2C Slave Address Register" hexmask.long 0x00 0.--6. 0x01 " ISA ,I2C Slave Address" ;group asd:0x403016a8++0x03 ; line.long 0x00 "ICCR,I2C Clock Count Register" tree.end ;end include file xscale/cotulla-i2c.ph ;begin include file xscale/cotulla-i2s.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; -------------------------------------------------------------------------------- tree "I2S" ; -------------------------------------------------------------------------------- group asd:0x40400000++0x03 line.long 0x00 "SACR0,Global Control Register" bitfld.long 0x00 12.--15. " RFTH ,Receive FIFO interrupt or DMA threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 " bitfld.long 0x00 8.--11. " TFTH ,Transmit FIFO interrupt or DMA threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 " bitfld.long 0x00 5.--5. " STRF ,Select Transmit or Receive FIFO for EFWR based special purpose function" "Tx,Rx" bitfld.long 0x00 4.--4. " EFWR ,This bit enables a special purpose FIFO Write/Read function" "dis,ena" bitfld.long 0x00 3.--3. " RST ,Resets FIFOs logic and all registers, except thsi register" "no,yes" bitfld.long 0x00 2.--2. " BCKD ,This bit specifies input/output direction of BITCLK" "in,out" bitfld.long 0x00 0.--0. " ENB ,Enable I2S function" "dis,ena" group asd:0x40400004++0x03 line.long 0x00 "SACR1,Serial Audio I2S/MSB-Justified Control Register" bitfld.long 0x00 5.--5. " ENLBF ,Enable I2S/MSB Interface Loop Back function" "dis,ena" bitfld.long 0x00 4.--4. " DRPL ,Disable Replaying function of I2S or MSB-Justified Interface" "ena,dis" bitfld.long 0x00 3.--3. " DREC ,Disable Recording function of I2S or MSB-Justified Interface" "ena,dis" bitfld.long 0x00 0.--0. " AMSL ,Specify Alternate Mode (I2S or MSB-Justified) Operation" "I2S,MSB-Justified" group asd:0x4040000c++0x03 line.long 0x00 "SASR0,Serial Audio I2S/MSB-Justified Interface and FIFO Status Register" bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level: number of entries" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " TFL ,Transmit FIFO Level: number of entries" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 " bitfld.long 0x00 6.--6. " ROR ,Receive FIFO Overrun" "no,yes" bitfld.long 0x00 5.--5. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x00 4.--4. " RFS ,Receive FIFO Service Request" "no,yes" bitfld.long 0x00 3.--3. " TFS ,Tranmit FIFO Service Request" "no,yes" bitfld.long 0x00 2.--2. " BSY ,I2S Busy" "idle,busy" textline " " bitfld.long 0x00 1.--1. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x00 0.--0. " TNF ,Transmit FIFO not full" "full,not full" group asd:0x40400014++0x03 line.long 0x00 "SAIMR,Serial Audio Interrupt Mask Register" bitfld.long 0x00 6.--6. " ROR ,Enable Receive FIFO Overrun condition based interrupt" "dis,ena" bitfld.long 0x00 5.--5. " TUR ,Enable Tranmit FIFO Underrun condition based interrupt" "dis,ena" bitfld.long 0x00 4.--4. " RFS ,Enable Receive FIFO Service Request based interrupt" "dis,ena" bitfld.long 0x00 3.--3. " TFS ,Enable Tranmit FIFO Service Request based interrupt" "dis,ena" group asd:0x40400018++0x03 line.long 0x00 "SAICR,Serial Audio Interrupt Clear Register" bitfld.long 0x00 6.--6. " ROR ,Clear Receive FIFO Overrun Interrupt and status bit in SASR0" "no,yes" bitfld.long 0x00 5.--5. " TUR ,Clear Tranmit FIFO Underrun Interrupt and status bit in SASR0" "no,yes" ;group asd:0x4040005c++0x03 ; line.long 0x00 "SAITR,Serial Audio Interrupt Test Register" if (d.l(asd:0x40400060)&0x7f)==0x0c group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" bitfld.long 0x00 0.--0. " SADIV ,Audio Clock Divider" "BITCLK of 3.072MHz,BITCLK of 3.072MHz" elif (d.l(asd:0x40400060)&0x7f)==0x0d group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" bitfld.long 0x00 0.--0. " SADIV ,Audio Clock Divider" "BITCLK of 2.836MHz,BITCLK of 2.836MHz" elif (d.l(asd:0x40400060)&0x7f)==0x1a group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" bitfld.long 0x00 0.--0. " SADIV ,Audio Clock Divider" "BITCLK of 1.418MHz,BITCLK of 1.418MHz" elif (d.l(asd:0x40400060)&0x7f)==0x24 group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" bitfld.long 0x00 0.--0. " SADIV ,Audio Clock Divider" "BITCLK of 1.024MHz,BITCLK of 1.024MHz" elif (d.l(asd:0x40400060)&0x7f)==0x34 group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" bitfld.long 0x00 0.--0. " SADIV ,Audio Clock Divider" "BITCLK of 708.92kHz,BITCLK of 708.92kHz" elif (d.l(asd:0x40400060)&0x7f)==0x48 group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" bitfld.long 0x00 0.--0. " SADIV ,Audio Clock Divider" "BITCLK of 512.00Hz,BITCLK of 512.00Hz" else group asd:0x40400060++0x03 line.long 0x00 "SADIV,Audio Clock Divider Register" hexmask.long 0x00 0.--6. 0x01 " SADIV ,Audio Clock Divider" endif group asd:0x40400080++0x03 line.long 0x00 "SADR,Serial Audio Data Register" hexmask.long 0x00 16.--31. 0x01 " DTH ,Right data sample" hexmask.long 0x00 0.--15. 0x01 " DTL ,Left data sample" tree.end ;end include file xscale/cotulla-i2s.ph ;begin include file xscale/cotulla-ac97.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; -------------------------------------------------------------------------------- tree "AC97" ; -------------------------------------------------------------------------------- group asd:0x40500000++0x03 line.long 0x00 "POCR,PCM Out Control Register" bitfld.long 0x00 3.--3. " FEIE ,FIFO Error Interrupt Enable" "dis,ena" group asd:0x40500004++0x03 line.long 0x00 "PICR,PCM In Control Register" bitfld.long 0x00 3.--3. " FEIE ,FIFO Error Interrupt Enable" "dis,ena" group asd:0x40500008++0x03 line.long 0x00 "MCCR,Mic In Control Register" bitfld.long 0x00 3.--3. " FEIE ,FIFO Error Interrupt Enable" "dis,ena" group asd:0x4050000c++0x03 line.long 0x00 "GCR,Global Control Register" bitfld.long 0x00 19.--19. " CDONE_IE ,Command Done Interrupt Enable" "dis,ena" bitfld.long 0x00 18.--18. " SDONE_IE ,Status Done Interrupt Enable" "dis,ena" bitfld.long 0x00 9.--9. " SECRDY_IEN ,Secondary Ready Interrupt Enable" "dis,ena" bitfld.long 0x00 8.--8. " PRIRDY_IEN ,Primary Ready Interrupt Enable" "dis,ena" textline " " bitfld.long 0x00 5.--5. " SECRES_IEN ,Secondary Resume Interrupt Enable" "dis,ena" bitfld.long 0x00 4.--4. " PRIRES_IEN ,Primary Resume Interrupt Enable" "dis,ena" bitfld.long 0x00 3.--3. " ACLINK_OFF ,AC-link Shut Off" "on,off" bitfld.long 0x00 2.--2. " WARM_RST ,AC97 Warm Reset" "no,yes" textline " " bitfld.long 0x00 1.--1. " COLD_RST ,AC97 Cold Reset" "yes,no" bitfld.long 0x00 0.--0. " GIE ,Codec GPI Interrupt Enable" "dis,ena" group asd:0x40500010++0x03 line.long 0x00 "POSR,PCM Out Status Register" bitfld.long 0x00 4.--4. " FIFOE ,FIFO Error" "no,yes" group asd:0x40500014++0x03 line.long 0x00 "PISR,PCM In Status Register" bitfld.long 0x00 4.--4. " FIFOE ,FIFO Error" "no,yes" group asd:0x40500018++0x03 line.long 0x00 "MCSR,Mic In Status Register" bitfld.long 0x00 4.--4. " FIFOE ,FIFO Error" "no,yes" group asd:0x4050001c++0x03 line.long 0x00 "GSR,Global Status Register" bitfld.long 0x00 19.--19. " CDONE ,Command Done" "no,yes" bitfld.long 0x00 18.--18. " SDONE ,Status Done" "no,yes" bitfld.long 0x00 15.--15. " RDCS ,Read Completion Status" "complete,timeout" bitfld.long 0x00 14.--14. " BIT3SLT12 ,Bit 3 of Slot 12" "0,1" bitfld.long 0x00 13.--13. " BIT2SLT12 ,Bit 2 of Slot 12" "0,1" textline " " bitfld.long 0x00 12.--12. " BIT1SLT12 ,Bit 1 of Slot 12" "0,1" bitfld.long 0x00 11.--11. " SECRES ,Secondary Resume Interrupt" "no,yes" bitfld.long 0x00 10.--10. " PRIRES ,Primary Resume Interrupt" "no,yes" bitfld.long 0x00 9.--9. " SCR ,Secondary Codec Ready" "no,yes" bitfld.long 0x00 8.--8. " PCR ,Primary Codec Ready" "no,yes" bitfld.long 0x00 7.--7. " MINT ,Mic In Interrupt" "no,yes" textline " " bitfld.long 0x00 6.--6. " POINT ,PCM Out Interrupt" "no,yes" bitfld.long 0x00 5.--5. " PIINT ,PCM In Interrupt" "no,yes" bitfld.long 0x00 2.--2. " MOINT ,Modem Out Interrupt" "no,yes" bitfld.long 0x00 1.--1. " MIINT ,Modem In Interrupt" "no,yes" bitfld.long 0x00 0.--0. " GSCI ,Codec GPI Status Change Interrupt" "no,yes" group asd:0x40500020++0x03 line.long 0x00 "CAR,CODEC Access Register" bitfld.long 0x00 0.--0. " CAIP ,Codec Access In Progress" "no,yes" group asd:0x40500040++0x03 line.long 0x00 "PCDR,PCM FIFO Data Register" hexmask.long 0x00 16.--31. 0x01 " PCM_RDATA ,PCM right-channel data" hexmask.long 0x00 0.--15. 0x01 " PCM_LDATA ,PCM left-channel data" group asd:0x40500060++0x03 line.long 0x00 "MCDR,Mic-in FIFO Data Register" hexmask.long 0x00 0.--15. 0x01 " MIC_IN_DAT ,Mic-in data" group asd:0x40500100++0x03 line.long 0x00 "MOCR,Modem Out Control Register" bitfld.long 0x00 3.--3. " FEIE ,FIFO Error Interrupt Enable" "dis,ena" group asd:0x40500108++0x03 line.long 0x00 "MICR,Modem In Control Register" bitfld.long 0x00 3.--3. " FEIE ,FIFO Error Interrupt Enable" "dis,ena" group asd:0x40500110++0x03 line.long 0x00 "MOSR,Modem Out Status Register" bitfld.long 0x00 4.--4. " FIFOE ,FIFO Error" "no,yes" group asd:0x40500118++0x03 line.long 0x00 "MISR,Modem In Status Register" bitfld.long 0x00 4.--4. " FIFOE ,FIFO Error" "no,yes" group asd:0x40500140++0x03 line.long 0x00 "MODR,Modem FIFO Data Register" hexmask.long 0x00 0.--15. 0x01 " MODEM_DAT ,Modem data" tree.end ;end include file xscale/cotulla-ac97.ph ;begin include file xscale/cotulla-udc.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 tree "UDC" ; State: ok ; -------------------------------------------------------------------------------- group asd:0x40600000++0x03 line.long 0x00 "UDCCR,UDC Control Register" bitfld.long 0x00 7.--7. "REM ,Reset Interrupt Mask" "ena,dis" bitfld.long 0x00 6.--6. " RSTIR ,Reset Interrupt Request" "no,reset" bitfld.long 0x00 5.--5. " SRM ,Suspend/Resume Interrupt Mask" "ena,dis" bitfld.long 0x00 4.--4. " SUSIR ,Suspend Interrupt Request" "no,suspend" bitfld.long 0x00 3.--3. " RESIR ,Resume Interrupt Request" "no,resume" textline " " bitfld.long 0x00 2.--2. "RSM ,Device Resume" "suspend state,out of suspend" bitfld.long 0x00 1.--1. " UDA ,UDC active" "no,yes" bitfld.long 0x00 0.--0. " UDE ,UDC Enable" "dis,ena" textline " " group asd:0x40600010++0x3f line.long 0x00 "UDCCS0,UDC Endpoint 0 Control/Status Register" bitfld.long 0x00 7.--7. "SA ,Setup Active" "no,yes" bitfld.long 0x00 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x00 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x00 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x00 2.--2. " FTF ,Flush Tx FIFO" "no,yes" bitfld.long 0x00 1.--1. " IPR ,IN Packet Ready" "no,yes" bitfld.long 0x00 0.--0. " OPR ,OUT Packet Ready" "no,yes" line.long 0x04 "UDCCS1,UDC Endpoint 1 (IN) Control/Status Register" bitfld.long 0x04 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x04 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x04 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x04 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x04 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x04 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x08 "UDCCS2,UDC Endpoint 2 (OUT) Control/Status Register" bitfld.long 0x08 7.--7. "RSP ,Receive Short Packet" "no,yes" bitfld.long 0x08 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x08 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x08 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x08 3.--3. " DME ,DMA Enable" "no,yes" bitfld.long 0x08 1.--1. " RPC ,Receive Packet Complete" "no,yes" bitfld.long 0x08 0.--0. " RFS ,Receive FIFO Service" "no,yes" line.long 0x0c "UDCCS3,UDC Endpoint 3 (IN) Control/Status Register" bitfld.long 0x0c 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x0c 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x0c 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x0c 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x10 "UDCCS4,UDC Endpoint 4 (OUT) Control/Status Register" bitfld.long 0x10 7.--7. "RSP ,Receive Short Packet" "no,yes" bitfld.long 0x10 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x10 3.--3. " DME ,DMA Enable" "no,yes" bitfld.long 0x10 2.--2. " ROF ,Receive Overflow" "no,yes" bitfld.long 0x10 1.--1. " RPC ,Receive Packet Complete" "no,yes" bitfld.long 0x10 0.--0. " RFS ,Receive FIFO Service" "no,yes" line.long 0x14 "UDCCS5,UDC Endpoint 5 (Interrupt) Control/Status Register" bitfld.long 0x14 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x14 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x14 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x14 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x14 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x14 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x18 "UDCCS6,UDC Endpoint 6 (IN) Control/Status Register" bitfld.long 0x18 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x04 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x18 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x18 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x18 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x18 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x1c "UDCCS7,UDC Endpoint 7 (OUT) Control/Status Register" bitfld.long 0x1c 7.--7. "RSP ,Receive Short Packet" "no,yes" bitfld.long 0x1c 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x1c 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x1c 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x1c 3.--3. " DME ,DMA Enable" "no,yes" bitfld.long 0x1c 1.--1. " RPC ,Receive Packet Complete" "no,yes" bitfld.long 0x1c 0.--0. " RFS ,Receive FIFO Service" "no,yes" line.long 0x20 "UDCCS8,UDC Endpoint 8 (IN) Control/Status Register" bitfld.long 0x20 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x20 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x20 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x20 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x24 "UDCCS9,UDC Endpoint 9 (OUT) Control/Status Register" bitfld.long 0x24 7.--7. "RSP ,Receive Short Packet" "no,yes" bitfld.long 0x24 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x24 3.--3. " DME ,DMA Enable" "no,yes" bitfld.long 0x24 2.--2. " ROF ,Receive Overflow" "no,yes" bitfld.long 0x24 1.--1. " RPC ,Receive Packet Complete" "no,yes" bitfld.long 0x24 0.--0. " RFS ,Receive FIFO Service" "no,yes" line.long 0x28 "UDCCS10,UDC Endpoint 10 (Interrupt) Control/Status Register" bitfld.long 0x28 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x28 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x28 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x28 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x28 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x28 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x2c "UDCCS11,UDC Endpoint 11 (IN) Control/Status Register" bitfld.long 0x2c 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x2c 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x2c 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x2c 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x2c 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x2c 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x30 "UDCCS12,UDC Endpoint 12 (OUT) Control/Status Register" bitfld.long 0x30 7.--7. "RSP ,Receive Short Packet" "no,yes" bitfld.long 0x30 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x30 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x30 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x30 3.--3. " DME ,DMA Enable" "no,yes" bitfld.long 0x30 1.--1. " RPC ,Receive Packet Complete" "no,yes" bitfld.long 0x30 0.--0. " RFS ,Receive FIFO Service" "no,yes" line.long 0x34 "UDCCS13,UDC Endpoint 13 (IN) Control/Status Register" bitfld.long 0x34 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x34 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x34 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x34 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" line.long 0x38 "UDCCS14,UDC Endpoint 14 (OUT) Control/Status Register" bitfld.long 0x38 7.--7. "RSP ,Receive Short Packet" "no,yes" bitfld.long 0x38 6.--6. " RNE ,Receive FIFO not empty" "empty,not empty" bitfld.long 0x38 3.--3. " DME ,DMA Enable" "no,yes" bitfld.long 0x38 2.--2. " ROF ,Receive Overflow" "no,yes" bitfld.long 0x38 1.--1. " RPC ,Receive Packet Complete" "no,yes" bitfld.long 0x38 0.--0. " RFS ,Receive FIFO Service" "no,yes" line.long 0x3c "UDCCS15,UDC Endpoint 15 (Interrupt) Control/Status Register" bitfld.long 0x3c 7.--7. "TSP ,Transmit Short Packet" "no,yes" bitfld.long 0x3c 5.--5. " FST ,Force Stall" "no,yes" bitfld.long 0x3c 4.--4. " SST ,Sent Stall" "no,yes" bitfld.long 0x3c 3.--3. " TUR ,Tranmit FIFO Underrun" "no,yes" bitfld.long 0x3c 1.--1. " TPC ,Tranmit Packet Complete" "no,yes" bitfld.long 0x3c 0.--0. " TFS ,Tranmit FIFO Service" "no,yes" textline " " group asd:0x40600060++0x07 line.long 0x00 "UFNRH,UDC Frame Number Register High" bitfld.long 0x00 7.--7. "SIR ,SOF Interrupt Request" "no,yes" bitfld.long 0x00 6.--6. " SIM ,SOF Interrupt Mask" "ena,dis" bitfld.long 0x00 5.--5. " IPE14 ,Isochronous Packet Error Endpoint 14" "no,yes" bitfld.long 0x00 4.--4. " IPE9 ,Isochronous Packet Error Endpoint 9" "no,yes" bitfld.long 0x00 3.--3. " IPE4 ,Isochronous Packet Error Endpoint 4" "no,yes" bitfld.long 0x00 0.--2. " FNMSB ,Frame Number MSB" "00,01,02,03,04,05,06,07" line.long 0x04 "UFNRL,UDC Frame Number Register Low" hexmask.long 0x04 0.--7. 0x01 "FNLSB ,Frame Number LSB" textline " " group asd:0x40600068++0x17 line.long 0x00 "UBCR2,UDC Byte Count Register 2" hexmask.long 0x00 0.--7. 0x01 "BC ,Byte Count" line.long 0x04 "UBCR4,UDC Byte Count Register 4" hexmask.long 0x04 0.--7. 0x01 "BC ,Byte Count" line.long 0x08 "UBCR7,UDC Byte Count Register 7" hexmask.long 0x08 0.--7. 0x01 "BC ,Byte Count" line.long 0x0c "UBCR9,UDC Byte Count Register 9" hexmask.long 0x0c 0.--7. 0x01 "BC ,Byte Count" line.long 0x10 "UBCR12,UDC Byte Count Register 12" hexmask.long 0x10 0.--7. 0x01 "BC ,Byte Count" line.long 0x14 "UBCR14,UDC Byte Count Register 14" hexmask.long 0x14 0.--7. 0x01 "BC ,Byte Count" textline " " group asd:0x40600080++0x0d83 line.long 0x0000 "UDDR0,UDC Endpoint 0 Data Register" hexmask.long 0x0000 0.--7. 0x01 "DATA ,Top(write)/bottom(read) of endpoint 0 FIFO data" line.long 0x0080 "UDDR1,UDC Endpoint 1 Data Register" hexmask.long 0x0080 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0100 "UDDR2,UDC Endpoint 2 Data Register" hexmask.long 0x0100 0.--7. 0x01 "DATA ,Top of endpoint data currently being read" line.long 0x0180 "UDDR3,UDC Endpoint 3 Data Register" hexmask.long 0x0180 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0380 "UDDR4,UDC Endpoint 4 Data Register" hexmask.long 0x0380 0.--7. 0x01 "DATA ,Top of endpoint data currently being read" line.long 0x0020 "UDDR5,UDC Endpoint 5 Data Register" hexmask.long 0x0020 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0580 "UDDR6,UDC Endpoint 6 Data Register" hexmask.long 0x0580 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0600 "UDDR7,UDC Endpoint 7 Data Register" hexmask.long 0x0600 0.--7. 0x01 "DATA ,Top of endpoint data currently being read" line.long 0x0680 "UDDR8,UDC Endpoint 8 Data Register" hexmask.long 0x0680 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0980 "UDDR9,UDC Endpoint 9 Data Register" hexmask.long 0x0980 0.--7. 0x01 "DATA ,Top of endpoint data currently being read" line.long 0x0040 "UDDR10,UDC Endpoint 10 Data Register" hexmask.long 0x0040 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0a80 "UDDR11,UDC Endpoint 11 Data Register" hexmask.long 0x0a80 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0b00 "UDDR12,UDC Endpoint 12 Data Register" hexmask.long 0x0b00 0.--7. 0x01 "DATA ,Top of endpoint data currently being read" line.long 0x0b80 "UDDR13,UDC Endpoint 13 Data Register" hexmask.long 0x0b80 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" line.long 0x0d80 "UDDR14,UDC Endpoint 14 Data Register" hexmask.long 0x0d80 0.--7. 0x01 "DATA ,Top of endpoint data currently being read" line.long 0x0060 "UDDR15,UDC Endpoint 15 Data Register" hexmask.long 0x0060 0.--7. 0x01 "DATA ,Top of endpoint data currently being loaded" textline " " group asd:0x40600050++0x07 line.long 0x00 "UICR0,UDC Interrupt Control Register 0" bitfld.long 0x00 7.--7. "IM7 ,Interrupt Mask for Endpoint 7" "ena,dis" bitfld.long 0x00 6.--6. " IM6 ,Interrupt Mask for Endpoint 6" "ena,dis" bitfld.long 0x00 5.--5. " IM5 ,Interrupt Mask for Endpoint 5" "ena,dis" bitfld.long 0x00 4.--4. " IM4 ,Interrupt Mask for Endpoint 4" "ena,dis" bitfld.long 0x00 3.--3. " IM3 ,Interrupt Mask for Endpoint 3" "ena,dis" bitfld.long 0x00 2.--2. " IM2 ,Interrupt Mask for Endpoint 2" "ena,dis" bitfld.long 0x00 1.--1. " IM1 ,Interrupt Mask for Endpoint 1" "ena,dis" bitfld.long 0x00 0.--0. " IM0 ,Interrupt Mask for Endpoint 0" "ena,dis" line.long 0x04 "UICR1,UDC Interrupt Control Register 1" bitfld.long 0x04 7.--7. "IM15 ,Interrupt Mask for Endpoint 15" "ena,dis" bitfld.long 0x04 6.--6. " IM14 ,Interrupt Mask for Endpoint 14" "ena,dis" bitfld.long 0x04 5.--5. " IM13 ,Interrupt Mask for Endpoint 13" "ena,dis" bitfld.long 0x04 4.--4. " IM12 ,Interrupt Mask for Endpoint 12" "ena,dis" bitfld.long 0x04 3.--3. " IM11 ,Interrupt Mask for Endpoint 11" "ena,dis" bitfld.long 0x04 2.--2. " IM10 ,Interrupt Mask for Endpoint 10" "ena,dis" bitfld.long 0x04 1.--1. " IM9 ,Interrupt Mask for Endpoint 9" "ena,dis" bitfld.long 0x04 0.--0. " IM8 ,Interrupt Mask for Endpoint 8" "ena,dis" group asd:0x40600058++0x07 line.long 0x00 "USIR0,UDC Status Interrupt Register 0" bitfld.long 0x00 7.--7. "IR7 ,Interrupt Request Endpoint 7" "no,yes" bitfld.long 0x00 6.--6. " IR6 ,Interrupt Request Endpoint 6" "no,yes" bitfld.long 0x00 5.--5. " IR5 ,Interrupt Request Endpoint 5" "no,yes" bitfld.long 0x00 4.--4. " IR4 ,Interrupt Request Endpoint 4" "no,yes" bitfld.long 0x00 3.--3. " IR3 ,Interrupt Request Endpoint 3" "no,yes" bitfld.long 0x00 2.--2. " IR2 ,Interrupt Request Endpoint 2" "no,yes" bitfld.long 0x00 1.--1. " IR1 ,Interrupt Request Endpoint 1" "no,yes" bitfld.long 0x00 0.--0. " IR0 ,Interrupt Request Endpoint 0" "no,yes" line.long 0x04 "USIR1,UDC Status Interrupt Register 1" bitfld.long 0x04 7.--7. "IR15 ,Interrupt Request Endpoint 15" "no,yes" bitfld.long 0x04 6.--6. " IR14 ,Interrupt Request Endpoint 14" "no,yes" bitfld.long 0x04 5.--5. " IR13 ,Interrupt Request Endpoint 13" "no,yes" bitfld.long 0x04 4.--4. " IR12 ,Interrupt Request Endpoint 12" "no,yes" bitfld.long 0x04 3.--3. " IR11 ,Interrupt Request Endpoint 11" "no,yes" bitfld.long 0x04 2.--2. " IR10 ,Interrupt Request Endpoint 10" "no,yes" bitfld.long 0x04 1.--1. " IR9 ,Interrupt Request Endpoint 9" "no,yes" bitfld.long 0x04 0.--0. " IR8 ,Interrupt Request Endpoint 8" "no,yes" tree.end ;end include file xscale/cotulla-udc.ph ;begin include file xscale/cotulla-uart.ph ;parameters: 0x40700000 ST "Standard UART " ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; ; UART ; ; %1 Base Address ; %2 UART Abbreviation ; %3..%5 UART Full Name ; -------------------------------------------------------------------------------- tree "Standard UART " ; -------------------------------------------------------------------------------- if (d.l(asd:0x40700000+0x0c)&0x80)==0x80 ; DLAB == 1 group asd:(0x40700000+0x00)++0x03 line.long 0x00 "STDLL,Divisor Latch Low Register" hexmask.long 0x00 0.--7. 0x01 "DLL ,Divisor Latch Low Register" group asd:(0x40700000+0x04)++0x03 line.long 0x00 "STDLH,Divisor Latch High Register" hexmask.long 0x00 0.--7. 0x100 "DLH ,Divisor Latch High Register" else ; DLAB == 0 width 18. group asd:(0x40700000+0x00)++0x03 line.long 0x00 "STRBR(r)/STTHR(w),read: Receive Buffer Register / write: Transmit Holding Register" hexmask.long 0x00 0.--7. 0x01 "RBR/THR ,Data byte received/transmitted" group asd:(0x40700000+0x04)++0x03 line.long 0x00 "STIER,Interrupt Enable Register" bitfld.long 0x00 7.--7. "DMAE ,DMA Request Enable" "dis,ena" bitfld.long 0x00 6.--6. " UUE ,UART Unit Enable" "dis,ena" bitfld.long 0x00 5.--5. " NRZE ,NRZ Coding Enable" "dis,ena" bitfld.long 0x00 4.--4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena" bitfld.long 0x00 3.--3. " MIE ,Modem Interrupt Enable" "dis,ena" textline " " bitfld.long 0x00 2.--2. "RLSE ,Receiver Line status Interrupt Enable" "dis,ena" bitfld.long 0x00 1.--1. " TIE ,Tranmit Data Request Interrupt Enable" "dis,ena" bitfld.long 0x00 0.--0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena" width 8. endif width 18. if "ST"=="HW" group asd:(0x40700000+0x08)++0x03 line.long 0x00 "STIIR(r)/STFCR(w),read: Interrupt ID Register / write: FIFO Control Register" textline " " bitfld.long 0x00 6.--7. "STIIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 4.--4. " ABL ,AUTOBAUD LOCK" "no,yes" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" textline " " bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "Modem Status,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" textline " " bitfld.long 0x00 6.--7. "STFCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "no,clear" bitfld.long 0x00 3.--3. " TIL ,TRANSMITTER INTERRUPT LEVEL" "hlfEmpt,empty" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "no,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" else group asd:(0x40700000+0x08)++0x03 line.long 0x00 "STIIR(r)/STFCR(w),read: Interrupt ID Register / write: FIFO Control Register" textline " " bitfld.long 0x00 6.--7. "STIIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" textline " " bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "Modem Status,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" textline " " bitfld.long 0x00 6.--7. "STFCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "no,clear" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "no,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" endif width 8. group asd:(0x40700000+0x0c)++0x03 line.long 0x00 "STLCR,Line Control Register" bitfld.long 0x00 7.--7. "DLAB ,Divisor Latch Access Bit" "THR-RBR-IER,DLL-DLH" bitfld.long 0x00 6.--6. " SB ,Set Break" "no effect,TXD out to 0" bitfld.long 0x00 5.--5. " STKYP ,Sticky Parity" "no effect,opposite of EPS" textline " " bitfld.long 0x00 4.--4. "EPS ,Even Parity Select" "odd,even" bitfld.long 0x00 3.--3. " PEN ,Parity Enable" "dis,ena" bitfld.long 0x00 2.--2. " STB ,Stop Bits" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" if ("ST"=="BT")&&(d.l(asd:0x40700000+0x010)&0x10)==0x10 ; Bluetooth UART, LOOP == 1 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "STMSR[DCD]=0,STMSR[DCD]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("ST"=="BT")&&(d.l(asd:0x40700000+0x010)&0x10)==0x00 ; Bluetooth UART, LOOP == 0 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("ST"=="ST")&&(d.l(asd:0x40700000+0x010)&0x10)==0x10 ; Standard UART, LOOP == 1 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "STMSR[DCD]=0,STMSR[DCD]=1" elif ("ST"=="ST")&&(d.l(asd:0x40700000+0x010)&0x10)==0x00 ; Standard UART, LOOP == 0 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" elif ("ST"=="HW")&&(d.l(asd:0x40700000+0x010)&0x10)==0x10 ; Hardware UART, LOOP == 1 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 5.--5. "AFE ,AUTOFLOW CONTROL ENABLE" "dis,ena" bitfld.long 0x00 4.--4. " LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "intToProcessor,?..." textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif ("ST"=="HW")&&(d.l(asd:0x40700000+0x010)&0x10)==0x00 ; Hardware UART, LOOP == 0 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 5.--5. "AFE ,AUTOFLOW CONTROL ENABLE" "dis,ena" bitfld.long 0x00 4.--4. " LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "intEna,intDis" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" elif (d.l(asd:0x40700000+0x010)&0x10)==0x10 ; Full Function UART, LOOP == 1 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "STMSR[DCD]=0,STMSR[DCD]=1" bitfld.long 0x00 2.--2. " OUT1 ,Test Bit" "STMSR[RI]=0,STMSR[RI]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" bitfld.long 0x00 0.--0. " DTR ,Data Terminal Ready" "nDTR is 1,nDTR is 0" elif (d.l(asd:0x40700000+0x010)&0x10)==0x00 ; Full Function UART, LOOP == 0 group asd:(0x40700000+0x10)++0x03 line.long 0x00 "STMCR,Modem Control Register" bitfld.long 0x00 4.--4. "LOOP ,Lopback Mode" "no,yes" bitfld.long 0x00 3.--3. " OUT2 ,OUT2 signal control" "UART Interrupt enabled,UART Interrupt disabled" bitfld.long 0x00 2.--2. " OUT1 ,Test Bit" "STMSR[RI]=0,STMSR[RI]=1" textline " " bitfld.long 0x00 1.--1. "RTS ,Request to Send" "nRTS is 1,nRTS is 0" bitfld.long 0x00 0.--0. " DTR ,Data Terminal Ready" "nDTR is 1,nDTR is 0" endif group asd:(0x40700000+0x14)++0x03 line.long 0x00 "STLSR,Line Status Register" bitfld.long 0x00 7.--7. "FIFOE ,FIFO Error Status" "no,yes" bitfld.long 0x00 6.--6. " TEMT ,Transmitter Empty" "no,yes" bitfld.long 0x00 5.--5. " TDRQ ,Transmit Data Request" "no,yes" bitfld.long 0x00 4.--4. " BI ,Break Interrupt" "no,yes" bitfld.long 0x00 3.--3. " FE ,Framing Error" "no,yes" bitfld.long 0x00 2.--2. " PE ,Parity Error" "no,yes" bitfld.long 0x00 1.--1. " OE ,Overrun Error" "no,yes" bitfld.long 0x00 0.--0. " DR ,Data Ready" "no,yes" if ("ST"=="BT")||("ST"=="HW") ; Bluetooth UART or Hardware UART group asd:(0x40700000+0x18)++0x03 line.long 0x00 "STMSR,Modem Status Register" bitfld.long 0x00 4.--4. "CTS ,Clear To Send" "no,yes" bitfld.long 0x00 0.--0. " DCTS ,Delta Clear To Send" "no,yes" else ; Standard and Full Function UART group asd:(0x40700000+0x18)++0x03 line.long 0x00 "STMSR,Modem Status Register" bitfld.long 0x00 7.--7. "DCD ,Data Carrier Detect" "no,yes" bitfld.long 0x00 6.--6. " RI ,Ring Indicator" "no,yes" bitfld.long 0x00 5.--5. " DSR ,Data Set Ready" "no,yes" bitfld.long 0x00 4.--4. " CTS ,Clear To Send" "no,yes" bitfld.long 0x00 3.--3. " DDCD ,Delta Data Carrier Detect" "no,yes" bitfld.long 0x00 2.--2. " TERI ,Trailing Edge Ring Indicator" "no,yes" bitfld.long 0x00 1.--1. " DDSR ,Delta Data Set Ready" "no,yes" bitfld.long 0x00 0.--0. " DCTS ,Delta Clear To Send" "no,yes" endif group asd:(0x40700000+0x1c)++0x03 line.long 0x00 "STSPR,Scratch Pad Register" hexmask.long 0x00 0.--7. 0x01 "SP ,Scratch Pad" group asd:(0x40700000+0x20)++0x03 line.long 0x00 "STISR,Infrared Selection Register" bitfld.long 0x00 4.--4. "RXPL ,Receive Data Polarity" "pos=zero,neg=zero" bitfld.long 0x00 3.--3. " TXPL ,Transmit Data Polarity" "pos=zero,neg=zero" bitfld.long 0x00 2.--2. " XMODE ,Transmit Pulse Width Select" "3/16 bit,1.6 us" textline " " bitfld.long 0x00 1.--1. "RCVIEIR ,Receiver SIR Enable" "UART,infrared" bitfld.long 0x00 0.--0. " XMITIR ,Transmitter SIR Enable" "UART,infrared" if "ST"=="HW" ; Hardware UART group asd:(0x40700000+0x24)++0x03 line.long 0x00 "STFOR,Receive FIFO Occupancy Register" hexmask.long 0x00 0.--6. 1. "BC ,Number of bytes (0-64) remaining in the receiver FIFO" group asd:(0x40700000+0x28)++0x03 line.long 0x00 "STABR,Auto-Baud Control Register" bitfld.long 0x00 3. "ABT ,AUTOBAUD TABLE" "table,formula" bitfld.long 0x00 2. " ABUP ,AUTOBAUD UART PROGRAM" "prcsrProDvr,UARTProDvr" bitfld.long 0x00 1. " ABLIE ,AUTOBAUD LOCK INTERRUPT ENABLE" "dis,ena" bitfld.long 0x00 0. " ABE ,AUTOBAUD ENABLE" "dis,ena" group asd:(0x40700000+0x2c)++0x03 line.long 0x00 "STACR,Auto-Baud Count Register" hexmask.long 0x00 0.--15. 1. "ACR ,AUTO-BAUD COUNT REGISTER BITS 0-15" endif tree.end ;end include file xscale/cotulla-uart.ph ;begin include file xscale/cotulla-icp.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; -------------------------------------------------------------------------------- tree "ICP" ; -------------------------------------------------------------------------------- group asd:0x40800000++0x0b line.long 0x00 "ICCR0,ICP Control Register 0" bitfld.long 0x00 7.--7. " AME ,Address Match Enable" "dis,ena" bitfld.long 0x00 6.--6. " TIE ,Transmit FIFO Interrupt Enable" "dis,ena" bitfld.long 0x00 5.--5. " RIE ,Receive FIFO Interrupt Enable" "dis,ena" bitfld.long 0x00 4.--4. " RXE ,Receive Enable" "dis,ena" bitfld.long 0x00 3.--3. " TXE ,Transmit Enable" "dis,ena" bitfld.long 0x00 2.--2. " TUS ,Transmit FIFO Underrun Select" "end the frame,abort" textline " " bitfld.long 0x00 1.--1. " LBM ,Loopback Mode" "no,yes" bitfld.long 0x00 0.--0. " ITR ,IrDA transmission" "dis,ena" line.long 0x04 "ICCR1,ICP Control Register 1" hexmask.long 0x04 0.--7. 0x01 " AMV ,Address Match Value" line.long 0x08 "ICCR2,ICP Control Register 2" bitfld.long 0x08 3.--3. " RXP ,Receive Pin Polarity Select" "inverted,equal" bitfld.long 0x08 2.--2. " TXP ,Transmit Pin Polarity Select" "inverted,equal" bitfld.long 0x08 0.--1. " TRIG ,FIFO Trigger Level" "8 bytes,16 bytes,32 bytes,res" group asd:0x4080000c++0x03 line.long 0x00 "ICDR,ICP Data Register" hexmask.long 0x00 0.--7. 0x01 " DATA ,Top/bottom of transmit/receive FIFO" group asd:0x40800014++0x07 line.long 0x00 "ICSR0,ICP Status Register 0" bitfld.long 0x00 5.--5. " FRE ,Framing Error" "no,yes" bitfld.long 0x00 4.--4. " RFS ,Receive FIFO Service Request" "no,yes" bitfld.long 0x00 3.--3. " TFS ,Transmit FIFO Service Request" "no,yes" bitfld.long 0x00 2.--2. " RAB ,Receiver Abort" "no,yes" bitfld.long 0x00 1.--1. " TUR ,Transmit FIFO Underrun" "no,yes" bitfld.long 0x00 0.--0. " EIF ,End Error in FIFO" "no,yes" line.long 0x04 "ICSR1,ICP Status Register 1" bitfld.long 0x04 6.--6. " ROR ,Receive FIFO Overrun" "no,yes" bitfld.long 0x04 5.--5. " CRE ,CRC Error" "no,yes" bitfld.long 0x04 4.--4. " EOF ,End Of Frame" "no,yes" bitfld.long 0x04 3.--3. " TNF ,Transmit FIFO not Full" "full,not full" bitfld.long 0x04 2.--2. " RNE ,Receive FIFO not Empty" "empty,not empty" bitfld.long 0x04 1.--1. " TBY ,Transmitter Busy Flag" "idle,busy" bitfld.long 0x04 0.--0. " RSY ,Receiver synchronized flag" "no,yes" tree.end ;end include file xscale/cotulla-icp.ph ;begin include file xscale/cotulla-rtc.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250, PXA255 ; State: ok ; -------------------------------------------------------------------------------- tree "RTC" ; -------------------------------------------------------------------------------- group asd:0x40900000++0xf line.long 0x00 "RCNR,RTC Count Register" line.long 0x04 "RTAR,RTC Alarm Register" line.long 0x08 "RTSR,RTC Status Register" bitfld.long 0x08 3.--3. " HZE ,HZ Interrupt Enable" "dis,ena" bitfld.long 0x08 2.--2. " ALE ,RTC Alarm Interrupt Enable" "dis,ena" bitfld.long 0x08 1.--1. " HZ ,HZ rising-edge detected" "no,yes" bitfld.long 0x08 0.--0. " AL ,RTC Alarm detected" "no,yes" line.long 0x0c "RTTR,RTC Timer Trim Register" bitfld.long 0x0c 31.--31. " LCK ,Locking bit for the trim value" "unlocked,locked" hexmask.long 0x0c 16.--25. 0x01 " DEL ,Trim delete count" hexmask.long 0x0c 0.--15. 0x01 " CK_DIV ,Clock divider count" tree.end ;end include file xscale/cotulla-rtc.ph ;begin include file xscale/cotulla-ostimer.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; -------------------------------------------------------------------------------- tree "OS Timer" ; -------------------------------------------------------------------------------- group asd:0x40a00000++0x0f line.long 0x00 "OSMR0,OS Timer Match Register <0>" line.long 0x04 "OSMR1,OS Timer Match Register <1>" line.long 0x08 "OSMR2,OS Timer Match Register <2>" line.long 0x0c "OSMR3,OS Timer Match Register <3>" group asd:0x40a00010++0x03 line.long 0x00 "OSCR,OS Timer Counter Register" group asd:0x40a00014++0x03 line.long 0x00 "OSSR,OS Timer Status Register" bitfld.long 0x00 3.--3. " M3 ,Match Status Channel 3" "no,yes" bitfld.long 0x00 2.--2. " M2 ,Match Status Channel 2" "no,yes" bitfld.long 0x00 1.--1. " M1 ,Match Status Channel 1" "no,yes" bitfld.long 0x00 0.--0. " M0 ,Match Status Channel 0" "no,yes" group asd:0x40a00018++0x03 line.long 0x00 "OWER,OS Timer Watchdog Enable Register" bitfld.long 0x00 0.--0. " WME ,Watchdog Match Enable" "dis,ena" group asd:0x40a0001c++0x03 line.long 0x00 "OIER,OS Timer Interrupt Enable Register" bitfld.long 0x00 3.--3. " E3 ,Interrupt Enable Channel 3" "dis,ena" bitfld.long 0x00 2.--2. " E2 ,Interrupt Enable Channel 2" "dis,ena" bitfld.long 0x00 1.--1. " E1 ,Interrupt Enable Channel 1" "dis,ena" bitfld.long 0x00 0.--0. " E0 ,Interrupt Enable Channel 0" "dis,ena" tree.end ;end include file xscale/cotulla-ostimer.ph ;begin include file xscale/cotulla-pwm.ph ;parameters: 0x40b00000 0 ; -------------------------------------------------------------------------------- ; PXA210, PXA250,PXA255, Bulverde ; State: ok ; ; PWM ; ; %1 Base Address ; %2 PWM Unit Number ; -------------------------------------------------------------------------------- tree "PWM0" ; -------------------------------------------------------------------------------- width 13. group asd:(0x40b00000+0x00)++0x03 line.long 0x00 "PWM_CTRL0,PWM 0 Control Register" bitfld.long 0x00 6.--6. " PWM_SD ,PWM0 Shutdown Method" "graceful,abrupt" bitfld.long 0x00 0.--5. " PRESCALE ,PWM0 Prescale Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." group asd:(0x40b00000+0x04)++0x03 line.long 0x00 "PWM_PWDUTY0,PWM 0 Duty Cycle Register" bitfld.long 0x00 10.--10. " FDCYCLE ,PWM0 Full Duty Cycle" "DCYCLE,high" hexmask.long 0x00 0.--9. 0x01 " DCYCLE ,PWM0 Duty Cycle" group asd:(0x40b00000+0x08)++0x03 line.long 0x00 "PWM_PERVAL0,PWM 0 Period Control Register" hexmask.long 0x00 0.--9. 0x01 " PV ,PWM0 Period Control" width 8. tree.end ;end include file xscale/cotulla-pwm.ph ;begin include file xscale/cotulla-pwm.ph ;parameters: 0x40c00000 1 ; -------------------------------------------------------------------------------- ; PXA210, PXA250,PXA255, Bulverde ; State: ok ; ; PWM ; ; %1 Base Address ; %2 PWM Unit Number ; -------------------------------------------------------------------------------- tree "PWM1" ; -------------------------------------------------------------------------------- width 13. group asd:(0x40c00000+0x00)++0x03 line.long 0x00 "PWM_CTRL1,PWM 1 Control Register" bitfld.long 0x00 6.--6. " PWM_SD ,PWM1 Shutdown Method" "graceful,abrupt" bitfld.long 0x00 0.--5. " PRESCALE ,PWM1 Prescale Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." group asd:(0x40c00000+0x04)++0x03 line.long 0x00 "PWM_PWDUTY1,PWM 1 Duty Cycle Register" bitfld.long 0x00 10.--10. " FDCYCLE ,PWM1 Full Duty Cycle" "DCYCLE,high" hexmask.long 0x00 0.--9. 0x01 " DCYCLE ,PWM1 Duty Cycle" group asd:(0x40c00000+0x08)++0x03 line.long 0x00 "PWM_PERVAL1,PWM 1 Period Control Register" hexmask.long 0x00 0.--9. 0x01 " PV ,PWM1 Period Control" width 8. tree.end ;end include file xscale/cotulla-pwm.ph ;begin include file xscale/cotulla-ic.ph ;parameters: 250 ; -------------------------------------------------------------------------------- ; PXA210, PXA250,PXA255,PXA26x ; State: ok ; -------------------------------------------------------------------------------- tree "Interrupt Control" ; -------------------------------------------------------------------------------- if "250"=="255" group asd:0x40d00000++0x03 line.long 0x00 "ICIP,Interrupt Controller IRQ Pending Register" bitfld.long 0x00 31.--31. " IP31 ,IRQ Pending" "no,yes" bitfld.long 0x00 30.--30. " IP30 ,IRQ Pending" "no,yes" bitfld.long 0x00 29.--29. " IP29 ,IRQ Pending" "no,yes" bitfld.long 0x00 28.--28. " IP28 ,IRQ Pending" "no,yes" bitfld.long 0x00 27.--27. " IP27 ,IRQ Pending" "no,yes" bitfld.long 0x00 26.--26. " IP26 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "IP25 ,IRQ Pending" "no,yes" bitfld.long 0x00 24.--24. " IP24 ,IRQ Pending" "no,yes" bitfld.long 0x00 23.--23. " IP23 ,IRQ Pending" "no,yes" bitfld.long 0x00 22.--22. " IP22 ,IRQ Pending" "no,yes" bitfld.long 0x00 21.--21. " IP21 ,IRQ Pending" "no,yes" bitfld.long 0x00 20.--20. " IP20 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "IP19 ,IRQ Pending" "no,yes" bitfld.long 0x00 18.--18. " IP18 ,IRQ Pending" "no,yes" bitfld.long 0x00 17.--17. " IP17 ,IRQ Pending" "no,yes" bitfld.long 0x00 14.--14. " IP14 ,IRQ Pending" "no,yes" bitfld.long 0x00 13.--13. " IP13 ,IRQ Pending" "no,yes" bitfld.long 0x00 12.--12. " IP12 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 11.--11. "IP11 ,IRQ Pending" "no,yes" bitfld.long 0x00 10.--10. " IP10 ,IRQ Pending" "no,yes" bitfld.long 0x00 9.--9. " IP9 ,IRQ Pending" "no,yes" bitfld.long 0x00 8.--8. " IP8 ,IRQ Pending" "no,yes" group asd:0x40d00004++0x03 line.long 0x00 "ICMR,Interrupt Controller Mask Register" bitfld.long 0x00 31.--31. " IM31 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 30.--30. " IM30 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 29.--29. " IM29 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 28.--28. " IM28 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 27.--27. " IM27 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 26.--26. " IM26 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 25.--25. "IM25 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 24.--24. " IM24 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 23.--23. " IM23 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 22.--22. " IM22 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 21.--21. " IM21 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 20.--20. " IM20 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 19.--19. "IM19 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 18.--18. " IM18 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 17.--17. " IM17 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 14.--14. " IM14 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 13.--13. " IM13 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 12.--12. " IM12 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 11.--11. "IM11 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 10.--10. " IM10 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 9.--9. " IM9 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 8.--8. " IM8 ,Mask for Pending Interrupt" "dis,ena" group asd:0x40d00008++0x03 line.long 0x00 "ICLR,Interrupt Controller Level Register" bitfld.long 0x00 31.--31. " IL31 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 30.--30. " IL30 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 29.--29. " IL29 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 28.--28. " IL28 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 27.--27. " IL27 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 26.--26. " IL26 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 25.--25. "IL25 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 24.--24. " IL24 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 23.--23. " IL23 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 22.--22. " IL22 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 21.--21. " IL21 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 20.--20. " IL20 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 19.--19. "IL19 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 18.--18. " IL18 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 17.--17. " IL17 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 14.--14. " IL14 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 13.--13. " IL13 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 12.--12. " IL12 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 11.--11. "IL11 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 10.--10. " IL10 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 9.--9. " IL9 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 8.--8. " IL8 ,Interrupt Level" "IRQ,FIQ" group asd:0x40d0000c++0x03 line.long 0x00 "ICFP,Interrupt Controller FIQ Pending Register" bitfld.long 0x00 31.--31. " FP31 ,FIQ Pending" "no,yes" bitfld.long 0x00 30.--30. " FP30 ,FIQ Pending" "no,yes" bitfld.long 0x00 29.--29. " FP29 ,FIQ Pending" "no,yes" bitfld.long 0x00 28.--28. " FP28 ,FIQ Pending" "no,yes" bitfld.long 0x00 27.--27. " FP27 ,FIQ Pending" "no,yes" bitfld.long 0x00 26.--26. " FP26 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "FP25 ,FIQ Pending" "no,yes" bitfld.long 0x00 24.--24. " FP24 ,FIQ Pending" "no,yes" bitfld.long 0x00 23.--23. " FP23 ,FIQ Pending" "no,yes" bitfld.long 0x00 22.--22. " FP22 ,FIQ Pending" "no,yes" bitfld.long 0x00 21.--21. " FP21 ,FIQ Pending" "no,yes" bitfld.long 0x00 20.--20. " FP20 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "FP19 ,FIQ Pending" "no,yes" bitfld.long 0x00 18.--18. " FP18 ,FIQ Pending" "no,yes" bitfld.long 0x00 17.--17. " FP17 ,FIQ Pending" "no,yes" bitfld.long 0x00 14.--14. " FP14 ,FIQ Pending" "no,yes" bitfld.long 0x00 13.--13. " FP13 ,FIQ Pending" "no,yes" bitfld.long 0x00 12.--12. " FP12 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 11.--11. "FP11 ,FIQ Pending" "no,yes" bitfld.long 0x00 10.--10. " FP10 ,FIQ Pending" "no,yes" bitfld.long 0x00 9.--9. " FP9 ,FIQ Pending" "no,yes" bitfld.long 0x00 8.--8. " FP8 ,FIQ Pending" "no,yes" group asd:0x40d00010++0x03 line.long 0x00 "ICPR,Interrupt Controller Pending Register" bitfld.long 0x00 31.--31. " IS31 ,RTC Alarm Match Register Interrupt Pending" "no,yes" bitfld.long 0x00 30.--30. " IS30 ,RTC HZ Clock Tick Interrupt Pending" "no,yes" bitfld.long 0x00 29.--29. " IS29 ,OS Timer Match Register 3 Interrupt Pending" "no,yes" bitfld.long 0x00 28.--28. " IS28 ,OS Timer Match Register 2 Interrupt Pending" "no,yes" bitfld.long 0x00 27.--27. " IS27 ,OS Timer Match Register 1 Interrupt Pending" "no,yes" bitfld.long 0x00 26.--26. " IS26 ,OS Timer Match Register 0 Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "IS25 ,DMA Channel Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 24.--24. " IS24 ,SSP Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 23.--23. " IS23 ,MMC Status/Error Detection Interrupt Pending" "no,yes" bitfld.long 0x00 22.--22. " IS22 ,FFUART Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 21.--21. " IS21 ,BTUART Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 20.--20. " IS20 ,STUART Transmit/Receive/Error Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "IS19 ,ICP Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 18.--18. " IS18 ,I2C Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 17.--17. " IS17 ,LCD Controller Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 16.--17. " IS16 ,NETWORK SSP SERVICE REQUEST INTERRUPT PENDING" "no,yes,?..." bitfld.long 0x00 14.--14. " IS14 ,AC97 Interrupt Pending" "no,yes" bitfld.long 0x00 13.--13. " IS13 ,I2S Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 12.--12. "IS12 ,Performance Monitoring Unit (PMU) Interrupt Pending" "no,yes" bitfld.long 0x00 11.--11. " IS11 ,USB Service Interrupt Pending" "no,yes" bitfld.long 0x00 10.--10. " IS10 ,GPIO[80:2] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 9.--9. " IS9 ,GPIO[1] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 8.--8. " IS8 ,GPIO[0] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 7.--7. " IS7 ,Hardware UART Service Request Interrupt Pending" "no,yes" group asd:0x40d00014++0x03 line.long 0x00 "ICCR,Interrupt Controller Control Register" bitfld.long 0x00 0.--0. " DIM ,Disable IDLE Mask" "dis,ena" elif "250"=="26x" group asd:0x40d00000++0x03 line.long 0x00 "ICIP,Interrupt Controller IRQ Pending Register" bitfld.long 0x00 31.--31. " IP31 ,IRQ Pending" "no,yes" bitfld.long 0x00 30.--30. " IP30 ,IRQ Pending" "no,yes" bitfld.long 0x00 29.--29. " IP29 ,IRQ Pending" "no,yes" bitfld.long 0x00 28.--28. " IP28 ,IRQ Pending" "no,yes" bitfld.long 0x00 27.--27. " IP27 ,IRQ Pending" "no,yes" bitfld.long 0x00 26.--26. " IP26 ,IRQ Pending" "no,yes" bitfld.long 0x00 25.--25. " IP25 ,IRQ Pending" "no,yes" bitfld.long 0x00 24.--24. " IP24 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 23.--23. "IP23 ,IRQ Pending" "no,yes" bitfld.long 0x00 22.--22. " IP22 ,IRQ Pending" "no,yes" bitfld.long 0x00 21.--21. " IP21 ,IRQ Pending" "no,yes" bitfld.long 0x00 20.--20. " IP20 ,IRQ Pending" "no,yes" bitfld.long 0x00 19.--19. " IP19 ,IRQ Pending" "no,yes" bitfld.long 0x00 18.--18. " IP18 ,IRQ Pending" "no,yes" bitfld.long 0x00 17.--17. " IP17 ,IRQ Pending" "no,yes" bitfld.long 0x00 16.--16. " IP16 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 15.--15. "IP15 ,IRQ Pending" "no,yes" bitfld.long 0x00 14.--14. " IP14 ,IRQ Pending" "no,yes" bitfld.long 0x00 13.--13. " IP13 ,IRQ Pending" "no,yes" bitfld.long 0x00 12.--12. " IP12 ,IRQ Pending" "no,yes" bitfld.long 0x00 11.--11. " IP11 ,IRQ Pending" "no,yes" bitfld.long 0x00 10.--10. " IP10 ,IRQ Pending" "no,yes" bitfld.long 0x00 9.--9. " IP9 ,IRQ Pending" "no,yes" bitfld.long 0x00 8.--8. " IP8 ,IRQ Pending" "no,yes" bitfld.long 0x00 7.--7. " IP7 ,IRQ Pending" "no,yes" group asd:0x40d00004++0x03 line.long 0x00 "ICMR,Interrupt Controller Mask Register" bitfld.long 0x00 31.--31. " IM31 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 30.--30. " IM30 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 29.--29. " IM29 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 28.--28. " IM28 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 27.--27. " IM27 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 26.--26. " IM26 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 25.--25. " IM25 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 24.--24. " IM24 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 23.--23. "IM23 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 22.--22. " IM22 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 21.--21. " IM21 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 20.--20. " IM20 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 19.--19. " IM19 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 18.--18. " IM18 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 17.--17. " IM17 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 16.--16. " IM16 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 15.--15. "IM15 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 14.--14. " IM14 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 13.--13. " IM13 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 12.--12. " IM12 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 11.--11. " IM11 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 10.--10. " IM10 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 9.--9. " IM9 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 8.--8. " IM8 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 7.--7. " IM7 ,Mask for Pending Interrupt" "dis,ena" group asd:0x40d00008++0x03 line.long 0x00 "ICLR,Interrupt Controller Level Register" bitfld.long 0x00 31.--31. " IL31 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 30.--30. " IL30 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 29.--29. " IL29 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 28.--28. " IL28 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 27.--27. " IL27 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 26.--26. " IL26 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 25.--25. "IL25 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 24.--24. " IL24 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 23.--23. " IL23 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 22.--22. " IL22 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 21.--21. " IL21 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 20.--20. " IL20 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 19.--19. "IL19 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 18.--18. " IL18 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 17.--17. " IL17 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 14.--14. " IL14 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 13.--13. " IL13 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 12.--12. " IL12 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 11.--11. "IL11 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 10.--10. " IL10 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 9.--9. " IL9 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 8.--8. " IL8 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 7.--7. " IL7 ,Interrupt Level" "IRQ,FIQ" group asd:0x40d0000c++0x03 line.long 0x00 "ICFP,Interrupt Controller FIQ Pending Register" bitfld.long 0x00 31.--31. " FP31 ,FIQ Pending" "no,yes" bitfld.long 0x00 30.--30. " FP30 ,FIQ Pending" "no,yes" bitfld.long 0x00 29.--29. " FP29 ,FIQ Pending" "no,yes" bitfld.long 0x00 28.--28. " FP28 ,FIQ Pending" "no,yes" bitfld.long 0x00 27.--27. " FP27 ,FIQ Pending" "no,yes" bitfld.long 0x00 26.--26. " FP26 ,FIQ Pending" "no,yes" bitfld.long 0x00 25.--25. " FP25 ,FIQ Pending" "no,yes" bitfld.long 0x00 24.--24. " FP24 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 23.--23. "FP23 ,FIQ Pending" "no,yes" bitfld.long 0x00 22.--22. " FP22 ,FIQ Pending" "no,yes" bitfld.long 0x00 21.--21. " FP21 ,FIQ Pending" "no,yes" bitfld.long 0x00 20.--20. " FP20 ,FIQ Pending" "no,yes" bitfld.long 0x00 19.--19. " FP19 ,FIQ Pending" "no,yes" bitfld.long 0x00 18.--18. " FP18 ,FIQ Pending" "no,yes" bitfld.long 0x00 17.--17. " FP17 ,FIQ Pending" "no,yes" bitfld.long 0x00 16.--16. " FP16 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 15.--15. "FP15 ,FIQ Pending" "no,yes" bitfld.long 0x00 14.--14. " FP14 ,FIQ Pending" "no,yes" bitfld.long 0x00 13.--13. " FP13 ,FIQ Pending" "no,yes" bitfld.long 0x00 12.--12. " FP12 ,FIQ Pending" "no,yes" bitfld.long 0x00 11.--11. " FP11 ,FIQ Pending" "no,yes" bitfld.long 0x00 10.--10. " FP10 ,FIQ Pending" "no,yes" bitfld.long 0x00 9.--9. " FP9 ,FIQ Pending" "no,yes" bitfld.long 0x00 8.--8. " FP8 ,FIQ Pending" "no,yes" bitfld.long 0x00 7.--7. " FP7 ,FIQ Pending" "no,yes" group asd:0x40d00010++0x03 line.long 0x00 "ICPR,Interrupt Controller Pending Register" bitfld.long 0x00 31.--31. " IS31 ,RTC Alarm Match Register Interrupt Pending" "no,yes" bitfld.long 0x00 30.--30. " IS30 ,RTC HZ Clock Tick Interrupt Pending" "no,yes" bitfld.long 0x00 29.--29. " IS29 ,OS Timer Match Register 3 Interrupt Pending" "no,yes" bitfld.long 0x00 28.--28. " IS28 ,OS Timer Match Register 2 Interrupt Pending" "no,yes" bitfld.long 0x00 27.--27. " IS27 ,OS Timer Match Register 1 Interrupt Pending" "no,yes" bitfld.long 0x00 26.--26. " IS26 ,OS Timer Match Register 0 Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "IS25 ,DMA Channel Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 24.--24. " IS24 ,SSP Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 23.--23. " IS23 ,MMC Status/Error Detection Interrupt Pending" "no,yes" bitfld.long 0x00 22.--22. " IS22 ,FFUART Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 21.--21. " IS21 ,BTUART Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 20.--20. " IS20 ,STUART Transmit/Receive/Error Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "IS19 ,ICP Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 18.--18. " IS18 ,I2C Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 17.--17. " IS17 ,LCD Controller Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 16.--16. " IS16 ,NETWORK SSP SERVICE REQUEST INTERRUPT PENDING" "no,yes" bitfld.long 0x00 15.--15. " IS15 ,AUDIO SSP SERVICE REQUEST INTERRUPT PENDING" "no,yes" bitfld.long 0x00 14.--14. " IS14 ,AC97 Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 13.--13. "IS13 ,I2S Interrupt Pending" "no,yes" bitfld.long 0x00 12.--12. " IS12 ,Performance Monitoring Unit (PMU) Interrupt Pending" "no,yes" bitfld.long 0x00 11.--11. " IS11 ,USB Service Interrupt Pending" "no,yes" bitfld.long 0x00 10.--10. " IS10 ,GPIO[80:2] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 9.--9. " IS9 ,GPIO[1] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 8.--8. " IS8 ,GPIO[0] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 7.--7. " IS7 ,Hardware UART Service Request Interrupt Pending" "no,yes" group asd:0x40d00014++0x03 line.long 0x00 "ICCR,Interrupt Controller Control Register" bitfld.long 0x00 0.--0. " DIM ,Disable IDLE Mask" "dis,ena" else group asd:0x40d00000++0x03 line.long 0x00 "ICIP,Interrupt Controller IRQ Pending Register" bitfld.long 0x00 31.--31. " IP31 ,IRQ Pending" "no,yes" bitfld.long 0x00 30.--30. " IP30 ,IRQ Pending" "no,yes" bitfld.long 0x00 29.--29. " IP29 ,IRQ Pending" "no,yes" bitfld.long 0x00 28.--28. " IP28 ,IRQ Pending" "no,yes" bitfld.long 0x00 27.--27. " IP27 ,IRQ Pending" "no,yes" bitfld.long 0x00 26.--26. " IP26 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "IP25 ,IRQ Pending" "no,yes" bitfld.long 0x00 24.--24. " IP24 ,IRQ Pending" "no,yes" bitfld.long 0x00 23.--23. " IP23 ,IRQ Pending" "no,yes" bitfld.long 0x00 22.--22. " IP22 ,IRQ Pending" "no,yes" bitfld.long 0x00 21.--21. " IP21 ,IRQ Pending" "no,yes" bitfld.long 0x00 20.--20. " IP20 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "IP19 ,IRQ Pending" "no,yes" bitfld.long 0x00 18.--18. " IP18 ,IRQ Pending" "no,yes" bitfld.long 0x00 17.--17. " IP17 ,IRQ Pending" "no,yes" bitfld.long 0x00 14.--14. " IP14 ,IRQ Pending" "no,yes" bitfld.long 0x00 13.--13. " IP13 ,IRQ Pending" "no,yes" bitfld.long 0x00 12.--12. " IP12 ,IRQ Pending" "no,yes" textline " " bitfld.long 0x00 11.--11. "IP11 ,IRQ Pending" "no,yes" bitfld.long 0x00 10.--10. " IP10 ,IRQ Pending" "no,yes" bitfld.long 0x00 9.--9. " IP9 ,IRQ Pending" "no,yes" bitfld.long 0x00 8.--8. " IP8 ,IRQ Pending" "no,yes" group asd:0x40d00004++0x03 line.long 0x00 "ICMR,Interrupt Controller Mask Register" bitfld.long 0x00 31.--31. " IM31 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 30.--30. " IM30 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 29.--29. " IM29 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 28.--28. " IM28 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 27.--27. " IM27 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 26.--26. " IM26 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 25.--25. "IM25 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 24.--24. " IM24 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 23.--23. " IM23 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 22.--22. " IM22 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 21.--21. " IM21 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 20.--20. " IM20 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 19.--19. "IM19 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 18.--18. " IM18 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 17.--17. " IM17 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 14.--14. " IM14 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 13.--13. " IM13 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 12.--12. " IM12 ,Mask for Pending Interrupt" "dis,ena" textline " " bitfld.long 0x00 11.--11. "IM11 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 10.--10. " IM10 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 9.--9. " IM9 ,Mask for Pending Interrupt" "dis,ena" bitfld.long 0x00 8.--8. " IM8 ,Mask for Pending Interrupt" "dis,ena" group asd:0x40d00008++0x03 line.long 0x00 "ICLR,Interrupt Controller Level Register" bitfld.long 0x00 31.--31. " IL31 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 30.--30. " IL30 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 29.--29. " IL29 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 28.--28. " IL28 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 27.--27. " IL27 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 26.--26. " IL26 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 25.--25. "IL25 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 24.--24. " IL24 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 23.--23. " IL23 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 22.--22. " IL22 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 21.--21. " IL21 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 20.--20. " IL20 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 19.--19. "IL19 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 18.--18. " IL18 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 17.--17. " IL17 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 14.--14. " IL14 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 13.--13. " IL13 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 12.--12. " IL12 ,Interrupt Level" "IRQ,FIQ" textline " " bitfld.long 0x00 11.--11. "IL11 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 10.--10. " IL10 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 9.--9. " IL9 ,Interrupt Level" "IRQ,FIQ" bitfld.long 0x00 8.--8. " IL8 ,Interrupt Level" "IRQ,FIQ" group asd:0x40d0000c++0x03 line.long 0x00 "ICFP,Interrupt Controller FIQ Pending Register" bitfld.long 0x00 31.--31. "FP31 ,FIQ Pending" "no,yes" bitfld.long 0x00 30.--30. " FP30 ,FIQ Pending" "no,yes" bitfld.long 0x00 29.--29. " FP29 ,FIQ Pending" "no,yes" bitfld.long 0x00 28.--28. " FP28 ,FIQ Pending" "no,yes" bitfld.long 0x00 27.--27. " FP27 ,FIQ Pending" "no,yes" bitfld.long 0x00 26.--26. " FP26 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "FP25 ,FIQ Pending" "no,yes" bitfld.long 0x00 24.--24. " FP24 ,FIQ Pending" "no,yes" bitfld.long 0x00 23.--23. " FP23 ,FIQ Pending" "no,yes" bitfld.long 0x00 22.--22. " FP22 ,FIQ Pending" "no,yes" bitfld.long 0x00 21.--21. " FP21 ,FIQ Pending" "no,yes" bitfld.long 0x00 20.--20. " FP20 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "FP19 ,FIQ Pending" "no,yes" bitfld.long 0x00 18.--18. " FP18 ,FIQ Pending" "no,yes" bitfld.long 0x00 17.--17. " FP17 ,FIQ Pending" "no,yes" bitfld.long 0x00 14.--14. " FP14 ,FIQ Pending" "no,yes" bitfld.long 0x00 13.--13. " FP13 ,FIQ Pending" "no,yes" bitfld.long 0x00 12.--12. " FP12 ,FIQ Pending" "no,yes" textline " " bitfld.long 0x00 11.--11. "FP11 ,FIQ Pending" "no,yes" bitfld.long 0x00 10.--10. " FP10 ,FIQ Pending" "no,yes" bitfld.long 0x00 9.--9. " FP9 ,FIQ Pending" "no,yes" bitfld.long 0x00 8.--8. " FP8 ,FIQ Pending" "no,yes" group asd:0x40d00010++0x03 line.long 0x00 "ICPR,Interrupt Controller Pending Register" bitfld.long 0x00 31.--31. " IS31 ,RTC Alarm Match Register Interrupt Pending" "no,yes" bitfld.long 0x00 30.--30. " IS30 ,RTC HZ Clock Tick Interrupt Pending" "no,yes" bitfld.long 0x00 29.--29. " IS29 ,OS Timer Match Register 3 Interrupt Pending" "no,yes" bitfld.long 0x00 28.--28. " IS28 ,OS Timer Match Register 2 Interrupt Pending" "no,yes" bitfld.long 0x00 27.--27. " IS27 ,OS Timer Match Register 1 Interrupt Pending" "no,yes" bitfld.long 0x00 26.--26. " IS26 ,OS Timer Match Register 0 Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 25.--25. "IS25 ,DMA Channel Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 24.--24. " IS24 ,SSP Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 23.--23. " IS23 ,MMC Status/Error Detection Interrupt Pending" "no,yes" bitfld.long 0x00 22.--22. " IS22 ,FFUART Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 21.--21. " IS21 ,BTUART Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 20.--20. " IS20 ,STUART Transmit/Receive/Error Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 19.--19. "IS19 ,ICP Transmit/Receive/Error Interrupt Pending" "no,yes" bitfld.long 0x00 18.--18. " IS18 ,I2C Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 17.--17. " IS17 ,LCD Controller Service Request Interrupt Pending" "no,yes" bitfld.long 0x00 14.--14. " IS14 ,AC97 Interrupt Pending" "no,yes" bitfld.long 0x00 13.--13. " IS13 ,I2S Interrupt Pending" "no,yes" bitfld.long 0x00 12.--12. " IS12 ,Performance Monitoring Unit (PMU) Interrupt Pending" "no,yes" textline " " bitfld.long 0x00 11.--11. "IS11 ,USB Service Interrupt Pending" "no,yes" bitfld.long 0x00 10.--10. " IS10 ,GPIO[80:2] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 9.--9. " IS9 ,GPIO[1] Edge Detect Interrupt Pending" "no,yes" bitfld.long 0x00 8.--8. " IS8 ,GPIO[0] Edge Detect Interrupt Pending" "no,yes" group asd:0x40d00014++0x03 line.long 0x00 "ICCR,Interrupt Controller Control Register" bitfld.long 0x00 0.--0. " DIM ,Disable IDLE Mask" "disable,enable" endif tree.end ;end include file xscale/cotulla-ic.ph ;begin include file xscale/cotulla-gpio.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250, PXA255,PXA26x, ; State: ok ; -------------------------------------------------------------------------------- tree "GPIO" ; -------------------------------------------------------------------------------- group asd:0x40e00000++0x0b line.long 0x00 "GPLR0,GPIO Pin-Level Register GPIO<31:0>" bitfld.long 0x00 31.--31. " PL31 ,GP31 Pin State" "L,H" bitfld.long 0x00 30.--30. " PL30 ,GP30 Pin State" "L,H" bitfld.long 0x00 29.--29. " PL29 ,GP29 Pin State" "L,H" bitfld.long 0x00 28.--28. " PL28 ,GP28 Pin State" "L,H" bitfld.long 0x00 27.--27. " PL27 ,GP27 Pin State" "L,H" bitfld.long 0x00 26.--26. " PL26 ,GP26 Pin State" "L,H" bitfld.long 0x00 25.--25. " PL25 ,GP25 Pin State" "L,H" bitfld.long 0x00 24.--24. " PL24 ,GP24 Pin State" "L,H" textline " " bitfld.long 0x00 23.--23. "PL23 ,GP23 Pin State" "L,H" bitfld.long 0x00 22.--22. " PL22 ,GP22 Pin State" "L,H" bitfld.long 0x00 21.--21. " PL21 ,GP21 Pin State" "L,H" bitfld.long 0x00 20.--20. " PL20 ,GP20 Pin State" "L,H" bitfld.long 0x00 19.--19. " PL19 ,GP19 Pin State" "L,H" bitfld.long 0x00 18.--18. " PL18 ,GP18 Pin State" "L,H" bitfld.long 0x00 17.--17. " PL17 ,GP17 Pin State" "L,H" bitfld.long 0x00 16.--16. " PL16 ,GP16 Pin State" "L,H" textline " " bitfld.long 0x00 15.--15. "PL15 ,GP15 Pin State" "L,H" bitfld.long 0x00 14.--14. " PL14 ,GP14 Pin State" "L,H" bitfld.long 0x00 13.--13. " PL13 ,GP13 Pin State" "L,H" bitfld.long 0x00 12.--12. " PL12 ,GP12 Pin State" "L,H" bitfld.long 0x00 11.--11. " PL11 ,GP11 Pin State" "L,H" bitfld.long 0x00 10.--10. " PL10 ,GP10 Pin State" "L,H" bitfld.long 0x00 9.--9. " PL9 ,GP9 Pin State" "L,H" bitfld.long 0x00 8.--8. " PL8 ,GP8 Pin State" "L,H" textline " " bitfld.long 0x00 7.--7. "PL7 ,GP7 Pin State" "L,H" bitfld.long 0x00 6.--6. " PL6 ,GP6 Pin State" "L,H" bitfld.long 0x00 5.--5. " PL5 ,GP5 Pin State" "L,H" bitfld.long 0x00 4.--4. " PL4 ,GP4 Pin State" "L,H" bitfld.long 0x00 3.--3. " PL3 ,GP3 Pin State" "L,H" bitfld.long 0x00 2.--2. " PL2 ,GP2 Pin State" "L,H" bitfld.long 0x00 1.--1. " PL1 ,GP1 Pin State" "L,H" bitfld.long 0x00 0.--0. " PL0 ,GP0 Pin State" "L,H" line.long 0x04 "GPLR1,GPIO Pin-Level Register GPIO<63:32>" bitfld.long 0x04 31.--31. " PL63 ,GP63 Pin State" "L,H" bitfld.long 0x04 30.--30. " PL62 ,GP62 Pin State" "L,H" bitfld.long 0x04 29.--29. " PL61 ,GP61 Pin State" "L,H" bitfld.long 0x04 28.--28. " PL60 ,GP60 Pin State" "L,H" bitfld.long 0x04 27.--27. " PL59 ,GP59 Pin State" "L,H" bitfld.long 0x04 26.--26. " PL58 ,GP58 Pin State" "L,H" bitfld.long 0x04 25.--25. " PL57 ,GP57 Pin State" "L,H" bitfld.long 0x04 24.--24. " PL56 ,GP56 Pin State" "L,H" textline " " bitfld.long 0x04 23.--23. "PL55 ,GP55 Pin State" "L,H" bitfld.long 0x04 22.--22. " PL54 ,GP54 Pin State" "L,H" bitfld.long 0x04 21.--21. " PL53 ,GP53 Pin State" "L,H" bitfld.long 0x04 20.--20. " PL52 ,GP52 Pin State" "L,H" bitfld.long 0x04 19.--19. " PL51 ,GP51 Pin State" "L,H" bitfld.long 0x04 18.--18. " PL50 ,GP50 Pin State" "L,H" bitfld.long 0x04 17.--17. " PL49 ,GP49 Pin State" "L,H" bitfld.long 0x04 16.--16. " PL48 ,GP48 Pin State" "L,H" textline " " bitfld.long 0x04 15.--15. "PL47 ,GP47 Pin State" "L,H" bitfld.long 0x04 14.--14. " PL46 ,GP46 Pin State" "L,H" bitfld.long 0x04 13.--13. " PL45 ,GP45 Pin State" "L,H" bitfld.long 0x04 12.--12. " PL44 ,GP44 Pin State" "L,H" bitfld.long 0x04 11.--11. " PL43 ,GP43 Pin State" "L,H" bitfld.long 0x04 10.--10. " PL42 ,GP42 Pin State" "L,H" bitfld.long 0x04 9.--9. " PL41 ,GP41 Pin State" "L,H" bitfld.long 0x04 8.--8. " PL40 ,GP40 Pin State" "L,H" textline " " bitfld.long 0x04 7.--7. "PL39 ,GP39 Pin State" "L,H" bitfld.long 0x04 6.--6. " PL38 ,GP38 Pin State" "L,H" bitfld.long 0x04 5.--5. " PL37 ,GP37 Pin State" "L,H" bitfld.long 0x04 4.--4. " PL36 ,GP36 Pin State" "L,H" bitfld.long 0x04 3.--3. " PL35 ,GP35 Pin State" "L,H" bitfld.long 0x04 2.--2. " PL34 ,GP34 Pin State" "L,H" bitfld.long 0x04 1.--1. " PL33 ,GP33 Pin State" "L,H" bitfld.long 0x04 0.--0. " PL32 ,GP32 Pin State" "L,H" line.long 0x08 "GPLR2,GPIO Pin-Level Register GPIO<80:64>" bitfld.long 0x08 16.--16. " PL80 ,GP80 Pin State" "L,H" textline " " bitfld.long 0x08 15.--15. "PL79 ,GP79 Pin State" "L,H" bitfld.long 0x08 14.--14. " PL78 ,GP78 Pin State" "L,H" bitfld.long 0x08 13.--13. " PL77 ,GP77 Pin State" "L,H" bitfld.long 0x08 12.--12. " PL76 ,GP76 Pin State" "L,H" bitfld.long 0x08 11.--11. " PL75 ,GP75 Pin State" "L,H" bitfld.long 0x08 10.--10. " PL74 ,GP74 Pin State" "L,H" bitfld.long 0x08 9.--9. " PL73 ,GP73 Pin State" "L,H" bitfld.long 0x08 8.--8. " PL72 ,GP72 Pin State" "L,H" textline " " bitfld.long 0x08 7.--7. "PL71 ,GP71 Pin State" "L,H" bitfld.long 0x08 6.--6. " PL70 ,GP70 Pin State" "L,H" bitfld.long 0x08 5.--5. " PL69 ,GP69 Pin State" "L,H" bitfld.long 0x08 4.--4. " PL68 ,GP68 Pin State" "L,H" bitfld.long 0x08 3.--3. " PL67 ,GP67 Pin State" "L,H" bitfld.long 0x08 2.--2. " PL66 ,GP66 Pin State" "L,H" bitfld.long 0x08 1.--1. " PL65 ,GP65 Pin State" "L,H" bitfld.long 0x08 0.--0. " PL64 ,GP64 Pin State" "L,H" textline " " group asd:0x40e0000c++0x0b line.long 0x00 "GPDR0,GPIO Pin Direction Register GPIO<31:0>" bitfld.long 0x00 31.--31. " PD31 ,GP31 Pin Direction" "I,O" bitfld.long 0x00 30.--30. " PD30 ,GP30 Pin Direction" "I,O" bitfld.long 0x00 29.--29. " PD29 ,GP29 Pin Direction" "I,O" bitfld.long 0x00 28.--28. " PD28 ,GP28 Pin Direction" "I,O" bitfld.long 0x00 27.--27. " PD27 ,GP27 Pin Direction" "I,O" bitfld.long 0x00 26.--26. " PD26 ,GP26 Pin Direction" "I,O" bitfld.long 0x00 25.--25. " PD25 ,GP25 Pin Direction" "I,O" bitfld.long 0x00 24.--24. " PD24 ,GP24 Pin Direction" "I,O" textline " " bitfld.long 0x00 23.--23. "PD23 ,GP23 Pin Direction" "I,O" bitfld.long 0x00 22.--22. " PD22 ,GP22 Pin Direction" "I,O" bitfld.long 0x00 21.--21. " PD21 ,GP21 Pin Direction" "I,O" bitfld.long 0x00 20.--20. " PD20 ,GP20 Pin Direction" "I,O" bitfld.long 0x00 19.--19. " PD19 ,GP19 Pin Direction" "I,O" bitfld.long 0x00 18.--18. " PD18 ,GP18 Pin Direction" "I,O" bitfld.long 0x00 17.--17. " PD17 ,GP17 Pin Direction" "I,O" bitfld.long 0x00 16.--16. " PD16 ,GP16 Pin Direction" "I,O" textline " " bitfld.long 0x00 15.--15. "PD15 ,GP15 Pin Direction" "I,O" bitfld.long 0x00 14.--14. " PD14 ,GP14 Pin Direction" "I,O" bitfld.long 0x00 13.--13. " PD13 ,GP13 Pin Direction" "I,O" bitfld.long 0x00 12.--12. " PD12 ,GP12 Pin Direction" "I,O" bitfld.long 0x00 11.--11. " PD11 ,GP11 Pin Direction" "I,O" bitfld.long 0x00 10.--10. " PD10 ,GP10 Pin Direction" "I,O" bitfld.long 0x00 9.--9. " PD9 ,GP9 Pin Direction" "I,O" bitfld.long 0x00 8.--8. " PD8 ,GP8 Pin Direction" "I,O" textline " " bitfld.long 0x00 7.--7. "PD7 ,GP7 Pin Direction" "I,O" bitfld.long 0x00 6.--6. " PD6 ,GP6 Pin Direction" "I,O" bitfld.long 0x00 5.--5. " PD5 ,GP5 Pin Direction" "I,O" bitfld.long 0x00 4.--4. " PD4 ,GP4 Pin Direction" "I,O" bitfld.long 0x00 3.--3. " PD3 ,GP3 Pin Direction" "I,O" bitfld.long 0x00 2.--2. " PD2 ,GP2 Pin Direction" "I,O" bitfld.long 0x00 1.--1. " PD1 ,GP1 Pin Direction" "I,O" bitfld.long 0x00 0.--0. " PD0 ,GP0 Pin Direction" "I,O" line.long 0x04 "GPDR1,GPIO Pin Direction Register GPIO<63:32>" bitfld.long 0x04 31.--31. " PD63 ,GP63 Pin Direction" "I,O" bitfld.long 0x04 30.--30. " PD62 ,GP62 Pin Direction" "I,O" bitfld.long 0x04 29.--29. " PD61 ,GP61 Pin Direction" "I,O" bitfld.long 0x04 28.--28. " PD60 ,GP60 Pin Direction" "I,O" bitfld.long 0x04 27.--27. " PD59 ,GP59 Pin Direction" "I,O" bitfld.long 0x04 26.--26. " PD58 ,GP58 Pin Direction" "I,O" bitfld.long 0x04 25.--25. " PD57 ,GP57 Pin Direction" "I,O" bitfld.long 0x04 24.--24. " PD56 ,GP56 Pin Direction" "I,O" textline " " bitfld.long 0x04 23.--23. "PD55 ,GP55 Pin Direction" "I,O" bitfld.long 0x04 22.--22. " PD54 ,GP54 Pin Direction" "I,O" bitfld.long 0x04 21.--21. " PD53 ,GP53 Pin Direction" "I,O" bitfld.long 0x04 20.--20. " PD52 ,GP52 Pin Direction" "I,O" bitfld.long 0x04 19.--19. " PD51 ,GP51 Pin Direction" "I,O" bitfld.long 0x04 18.--18. " PD50 ,GP50 Pin Direction" "I,O" bitfld.long 0x04 17.--17. " PD49 ,GP49 Pin Direction" "I,O" bitfld.long 0x04 16.--16. " PD48 ,GP48 Pin Direction" "I,O" textline " " bitfld.long 0x04 15.--15. "PD47 ,GP47 Pin Direction" "I,O" bitfld.long 0x04 14.--14. " PD46 ,GP46 Pin Direction" "I,O" bitfld.long 0x04 13.--13. " PD45 ,GP45 Pin Direction" "I,O" bitfld.long 0x04 12.--12. " PD44 ,GP44 Pin Direction" "I,O" bitfld.long 0x04 11.--11. " PD43 ,GP43 Pin Direction" "I,O" bitfld.long 0x04 10.--10. " PD42 ,GP42 Pin Direction" "I,O" bitfld.long 0x04 9.--9. " PD41 ,GP41 Pin Direction" "I,O" bitfld.long 0x04 8.--8. " PD40 ,GP40 Pin Direction" "I,O" textline " " bitfld.long 0x04 7.--7. "PD39 ,GP39 Pin Direction" "I,O" bitfld.long 0x04 6.--6. " PD38 ,GP38 Pin Direction" "I,O" bitfld.long 0x04 5.--5. " PD37 ,GP37 Pin Direction" "I,O" bitfld.long 0x04 4.--4. " PD36 ,GP36 Pin Direction" "I,O" bitfld.long 0x04 3.--3. " PD35 ,GP35 Pin Direction" "I,O" bitfld.long 0x04 2.--2. " PD34 ,GP34 Pin Direction" "I,O" bitfld.long 0x04 1.--1. " PD33 ,GP33 Pin Direction" "I,O" bitfld.long 0x04 0.--0. " PD32 ,GP32 Pin Direction" "I,O" line.long 0x08 "GPDR2,GPIO Pin Direction Register GPIO<80:64>" bitfld.long 0x08 16.--16. " PD80 ,GP80 Pin Direction" "I,O" textline " " bitfld.long 0x08 15.--15. "PD79 ,GP79 Pin Direction" "I,O" bitfld.long 0x08 14.--14. " PD78 ,GP78 Pin Direction" "I,O" bitfld.long 0x08 13.--13. " PD77 ,GP77 Pin Direction" "I,O" bitfld.long 0x08 12.--12. " PD76 ,GP76 Pin Direction" "I,O" bitfld.long 0x08 11.--11. " PD75 ,GP75 Pin Direction" "I,O" bitfld.long 0x08 10.--10. " PD74 ,GP74 Pin Direction" "I,O" bitfld.long 0x08 9.--9. " PD73 ,GP73 Pin Direction" "I,O" bitfld.long 0x08 8.--8. " PD72 ,GP72 Pin Direction" "I,O" textline " " bitfld.long 0x08 7.--7. "PD71 ,GP71 Pin Direction" "I,O" bitfld.long 0x08 6.--6. " PD70 ,GP70 Pin Direction" "I,O" bitfld.long 0x08 5.--5. " PD69 ,GP69 Pin Direction" "I,O" bitfld.long 0x08 4.--4. " PD68 ,GP68 Pin Direction" "I,O" bitfld.long 0x08 3.--3. " PD67 ,GP67 Pin Direction" "I,O" bitfld.long 0x08 2.--2. " PD66 ,GP66 Pin Direction" "I,O" bitfld.long 0x08 1.--1. " PD65 ,GP65 Pin Direction" "I,O" bitfld.long 0x08 0.--0. " PD64 ,GP64 Pin Direction" "I,O" textline " " group asd:0x40e00018++0x0b line.long 0x00 "GPSR0,GPIO Pin Output Set Register GPIO<31:0>" bitfld.long 0x00 31.--31. " PS31 ,GP31 Output Pin Set" "-,H" bitfld.long 0x00 30.--30. " PS30 ,GP30 Output Pin Set" "-,H" bitfld.long 0x00 29.--29. " PS29 ,GP29 Output Pin Set" "-,H" bitfld.long 0x00 28.--28. " PS28 ,GP28 Output Pin Set" "-,H" bitfld.long 0x00 27.--27. " PS27 ,GP27 Output Pin Set" "-,H" bitfld.long 0x00 26.--26. " PS26 ,GP26 Output Pin Set" "-,H" bitfld.long 0x00 25.--25. " PS25 ,GP25 Output Pin Set" "-,H" bitfld.long 0x00 24.--24. " PS24 ,GP24 Output Pin Set" "-,H" textline " " bitfld.long 0x00 23.--23. "PS23 ,GP23 Output Pin Set" "-,H" bitfld.long 0x00 22.--22. " PS22 ,GP22 Output Pin Set" "-,H" bitfld.long 0x00 21.--21. " PS21 ,GP21 Output Pin Set" "-,H" bitfld.long 0x00 20.--20. " PS20 ,GP20 Output Pin Set" "-,H" bitfld.long 0x00 19.--19. " PS19 ,GP19 Output Pin Set" "-,H" bitfld.long 0x00 18.--18. " PS18 ,GP18 Output Pin Set" "-,H" bitfld.long 0x00 17.--17. " PS17 ,GP17 Output Pin Set" "-,H" bitfld.long 0x00 16.--16. " PS16 ,GP16 Output Pin Set" "-,H" textline " " bitfld.long 0x00 15.--15. "PS15 ,GP15 Output Pin Set" "-,H" bitfld.long 0x00 14.--14. " PS14 ,GP14 Output Pin Set" "-,H" bitfld.long 0x00 13.--13. " PS13 ,GP13 Output Pin Set" "-,H" bitfld.long 0x00 12.--12. " PS12 ,GP12 Output Pin Set" "-,H" bitfld.long 0x00 11.--11. " PS11 ,GP11 Output Pin Set" "-,H" bitfld.long 0x00 10.--10. " PS10 ,GP10 Output Pin Set" "-,H" bitfld.long 0x00 9.--9. " PS9 ,GP9 Output Pin Set" "-,H" bitfld.long 0x00 8.--8. " PS8 ,GP8 Output Pin Set" "-,H" textline " " bitfld.long 0x00 7.--7. "PS7 ,GP7 Output Pin Set" "-,H" bitfld.long 0x00 6.--6. " PS6 ,GP6 Output Pin Set" "-,H" bitfld.long 0x00 5.--5. " PS5 ,GP5 Output Pin Set" "-,H" bitfld.long 0x00 4.--4. " PS4 ,GP4 Output Pin Set" "-,H" bitfld.long 0x00 3.--3. " PS3 ,GP3 Output Pin Set" "-,H" bitfld.long 0x00 2.--2. " PS2 ,GP2 Output Pin Set" "-,H" bitfld.long 0x00 1.--1. " PS1 ,GP1 Output Pin Set" "-,H" bitfld.long 0x00 0.--0. " PS0 ,GP0 Output Pin Set" "-,H" line.long 0x04 "GPSR1,GPIO Pin Output Set Register GPIO<63:32>" bitfld.long 0x04 31.--31. " PS63 ,GP63 Output Pin Set" "-,H" bitfld.long 0x04 30.--30. " PS62 ,GP62 Output Pin Set" "-,H" bitfld.long 0x04 29.--29. " PS61 ,GP61 Output Pin Set" "-,H" bitfld.long 0x04 28.--28. " PS60 ,GP60 Output Pin Set" "-,H" bitfld.long 0x04 27.--27. " PS59 ,GP59 Output Pin Set" "-,H" bitfld.long 0x04 26.--26. " PS58 ,GP58 Output Pin Set" "-,H" bitfld.long 0x04 25.--25. " PS57 ,GP57 Output Pin Set" "-,H" bitfld.long 0x04 24.--24. " PS56 ,GP56 Output Pin Set" "-,H" textline " " bitfld.long 0x04 23.--23. "PS55 ,GP55 Output Pin Set" "-,H" bitfld.long 0x04 22.--22. " PS54 ,GP54 Output Pin Set" "-,H" bitfld.long 0x04 21.--21. " PS53 ,GP53 Output Pin Set" "-,H" bitfld.long 0x04 20.--20. " PS52 ,GP52 Output Pin Set" "-,H" bitfld.long 0x04 19.--19. " PS51 ,GP51 Output Pin Set" "-,H" bitfld.long 0x04 18.--18. " PS50 ,GP50 Output Pin Set" "-,H" bitfld.long 0x04 17.--17. " PS49 ,GP49 Output Pin Set" "-,H" bitfld.long 0x04 16.--16. " PS48 ,GP48 Output Pin Set" "-,H" textline " " bitfld.long 0x04 15.--15. "PS47 ,GP47 Output Pin Set" "-,H" bitfld.long 0x04 14.--14. " PS46 ,GP46 Output Pin Set" "-,H" bitfld.long 0x04 13.--13. " PS45 ,GP45 Output Pin Set" "-,H" bitfld.long 0x04 12.--12. " PS44 ,GP44 Output Pin Set" "-,H" bitfld.long 0x04 11.--11. " PS43 ,GP43 Output Pin Set" "-,H" bitfld.long 0x04 10.--10. " PS42 ,GP42 Output Pin Set" "-,H" bitfld.long 0x04 9.--9. " PS41 ,GP41 Output Pin Set" "-,H" bitfld.long 0x04 8.--8. " PS40 ,GP40 Output Pin Set" "-,H" textline " " bitfld.long 0x04 7.--7. "PS39 ,GP39 Output Pin Set" "-,H" bitfld.long 0x04 6.--6. " PS38 ,GP38 Output Pin Set" "-,H" bitfld.long 0x04 5.--5. " PS37 ,GP37 Output Pin Set" "-,H" bitfld.long 0x04 4.--4. " PS36 ,GP36 Output Pin Set" "-,H" bitfld.long 0x04 3.--3. " PS35 ,GP35 Output Pin Set" "-,H" bitfld.long 0x04 2.--2. " PS34 ,GP34 Output Pin Set" "-,H" bitfld.long 0x04 1.--1. " PS33 ,GP33 Output Pin Set" "-,H" bitfld.long 0x04 0.--0. " PS32 ,GP32 Output Pin Set" "-,H" line.long 0x08 "GPSR2,GPIO Pin Output Set Register GPIO<80:64>" bitfld.long 0x08 16.--16. " PS80 ,GP80 Output Pin Set" "-,H" textline " " bitfld.long 0x08 15.--15. "PS79 ,GP79 Output Pin Set" "-,H" bitfld.long 0x08 14.--14. " PS78 ,GP78 Output Pin Set" "-,H" bitfld.long 0x08 13.--13. " PS77 ,GP77 Output Pin Set" "-,H" bitfld.long 0x08 12.--12. " PS76 ,GP76 Output Pin Set" "-,H" bitfld.long 0x08 11.--11. " PS75 ,GP75 Output Pin Set" "-,H" bitfld.long 0x08 10.--10. " PS74 ,GP74 Output Pin Set" "-,H" bitfld.long 0x08 9.--9. " PS73 ,GP73 Output Pin Set" "-,H" bitfld.long 0x08 8.--8. " PS72 ,GP72 Output Pin Set" "-,H" textline " " bitfld.long 0x08 7.--7. "PS71 ,GP71 Output Pin Set" "-,H" bitfld.long 0x08 6.--6. " PS70 ,GP70 Output Pin Set" "-,H" bitfld.long 0x08 5.--5. " PS69 ,GP69 Output Pin Set" "-,H" bitfld.long 0x08 4.--4. " PS68 ,GP68 Output Pin Set" "-,H" bitfld.long 0x08 3.--3. " PS67 ,GP67 Output Pin Set" "-,H" bitfld.long 0x08 2.--2. " PS66 ,GP66 Output Pin Set" "-,H" bitfld.long 0x08 1.--1. " PS65 ,GP65 Output Pin Set" "-,H" bitfld.long 0x08 0.--0. " PS64 ,GP64 Output Pin Set" "-,H" textline " " group asd:0x40e00024++0x0b line.long 0x00 "GPCR0,GPIO Pin Output Clear Register GPIO<31:0>" bitfld.long 0x00 31.--31. " PC31 ,GP31 Output Pin Clear" "-,L" bitfld.long 0x00 30.--30. " PC30 ,GP30 Output Pin Clear" "-,L" bitfld.long 0x00 29.--29. " PC29 ,GP29 Output Pin Clear" "-,L" bitfld.long 0x00 28.--28. " PC28 ,GP28 Output Pin Clear" "-,L" bitfld.long 0x00 27.--27. " PC27 ,GP27 Output Pin Clear" "-,L" bitfld.long 0x00 26.--26. " PC26 ,GP26 Output Pin Clear" "-,L" bitfld.long 0x00 25.--25. " PC25 ,GP25 Output Pin Clear" "-,L" bitfld.long 0x00 24.--24. " PC24 ,GP24 Output Pin Clear" "-,L" textline " " bitfld.long 0x00 23.--23. "PC23 ,GP23 Output Pin Clear" "-,L" bitfld.long 0x00 22.--22. " PC22 ,GP22 Output Pin Clear" "-,L" bitfld.long 0x00 21.--21. " PC21 ,GP21 Output Pin Clear" "-,L" bitfld.long 0x00 20.--20. " PC20 ,GP20 Output Pin Clear" "-,L" bitfld.long 0x00 19.--19. " PC19 ,GP19 Output Pin Clear" "-,L" bitfld.long 0x00 18.--18. " PC18 ,GP18 Output Pin Clear" "-,L" bitfld.long 0x00 17.--17. " PC17 ,GP17 Output Pin Clear" "-,L" bitfld.long 0x00 16.--16. " PC16 ,GP16 Output Pin Clear" "-,L" textline " " bitfld.long 0x00 15.--15. "PC15 ,GP15 Output Pin Clear" "-,L" bitfld.long 0x00 14.--14. " PC14 ,GP14 Output Pin Clear" "-,L" bitfld.long 0x00 13.--13. " PC13 ,GP13 Output Pin Clear" "-,L" bitfld.long 0x00 12.--12. " PC12 ,GP12 Output Pin Clear" "-,L" bitfld.long 0x00 11.--11. " PC11 ,GP11 Output Pin Clear" "-,L" bitfld.long 0x00 10.--10. " PC10 ,GP10 Output Pin Clear" "-,L" bitfld.long 0x00 9.--9. " PC9 ,GP9 Output Pin Clear" "-,L" bitfld.long 0x00 8.--8. " PC8 ,GP8 Output Pin Clear" "-,L" textline " " bitfld.long 0x00 7.--7. "PC7 ,GP7 Output Pin Clear" "-,L" bitfld.long 0x00 6.--6. " PC6 ,GP6 Output Pin Clear" "-,L" bitfld.long 0x00 5.--5. " PC5 ,GP5 Output Pin Clear" "-,L" bitfld.long 0x00 4.--4. " PC4 ,GP4 Output Pin Clear" "-,L" bitfld.long 0x00 3.--3. " PC3 ,GP3 Output Pin Clear" "-,L" bitfld.long 0x00 2.--2. " PC2 ,GP2 Output Pin Clear" "-,L" bitfld.long 0x00 1.--1. " PC1 ,GP1 Output Pin Clear" "-,L" bitfld.long 0x00 0.--0. " PC0 ,GP0 Output Pin Clear" "-,L" line.long 0x04 "GPCR1,GPIO Pin Output Clear Register GPIO<63:32>" bitfld.long 0x04 31.--31. " PC63 ,GP63 Output Pin Clear" "-,L" bitfld.long 0x04 30.--30. " PC62 ,GP62 Output Pin Clear" "-,L" bitfld.long 0x04 29.--29. " PC61 ,GP61 Output Pin Clear" "-,L" bitfld.long 0x04 28.--28. " PC60 ,GP60 Output Pin Clear" "-,L" bitfld.long 0x04 27.--27. " PC59 ,GP59 Output Pin Clear" "-,L" bitfld.long 0x04 26.--26. " PC58 ,GP58 Output Pin Clear" "-,L" bitfld.long 0x04 25.--25. " PC57 ,GP57 Output Pin Clear" "-,L" bitfld.long 0x04 24.--24. " PC56 ,GP56 Output Pin Clear" "-,L" textline " " bitfld.long 0x04 23.--23. "PC55 ,GP55 Output Pin Clear" "-,L" bitfld.long 0x04 22.--22. " PC54 ,GP54 Output Pin Clear" "-,L" bitfld.long 0x04 21.--21. " PC53 ,GP53 Output Pin Clear" "-,L" bitfld.long 0x04 20.--20. " PC52 ,GP52 Output Pin Clear" "-,L" bitfld.long 0x04 19.--19. " PC51 ,GP51 Output Pin Clear" "-,L" bitfld.long 0x04 18.--18. " PC50 ,GP50 Output Pin Clear" "-,L" bitfld.long 0x04 17.--17. " PC49 ,GP49 Output Pin Clear" "-,L" bitfld.long 0x04 16.--16. " PC48 ,GP48 Output Pin Clear" "-,L" textline " " bitfld.long 0x04 15.--15. "PC47 ,GP47 Output Pin Clear" "-,L" bitfld.long 0x04 14.--14. " PC46 ,GP46 Output Pin Clear" "-,L" bitfld.long 0x04 13.--13. " PC45 ,GP45 Output Pin Clear" "-,L" bitfld.long 0x04 12.--12. " PC44 ,GP44 Output Pin Clear" "-,L" bitfld.long 0x04 11.--11. " PC43 ,GP43 Output Pin Clear" "-,L" bitfld.long 0x04 10.--10. " PC42 ,GP42 Output Pin Clear" "-,L" bitfld.long 0x04 9.--9. " PC41 ,GP41 Output Pin Clear" "-,L" bitfld.long 0x04 8.--8. " PC40 ,GP40 Output Pin Clear" "-,L" textline " " bitfld.long 0x04 7.--7. "PC39 ,GP39 Output Pin Clear" "-,L" bitfld.long 0x04 6.--6. " PC38 ,GP38 Output Pin Clear" "-,L" bitfld.long 0x04 5.--5. " PC37 ,GP37 Output Pin Clear" "-,L" bitfld.long 0x04 4.--4. " PC36 ,GP36 Output Pin Clear" "-,L" bitfld.long 0x04 3.--3. " PC35 ,GP35 Output Pin Clear" "-,L" bitfld.long 0x04 2.--2. " PC34 ,GP34 Output Pin Clear" "-,L" bitfld.long 0x04 1.--1. " PC33 ,GP33 Output Pin Clear" "-,L" bitfld.long 0x04 0.--0. " PC32 ,GP32 Output Pin Clear" "-,L" line.long 0x08 "GPCR2,GPIO Pin Output Clear Register GPIO<80:64>" bitfld.long 0x08 16.--16. " PC80 ,GP80 Output Pin Clear" "-,L" textline " " bitfld.long 0x08 15.--15. "PC79 ,GP79 Output Pin Clear" "-,L" bitfld.long 0x08 14.--14. " PC78 ,GP78 Output Pin Clear" "-,L" bitfld.long 0x08 13.--13. " PC77 ,GP77 Output Pin Clear" "-,L" bitfld.long 0x08 12.--12. " PC76 ,GP76 Output Pin Clear" "-,L" bitfld.long 0x08 11.--11. " PC75 ,GP75 Output Pin Clear" "-,L" bitfld.long 0x08 10.--10. " PC74 ,GP74 Output Pin Clear" "-,L" bitfld.long 0x08 9.--9. " PC73 ,GP73 Output Pin Clear" "-,L" bitfld.long 0x08 8.--8. " PC72 ,GP72 Output Pin Clear" "-,L" textline " " bitfld.long 0x08 7.--7. "PC71 ,GP71 Output Pin Clear" "-,L" bitfld.long 0x08 6.--6. " PC70 ,GP70 Output Pin Clear" "-,L" bitfld.long 0x08 5.--5. " PC69 ,GP69 Output Pin Clear" "-,L" bitfld.long 0x08 4.--4. " PC68 ,GP68 Output Pin Clear" "-,L" bitfld.long 0x08 3.--3. " PC67 ,GP67 Output Pin Clear" "-,L" bitfld.long 0x08 2.--2. " PC66 ,GP66 Output Pin Clear" "-,L" bitfld.long 0x08 1.--1. " PC65 ,GP65 Output Pin Clear" "-,L" bitfld.long 0x08 0.--0. " PC64 ,GP64 Output Pin Clear" "-,L" textline " " group asd:0x40e00030++0x0b line.long 0x00 "GRER0,GPIO Rising-Edge Detect Register GPIO<31:0>" bitfld.long 0x00 31.--31. " RE31 ,GP31 Rising Edge Detect" "dis,ena" bitfld.long 0x00 30.--30. " RE30 ,GP30 Rising Edge Detect" "dis,ena" bitfld.long 0x00 29.--29. " RE29 ,GP29 Rising Edge Detect" "dis,ena" bitfld.long 0x00 28.--28. " RE28 ,GP28 Rising Edge Detect" "dis,ena" bitfld.long 0x00 27.--27. " RE27 ,GP27 Rising Edge Detect" "dis,ena" bitfld.long 0x00 26.--26. " RE26 ,GP26 Rising Edge Detect" "dis,ena" bitfld.long 0x00 25.--25. " RE25 ,GP25 Rising Edge Detect" "dis,ena" bitfld.long 0x00 24.--24. " RE24 ,GP24 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x00 23.--23. "RE23 ,GP23 Rising Edge Detect" "dis,ena" bitfld.long 0x00 22.--22. " RE22 ,GP22 Rising Edge Detect" "dis,ena" bitfld.long 0x00 21.--21. " RE21 ,GP21 Rising Edge Detect" "dis,ena" bitfld.long 0x00 20.--20. " RE20 ,GP20 Rising Edge Detect" "dis,ena" bitfld.long 0x00 19.--19. " RE19 ,GP19 Rising Edge Detect" "dis,ena" bitfld.long 0x00 18.--18. " RE18 ,GP18 Rising Edge Detect" "dis,ena" bitfld.long 0x00 17.--17. " RE17 ,GP17 Rising Edge Detect" "dis,ena" bitfld.long 0x00 16.--16. " RE16 ,GP16 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x00 15.--15. "RE15 ,GP15 Rising Edge Detect" "dis,ena" bitfld.long 0x00 14.--14. " RE14 ,GP14 Rising Edge Detect" "dis,ena" bitfld.long 0x00 13.--13. " RE13 ,GP13 Rising Edge Detect" "dis,ena" bitfld.long 0x00 12.--12. " RE12 ,GP12 Rising Edge Detect" "dis,ena" bitfld.long 0x00 11.--11. " RE11 ,GP11 Rising Edge Detect" "dis,ena" bitfld.long 0x00 10.--10. " RE10 ,GP10 Rising Edge Detect" "dis,ena" bitfld.long 0x00 9.--9. " RE9 ,GP9 Rising Edge Detect" "dis,ena" bitfld.long 0x00 8.--8. " RE8 ,GP8 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. "RE7 ,GP7 Rising Edge Detect" "dis,ena" bitfld.long 0x00 6.--6. " RE6 ,GP6 Rising Edge Detect" "dis,ena" bitfld.long 0x00 5.--5. " RE5 ,GP5 Rising Edge Detect" "dis,ena" bitfld.long 0x00 4.--4. " RE4 ,GP4 Rising Edge Detect" "dis,ena" bitfld.long 0x00 3.--3. " RE3 ,GP3 Rising Edge Detect" "dis,ena" bitfld.long 0x00 2.--2. " RE2 ,GP2 Rising Edge Detect" "dis,ena" bitfld.long 0x00 1.--1. " RE1 ,GP1 Rising Edge Detect" "dis,ena" bitfld.long 0x00 0.--0. " RE0 ,GP0 Rising Edge Detect" "dis,ena" line.long 0x04 "GRER1,GPIO Rising-Edge Detect Register GPIO<63:32>" bitfld.long 0x04 31.--31. " RE63 ,GP63 Rising Edge Detect" "dis,ena" bitfld.long 0x04 30.--30. " RE62 ,GP62 Rising Edge Detect" "dis,ena" bitfld.long 0x04 29.--29. " RE61 ,GP61 Rising Edge Detect" "dis,ena" bitfld.long 0x04 28.--28. " RE60 ,GP60 Rising Edge Detect" "dis,ena" bitfld.long 0x04 27.--27. " RE59 ,GP59 Rising Edge Detect" "dis,ena" bitfld.long 0x04 26.--26. " RE58 ,GP58 Rising Edge Detect" "dis,ena" bitfld.long 0x04 25.--25. " RE57 ,GP57 Rising Edge Detect" "dis,ena" bitfld.long 0x04 24.--24. " RE56 ,GP56 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x04 23.--23. "RE55 ,GP55 Rising Edge Detect" "dis,ena" bitfld.long 0x04 22.--22. " RE54 ,GP54 Rising Edge Detect" "dis,ena" bitfld.long 0x04 21.--21. " RE53 ,GP53 Rising Edge Detect" "dis,ena" bitfld.long 0x04 20.--20. " RE52 ,GP52 Rising Edge Detect" "dis,ena" bitfld.long 0x04 19.--19. " RE51 ,GP51 Rising Edge Detect" "dis,ena" bitfld.long 0x04 18.--18. " RE50 ,GP50 Rising Edge Detect" "dis,ena" bitfld.long 0x04 17.--17. " RE49 ,GP49 Rising Edge Detect" "dis,ena" bitfld.long 0x04 16.--16. " RE48 ,GP48 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x04 15.--15. "RE47 ,GP47 Rising Edge Detect" "dis,ena" bitfld.long 0x04 14.--14. " RE46 ,GP46 Rising Edge Detect" "dis,ena" bitfld.long 0x04 13.--13. " RE45 ,GP45 Rising Edge Detect" "dis,ena" bitfld.long 0x04 12.--12. " RE44 ,GP44 Rising Edge Detect" "dis,ena" bitfld.long 0x04 11.--11. " RE43 ,GP43 Rising Edge Detect" "dis,ena" bitfld.long 0x04 10.--10. " RE42 ,GP42 Rising Edge Detect" "dis,ena" bitfld.long 0x04 9.--9. " RE41 ,GP41 Rising Edge Detect" "dis,ena" bitfld.long 0x04 8.--8. " RE40 ,GP40 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x04 7.--7. "RE39 ,GP39 Rising Edge Detect" "dis,ena" bitfld.long 0x04 6.--6. " RE38 ,GP38 Rising Edge Detect" "dis,ena" bitfld.long 0x04 5.--5. " RE37 ,GP37 Rising Edge Detect" "dis,ena" bitfld.long 0x04 4.--4. " RE36 ,GP36 Rising Edge Detect" "dis,ena" bitfld.long 0x04 3.--3. " RE35 ,GP35 Rising Edge Detect" "dis,ena" bitfld.long 0x04 2.--2. " RE34 ,GP34 Rising Edge Detect" "dis,ena" bitfld.long 0x04 1.--1. " RE33 ,GP33 Rising Edge Detect" "dis,ena" bitfld.long 0x04 0.--0. " RE32 ,GP32 Rising Edge Detect" "dis,ena" line.long 0x08 "GRER2,GPIO Rising-Edge Detect Register GPIO<80:64>" bitfld.long 0x08 16.--16. " RE80 ,GP80 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x08 15.--15. "RE79 ,GP79 Rising Edge Detect" "dis,ena" bitfld.long 0x08 14.--14. " RE78 ,GP78 Rising Edge Detect" "dis,ena" bitfld.long 0x08 13.--13. " RE77 ,GP77 Rising Edge Detect" "dis,ena" bitfld.long 0x08 12.--12. " RE76 ,GP76 Rising Edge Detect" "dis,ena" bitfld.long 0x08 11.--11. " RE75 ,GP75 Rising Edge Detect" "dis,ena" bitfld.long 0x08 10.--10. " RE74 ,GP74 Rising Edge Detect" "dis,ena" bitfld.long 0x08 9.--9. " RE73 ,GP73 Rising Edge Detect" "dis,ena" bitfld.long 0x08 8.--8. " RE72 ,GP72 Rising Edge Detect" "dis,ena" textline " " bitfld.long 0x08 7.--7. "RE71 ,GP71 Rising Edge Detect" "dis,ena" bitfld.long 0x08 6.--6. " RE70 ,GP70 Rising Edge Detect" "dis,ena" bitfld.long 0x08 5.--5. " RE69 ,GP69 Rising Edge Detect" "dis,ena" bitfld.long 0x08 4.--4. " RE68 ,GP68 Rising Edge Detect" "dis,ena" bitfld.long 0x08 3.--3. " RE67 ,GP67 Rising Edge Detect" "dis,ena" bitfld.long 0x08 2.--2. " RE66 ,GP66 Rising Edge Detect" "dis,ena" bitfld.long 0x08 1.--1. " RE65 ,GP65 Rising Edge Detect" "dis,ena" bitfld.long 0x08 0.--0. " RE64 ,GP64 Rising Edge Detect" "dis,ena" textline " " group asd:0x40e0003c++0x0b line.long 0x00 "GFER0,GPIO Falling-Edge Detect Register GPIO<31:0>" bitfld.long 0x00 31.--31. " FE31 ,GP31 Falling Edge Detect" "dis,ena" bitfld.long 0x00 30.--30. " FE30 ,GP30 Falling Edge Detect" "dis,ena" bitfld.long 0x00 29.--29. " FE29 ,GP29 Falling Edge Detect" "dis,ena" bitfld.long 0x00 28.--28. " FE28 ,GP28 Falling Edge Detect" "dis,ena" bitfld.long 0x00 27.--27. " FE27 ,GP27 Falling Edge Detect" "dis,ena" bitfld.long 0x00 26.--26. " FE26 ,GP26 Falling Edge Detect" "dis,ena" bitfld.long 0x00 25.--25. " FE25 ,GP25 Falling Edge Detect" "dis,ena" bitfld.long 0x00 24.--24. " FE24 ,GP24 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x00 23.--23. "FE23 ,GP23 Falling Edge Detect" "dis,ena" bitfld.long 0x00 22.--22. " FE22 ,GP22 Falling Edge Detect" "dis,ena" bitfld.long 0x00 21.--21. " FE21 ,GP21 Falling Edge Detect" "dis,ena" bitfld.long 0x00 20.--20. " FE20 ,GP20 Falling Edge Detect" "dis,ena" bitfld.long 0x00 19.--19. " FE19 ,GP19 Falling Edge Detect" "dis,ena" bitfld.long 0x00 18.--18. " FE18 ,GP18 Falling Edge Detect" "dis,ena" bitfld.long 0x00 17.--17. " FE17 ,GP17 Falling Edge Detect" "dis,ena" bitfld.long 0x00 16.--16. " FE16 ,GP16 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x00 15.--15. "FE15 ,GP15 Falling Edge Detect" "dis,ena" bitfld.long 0x00 14.--14. " FE14 ,GP14 Falling Edge Detect" "dis,ena" bitfld.long 0x00 13.--13. " FE13 ,GP13 Falling Edge Detect" "dis,ena" bitfld.long 0x00 12.--12. " FE12 ,GP12 Falling Edge Detect" "dis,ena" bitfld.long 0x00 11.--11. " FE11 ,GP11 Falling Edge Detect" "dis,ena" bitfld.long 0x00 10.--10. " FE10 ,GP10 Falling Edge Detect" "dis,ena" bitfld.long 0x00 9.--9. " FE9 ,GP9 Falling Edge Detect" "dis,ena" bitfld.long 0x00 8.--8. " FE8 ,GP8 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. "FE7 ,GP7 Falling Edge Detect" "dis,ena" bitfld.long 0x00 6.--6. " FE6 ,GP6 Falling Edge Detect" "dis,ena" bitfld.long 0x00 5.--5. " FE5 ,GP5 Falling Edge Detect" "dis,ena" bitfld.long 0x00 4.--4. " FE4 ,GP4 Falling Edge Detect" "dis,ena" bitfld.long 0x00 3.--3. " FE3 ,GP3 Falling Edge Detect" "dis,ena" bitfld.long 0x00 2.--2. " FE2 ,GP2 Falling Edge Detect" "dis,ena" bitfld.long 0x00 1.--1. " FE1 ,GP1 Falling Edge Detect" "dis,ena" bitfld.long 0x00 0.--0. " FE0 ,GP0 Falling Edge Detect" "dis,ena" line.long 0x04 "GFER1,GPIO Falling-Edge Detect Register GPIO<63:32>" bitfld.long 0x04 31.--31. " FE63 ,GP63 Falling Edge Detect" "dis,ena" bitfld.long 0x04 30.--30. " FE62 ,GP62 Falling Edge Detect" "dis,ena" bitfld.long 0x04 29.--29. " FE61 ,GP61 Falling Edge Detect" "dis,ena" bitfld.long 0x04 28.--28. " FE60 ,GP60 Falling Edge Detect" "dis,ena" bitfld.long 0x04 27.--27. " FE59 ,GP59 Falling Edge Detect" "dis,ena" bitfld.long 0x04 26.--26. " FE58 ,GP58 Falling Edge Detect" "dis,ena" bitfld.long 0x04 25.--25. " FE57 ,GP57 Falling Edge Detect" "dis,ena" bitfld.long 0x04 24.--24. " FE56 ,GP56 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x04 23.--23. "FE55 ,GP55 Falling Edge Detect" "dis,ena" bitfld.long 0x04 22.--22. " FE54 ,GP54 Falling Edge Detect" "dis,ena" bitfld.long 0x04 21.--21. " FE53 ,GP53 Falling Edge Detect" "dis,ena" bitfld.long 0x04 20.--20. " FE52 ,GP52 Falling Edge Detect" "dis,ena" bitfld.long 0x04 19.--19. " FE51 ,GP51 Falling Edge Detect" "dis,ena" bitfld.long 0x04 18.--18. " FE50 ,GP50 Falling Edge Detect" "dis,ena" bitfld.long 0x04 17.--17. " FE49 ,GP49 Falling Edge Detect" "dis,ena" bitfld.long 0x04 16.--16. " FE48 ,GP48 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x04 15.--15. "FE47 ,GP47 Falling Edge Detect" "dis,ena" bitfld.long 0x04 14.--14. " FE46 ,GP46 Falling Edge Detect" "dis,ena" bitfld.long 0x04 13.--13. " FE45 ,GP45 Falling Edge Detect" "dis,ena" bitfld.long 0x04 12.--12. " FE44 ,GP44 Falling Edge Detect" "dis,ena" bitfld.long 0x04 11.--11. " FE43 ,GP43 Falling Edge Detect" "dis,ena" bitfld.long 0x04 10.--10. " FE42 ,GP42 Falling Edge Detect" "dis,ena" bitfld.long 0x04 9.--9. " FE41 ,GP41 Falling Edge Detect" "dis,ena" bitfld.long 0x04 8.--8. " FE40 ,GP40 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x04 7.--7. "FE39 ,GP39 Falling Edge Detect" "dis,ena" bitfld.long 0x04 6.--6. " FE38 ,GP38 Falling Edge Detect" "dis,ena" bitfld.long 0x04 5.--5. " FE37 ,GP37 Falling Edge Detect" "dis,ena" bitfld.long 0x04 4.--4. " FE36 ,GP36 Falling Edge Detect" "dis,ena" bitfld.long 0x04 3.--3. " FE35 ,GP35 Falling Edge Detect" "dis,ena" bitfld.long 0x04 2.--2. " FE34 ,GP34 Falling Edge Detect" "dis,ena" bitfld.long 0x04 1.--1. " FE33 ,GP33 Falling Edge Detect" "dis,ena" bitfld.long 0x04 0.--0. " FE32 ,GP32 Falling Edge Detect" "dis,ena" line.long 0x08 "GFER2,GPIO Falling-Edge Detect Register GPIO<80:64>" bitfld.long 0x08 16.--16. " FE80 ,GP80 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x08 15.--15. "FE79 ,GP79 Falling Edge Detect" "dis,ena" bitfld.long 0x08 14.--14. " FE78 ,GP78 Falling Edge Detect" "dis,ena" bitfld.long 0x08 13.--13. " FE77 ,GP77 Falling Edge Detect" "dis,ena" bitfld.long 0x08 12.--12. " FE76 ,GP76 Falling Edge Detect" "dis,ena" bitfld.long 0x08 11.--11. " FE75 ,GP75 Falling Edge Detect" "dis,ena" bitfld.long 0x08 10.--10. " FE74 ,GP74 Falling Edge Detect" "dis,ena" bitfld.long 0x08 9.--9. " FE73 ,GP73 Falling Edge Detect" "dis,ena" bitfld.long 0x08 8.--8. " FE72 ,GP72 Falling Edge Detect" "dis,ena" textline " " bitfld.long 0x08 7.--7. "FE71 ,GP71 Falling Edge Detect" "dis,ena" bitfld.long 0x08 6.--6. " FE70 ,GP70 Falling Edge Detect" "dis,ena" bitfld.long 0x08 5.--5. " FE69 ,GP69 Falling Edge Detect" "dis,ena" bitfld.long 0x08 4.--4. " FE68 ,GP68 Falling Edge Detect" "dis,ena" bitfld.long 0x08 3.--3. " FE67 ,GP67 Falling Edge Detect" "dis,ena" bitfld.long 0x08 2.--2. " FE66 ,GP66 Falling Edge Detect" "dis,ena" bitfld.long 0x08 1.--1. " FE65 ,GP65 Falling Edge Detect" "dis,ena" bitfld.long 0x08 0.--0. " FE64 ,GP64 Falling Edge Detect" "dis,ena" textline " " group asd:0x40e00048++0x0b line.long 0x00 "GEDR0,GPIO Edge Detect Status Register GPIO<31:0>" bitfld.long 0x00 31.--31. " ED31 ,GP31 Edge Detect occured" "no,yes" bitfld.long 0x00 30.--30. " ED30 ,GP30 Edge Detect occured" "no,yes" bitfld.long 0x00 29.--29. " ED29 ,GP29 Edge Detect occured" "no,yes" bitfld.long 0x00 28.--28. " ED28 ,GP28 Edge Detect occured" "no,yes" bitfld.long 0x00 27.--27. " ED27 ,GP27 Edge Detect occured" "no,yes" bitfld.long 0x00 26.--26. " ED26 ,GP26 Edge Detect occured" "no,yes" bitfld.long 0x00 25.--25. " ED25 ,GP25 Edge Detect occured" "no,yes" bitfld.long 0x00 24.--24. " ED24 ,GP24 Edge Detect occured" "no,yes" textline " " bitfld.long 0x00 23.--23. "ED23 ,GP23 Edge Detect occured" "no,yes" bitfld.long 0x00 22.--22. " ED22 ,GP22 Edge Detect occured" "no,yes" bitfld.long 0x00 21.--21. " ED21 ,GP21 Edge Detect occured" "no,yes" bitfld.long 0x00 20.--20. " ED20 ,GP20 Edge Detect occured" "no,yes" bitfld.long 0x00 19.--19. " ED19 ,GP19 Edge Detect occured" "no,yes" bitfld.long 0x00 18.--18. " ED18 ,GP18 Edge Detect occured" "no,yes" bitfld.long 0x00 17.--17. " ED17 ,GP17 Edge Detect occured" "no,yes" bitfld.long 0x00 16.--16. " ED16 ,GP16 Edge Detect occured" "no,yes" textline " " bitfld.long 0x00 15.--15. "ED15 ,GP15 Edge Detect occured" "no,yes" bitfld.long 0x00 14.--14. " ED14 ,GP14 Edge Detect occured" "no,yes" bitfld.long 0x00 13.--13. " ED13 ,GP13 Edge Detect occured" "no,yes" bitfld.long 0x00 12.--12. " ED12 ,GP12 Edge Detect occured" "no,yes" bitfld.long 0x00 11.--11. " ED11 ,GP11 Edge Detect occured" "no,yes" bitfld.long 0x00 10.--10. " ED10 ,GP10 Edge Detect occured" "no,yes" bitfld.long 0x00 9.--9. " ED9 ,GP9 Edge Detect occured" "no,yes" bitfld.long 0x00 8.--8. " ED8 ,GP8 Edge Detect occured" "no,yes" textline " " bitfld.long 0x00 7.--7. "ED7 ,GP7 Edge Detect occured" "no,yes" bitfld.long 0x00 6.--6. " ED6 ,GP6 Edge Detect occured" "no,yes" bitfld.long 0x00 5.--5. " ED5 ,GP5 Edge Detect occured" "no,yes" bitfld.long 0x00 4.--4. " ED4 ,GP4 Edge Detect occured" "no,yes" bitfld.long 0x00 3.--3. " ED3 ,GP3 Edge Detect occured" "no,yes" bitfld.long 0x00 2.--2. " ED2 ,GP2 Edge Detect occured" "no,yes" bitfld.long 0x00 1.--1. " ED1 ,GP1 Edge Detect occured" "no,yes" bitfld.long 0x00 0.--0. " ED0 ,GP0 Edge Detect occured" "no,yes" line.long 0x04 "GEDR1,GPIO Edge Detect Status Register GPIO<63:32>" bitfld.long 0x04 31.--31. " ED63 ,GP63 Edge Detect occured" "no,yes" bitfld.long 0x04 30.--30. " ED62 ,GP62 Edge Detect occured" "no,yes" bitfld.long 0x04 29.--29. " ED61 ,GP61 Edge Detect occured" "no,yes" bitfld.long 0x04 28.--28. " ED60 ,GP60 Edge Detect occured" "no,yes" bitfld.long 0x04 27.--27. " ED59 ,GP59 Edge Detect occured" "no,yes" bitfld.long 0x04 26.--26. " ED58 ,GP58 Edge Detect occured" "no,yes" bitfld.long 0x04 25.--25. " ED57 ,GP57 Edge Detect occured" "no,yes" bitfld.long 0x04 24.--24. " ED56 ,GP56 Edge Detect occured" "no,yes" textline " " bitfld.long 0x04 23.--23. "ED55 ,GP55 Edge Detect occured" "no,yes" bitfld.long 0x04 22.--22. " ED54 ,GP54 Edge Detect occured" "no,yes" bitfld.long 0x04 21.--21. " ED53 ,GP53 Edge Detect occured" "no,yes" bitfld.long 0x04 20.--20. " ED52 ,GP52 Edge Detect occured" "no,yes" bitfld.long 0x04 19.--19. " ED51 ,GP51 Edge Detect occured" "no,yes" bitfld.long 0x04 18.--18. " ED50 ,GP50 Edge Detect occured" "no,yes" bitfld.long 0x04 17.--17. " ED49 ,GP49 Edge Detect occured" "no,yes" bitfld.long 0x04 16.--16. " ED48 ,GP48 Edge Detect occured" "no,yes" textline " " bitfld.long 0x04 15.--15. "ED47 ,GP47 Edge Detect occured" "no,yes" bitfld.long 0x04 14.--14. " ED46 ,GP46 Edge Detect occured" "no,yes" bitfld.long 0x04 13.--13. " ED45 ,GP45 Edge Detect occured" "no,yes" bitfld.long 0x04 12.--12. " ED44 ,GP44 Edge Detect occured" "no,yes" bitfld.long 0x04 11.--11. " ED43 ,GP43 Edge Detect occured" "no,yes" bitfld.long 0x04 10.--10. " ED42 ,GP42 Edge Detect occured" "no,yes" bitfld.long 0x04 9.--9. " ED41 ,GP41 Edge Detect occured" "no,yes" bitfld.long 0x04 8.--8. " ED40 ,GP40 Edge Detect occured" "no,yes" textline " " bitfld.long 0x04 7.--7. "ED39 ,GP39 Edge Detect occured" "no,yes" bitfld.long 0x04 6.--6. " ED38 ,GP38 Edge Detect occured" "no,yes" bitfld.long 0x04 5.--5. " ED37 ,GP37 Edge Detect occured" "no,yes" bitfld.long 0x04 4.--4. " ED36 ,GP36 Edge Detect occured" "no,yes" bitfld.long 0x04 3.--3. " ED35 ,GP35 Edge Detect occured" "no,yes" bitfld.long 0x04 2.--2. " ED34 ,GP34 Edge Detect occured" "no,yes" bitfld.long 0x04 1.--1. " ED33 ,GP33 Edge Detect occured" "no,yes" bitfld.long 0x04 0.--0. " ED32 ,GP32 Edge Detect occured" "no,yes" line.long 0x08 "GEDR2,GPIO Edge Detect Status Register GPIO<80:64>" bitfld.long 0x08 16.--16. " ED80 ,GP80 Edge Detect occured" "no,yes" textline " " bitfld.long 0x08 15.--15. "ED79 ,GP79 Edge Detect occured" "no,yes" bitfld.long 0x08 14.--14. " ED78 ,GP78 Edge Detect occured" "no,yes" bitfld.long 0x08 13.--13. " ED77 ,GP77 Edge Detect occured" "no,yes" bitfld.long 0x08 12.--12. " ED76 ,GP76 Edge Detect occured" "no,yes" bitfld.long 0x08 11.--11. " ED75 ,GP75 Edge Detect occured" "no,yes" bitfld.long 0x08 10.--10. " ED74 ,GP74 Edge Detect occured" "no,yes" bitfld.long 0x08 9.--9. " ED73 ,GP73 Edge Detect occured" "no,yes" bitfld.long 0x08 8.--8. " ED72 ,GP72 Edge Detect occured" "no,yes" textline " " bitfld.long 0x08 7.--7. "ED71 ,GP71 Edge Detect occured" "no,yes" bitfld.long 0x08 6.--6. " ED70 ,GP70 Edge Detect occured" "no,yes" bitfld.long 0x08 5.--5. " ED69 ,GP69 Edge Detect occured" "no,yes" bitfld.long 0x08 4.--4. " ED68 ,GP68 Edge Detect occured" "no,yes" bitfld.long 0x08 3.--3. " ED67 ,GP67 Edge Detect occured" "no,yes" bitfld.long 0x08 2.--2. " ED66 ,GP66 Edge Detect occured" "no,yes" bitfld.long 0x08 1.--1. " ED65 ,GP65 Edge Detect occured" "no,yes" bitfld.long 0x08 0.--0. " ED64 ,GP64 Edge Detect occured" "no,yes" textline " " group asd:0x40e00054++0x17 line.long 0x00 "GAFR0_L,GPIO Alternate Funtion Select Register GPIO<15:0>" bitfld.long 0x00 30.--31. " AF15 ,GP15 F2_OUT Active low chip select 1" "I/O,f1,nCS_1,f3" bitfld.long 0x00 28.--29. " AF14 ,GP14 F1_IN memory controller alternate bus master request" "I/O,MBREQ,f2,f3" bitfld.long 0x00 26.--27. " AF13 ,GP13 F2_OUT memory controller grant" "I/O,f1,MBGNT,f3" bitfld.long 0x00 24.--25. " AF12 ,GP12 F1_OUT 32 kHz out" "I/O,32kHz,f2,f3" textline " " bitfld.long 0x00 22.--23. "AF11 ,GP11 F1_OUT 3.6 MHz oscillator output" "I/O,3.6MHz,f2,f3" bitfld.long 0x00 20.--21. " AF10 ,GP10 F1_OUT real time clock (1Hz)" "I/O,RTCCLK,f2,f3" bitfld.long 0x00 18.--19. " AF9 ,GP9 F1_OUT MMC Chip Select 1" "I/O,MMCCS1,f2,f3" bitfld.long 0x00 16.--17. " AF8 ,GP8 F1_OUT MMC Chip Select 0" "I/O,MMCCS0,f2,f3" textline " " bitfld.long 0x00 14.--15. "AF7 ,GP7 F1_OUT 48 MHz clock output" "I/O,48MHz clk,f2,f3" bitfld.long 0x00 12.--13. " AF6 ,GP6 F1_OUT MMC Clock" "I/O,MMCCLK,f2,f3" bitfld.long 0x00 10.--11. " AF5 ,GP5" "N/A,f1,f2,f3" bitfld.long 0x00 8.--9. " AF4 ,GP4" "N/A,f1,f2,f3" textline " " bitfld.long 0x00 6.--7. "AF3 ,GP3" "N/A,f1,f2,f3" bitfld.long 0x00 4.--5. " AF2 ,GP2" "N/A,f1,f2,f3" bitfld.long 0x00 2.--3. " AF1 ,GP1 F1_IN Active low GP_reset" "I/O,GP_RST,f2,f3" bitfld.long 0x00 0.--1. " AF0 ,GP0" "N/A,f1,f2,f3" line.long 0x04 "GAFR0_U,GPIO Alternate Funtion Select Register GPIO<31:16>" bitfld.long 0x04 30.--31. " AF31 ,GP31 F1_OUT AC97 Sync, F2_OUT I2S Sync" "I/O,SYNC,SYNC,f3" bitfld.long 0x04 28.--29. " AF30 ,GP30 F1_OUT AC97 Sdata_out, F2_OUT I2S Sdata_out" "I/O,SDATA_OUT,SDATA_OUT,f3" bitfld.long 0x04 26.--27. " AF29 ,GP29 F1_IN AC97 Sdata_in0, F2_IN I2S Sdata_in" "I/O,SDATA_IN0,SDATA_IN,f3" bitfld.long 0x04 24.--25. " AF28 ,GP28 F1_IN AC97 bit_clk, F1_OUT I2S bit_clk, F2_IN I2S bit_clk" "I/O,BITCLK,BITCLK,f3" textline " " bitfld.long 0x04 22.--23. "AF27 ,GP27 F1_IN SSP ext_clock" "I/O,EXTCLK,f2,f3" bitfld.long 0x04 20.--21. " AF26 ,GP26 F1_IN SSP receive" "I/O,RXD,f2,f3" bitfld.long 0x04 18.--19. " AF25 ,GP25 F2_OUT SSP transmit" "I/O,f1,TXD,f3" bitfld.long 0x04 16.--17. " AF24 ,GP24 F2_OUT SSP Frame" "I/O,f1,SFRM,f3" textline " " bitfld.long 0x04 14.--15. "AF23 ,GP23 F2_OUT SSP clock" "I/O,f1,SCLK,f3" bitfld.long 0x04 12.--13. " AF22 ,GP22" "I/O,f1,f2,f3" bitfld.long 0x04 10.--11. " AF21 ,GP21" "I/O,f1,f2,f3" bitfld.long 0x04 8.--9. " AF20 ,GP20 F1_IN External DMA Request" "I/O,DREQ[0],f2,f3" textline " " bitfld.long 0x04 6.--7. "AF19 ,GP19 F1_IN External DMA Request" "I/O,DREQ[1],f2,f3" bitfld.long 0x04 4.--5. " AF18 ,GP18 F1_IN Ext. Bus Ready" "I/O,RDY,f2,f3" bitfld.long 0x04 2.--3. " AF17 ,GP17 F2_OUT PWM1 output" "I/O,f1,PWM1,f3" bitfld.long 0x04 0.--1. " AF16 ,GP16 F2_OUT PWM0 output" "I/O,f1,PWM0,f3" line.long 0x08 "GAFR1_L,GPIO Alternate Funtion Select Register GPIO<47:32>" bitfld.long 0x08 30.--31. " AF47 ,GP47 F1_OUT transmit data, F2_OUT STD_UART ICP transmit data" "I/O,TXD,ICP_TXD,f3" bitfld.long 0x08 28.--29. " AF46 ,GP46 F1_IN ICP receive data, F2_IN STD_UART receive data" "I/O,ICP_RXD,RXD,f3" bitfld.long 0x08 26.--27. " AF45 ,GP45 F2_OUT BTUART request to send" "I/O,f1,RTS,f3" bitfld.long 0x08 24.--25. " AF44 ,GP44 F1_IN BTUART clear to send" "I/O,CTS,f2,f3" textline " " bitfld.long 0x08 22.--23. "AF43 ,GP43 F2_OUT BTUART Transmit Data" "N/A,f1,BTTXD,f3" bitfld.long 0x08 20.--21. " AF42 ,GP42 F1_IN BTUART Receive Data" "I/O,BTRXD,f2,f3" bitfld.long 0x08 18.--19. " AF41 ,GP41 F2_OUT FFUART Request to Send" "I/O,f1,RTS,f3" bitfld.long 0x08 16.--17. " AF40 ,GP40 F2_OUT FFUART Data Terminal Ready" "I/O,f1,DTR,f3" textline " " bitfld.long 0x08 14.--15. "AF39 ,GP39 F1_OUT MMC Chip Select 1, F2_OUT FFUART transmit data" "N/A,MMCCS1,FFTXD,f3" bitfld.long 0x08 12.--13. " AF38 ,GP38 F1_IN FFUART Ring Indicator" "I/O,RI,f2,f3" bitfld.long 0x08 10.--11. " AF37 ,GP37 F1_IN FFUART Data Set Ready" "I/O,DSR,f2,f3" bitfld.long 0x08 8.--9. " AF36 ,GP36 F1_IN FFUART Data Carrier Detect" "I/O,DCD,f2,f3" textline " " bitfld.long 0x08 6.--7. "AF35 ,GP35 F1_IN FFUART Clear to send" "I/O,CTS,f2,f3" bitfld.long 0x08 4.--5. " AF34 ,GP34 F1_IN FFUART receive, F2_OUT MMC Chip Select 0" "N/A,FFRXD,MMCCS0,f3" bitfld.long 0x08 2.--3. " AF33 ,GP33 F2_OUT Active low chip select 5" "I/O,f1,nCS[5],f3" bitfld.long 0x08 0.--1. " AF32 ,GP32 F1_IN AC97 Sdata_in1" "I/O,SDATA_IN1,f2,f3" line.long 0x0c "GAFR1_U,GPIO Alternate Funtion Select Register GPIO<63:48>" bitfld.long 0x0c 30.--31. " AF63 ,GP63 F2_OUT LCD data pin 5" "I/O,f1,LDD[5],f3" bitfld.long 0x0c 28.--29. " AF62 ,GP62 F2_OUT LCD data pin 4" "I/O,f1,LDD[4],f3" bitfld.long 0x0c 26.--27. " AF61 ,GP61 F2_OUT LCD data pin 3" "I/O,f1,LDD[3],f3" bitfld.long 0x0c 24.--25. " AF60 ,GP60 F2_OUT LCD data pin 2" "I/O,f1,LDD[2],f3" textline " " bitfld.long 0x0c 22.--23. "AF59 ,GP59 F2_OUT LCD data pin 1" "I/O,f1,LDD[1],f3" bitfld.long 0x0c 20.--21. " AF58 ,GP58 F2_OUT LCD data pin 0" "I/O,f1,LDD[0],f3" bitfld.long 0x0c 18.--19. " AF57 ,GP57 F1_IN Bus Width Select for I/O Card Space" "I/O,nIOIS16,f2,f3" bitfld.long 0x0c 16.--17. " AF56 ,GP56 F1_IN Wait signal for Card Space" "I/O,nPWAIT,f2,f3" textline " " bitfld.long 0x0c 14.--15. "AF55 ,GP55 F2_OUT Card Address bit 26" "I/O,f1,nPREG,f3" bitfld.long 0x0c 12.--13. " AF54 ,GP54 F1_OUT MMC clock, F2_OUT Socket Select for Card Space" "I/O,MMCCLK,nSKTSEL,f3" bitfld.long 0x0c 10.--11. " AF53 ,GP53 F1_OUT MMC clock, F2_OUT Card Enable for Card Space" "I/O,MMCCLK,nPCE[2],f3" bitfld.long 0x0c 8.--9. " AF52 ,GP52 F2_OUT Card Enable for Card Space" "I/O,f1,nPCE[1],f3" textline " " bitfld.long 0x0c 6.--7. "AF51 ,GP51 F2_OUT I/O Write for Card Space" "I/O,f1,nPIOW,f3" bitfld.long 0x0c 4.--5. " AF50 ,GP50 F2_OUT I/O Read for Card Space" "I/O,f1,nPIOR,f3" bitfld.long 0x0c 2.--3. " AF49 ,GP49 F2_OUT Write Enable for Card Space" "I/O,f1,nPWE,f3" bitfld.long 0x0c 0.--1. " AF48 ,GP48 F2_OUT Output Enable for Card Space" "I/O,f1,nPOE,f3" line.long 0x10 "GAFR2_L,GPIO Alternate Funtion Select Register GPIO<79:64>" bitfld.long 0x10 30.--31. " AF79 ,GP79 F2_OUT Active low chip select 3" "I/O,f1,nCS[3],f3" bitfld.long 0x10 28.--29. " AF78 ,GP78 F2_OUT Active low chip select 2" "I/O,f1,nCS[2],f3" bitfld.long 0x10 26.--27. " AF77 ,GP77 F2_OUT LCD AC Bias" "I/O,f1,LCD_ACBIAS,f3" bitfld.long 0x10 24.--25. " AF76 ,GP76 F2_OUT LCD pixel clock" "I/O,f1,LCD_PCLK,f3" textline " " bitfld.long 0x10 22.--23. "AF75 ,GP75 F2_OUT LCD line clock" "I/O,f1,LCD_LCLK,f3" bitfld.long 0x10 20.--21. " AF74 ,GP74 F2_OUT LCD Frame clock" "I/O,f1,LCD_FCLK,f3" bitfld.long 0x10 18.--19. " AF73 ,GP73 F1_OUT Memeory Controller Grant, F2_OUT LCD data pin 15" "N/A,MBGNT,LDD[15],f3" bitfld.long 0x10 16.--17. " AF72 ,GP72 F1_OUT, 32kHz Clock, F2_OUT LCD data pin 14" "I/O,32kHz,LDD[14],f3" textline " " bitfld.long 0x10 14.--15. "AF71 ,GP71 F1_OUT 3.6MHz Oscillator Clock, F2_OUT LCD data pin 13" "I/O,3.6MHz,LDD[13],f3" bitfld.long 0x10 12.--13. " AF70 ,GP70 F1_OUT Real Time Clock (1Hz), F2_OUT LCD data pin 12" "I/O,RTCCLK,LDD[12],f3" bitfld.long 0x10 10.--11. " AF69 ,GP69 F1_OUT MMC_CLK, F2_OUT LCD data pin 11" "I/O,MMCCLK,LDD[11],f3" bitfld.long 0x10 8.--9. " AF68 ,GP68 F1_OUT MMC Chip Select 1, F2_OUT LCD data pin 10" "I/O,MMCCS1,LDD[10],f3" textline " " bitfld.long 0x10 6.--7. "AF67 ,GP67 F1_OUT MMC Chip Select 0, F2_OUT LCD data pin 9" "I/O,MMCCS0,LDD[9],f3" bitfld.long 0x10 4.--5. " AF66 ,GP66 F1_IN memory controller alternate bus master request, F2_OUT LCD data pin 8" "I/O,MBREQ,LDD[8],f3" bitfld.long 0x10 2.--3. " AF65 ,GP65 F2_OUT LCD data pin 7" "I/O,f1,LDD[7],f3" bitfld.long 0x10 0.--1. " AF64 ,GP64 F2_OUT LCD data pin 6" "I/O,f1,LDD[6],f3" line.long 0x14 "GAFR2_U,GPIO Alternate Funtion Select Register GPIO<80>" bitfld.long 0x14 0.--1. " AF80 ,GP80 F2_OUT Active low chip select 4" "I/O,f1,nCS[4],f3" tree.end ;end include file xscale/cotulla-gpio.ph ;begin include file xscale/cotulla-pwr.ph ;parameters: 250 ; -------------------------------------------------------------------------------- ; PXA210, PXA250,PXA255, ; State: ok ; -------------------------------------------------------------------------------- tree "Power Manager and Reset Control" ; -------------------------------------------------------------------------------- if ("250"=="255")||("250"=="26x") group asd:0x40f00000++0x03 line.long 0x00 "PMCR,Power Manager Control Register" bitfld.long 0x00 0.--0. " IDAE ,Imprecise Data Abort Enable" "no,yes" group asd:0x40f00004++0x03 line.long 0x00 "PSSR,Power Manager Sleep Status Register" bitfld.long 0x00 5.--5. " RDH ,Read Disable Hold" "no,yes" bitfld.long 0x00 4.--4. " PH ,Peripheral Control Hold" "no,yes" bitfld.long 0x00 2.--2. " VFS ,VDD Fault Status" "no,yes" bitfld.long 0x00 1.--1. " BFS ,Battery Fault Status" "no,yes" bitfld.long 0x00 0.--0. " SSS ,Software Sleep Status" "no,yes" group asd:0x40f00008++0x03 line.long 0x00 "PSPR,Power Manager Sratch Pad Register" group asd:0x40f0000c++0x03 line.long 0x00 "PWER,Power Manager Wake-Up Enable Register" bitfld.long 0x00 15.--15. " WE15 ,Wake-Up due to GP15 edge detect" "dis,ena" bitfld.long 0x00 14.--14. " WE14 ,Wake-Up due to GP14 edge detect" "dis,ena" bitfld.long 0x00 13.--13. " WE13 ,Wake-Up due to GP13 edge detect" "dis,ena" bitfld.long 0x00 12.--12. " WE12 ,Wake-Up due to GP12 edge detect" "dis,ena" bitfld.long 0x00 31.--31. " WERTC ,RTC Sleep Mode Wake-Up Enable" "dis,ena" textline " " bitfld.long 0x00 11.--11. " WE11 ,Wake-Up due to GP11 edge detect" "dis,ena" bitfld.long 0x00 10.--10. " WE10 ,Wake-Up due to GP10 edge detect" "dis,ena" bitfld.long 0x00 9.--9. " WE9 ,Wake-Up due to GP9 edge detect" "dis,ena" bitfld.long 0x00 8.--8. " WE8 ,Wake-Up due to GP8 edge detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. " WE7 ,Wake-Up due to GP7 edge detect" "dis,ena" bitfld.long 0x00 6.--6. " WE6 ,Wake-Up due to GP6 edge detect" "dis,ena" bitfld.long 0x00 5.--5. " WE5 ,Wake-Up due to GP5 edge detect" "dis,ena" bitfld.long 0x00 4.--4. " WE4 ,Wake-Up due to GP4 edge detect" "dis,ena" textline " " bitfld.long 0x00 3.--3. " WE3 ,Wake-Up due to GP3 edge detect" "dis,ena" bitfld.long 0x00 2.--2. " WE2 ,Wake-Up due to GP2 edge detect" "dis,ena" bitfld.long 0x00 1.--1. " WE1 ,Wake-Up due to GP1 edge detect" "dis,ena" bitfld.long 0x00 0.--0. " WE0 ,Wake-Up due to GP0 edge detect" "dis,ena" group asd:0x40f00010++0x03 line.long 0x00 "PRER,Power Manager GPIO Rising-Edge Detect Enable Register" bitfld.long 0x00 15.--15. " RE15 ,Wake-Up due to GP15 rising-edge detect" "dis,ena" bitfld.long 0x00 14.--14. " RE14 ,Wake-Up due to GP14 rising-edge detect" "dis,ena" bitfld.long 0x00 13.--13. " RE13 ,Wake-Up due to GP13 rising-edge detect" "dis,ena" bitfld.long 0x00 12.--12. " RE12 ,Wake-Up due to GP12 rising-edge detect" "dis,ena" textline " " bitfld.long 0x00 11.--11. " RE11 ,Wake-Up due to GP11 rising-edge detect" "dis,ena" bitfld.long 0x00 10.--10. " RE10 ,Wake-Up due to GP10 rising-edge detect" "dis,ena" bitfld.long 0x00 9.--9. " RE9 ,Wake-Up due to GP9 rising-edge detect" "dis,ena" bitfld.long 0x00 8.--8. " RE8 ,Wake-Up due to GP8 rising-edge detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. " RE7 ,Wake-Up due to GP7 rising-edge detect" "dis,ena" bitfld.long 0x00 6.--6. " RE6 ,Wake-Up due to GP6 rising-edge detect" "dis,ena" bitfld.long 0x00 5.--5. " RE5 ,Wake-Up due to GP5 rising-edge detect" "dis,ena" bitfld.long 0x00 4.--4. " RE4 ,Wake-Up due to GP4 rising-edge detect" "dis,ena" textline " " bitfld.long 0x00 3.--3. " RE3 ,Wake-Up due to GP3 rising-edge detect" "dis,ena" bitfld.long 0x00 2.--2. " RE2 ,Wake-Up due to GP2 rising-edge detect" "dis,ena" bitfld.long 0x00 1.--1. " RE1 ,Wake-Up due to GP1 rising-edge detect" "dis,ena" bitfld.long 0x00 0.--0. " RE0 ,Wake-Up due to GP0 rising-edge detect" "dis,ena" group asd:0x40f00014++0x03 line.long 0x00 "PFER,Power Manager GPIO Falling-Edge Detect Enable Register" bitfld.long 0x00 15.--15. " FE15 ,Wake-Up due to GP15 falling-edge detect" "dis,ena" bitfld.long 0x00 14.--14. " FE14 ,Wake-Up due to GP14 falling-edge detect" "dis,ena" bitfld.long 0x00 13.--13. " FE13 ,Wake-Up due to GP13 falling-edge detect" "dis,ena" bitfld.long 0x00 12.--12. " FE12 ,Wake-Up due to GP12 falling-edge detect" "dis,ena" textline " " bitfld.long 0x00 11.--11. " FE11 ,Wake-Up due to GP11 falling-edge detect" "dis,ena" bitfld.long 0x00 10.--10. " FE10 ,Wake-Up due to GP10 falling-edge detect" "dis,ena" bitfld.long 0x00 9.--9. " FE9 ,Wake-Up due to GP9 falling-edge detect" "dis,ena" bitfld.long 0x00 8.--8. " FE8 ,Wake-Up due to GP8 falling-edge detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. " FE7 ,Wake-Up due to GP7 falling-edge detect" "dis,ena" bitfld.long 0x00 6.--6. " FE6 ,Wake-Up due to GP6 falling-edge detect" "dis,ena" bitfld.long 0x00 5.--5. " FE5 ,Wake-Up due to GP5 falling-edge detect" "dis,ena" bitfld.long 0x00 4.--4. " FE4 ,Wake-Up due to GP4 falling-edge detect" "dis,ena" textline " " bitfld.long 0x00 3.--3. " FE3 ,Wake-Up due to GP3 falling-edge detect" "dis,ena" bitfld.long 0x00 2.--2. " FE2 ,Wake-Up due to GP2 falling-edge detect" "dis,ena" bitfld.long 0x00 1.--1. " FE1 ,Wake-Up due to GP1 falling-edge detect" "dis,ena" bitfld.long 0x00 0.--0. " FE0 ,Wake-Up due to GP0 falling-edge detect" "dis,ena" group asd:0x40f00018++0x03 line.long 0x00 "PEDR,Power Manager GPIO Edge Detect Status Register" bitfld.long 0x00 15.--15. " ED15 ,Wake-Up due to GP15 edge detected" "no,yes" bitfld.long 0x00 14.--14. " ED14 ,Wake-Up due to GP14 edge detected" "no,yes" bitfld.long 0x00 13.--13. " ED13 ,Wake-Up due to GP13 edge detected" "no,yes" bitfld.long 0x00 12.--12. " ED12 ,Wake-Up due to GP12 edge detected" "no,yes" textline " " bitfld.long 0x00 11.--11. " ED11 ,Wake-Up due to GP11 edge detected" "no,yes" bitfld.long 0x00 10.--10. " ED10 ,Wake-Up due to GP10 edge detected" "no,yes" bitfld.long 0x00 9.--9. " ED9 ,Wake-Up due to GP9 edge detected" "no,yes" bitfld.long 0x00 8.--8. " ED8 ,Wake-Up due to GP8 edge detected" "no,yes" textline " " bitfld.long 0x00 7.--7. " ED7 ,Wake-Up due to GP7 edge detected" "no,yes" bitfld.long 0x00 6.--6. " ED6 ,Wake-Up due to GP6 edge detected" "no,yes" bitfld.long 0x00 5.--5. " ED5 ,Wake-Up due to GP5 edge detected" "no,yes" bitfld.long 0x00 4.--4. " ED4 ,Wake-Up due to GP4 edge detected" "no,yes" textline " " bitfld.long 0x00 3.--3. " ED3 ,Wake-Up due to GP3 edge detected" "no,yes" bitfld.long 0x00 2.--2. " ED2 ,Wake-Up due to GP2 edge detected" "no,yes" bitfld.long 0x00 1.--1. " ED1 ,Wake-Up due to GP1 edge detected" "no,yes" bitfld.long 0x00 0.--0. " ED0 ,Wake-Up due to GP0 edge detected" "no,yes" group asd:0x40f0001c++0x03 line.long 0x00 "PCFR,Power Manager General Configuration Register" ;bitfld.long 0x00 3.--3. " DS ,Deep Sleep Mode" "no,yes" bitfld.long 0x00 2.--2. " FS ,Float Static Chip Selects during Sleep Mode" "no,yes" bitfld.long 0x00 1.--1. " FP ,Float PCMCIA Controls during Sleep Mode" "no,yes" bitfld.long 0x00 0.--0. " OPDE ,3.6864 MHz oscillator power-down enable" "no,yes" group asd:0x40f00020++0x0b line.long 0x00 "PGSR0,Power Manager GPIO Sleep State Register for GP[31-0]" bitfld.long 0x00 31.--31. " SS31 ,GP31 in Sleep Mode" "0,1" bitfld.long 0x00 30.--30. " SS30 ,GP30 in Sleep Mode" "0,1" bitfld.long 0x00 29.--29. " SS29 ,GP29 in Sleep Mode" "0,1" bitfld.long 0x00 28.--28. " SS28 ,GP28 in Sleep Mode" "0,1" bitfld.long 0x00 27.--27. " SS27 ,GP27 in Sleep Mode" "0,1" bitfld.long 0x00 26.--26. " SS26 ,GP26 in Sleep Mode" "0,1" bitfld.long 0x00 25.--25. " SS25 ,GP25 in Sleep Mode" "0,1" bitfld.long 0x00 24.--24. " SS24 ,GP24 in Sleep Mode" "0,1" textline " " bitfld.long 0x00 23.--23. " SS23 ,GP23 in Sleep Mode" "0,1" bitfld.long 0x00 22.--22. " SS22 ,GP22 in Sleep Mode" "0,1" bitfld.long 0x00 21.--21. " SS21 ,GP21 in Sleep Mode" "0,1" bitfld.long 0x00 20.--20. " SS20 ,GP20 in Sleep Mode" "0,1" bitfld.long 0x00 19.--19. " SS19 ,GP19 in Sleep Mode" "0,1" bitfld.long 0x00 18.--18. " SS18 ,GP18 in Sleep Mode" "0,1" bitfld.long 0x00 17.--17. " SS17 ,GP17 in Sleep Mode" "0,1" bitfld.long 0x00 16.--16. " SS16 ,GP16 in Sleep Mode" "0,1" textline " " bitfld.long 0x00 15.--15. " SS15 ,GP15 in Sleep Mode" "0,1" bitfld.long 0x00 14.--14. " SS14 ,GP14 in Sleep Mode" "0,1" bitfld.long 0x00 13.--13. " SS13 ,GP13 in Sleep Mode" "0,1" bitfld.long 0x00 12.--12. " SS12 ,GP12 in Sleep Mode" "0,1" bitfld.long 0x00 11.--11. " SS11 ,GP11 in Sleep Mode" "0,1" bitfld.long 0x00 10.--10. " SS10 ,GP10 in Sleep Mode" "0,1" bitfld.long 0x00 9.--9. " SS9 ,GP9 in Sleep Mode" "0,1" bitfld.long 0x00 8.--8. " SS8 ,GP8 in Sleep Mode" "0,1" textline " " bitfld.long 0x00 7.--7. " SS7 ,GP7 in Sleep Mode" "0,1" bitfld.long 0x00 6.--6. " SS6 ,GP6 in Sleep Mode" "0,1" bitfld.long 0x00 5.--5. " SS5 ,GP5 in Sleep Mode" "0,1" bitfld.long 0x00 4.--4. " SS4 ,GP4 in Sleep Mode" "0,1" bitfld.long 0x00 3.--3. " SS3 ,GP3 in Sleep Mode" "0,1" bitfld.long 0x00 2.--2. " SS2 ,GP2 in Sleep Mode" "0,1" bitfld.long 0x00 1.--1. " SS1 ,GP1 in Sleep Mode" "0,1" bitfld.long 0x00 0.--0. " SS0 ,GP0 in Sleep Mode" "0,1" line.long 0x04 "PGSR1,Power Manager GPIO Sleep State Register for GP[63-32]" bitfld.long 0x04 31.--31. " SS63 ,GP63 in Sleep Mode" "0,1" bitfld.long 0x04 30.--30. " SS62 ,GP62 in Sleep Mode" "0,1" bitfld.long 0x04 29.--29. " SS61 ,GP61 in Sleep Mode" "0,1" bitfld.long 0x04 28.--28. " SS60 ,GP60 in Sleep Mode" "0,1" bitfld.long 0x04 27.--27. " SS59 ,GP59 in Sleep Mode" "0,1" bitfld.long 0x04 26.--26. " SS58 ,GP58 in Sleep Mode" "0,1" bitfld.long 0x04 25.--25. " SS57 ,GP57 in Sleep Mode" "0,1" bitfld.long 0x04 24.--24. " SS56 ,GP56 in Sleep Mode" "0,1" textline " " bitfld.long 0x04 23.--23. " SS55 ,GP55 in Sleep Mode" "0,1" bitfld.long 0x04 22.--22. " SS54 ,GP54 in Sleep Mode" "0,1" bitfld.long 0x04 21.--21. " SS53 ,GP53 in Sleep Mode" "0,1" bitfld.long 0x04 20.--20. " SS52 ,GP52 in Sleep Mode" "0,1" bitfld.long 0x04 19.--19. " SS51 ,GP51 in Sleep Mode" "0,1" bitfld.long 0x04 18.--18. " SS50 ,GP50 in Sleep Mode" "0,1" bitfld.long 0x04 17.--17. " SS49 ,GP49 in Sleep Mode" "0,1" bitfld.long 0x04 16.--16. " SS48 ,GP48 in Sleep Mode" "0,1" textline " " bitfld.long 0x04 15.--15. " SS47 ,GP47 in Sleep Mode" "0,1" bitfld.long 0x04 14.--14. " SS46 ,GP46 in Sleep Mode" "0,1" bitfld.long 0x04 13.--13. " SS45 ,GP45 in Sleep Mode" "0,1" bitfld.long 0x04 12.--12. " SS44 ,GP44 in Sleep Mode" "0,1" bitfld.long 0x04 11.--11. " SS43 ,GP43 in Sleep Mode" "0,1" bitfld.long 0x04 10.--10. " SS42 ,GP42 in Sleep Mode" "0,1" bitfld.long 0x04 9.--9. " SS41 ,GP41 in Sleep Mode" "0,1" bitfld.long 0x04 8.--8. " SS40 ,GP40 in Sleep Mode" "0,1" textline " " bitfld.long 0x04 7.--7. " SS39 ,GP39 in Sleep Mode" "0,1" bitfld.long 0x04 6.--6. " SS38 ,GP38 in Sleep Mode" "0,1" bitfld.long 0x04 5.--5. " SS37 ,GP37 in Sleep Mode" "0,1" bitfld.long 0x04 4.--4. " SS36 ,GP36 in Sleep Mode" "0,1" bitfld.long 0x04 3.--3. " SS35 ,GP35 in Sleep Mode" "0,1" bitfld.long 0x04 2.--2. " SS34 ,GP34 in Sleep Mode" "0,1" bitfld.long 0x04 1.--1. " SS33 ,GP33 in Sleep Mode" "0,1" bitfld.long 0x04 0.--0. " SS32 ,GP41 in Sleep Mode" "0,1" line.long 0x08 "PGSR2,Power Manager GPIO Sleep State Register for GP[84-64]" bitfld.long 0x08 16.--16. " SS80 ,GP80 in Sleep Mode" "0,1" textline " " bitfld.long 0x08 15.--15. " SS79 ,GP79 in Sleep Mode" "0,1" bitfld.long 0x08 14.--14. " SS78 ,GP78 in Sleep Mode" "0,1" bitfld.long 0x08 13.--13. " SS77 ,GP77 in Sleep Mode" "0,1" bitfld.long 0x08 12.--12. " SS76 ,GP76 in Sleep Mode" "0,1" bitfld.long 0x08 11.--11. " SS75 ,GP75 in Sleep Mode" "0,1" bitfld.long 0x08 10.--10. " SS74 ,GP74 in Sleep Mode" "0,1" bitfld.long 0x08 9.--9. " SS73 ,GP73 in Sleep Mode" "0,1" bitfld.long 0x08 8.--8. " SS72 ,GP72 in Sleep Mode" "0,1" textline " " bitfld.long 0x08 7.--7. " SS71 ,GP71 in Sleep Mode" "0,1" bitfld.long 0x08 6.--6. " SS70 ,GP70 in Sleep Mode" "0,1" bitfld.long 0x08 5.--5. " SS69 ,GP69 in Sleep Mode" "0,1" bitfld.long 0x08 4.--4. " SS68 ,GP68 in Sleep Mode" "0,1" bitfld.long 0x08 3.--3. " SS67 ,GP67 in Sleep Mode" "0,1" bitfld.long 0x08 2.--2. " SS66 ,GP66 in Sleep Mode" "0,1" bitfld.long 0x08 1.--1. " SS65 ,GP65 in Sleep Mode" "0,1" bitfld.long 0x08 0.--0. " SS64 ,GP64 in Sleep Mode" "0,1" group asd:0x40f00030++0x03 line.long 0x00 "RCSR,Reset Controller Status Register" bitfld.long 0x00 3.--3. " GPR ,GPIO Reset" "no,yes" bitfld.long 0x00 2.--2. " SMR ,Sleep Mode" "no,yes" bitfld.long 0x00 1.--1. " WDR ,Watchdog Reset" "no,yes" bitfld.long 0x00 0.--0. " HWR ,Hardware Reset" "no,yes" group asd:0x40f00034++0x03 line.long 0x00 "PMFW,Power Manager Fast Sleep Walk-up Configuration" bitfld.long 0x00 01. " FWAKE ,FAST WAKEUP ENABLE" "dis,ena" else group asd:0x40f00000++0x03 line.long 0x00 "PMCR,Power Manager Control Register" bitfld.long 0x00 0.--0. " IDAE ,Imprecise Data Abort Enable" "no,yes" group asd:0x40f00004++0x03 line.long 0x00 "PSSR,Power Manager Sleep Status Register" bitfld.long 0x00 5.--5. "RDH ,Read Disable Hold" "no,yes" bitfld.long 0x00 4.--4. " PH ,Peripheral Control Hold" "no,yes" bitfld.long 0x00 2.--2. " VFS ,VDD Fault Status" "no,yes" bitfld.long 0x00 1.--1. " BFS ,Battery Fault Status" "no,yes" bitfld.long 0x00 0.--0. " SSS ,Software Sleep Status" "no,yes" group asd:0x40f00008++0x03 line.long 0x00 "PSPR,Power Manager Sratch Pad Register" group asd:0x40f0000c++0x03 line.long 0x00 "PWER,Power Manager Wake-Up Enable Register" bitfld.long 0x00 15.--15. "WE15 ,Wake-Up due to GP15 edge detect" "dis,ena" bitfld.long 0x00 14.--14. " WE14 ,Wake-Up due to GP14 edge detect" "dis,ena" bitfld.long 0x00 13.--13. " WE13 ,Wake-Up due to GP13 edge detect" "dis,ena" bitfld.long 0x00 12.--12. " WE12 ,Wake-Up due to GP12 edge detect" "dis,ena" bitfld.long 0x00 31.--31. " WERTC ,RTC Sleep Mode Wake-Up Enable" "dis,ena" textline " " bitfld.long 0x00 11.--11. "WE11 ,Wake-Up due to GP11 edge detect" "dis,ena" bitfld.long 0x00 10.--10. " WE10 ,Wake-Up due to GP10 edge detect" "dis,ena" bitfld.long 0x00 9.--9. " WE9 ,Wake-Up due to GP9 edge detect" "dis,ena" bitfld.long 0x00 8.--8. " WE8 ,Wake-Up due to GP8 edge detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. "WE7 ,Wake-Up due to GP7 edge detect" "dis,ena" bitfld.long 0x00 6.--6. " WE6 ,Wake-Up due to GP6 edge detect" "dis,ena" bitfld.long 0x00 5.--5. " WE5 ,Wake-Up due to GP5 edge detect" "dis,ena" bitfld.long 0x00 4.--4. " WE4 ,Wake-Up due to GP4 edge detect" "dis,ena" textline " " bitfld.long 0x00 3.--3. "WE3 ,Wake-Up due to GP3 edge detect" "dis,ena" bitfld.long 0x00 2.--2. " WE2 ,Wake-Up due to GP2 edge detect" "dis,ena" bitfld.long 0x00 1.--1. " WE1 ,Wake-Up due to GP1 edge detect" "dis,ena" bitfld.long 0x00 0.--0. " WE0 ,Wake-Up due to GP0 edge detect" "dis,ena" group asd:0x40f00010++0x03 line.long 0x00 "PRER,Power Manager GPIO Rising-Edge Detect Enable Register" bitfld.long 0x00 15.--15. "RE15 ,Wake-Up due to GP15 rising-edge detect" "dis,ena" bitfld.long 0x00 14.--14. " RE14 ,Wake-Up due to GP14 rising-edge detect" "dis,ena" bitfld.long 0x00 13.--13. " RE13 ,Wake-Up due to GP13 rising-edge detect" "dis,ena" bitfld.long 0x00 12.--12. " RE12 ,Wake-Up due to GP12 rising-edge detect" "dis,ena" textline " " bitfld.long 0x00 11.--11. "RE11 ,Wake-Up due to GP11 rising-edge detect" "dis,ena" bitfld.long 0x00 10.--10. " RE10 ,Wake-Up due to GP10 rising-edge detect" "dis,ena" bitfld.long 0x00 9.--9. " RE9 ,Wake-Up due to GP9 rising-edge detect" "dis,ena" bitfld.long 0x00 8.--8. " RE8 ,Wake-Up due to GP8 rising-edge detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. "RE7 ,Wake-Up due to GP7 rising-edge detect" "dis,ena" bitfld.long 0x00 6.--6. " RE6 ,Wake-Up due to GP6 rising-edge detect" "dis,ena" bitfld.long 0x00 5.--5. " RE5 ,Wake-Up due to GP5 rising-edge detect" "dis,ena" bitfld.long 0x00 4.--4. " RE4 ,Wake-Up due to GP4 rising-edge detect" "dis,ena" textline " " bitfld.long 0x00 3.--3. "RE3 ,Wake-Up due to GP3 rising-edge detect" "dis,ena" bitfld.long 0x00 2.--2. " RE2 ,Wake-Up due to GP2 rising-edge detect" "dis,ena" bitfld.long 0x00 1.--1. " RE1 ,Wake-Up due to GP1 rising-edge detect" "dis,ena" bitfld.long 0x00 0.--0. " RE0 ,Wake-Up due to GP0 rising-edge detect" "dis,ena" group asd:0x40f00014++0x03 line.long 0x00 "PFER,Power Manager GPIO Falling-Edge Detect Enable Register" bitfld.long 0x00 15.--15. "FE15 ,Wake-Up due to GP15 falling-edge detect" "dis,ena" bitfld.long 0x00 14.--14. " FE14 ,Wake-Up due to GP14 falling-edge detect" "dis,ena" bitfld.long 0x00 13.--13. " FE13 ,Wake-Up due to GP13 falling-edge detect" "dis,ena" bitfld.long 0x00 12.--12. " FE12 ,Wake-Up due to GP12 falling-edge detect" "dis,ena" textline " " bitfld.long 0x00 11.--11. "FE11 ,Wake-Up due to GP11 falling-edge detect" "dis,ena" bitfld.long 0x00 10.--10. " FE10 ,Wake-Up due to GP10 falling-edge detect" "dis,ena" bitfld.long 0x00 9.--9. " FE9 ,Wake-Up due to GP9 falling-edge detect" "dis,ena" bitfld.long 0x00 8.--8. " FE8 ,Wake-Up due to GP8 falling-edge detect" "dis,ena" textline " " bitfld.long 0x00 7.--7. "FE7 ,Wake-Up due to GP7 falling-edge detect" "dis,ena" bitfld.long 0x00 6.--6. " FE6 ,Wake-Up due to GP6 falling-edge detect" "dis,ena" bitfld.long 0x00 5.--5. " FE5 ,Wake-Up due to GP5 falling-edge detect" "dis,ena" bitfld.long 0x00 4.--4. " FE4 ,Wake-Up due to GP4 falling-edge detect" "dis,ena" textline " " bitfld.long 0x00 3.--3. "FE3 ,Wake-Up due to GP3 falling-edge detect" "dis,ena" bitfld.long 0x00 2.--2. " FE2 ,Wake-Up due to GP2 falling-edge detect" "dis,ena" bitfld.long 0x00 1.--1. " FE1 ,Wake-Up due to GP1 falling-edge detect" "dis,ena" bitfld.long 0x00 0.--0. " FE0 ,Wake-Up due to GP0 falling-edge detect" "dis,ena" group asd:0x40f00018++0x03 line.long 0x00 "PEDR,Power Manager GPIO Edge Detect Status Register" bitfld.long 0x00 15.--15. "ED15 ,Wake-Up due to GP15 edge detected" "no,yes" bitfld.long 0x00 14.--14. " ED14 ,Wake-Up due to GP14 edge detected" "no,yes" bitfld.long 0x00 13.--13. " ED13 ,Wake-Up due to GP13 edge detected" "no,yes" bitfld.long 0x00 12.--12. " ED12 ,Wake-Up due to GP12 edge detected" "no,yes" textline " " bitfld.long 0x00 11.--11. "ED11 ,Wake-Up due to GP11 edge detected" "no,yes" bitfld.long 0x00 10.--10. " ED10 ,Wake-Up due to GP10 edge detected" "no,yes" bitfld.long 0x00 9.--9. " ED9 ,Wake-Up due to GP9 edge detected" "no,yes" bitfld.long 0x00 8.--8. " ED8 ,Wake-Up due to GP8 edge detected" "no,yes" textline " " bitfld.long 0x00 7.--7. "ED7 ,Wake-Up due to GP7 edge detected" "no,yes" bitfld.long 0x00 6.--6. " ED6 ,Wake-Up due to GP6 edge detected" "no,yes" bitfld.long 0x00 5.--5. " ED5 ,Wake-Up due to GP5 edge detected" "no,yes" bitfld.long 0x00 4.--4. " ED4 ,Wake-Up due to GP4 edge detected" "no,yes" textline " " bitfld.long 0x00 3.--3. "ED3 ,Wake-Up due to GP3 edge detected" "no,yes" bitfld.long 0x00 2.--2. " ED2 ,Wake-Up due to GP2 edge detected" "no,yes" bitfld.long 0x00 1.--1. " ED1 ,Wake-Up due to GP1 edge detected" "no,yes" bitfld.long 0x00 0.--0. " ED0 ,Wake-Up due to GP0 edge detected" "no,yes" group asd:0x40f0001c++0x03 line.long 0x00 "PCFR,Power Manager General Configuration Register" bitfld.long 0x00 3.--3. "DS ,Deep Sleep Mode" "no,yes" bitfld.long 0x00 2.--2. " FS ,Float Static Chip Selects during Sleep Mode" "no,yes" bitfld.long 0x00 1.--1. " FP ,Float PCMCIA Controls during Sleep Mode" "no,yes" bitfld.long 0x00 0.--0. " OPDE ,3.6864 MHz oscillator power-down enable" "no,yes" group asd:0x40f00020++0x0b line.long 0x00 "PGSR0,Power Manager GPIO Sleep State Register for GP[31-0]" bitfld.long 0x00 31.--31. "SS31 ,GP31 in Sleep Mode" "0,1" bitfld.long 0x00 30.--30. " SS30 ,GP30 in Sleep Mode" "0,1" bitfld.long 0x00 29.--29. " SS29 ,GP29 in Sleep Mode" "0,1" bitfld.long 0x00 28.--28. " SS28 ,GP28 in Sleep Mode" "0,1" bitfld.long 0x00 27.--27. " SS27 ,GP27 in Sleep Mode" "0,1" bitfld.long 0x00 26.--26. " SS26 ,GP26 in Sleep Mode" "0,1" bitfld.long 0x00 25.--25. " SS25 ,GP25 in Sleep Mode" "0,1" bitfld.long 0x00 24.--24. " SS24 ,GP24 in Sleep Mode" "0,1" textline " " bitfld.long 0x00 23.--23. "SS23 ,GP23 in Sleep Mode" "0,1" bitfld.long 0x00 22.--22. " SS22 ,GP22 in Sleep Mode" "0,1" bitfld.long 0x00 21.--21. " SS21 ,GP21 in Sleep Mode" "0,1" bitfld.long 0x00 20.--20. " SS20 ,GP20 in Sleep Mode" "0,1" bitfld.long 0x00 19.--19. " SS19 ,GP19 in Sleep Mode" "0,1" bitfld.long 0x00 18.--18. " SS18 ,GP18 in Sleep Mode" "0,1" bitfld.long 0x00 17.--17. " SS17 ,GP17 in Sleep Mode" "0,1" bitfld.long 0x00 16.--16. " SS16 ,GP16 in Sleep Mode" "0,1" textline " " bitfld.long 0x00 15.--15. "SS15 ,GP15 in Sleep Mode" "0,1" bitfld.long 0x00 14.--14. " SS14 ,GP14 in Sleep Mode" "0,1" bitfld.long 0x00 13.--13. " SS13 ,GP13 in Sleep Mode" "0,1" bitfld.long 0x00 12.--12. " SS12 ,GP12 in Sleep Mode" "0,1" bitfld.long 0x00 11.--11. " SS11 ,GP11 in Sleep Mode" "0,1" bitfld.long 0x00 10.--10. " SS10 ,GP10 in Sleep Mode" "0,1" bitfld.long 0x00 9.--9. " SS9 ,GP9 in Sleep Mode" "0,1" bitfld.long 0x00 8.--8. " SS8 ,GP8 in Sleep Mode" "0,1" textline " " bitfld.long 0x00 7.--7. "SS7 ,GP7 in Sleep Mode" "0,1" bitfld.long 0x00 6.--6. " SS6 ,GP6 in Sleep Mode" "0,1" bitfld.long 0x00 5.--5. " SS5 ,GP5 in Sleep Mode" "0,1" bitfld.long 0x00 4.--4. " SS4 ,GP4 in Sleep Mode" "0,1" bitfld.long 0x00 3.--3. " SS3 ,GP3 in Sleep Mode" "0,1" bitfld.long 0x00 2.--2. " SS2 ,GP2 in Sleep Mode" "0,1" bitfld.long 0x00 1.--1. " SS1 ,GP1 in Sleep Mode" "0,1" bitfld.long 0x00 0.--0. " SS0 ,GP0 in Sleep Mode" "0,1" line.long 0x04 "PGSR1,Power Manager GPIO Sleep State Register for GP[63-32]" bitfld.long 0x04 31.--31. "SS63 ,GP63 in Sleep Mode" "0,1" bitfld.long 0x04 30.--30. " SS62 ,GP62 in Sleep Mode" "0,1" bitfld.long 0x04 29.--29. " SS61 ,GP61 in Sleep Mode" "0,1" bitfld.long 0x04 28.--28. " SS60 ,GP60 in Sleep Mode" "0,1" bitfld.long 0x04 27.--27. " SS59 ,GP59 in Sleep Mode" "0,1" bitfld.long 0x04 26.--26. " SS58 ,GP58 in Sleep Mode" "0,1" bitfld.long 0x04 25.--25. " SS57 ,GP57 in Sleep Mode" "0,1" bitfld.long 0x04 24.--24. " SS56 ,GP56 in Sleep Mode" "0,1" textline " " bitfld.long 0x04 23.--23. "SS55 ,GP55 in Sleep Mode" "0,1" bitfld.long 0x04 22.--22. " SS54 ,GP54 in Sleep Mode" "0,1" bitfld.long 0x04 21.--21. " SS53 ,GP53 in Sleep Mode" "0,1" bitfld.long 0x04 20.--20. " SS52 ,GP52 in Sleep Mode" "0,1" bitfld.long 0x04 19.--19. " SS51 ,GP51 in Sleep Mode" "0,1" bitfld.long 0x04 18.--18. " SS50 ,GP50 in Sleep Mode" "0,1" bitfld.long 0x04 17.--17. " SS49 ,GP49 in Sleep Mode" "0,1" bitfld.long 0x04 16.--16. " SS48 ,GP48 in Sleep Mode" "0,1" textline " " bitfld.long 0x04 15.--15. "SS47 ,GP47 in Sleep Mode" "0,1" bitfld.long 0x04 14.--14. " SS46 ,GP46 in Sleep Mode" "0,1" bitfld.long 0x04 13.--13. " SS45 ,GP45 in Sleep Mode" "0,1" bitfld.long 0x04 12.--12. " SS44 ,GP44 in Sleep Mode" "0,1" bitfld.long 0x04 11.--11. " SS43 ,GP43 in Sleep Mode" "0,1" bitfld.long 0x04 10.--10. " SS42 ,GP42 in Sleep Mode" "0,1" bitfld.long 0x04 9.--9. " SS41 ,GP41 in Sleep Mode" "0,1" bitfld.long 0x04 8.--8. " SS40 ,GP40 in Sleep Mode" "0,1" textline " " bitfld.long 0x04 7.--7. "SS39 ,GP39 in Sleep Mode" "0,1" bitfld.long 0x04 6.--6. " SS38 ,GP38 in Sleep Mode" "0,1" bitfld.long 0x04 5.--5. " SS37 ,GP37 in Sleep Mode" "0,1" bitfld.long 0x04 4.--4. " SS36 ,GP36 in Sleep Mode" "0,1" bitfld.long 0x04 3.--3. " SS35 ,GP35 in Sleep Mode" "0,1" bitfld.long 0x04 2.--2. " SS34 ,GP34 in Sleep Mode" "0,1" bitfld.long 0x04 1.--1. " SS33 ,GP33 in Sleep Mode" "0,1" bitfld.long 0x04 0.--0. " SS32 ,GP41 in Sleep Mode" "0,1" line.long 0x08 "PGSR2,Power Manager GPIO Sleep State Register for GP[84-64]" bitfld.long 0x08 16.--16. "SS80 ,GP80 in Sleep Mode" "0,1" textline " " bitfld.long 0x08 15.--15. "SS79 ,GP79 in Sleep Mode" "0,1" bitfld.long 0x08 14.--14. " SS78 ,GP78 in Sleep Mode" "0,1" bitfld.long 0x08 13.--13. " SS77 ,GP77 in Sleep Mode" "0,1" bitfld.long 0x08 12.--12. " SS76 ,GP76 in Sleep Mode" "0,1" bitfld.long 0x08 11.--11. " SS75 ,GP75 in Sleep Mode" "0,1" bitfld.long 0x08 10.--10. " SS74 ,GP74 in Sleep Mode" "0,1" bitfld.long 0x08 9.--9. " SS73 ,GP73 in Sleep Mode" "0,1" bitfld.long 0x08 8.--8. " SS72 ,GP72 in Sleep Mode" "0,1" textline " " bitfld.long 0x08 7.--7. "SS71 ,GP71 in Sleep Mode" "0,1" bitfld.long 0x08 6.--6. " SS70 ,GP70 in Sleep Mode" "0,1" bitfld.long 0x08 5.--5. " SS69 ,GP69 in Sleep Mode" "0,1" bitfld.long 0x08 4.--4. " SS68 ,GP68 in Sleep Mode" "0,1" bitfld.long 0x08 3.--3. " SS67 ,GP67 in Sleep Mode" "0,1" bitfld.long 0x08 2.--2. " SS66 ,GP66 in Sleep Mode" "0,1" bitfld.long 0x08 1.--1. " SS65 ,GP65 in Sleep Mode" "0,1" bitfld.long 0x08 0.--0. " SS64 ,GP64 in Sleep Mode" "0,1" group asd:0x40f00030++0x03 line.long 0x00 "RCSR,Reset Controller Status Register" bitfld.long 0x00 3.--3. "GPR ,GPIO Reset" "no,yes" bitfld.long 0x00 2.--2. " SMR ,Sleep Mode" "no,yes" bitfld.long 0x00 1.--1. " WDR ,Watchdog Reset" "no,yes" bitfld.long 0x00 0.--0. " HWR ,Hardware Reset" "no,yes" endif tree.end ;end include file xscale/cotulla-pwr.ph ;begin include file xscale/cotulla-ssp.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250, PXA255 ; State: ok ; See also: 80321 ; -------------------------------------------------------------------------------- tree "SSP" ; -------------------------------------------------------------------------------- group asd:0x41000000++0x07 line.long 0x00 "SSCR0,SSP Control Register 0" hexmask.long 0x00 8.--15. 0x01 " SCR ,Serial Clock Rate" bitfld.long 0x00 7.--7. " SSE ,Synchronous Serial Port Enable" "dis,ena" bitfld.long 0x00 6.--6. " ECS ,External Clock Select" "On-chip,SSPEXTCLK" bitfld.long 0x00 4.--5. " FRF ,Frame Format" "Motorola SPI,TI SSP,National Microwire,res" bitfld.long 0x00 0.--3. " DSS ,Data Size Select in bit" "res,res,res,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "SSCR1,SSP Control Register 1" bitfld.long 0x04 10.--13. " RFT ,Receive FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 6.--9. " TFT ,Transmit FIFO Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 5.--5. " MWDS ,Microwire Transmit Data Size" "8 bit,16 bit" bitfld.long 0x04 4.--4. " SPH ,Motorola SPI SSPSCLK phase setting" "start 1 - end 1/2,start 1/2 - end 1" bitfld.long 0x04 3.--3. " SPO ,Motorola SPI SSPSCLK polarity setting" "inactive low,inactive high" textline " " bitfld.long 0x04 2.--2. "LBM ,Loop-Back Mode" "no,yes" bitfld.long 0x04 1.--1. " TIE ,Transmit FIFO Interrupt Enable" "dis,ena" bitfld.long 0x04 0.--0. " RIE ,Receive FIFO Interrupt Enable" "dis,ena" group asd:0x41000008++0x03 line.long 0x00 "SSSR,SSP Status Register" bitfld.long 0x00 12.--15. " RFL ,Receive FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " TFL ,Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7.--7. " ROR ,Receive FIFO Overrun" "no,yes" bitfld.long 0x00 6.--6. " RFS ,Receive FIFO Service Request" "no,yes" bitfld.long 0x00 5.--5. " TFS ,Transmit FIFO Service Request" "no,yes" bitfld.long 0x00 4.--4. " BSY ,SSP Busy" "no,yes" bitfld.long 0x00 3.--3. " RNE ,Receive FIFO not empty" "empty,noEmpty" bitfld.long 0x00 2.--2. " TNF ,Transmit FIFO not full" "full,not full" ;group asd:0x4100000c++0x03 ; line.long 0x00 "SSITR,SSP Interrupt Test Register" group asd:0x41000010++0x03 line.long 0x00 "SSDR,SSP Data Write Register / SSP Data Read Register" hexmask.long 0x00 0.--15. 0x01 " Data ,Transmit/Receive Data" tree.end ;end include file xscale/cotulla-ssp.ph ;begin include file xscale/cotulla-mmc.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250,PXA255 ; State: ok ; -------------------------------------------------------------------------------- tree "MMC Controller" ; -------------------------------------------------------------------------------- width 13. group asd:0x41100000++0x03 line.long 0x00 "MMC_STRPCL,Control to start and stop MMC clock" bitfld.long 0x00 1.--1. " START_CLK ,Start MMC Clock" "no,yes" bitfld.long 0x00 0.--0. " STOP_CLK ,Stop MMC Clock" "no,yes" group asd:0x41100004++0x03 line.long 0x00 "MMC_STAT,MMC Status Register" bitfld.long 0x00 13.--13. " END_CMD_RES ,End Command Response" "no,yes" bitfld.long 0x00 12.--12. " PROG_DONE ,Program Done" "no,yes" bitfld.long 0x00 11.--11. " DATA_TRAN_DONE ,Data Transmission Done" "no,yes" bitfld.long 0x00 8.--8. " CLK_EN ,Clock Enabled" "off,on" textline " " bitfld.long 0x00 7.--7. " RECV_FIFO_FULL ,Receive FIFO is full" "NoFull,Full" bitfld.long 0x00 6.--6. " XMIT_FIFO_EMPTY ,Transmit FIFO empty" "NoEmpt,empty" bitfld.long 0x00 5.--5. " RES_CRC_ERR ,Response CRC Error" "no,yes" textline " " bitfld.long 0x00 4.--4. " SPI_READ_ERROR_TOKEN ,SPI Read Error Token" "no,yes" bitfld.long 0x00 3.--3. " CRC_READ_ERROR ,CRC Read Error" "no,yes" bitfld.long 0x00 2.--2. " CRC_WRITE_ERROR ,CRC Write Error" "no,yes" textline " " bitfld.long 0x00 1.--1. " TIME_OUT_RESPONSE ,Time Out Response" "no,yes" bitfld.long 0x00 0.--0. " READ_TIME_OUT ,Read Time Out" "no,yes" group asd:0x41100008++0x03 line.long 0x00 "MMC_CLKRT,MMC clock rate" bitfld.long 0x00 0.--2. " CLK_RATE ,Frequency divisor of MMC bus clock" "20 MHz,10 MHz,5 MHz,2.5 MHz,1.25 MHz,0.625 MHz,0.3125 MHz,res" group asd:0x4110000c++0x03 line.long 0x00 "MMC_SPI,SPI mode control bits" bitfld.long 0x00 3.--3. " SPI_CS_ADDRESS ,Specifies the relative address of the card to activate the SPI CS" "CS0,CS1" bitfld.long 0x00 2.--2. " SPI_CS_EN ,SPI Chip Select Enable" "dis,ena" bitfld.long 0x00 1.--1. " CRC_ON ,CRC Generation Enable" "dis,ena" bitfld.long 0x00 0.--0. " SPI_EN ,SPI Mode Enable" "dis,ena" group asd:0x41100010++0x03 line.long 0x00 "MMC_CMDAT,Command/response/data sequence control" bitfld.long 0x00 7.--7. " MMC_DMA_EN ,DMA Mode Enable" "Prog I/O,DMA" bitfld.long 0x00 6.--6. " INIT ,80 Initialization Clocks" "no,yes" bitfld.long 0x00 5.--5. " BUSY ,Specifies whether a busy signal is expected after the current command" "no,yes" bitfld.long 0x00 4.--4. " STREAM_BLOCK ,Stream Mode" "no,yes" textline " " bitfld.long 0x00 3.--3. " WRITE/READ ,Read or Write Operation" "read,write" bitfld.long 0x00 2.--2. " DATA_EN ,Data Transfer Enable" "no,yes" bitfld.long 0x00 0.--1. " RESPONSE_FORMAT ,Response format for the current command" "no response,R1,R2,R3" group asd:0x41100014++0x03 line.long 0x00 "MMC_RESTO,Expected response time out" hexmask.long 0x00 0.--6. 0x01 " RES_TO ,Number of MMC clocks before a response time-out" group asd:0x41100018++0x03 line.long 0x00 "MMC_RDTO,Expected data read time out" hexmask.long 0x00 0.--15. 0x01 " READ_TO ,Specifies the length of time before a data read time-out" group asd:0x4110001c++0x03 line.long 0x00 "MMC_BLKLEN,Block length of data transaction" hexmask.long 0x00 0.--9. 0x01 " BLK_LEN ,Number of bytes in the block" group asd:0x41100020++0x03 line.long 0x00 "MMC_NOB,Number of blocks for block mode" group asd:0x41100024++0x03 line.long 0x00 "MMC_PRTBUF,Partial MMC_TXFIFO FIFO written" bitfld.long 0x00 0.--0. " BUF_PART_FULL ,Buffer Partially Full" "no,yes" group asd:0x41100028++0x03 line.long 0x00 "MMC_I_MASK,Interrupt Mask" bitfld.long 0x00 6.--6. " TXFIFO_WR_REQ ,Transmit FIFO Write Request" "ena,dis" bitfld.long 0x00 5.--5. " RXFIFO_WR_REQ ,Receive FIFO Read Request" "ena,dis" bitfld.long 0x00 4.--4. " CLK_IS_OFF ,Clock Is Off" "ena,dis" bitfld.long 0x00 3.--3. " STOP_CMD ,Ready for Stop Transaction Command" "ena,dis" textline " " bitfld.long 0x00 2.--2. " END_CMD_RES ,End Command Response" "ena,dis" bitfld.long 0x00 1.--1. " PRG_DONE ,Programming Done" "ena,dis" bitfld.long 0x00 0.--0. " DATA_TRAN_DONE ,Data Transfer Done" "ena,dis" group asd:0x4110002c++0x03 line.long 0x00 "MMC_I_REG,Interrupt Register" bitfld.long 0x00 6.--6. " TXFIFO_WR_REQ ,Transmit FIFO Write Request" "no,yes" bitfld.long 0x00 5.--5. " RXFIFO_WR_REQ ,Receive FIFO Read Request" "no,yes" bitfld.long 0x00 4.--4. " CLK_IS_OFF ,Clock Is Off" "no,yes" bitfld.long 0x00 3.--3. " STOP_CMD ,Ready for Stop Transaction Command" "no,yes" textline " " bitfld.long 0x00 2.--2. " END_CMD_RES ,End Command Response" "no,yes" bitfld.long 0x00 1.--1. " PRG_DONE ,Programming Done" "no,yes" bitfld.long 0x00 0.--0. " DATA_TRAN_DONE ,Data Transfer Done" "no,yes" group asd:0x41100030++0x03 line.long 0x00 "MMC_CMD,Index of current command" hexmask.long 0x00 0.--6. 0x01 " CMD_INDEX ,Command Index" group asd:0x41100034++0x07 line.long 0x00 "MMC_ARGH,MSW part of the current command argument" hexmask.long 0x00 0.--15. 0x01 " ARG_H ,Upper 16 bits of command argument" line.long 0x04 "MMC_ARGL,LSW part of the current command argument" hexmask.long 0x04 0.--15. 0x01 " ARG_L ,Lower 16 bits of command argument" group asd:0x4110003c++0x0b line.long 0x00 "MMC_RES,Response FIFO" hexmask.long 0x00 0.--15. 0x01 " RESPONSE_DATA ,Two bytes of response data" line.long 0x04 "MMC_RXFIFO,Receive FIFO" hexmask.long 0x04 0.--7. 0x01 " READ_DATA ,One byte of read data" line.long 0x08 "MMC_TXFIFO,Transmit FIFO" hexmask.long 0x08 0.--7. 0x01 " WRITE_DATA ,One byte of write data" width 8. tree.end ;end include file xscale/cotulla-mmc.ph ;begin include file xscale/cotulla-clk.ph ;parameters: 250 ; -------------------------------------------------------------------------------- ; PXA210, PXA250,PXA255 ; State: ok ; -------------------------------------------------------------------------------- tree "Clock Manager" ; -------------------------------------------------------------------------------- if ("250"=="255")||("250"=="26x") group asd:0x41300000++0x03 line.long 0x00 "CCCR,Core Clock Configuration Register" bitfld.long 0x00 7.--9. " N ,Run Mode Frequency to Turbo Mode Frequency Multiplier" "res,res,1,1.5,2,res,3,res" bitfld.long 0x00 5.--6. " M ,Memory Frequency to Run Mode Frequency Multiplier" "res,1,2,4" bitfld.long 0x00 0.--4. " L ,Crystal Frequency to Memory Frequency Multiplier" "res,27,res,36,res,45,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res" group asd:0x41300004++0x03 line.long 0x00 "CKEN,Clock Enable Register" bitfld.long 0x00 16.--16. " CKEN16 ,LCD Unit Clock" "dis,ena" bitfld.long 0x00 14.--14. " CKEN14 ,I2C Unit Clock" "dis,ena" bitfld.long 0x00 13.--13. " CKEN13 ,FICP Unit Clock" "dis,ena" bitfld.long 0x00 12.--12. " CKEN12 ,MMC Unit Clock" "dis,ena" textline " " bitfld.long 0x00 11.--11. " CKEN11 ,USB Unit Clock" "dis,ena" bitfld.long 0x00 9.--9. " CKEN9 ,NSSP Unit Clock" "dis,ena" bitfld.long 0x00 8.--8. " CKEN8 ,I2S Unit Clock" "dis,ena" bitfld.long 0x00 7.--7. " CKEN7 ,BTUART Unit Clock" "dis,ena" textline " " bitfld.long 0x00 6.--6. " CKEN6 ,FFUART Unit Clock" "dis,ena" bitfld.long 0x00 5.--5. " CKEN5 ,STUART Unit Clock" "dis,ena" bitfld.long 0x00 4.--4. " CKEN4 ,HWUART Unit Clock" "dis,ena" bitfld.long 0x00 3.--3. " CKEN3 ,SSP Unit Clock" "dis,ena" textline " " bitfld.long 0x00 2.--2. " CKEN2 ,AC97 Unit Clock" "dis,ena" bitfld.long 0x00 1.--1. " CKEN1 ,PWM1 Unit Clock" "dis,ena" bitfld.long 0x00 0.--0. " CKEN0 ,PWM0 Unit Clock" "dis,ena" group asd:0x41300008++0x03 line.long 0x00 "OSCC,Oscillator Configuration Register" bitfld.long 0x00 1.--1. " OON ,32.768 kHz oscillator" "dis,ena" bitfld.long 0x00 0.--0. " OOK ,32.768 kHz oscillator has been enabled and stabilized" "no,yes" else group asd:0x41300000++0x03 line.long 0x00 "CCCR,Core Clock Configuration Register" bitfld.long 0x00 7.--9. "N ,Run Mode Frequency to Turbo Mode Frequency Multiplier" "res,res,1,1.5,2,2.5,3,res" bitfld.long 0x00 5.--6. " M ,Memory Frequency to Run Mode Frequency Multiplier" "res,1,2,4" bitfld.long 0x00 0.--4. " L ,Crystal Frequency to Memory Frequency Multiplier" "res,27,32,36,40,45,res,res,res,res,res,res,res,res,res,9,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res" group asd:0x41300004++0x03 line.long 0x00 "CKEN,Clock Enable Register" bitfld.long 0x00 16.--16. "CKEN16 ,LCD Unit Clock" "dis,ena" bitfld.long 0x00 14.--14. " CKEN14 ,I2C Unit Clock" "dis,ena" bitfld.long 0x00 13.--13. " CKEN13 ,FICP Unit Clock" "dis,ena" bitfld.long 0x00 12.--12. " CKEN12 ,MMC Unit Clock" "dis,ena" bitfld.long 0x00 11.--11. " CKEN11 ,USB Unit Clock" "dis,ena" textline " " bitfld.long 0x00 8.--8. "CKEN8 ,I2S Unit Clock" "dis,ena" bitfld.long 0x00 7.--7. " CKEN7 ,BTUART Unit Clock" "dis,ena" bitfld.long 0x00 6.--6. " CKEN6 ,FFUART Unit Clock" "dis,ena" bitfld.long 0x00 5.--5. " CKEN5 ,STUART Unit Clock" "dis,ena" bitfld.long 0x00 3.--3. " CKEN3 ,SSP Unit Clock" "dis,ena" textline " " bitfld.long 0x00 2.--2. "CKEN2 ,AC97 Unit Clock" "dis,ena" bitfld.long 0x00 1.--1. " CKEN1 ,PWM1 Unit Clock" "dis,ena" bitfld.long 0x00 0.--0. " CKEN0 ,PWM0 Unit Clock" "dis,ena" group asd:0x41300008++0x03 line.long 0x00 "OSCC,Oscillator Configuration Register" bitfld.long 0x00 1.--1. "OON ,32.768 kHz oscillator" "dis,ena" bitfld.long 0x00 0.--0. " OOK ,32.768 kHz oscillator has been enabled and stabilized" "no,yes" endif tree.end ;end include file xscale/cotulla-clk.ph ;begin include file xscale/cotulla-lcd.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250 ; State: ok ; -------------------------------------------------------------------------------- tree "LCD Controller" ; -------------------------------------------------------------------------------- group asd:0x44000000++0x0f line.long 0x00 "LCCR0,LCD Controller Control Register 0" bitfld.long 0x00 21.--21. "OUM ,Output FIFO Underrun mask" "interrupt,no interrupt" bitfld.long 0x00 20.--20. " BM ,Branch Mask" "interrupt,no interrupt" hexmask.long 0x00 12.--19. 0x01 " PDD ,Palette DMA Request Delay" bitfld.long 0x00 11.--11. " QDM ,LCD Quick Disable Mask" "interrupt,no interrupt" textline " " bitfld.long 0x00 10.--10. "DIS ,LCD Disable" "ena,dis" bitfld.long 0x00 9.--9. " DPD ,Double-Pixel Data pin mode" "4 pixel,8 pixel" bitfld.long 0x00 8.--8. " BLE ,Big/Little Endian select" "little,big" bitfld.long 0x00 7.--7. " PAS ,Passive/Active Display select" "passive,active" bitfld.long 0x00 6.--6. " EFM ,Input FIFO Underrun Mask" "interrupt,no interrupt" textline " " bitfld.long 0x00 5.--5. "IUM ,End of Frame Mask" "interrupt,no interrupt" bitfld.long 0x00 4.--4. " SFM ,Start of Frame Mask" "interrupt,no interrupt" bitfld.long 0x00 3.--3. " LDM ,LCD Disable Done Mask" "interrupt,no interrupt" textline " " bitfld.long 0x00 2.--2. "SDS ,Single/Dual-Panle Display Select" "Single-panel,Dual-panel" bitfld.long 0x00 1.--1. " CMS ,Color/Monochrome Select" "Color,Monochrome" bitfld.long 0x00 0.--0. " ENB ,LCD Controller Enable" "dis,ena" line.long 0x04 "LCCR1,LCD Controller Control Register 1" hexmask.long 0x04 24.--31. 0x01 "BLW ,Beginning-of-Line pixel clock Wait count" hexmask.long 0x04 16.--23. 0x01 " ELW ,End-of-Line pixel clock Wait count" hexmask.long 0x04 10.--15. 0x01 " HSW ,Horizontal Sync Pulse Width" hexmask.long 0x04 0.--9. 0x01 " PPL ,Pixels per line" line.long 0x08 "LCCR2,LCD Controller Control Register 2" hexmask.long 0x08 24.--31. 0x01 "BFW ,Beginning-of-Frame line clock Wait count" hexmask.long 0x08 16.--23. 0x01 " EFW ,End-of-Frame line clock Wait count" hexmask.long 0x08 10.--15. 0x01 " VSW ,Vertical Sync Pulse Width" hexmask.long 0x08 0.--9. 0x01 " LPP ,Lines per panel" line.long 0x0c "LCCR3,LCD Controller Control Register 3" bitfld.long 0x0c 27.--27. "DPC ,Double Pixel Clock mode" "f(PCD),2*f(PCD)" bitfld.long 0x0c 24.--26. " BPP ,Bits Per Pixel" "1,2,4,8,16,res,res,res" bitfld.long 0x0c 23.--23. " OEP ,Output Enable Polarity" "active high,active low" bitfld.long 0x0c 22.--22. " PCP ,Pixel Clock Polarity" "rising edge,falling edge" textline " " bitfld.long 0x0c 21.--21. "HSP ,Horizontal Sync Polarity" "active high,active low" bitfld.long 0x0c 20.--20. " VSP ,Vertical Sync Polarity" "active high,active low" bitfld.long 0x0c 16.--19. " API ,AC bias Pin transitions per Interrupt" "dis,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long 0x0c 8.--15. 0x01 "ACB ,AC Bias Pin frequency" hexmask.long 0x0c 0.--7. 0x01 " PCD ,Pixel Clock Divisor" group asd:0x44000020++0x07 line.long 0x00 "FBR0,DMA Channel 0 Frame Branch Register" hexmask.long 0x00 4.--31. 0x10 "Frame Branch Address ,Address of the descriptor of the branched-to frame" bitfld.long 0x00 1.--1. " BINT ,Branch Interrupt" "no,yes" bitfld.long 0x00 0.--0. " BRA ,Branch after finishing the current frame" "no,yes" line.long 0x04 "FBR1,DMA Channel 1 Frame Branch Register" hexmask.long 0x04 4.--31. 0x10 "Frame Branch Address ,Address of the descriptor of the branched-to frame" bitfld.long 0x04 1.--1. " BINT ,Branch Interrupt" "no,yes" bitfld.long 0x04 0.--0. " BRA ,Branch after finishing the current frame" "no,yes" group asd:0x44000038++0x03 line.long 0x00 "LCSR,LCD Controller Status Register" bitfld.long 0x00 10.--10. "SINT ,Subsequent Interrupt status, maskable Interrupt" "no,yes" bitfld.long 0x00 9.--9. " BS ,Branch Status, maskable Interrupt" "no,yes" bitfld.long 0x00 8.--8. " EOF ,End Of Frame Status, maskable Interrupt" "no,yes" bitfld.long 0x00 7.--7. " QD ,LCD Quick disable Status, maskable Interrupt" "no,yes" bitfld.long 0x00 6.--6. " OU ,Output FIFO Underrun Status, maskable Interrupt" "no,yes" bitfld.long 0x00 5.--5. " IUU ,Input FIFO Underrun Upper panel Status, maskable Interrupt" "no,yes" bitfld.long 0x00 4.--4. " IUL ,Input FIFO Underrun Lower panel Status, maskable Interrupt" "no,yes" textline " " bitfld.long 0x00 3.--3. "ABC ,AC Bias Count Status, nonmaskable Interrupt" "no,yes" bitfld.long 0x00 2.--2. " BER ,Bus Error Status, nonmaskable Interrupt" "no,yes" bitfld.long 0x00 1.--1. " SOF ,Start Of Frame Status, maskable Interrupt" "no,yes" bitfld.long 0x00 0.--0. " LDD ,LCD Display Done Status, maskable Interrupt" "no,yes" group asd:0x4400003c++0x03 line.long 0x00 "LIIDR,LCD Controller Interrupt ID Register" hexmask.long 0x00 3.--31. 0x08 "IFRAMEID ,Interrupt Frame ID" group asd:0x44000040++0x03 line.long 0x00 "TRGBR,TMED RGB Seed Register" hexmask.long 0x00 16.--23. 0x01 "TBS ,TME Blue Seed value" hexmask.long 0x00 8.--15. 0x01 " TGS ,TME Green Seed value" hexmask.long 0x00 0.--7. 0x01 " TRS ,TME Red Seed value" group asd:0x44000044++0x03 line.long 0x00 "TCR,TMED Control Register" bitfld.long 0x00 14.--14. "TED ,TMED Energy Distribution Matrix Select" "1,2" bitfld.long 0x00 8.--11. " THBS ,TMED Horizontal Beast Supression" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " TVBS ,TMED Vertical Beast Supression" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3.--3. " FNAME ,Frame Number Adjuster Enable" "dis,ena" bitfld.long 0x00 2.--2. " COAE ,Frame Color Offset Adjuster Enable" "dis,ena" bitfld.long 0x00 1.--1. " FNAM ,Frame Number Adjuster Matrix" "1,2" bitfld.long 0x00 0.--0. " COAM ,Frame Color Offset Adjuster Matrix" "1,2" group asd:0x44000200++0x0f line.long 0x00 "FDADRR0,DMA Channel 0 Frame Descriptor Address Register" line.long 0x04 "FSADRR0,DMA Channel 0 Frame Source Address Register" line.long 0x08 "FIDR0,DMA Channel 0 Frame ID Register" hexmask.long 0x08 3.--15. 0x08 "Frame ID ,Frame ID" line.long 0x0c "LDCMD0,DMA Channel 0 Command Register" bitfld.long 0x0c 26.--26. "PAL ,Load Palette" "no,yes" bitfld.long 0x0c 22.--22. " SOFINT ,Start of Frame Interrupt" "no,yes" bitfld.long 0x0c 21.--21. " EOFINT ,End of Frame Interrupt" "no,yes" hexmask.long 0x0c 0.--20. 0x01 " LEN ,Length of transfer in bytes" group asd:0x44000210++0x0f line.long 0x00 "FDADRR1,DMA Channel 1 Frame Descriptor Address Register" line.long 0x04 "FSADRR1,DMA Channel 1 Frame Source Address Register" line.long 0x08 "FIDR1,DMA Channel 1 Frame ID Register" hexmask.long 0x08 3.--15. 0x08 "Frame ID ,Frame ID" line.long 0x0c "LDCMD1,DMA Channel 1 Command Register" bitfld.long 0x0c 26.--26. "PAL ,Load Palette" "no,yes" bitfld.long 0x0c 22.--22. " SOFINT ,Start of Frame Interrupt" "no,yes" bitfld.long 0x0c 21.--21. " EOFINT ,End of Frame Interrupt" "no,yes" hexmask.long 0x0c 0.--20. 0x01 " LEN ,Length of transfer in bytes" tree.end ;end include file xscale/cotulla-lcd.ph ;begin include file xscale/cotulla-memory.ph ;parameters: ; -------------------------------------------------------------------------------- ; PXA210, PXA250, PXA255 ; State: ok ; See also: Manitoba ; -------------------------------------------------------------------------------- tree "Memory Controller" ; -------------------------------------------------------------------------------- group asd:0x48000000++0x03 line.long 0x00 "MDCNFG,SDRAM Configuration Register 0" bitfld.long 0x00 28.--28. " DSA1111_2 ,Use SA1111 Addressing Muxing Mode for pair 2/3" "no,yes" bitfld.long 0x00 27.--27. " LATCH2 ,Return Data from SDRAM latching scheme for pair 2/3" "MEMCLK,return clock" bitfld.long 0x00 26.--26. " DADDR2 ,Use alternate addressing for pair 2/3" "no,yes" textline " " bitfld.long 0x00 24.--25. "DTC2 ,Timing Category for SDRAM pair 2/3" "Not Valid,tRP=2 CL=2 tRCD=2 tRAS=5 tRC=8,tRP=3 CL=3 tRCD=3 tRAS=7 tRC=10,tRP=3 CL=3 tRCD=3 tRAS=7 tRC=11" bitfld.long 0x00 23.--23. " DNB2 ,Number of banks in upper partition pair" "2,4" textline " " bitfld.long 0x00 21.--22. "DRAC2 ,SDRAM row address bit count for partition pair 2/3" "11,12,13,res" bitfld.long 0x00 19.--20. " DCAC2 ,Number of Column address bit for partition pair 2/3" "8,9,10,11" bitfld.long 0x00 18.--18. " DWID2 ,SDRAM data bus width for partition pair 2/3" "32,16" bitfld.long 0x00 17.--17. " DE3 ,SDRAM Enable for partition 3" "dis,ena" bitfld.long 0x00 16.--16. " DE2 ,SDRAM Enable for partition 2" "dis,ena" textline " " bitfld.long 0x00 12.--12. "DSA1111_0 ,Use SA1111 Addressing Muxing Mode for pair 0/1" "no,yes" bitfld.long 0x00 11.--11. " DLATCH0 ,Return Data from SDRAM latching scheme for pair 0/1" "MEMCLK,return clock" bitfld.long 0x00 10.--10. " DADDR0 ,Use alternate addressing for pair 0/1" "no,yes" textline " " bitfld.long 0x00 8.--9. "DTC0 ,Timing Category for SDRAM pair 0/1" "Not Valid,tRP=2 CL=2 tRCD=2 tRAS=5 tRC=8,tRP=3 CL=3 tRCD=3 tRAS=7 tRC=10,tRP=3 CL=3 tRCD=3 tRAS=7 tRC=11" bitfld.long 0x00 7.--7. " DNB0 ,Number of banks in lower partition pair" "2,4" textline " " bitfld.long 0x00 5.--6. "DRAC0 ,SDRAM row address bit count for partition pair 0/1" "11,12,13,res" bitfld.long 0x00 3.--4. " DCAC0 ,Number of Column address bit for partition pair 0/1" "8,9,10,11" bitfld.long 0x00 2.--2. " DWID0 ,SDRAM data bus width for partition pair 0/1" "32,16" bitfld.long 0x00 1.--1. " DE1 ,SDRAM Enable for partition 1" "dis,ena" bitfld.long 0x00 0.--0. " DE0 ,SDRAM Enable for partition 0" "dis,ena" group asd:0x48000004++0x03 line.long 0x00 "MDREFR,SDRAM Refresh Control Register" bitfld.long 0x0 25.--25. " K2FREE ,SDRAM Free-Running Control SDCLK2" "no,yes" bitfld.long 0x0 24.--24. " K1FREE ,SDRAM Free-Running Control SDCLK1" "no,yes" bitfld.long 0x0 23.--23. " K0FREE ,SDRAM Free-Running Control SDCLK0" "no,yes" bitfld.long 0x0 22.--22. " SLFRSH ,SDRAM Self-Refresh Control/Status" "dis,ena" bitfld.long 0x0 20.--20. " APD ,SDRAM/Synchronous Static Memory Auto Power-Down Enable" "no,yes" textline " " bitfld.long 0x0 19.--19. "K2DB2 ,SDRAM Clock Pin 2 (SDCLK2) Divide by 2 Control/Status" "MEMCLK,MEMCLK/2" bitfld.long 0x0 18.--18. " K2RUN ,SDRAM Clock Pin 2 (SDCLK2) Run Control/Status" "dis,ena" bitfld.long 0x0 17.--17. " K1DB2 ,SDRAM Clock Pin 1 (SDCLK1) Divide by 2 Control/Status" "MEMCLK,MEMCLK/2" bitfld.long 0x0 16.--16. " K1RUN ,SDRAM Clock Pin 1 (SDCLK1) Run Control/Status" "dis,ena" textline " " bitfld.long 0x0 15.--15. "E1PIN ,Clock Enable Pin 1 (SDCKE1) Level Control/Status" "dis,ena" bitfld.long 0x0 14.--14. " K0DB2 ,SDRAM Clock Pin 0 (SDCLK0) Divide by 2 Control/Status" "MEMCLK,MEMCLK/2" bitfld.long 0x0 13.--13. " K0RUN ,SDRAM Clock Pin 0 (SDCLK0) Run Control/Status" "dis,ena" bitfld.long 0x0 12.--12. " E0PIN ,Clock Enable Pin 0 (SDCKE0) Level Control/Status" "dis,ena" hexmask.long 0x0 0.--11. 1. " DRI ,SDRAM refresh interval, all partitions" group asd:0x48000008++0x0b line.long 0x00 "MSC0,Static Memory Control Register 0" bitfld.long 0x0 31.--31. " RBUFF1 ,Return Buffer vs. Streaming behavior" "slower,faster" bitfld.long 0x0 28.--30. " RRR1 ,ROM/SRAM recovery time" "0,2,4,6,8,10,12,14" bitfld.long 0x0 24.--27. " RDN1 ,ROM delay next access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " RDF1 ,ROM delay first access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 19.--19. " RBW1 ,ROM bus width" "32 bit,16 bit" textline " " bitfld.long 0x0 16.--18. "RT1 ,ROM type" "Nonburst ROM or Flash,SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash,VLIO,res,res,res" textline " " bitfld.long 0x0 15.--15. "RBUFF0 ,Return Buffer vs. Streaming behavior" "slower,faster" bitfld.long 0x0 12.--14. " RRR0 ,ROM/SRAM recovery time" "0,2,4,6,8,10,12,14" bitfld.long 0x0 8.--11. " RDN0 ,ROM delay next access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 4.--7. " RDF0 ,ROM delay first access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 3.--3. " RBW0 ,ROM bus width" "32 bit,16 bit" textline " " bitfld.long 0x0 0.--2. "RT0 ,ROM type" "Nonburst ROM or Flash,SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash,VLIO,res,res,res" line.long 0x04 "MSC1,Static Memory Control Register 1" bitfld.long 0x4 31.--31. " RBUFF3 ,Return Buffer vs. Streaming behavior" "slower,faster" bitfld.long 0x4 28.--30. " RRR3 ,ROM/SRAM recovery time" "0,2,4,6,8,10,12,14" bitfld.long 0x4 24.--27. " RDN3 ,ROM delay next access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x4 20.--23. " RDF3 ,ROM delay first access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x4 19.--19. " RBW3 ,ROM bus width" "32 bit,16 bit" textline " " bitfld.long 0x4 16.--18. "RT3 ,ROM type" "Nonburst ROM or Flash,SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash,VLIO,res,res,res" textline " " bitfld.long 0x4 15.--15. "RBUFF2 ,Return Buffer vs. Streaming behavior" "slower,faster" bitfld.long 0x4 12.--14. " RRR2 ,ROM/SRAM recovery time" "0,2,4,6,8,10,12,14" bitfld.long 0x4 8.--11. " RDN2 ,ROM delay next access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x4 4.--7. " RDF2 ,ROM delay first access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x4 3.--3. " RBW2 ,ROM bus width" "32 bit,16 bit" textline " " bitfld.long 0x4 0.--2. "RT2 ,ROM type" "Nonburst ROM or Flash,SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash,VLIO,res,res,res" line.long 0x08 "MSC2,Static Memory Control Register 2" bitfld.long 0x8 31.--31. " RBUFF5 ,Return Buffer vs. Streaming behavior" "slower,faster" bitfld.long 0x8 28.--30. " RRR5 ,ROM/SRAM recovery time" "0,2,4,6,8,10,12,14" bitfld.long 0x8 24.--27. " RDN5 ,ROM delay next access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x8 20.--23. " RDF5 ,ROM delay first access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x8 19.--19. " RBW5 ,ROM bus width" "32 bit,16 bit" textline " " bitfld.long 0x8 16.--18. "RT5 ,ROM type" "Nonburst ROM or Flash,SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash,VLIO,res,res,res" textline " " bitfld.long 0x8 15.--15. "RBUFF4 ,Return Buffer vs. Streaming behavior" "slower,faster" bitfld.long 0x8 12.--14. " RRR4 ,ROM/SRAM recovery time" "0,2,4,6,8,10,12,14" bitfld.long 0x8 8.--11. " RDN4 ,ROM delay next access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x8 4.--7. " RDF4 ,ROM delay first access" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x8 3.--3. " RBW4 ,ROM bus width" "32 bit,16 bit" textline " " bitfld.long 0x8 0.--2. "RT4 ,ROM type" "Nonburst ROM or Flash,SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash,VLIO,res,res,res" group asd:0x48000014++0x03 line.long 0x00 "MECR,Expansion Memory (PCMCIA/Compact Flash) Bus Configuration Register" bitfld.long 0x00 1.--1. " CIT ,Card-Is-There" "no,yes" bitfld.long 0x00 0.--0. " NOS ,Number-of-Sockets" "1,2" group asd:0x48000018++0x03 line.long 0x00 "SXLCR,LCR value to be written to SDRAM-Timing Sychronous Flash" hexmask.long 0x0 26.--30. 1. " SXBNK2 ,LCR value to be written to SDRAM-like Flash Bank Pair 2" bitfld.long 0x0 25.--25. " SXMSK3 ,Mask LCR Write to Static Bank 3" "ena,dis" bitfld.long 0x0 24.--24. " SXMSK2 ,Mask LCR Write to Static Bank 2" "ena,dis" hexmask.long 0x0 16.--23. 1. " SXLCR2 ,LCR value to be written to SDRAM-like Flash Bank Pair 2" textline " " hexmask.long 0x0 10.--14. 1. "SXBNK0 ,LCR value to be written to SDRAM-like Flash Bank Pair 0" bitfld.long 0x0 9.--9. " SXMSK1 ,Mask LCR Write to Static Bank 1" "ena,dis" bitfld.long 0x0 8.--8. " SXMSK0 ,Mask LCR Write to Static Bank 0" "ena,dis" hexmask.long 0x0 0.--7. 1. " SXLCR0 ,LCR value to be written to SDRAM-like Flash Bank Pair 0" group asd:0x4800001c++0x03 line.long 0x00 "SXCNFG,Sychronous Static Memory Control Register" bitfld.long 0x0 30.--30. " SXLATCH2 ,SXMEM latching scheme for pair 2/3" "fixed delay,return clock" bitfld.long 0x0 28.--29. " SXTP2 ,SX Memory Type for partition pair 2/3" "SMROM,SDRAM-like Flash,non-SDRAM-like Flash,res" textline " " bitfld.long 0x0 26.--27. "SXCA2 ,SX Memory column address bit count for partition pair 2/3" "7,8,9,10" bitfld.long 0x0 24.--25. " SXRA2 ,SX Memory row address bit count for partition pair 2/3" "12,13,res,res" bitfld.long 0x0 21.--23. " SXRL2 ,RAS Latency for SX Memory partition pair 2/3" "1,2,3,4,5,6,7,8" bitfld.long 0x0 18.--20. " SXCL2 ,CAS Latency for SX Memory partition pair 2/3" "res,2,3,4,5,6,7,res" bitfld.long 0x0 16.--17. " SXEN2 ,Enable Bits for SX Memory partition 2 and 3" "dis,ena 2,ena 3,ena 2/3" textline " " bitfld.long 0x0 14.--14. "SXLATCH0 ,SXMEM latching scheme for pair 0/1" "fixed delay,return clock" bitfld.long 0x0 12.--13. " SXTP0 ,SX Memory Type for partition pair 0/1" "SMROM,SDRAM-like Flash,non-SDRAM-like Flash,res" textline " " bitfld.long 0x0 10.--11. "SXCA0 ,SX Memory column address bit count for partition pair 0/1" "7,8,9,10" bitfld.long 0x0 8.--9. " SXRA0 ,SX Memory row address bit count for partition pair 0/1" "12,13,res,res" bitfld.long 0x0 5.--7. " SXRL0 ,RAS Latency for SX Memory partition pair 0/1" "1,2,3,4,5,6,7,8" bitfld.long 0x0 2.--4. " SXCL0 ,CAS Latency for SX Memory partition pair 0/1" "res,2,3,4,5,6,7,res" bitfld.long 0x0 0.--1. " SXEN0 ,Enable Bits for SX Memory partition 0 and 1" "dis,ena 1,ena 1,ena 0/1" group asd:0x48000024++0x03 line.long 0x00 "SXMRS,MRS value to be written to Sychronous Flash or SMROM" hexmask.long 0x0 16.--30. 1. " SXMRS2 ,MRS value to be written to Synchronous-Static Memory requiring an MRS command for Bank Pair 2" hexmask.long 0x0 0.--14. 1. " SXMRS0 ,MRS value to be written to Synchronous-Static Memory requiring an MRS command for Bank Pair 0" group asd:0x48000028++0x07 line.long 0x00 "MCMEM0,Card Interface Common Memory Space Socket 0 Timing Configuration" hexmask.long 0x00 14.--19. 0x01 " MEM0_HOLD ,Number of memory clocks to hold address after command deassertion for MCMEM for socket 0" hexmask.long 0x00 7.--11. 0x01 " MEM0_ASST ,Code for the command assertion time" hexmask.long 0x00 0.--6. 0x01 " MEM0_SET ,Number of memory clocks to set up address before command assertion for MCMEM for socket 0" line.long 0x04 "MCMEM1,Card Interface Common Memory Space Socket 1 Timing Configuration" hexmask.long 0x04 14.--19. 0x01 " MEM1_HOLD ,Number of memory clocks to hold address after command deassertion for MCMEM for socket 1" hexmask.long 0x04 7.--11. 0x01 " MEM1_ASST ,Code for the command assertion time" hexmask.long 0x04 0.--6. 0x01 " MEM1_SET ,Number of memory clocks to set up address before command assertion for MCMEM for socket 1" group asd:0x48000030++0x07 line.long 0x00 "MCATT0,Card Interface Attribute Space Socket 0 Timing Configuration" hexmask.long 0x00 14.--19. 0x01 " ATT0_HOLD ,Number of memory clocks to hold address after command deassertion for MCATT for socket 0" hexmask.long 0x00 7.--11. 0x01 " ATT0_ASST ,Code for the command assertion time" hexmask.long 0x00 0.--6. 0x01 " ATT0_SET ,Number of memory clocks to set up address before command assertion for MCATT for socket 0" line.long 0x04 "MCATT1,Card Interface Attribute Space Socket 1 Timing Configuration" hexmask.long 0x04 14.--19. 0x01 " ATT1_HOLD ,Number of memory clocks to hold address after command deassertion for MCATT for socket 1" hexmask.long 0x04 7.--11. 0x01 " ATT1_ASST ,Code for the command assertion time" hexmask.long 0x04 0.--6. 0x01 " ATT1_SET ,Number of memory clocks to set up address before command assertion for MCATT for socket 1" group asd:0x48000038++0x07 line.long 0x00 "MCIO0,Card Interface I/O Space Socket 0 Timing Configuration" hexmask.long 0x00 14.--19. 0x01 " IO0_HOLD ,Number of memory clocks to hold address after command deassertion for MCIO for socket 0" hexmask.long 0x00 7.--11. 0x01 " IO0_ASST ,Code for the command assertion time" hexmask.long 0x00 0.--6. 0x01 " IO0_SET ,Number of memory clocks to set up address before command assertion for MCIO for socket 0" line.long 0x04 "MCIO1,Card Interface I/O Space Socket 1 Timing Configuration" hexmask.long 0x04 14.--19. 0x01 " IO1_HOLD ,Number of memory clocks to hold address after command deassertion for MCIO for socket 1" hexmask.long 0x04 7.--11. 0x01 " IO1_ASST ,Code for the command assertion time" hexmask.long 0x04 0.--6. 0x01 " IO1_SET ,Number of memory clocks to set up address before command assertion for MCIO for socket 1" group asd:0x48000040++0x03 line.long 0x00 "MDMRS,MRS value to be written to SDRAM" hexmask.long 0x00 23.--30. 0x01 " MDMRS2 ,MRS value to be written to SDRAM for partition pair 2" hexmask.long 0x00 20.--22. 0x01 " MDCL2 , SDRAM partition pair 2 CAS Latency" bitfld.long 0x00 19.--19. " MDADD2 ,SDRAM partition pair 2 Burst Type" "sequential,sequential" bitfld.long 0x00 16.--18. " MDBL2 ,SDRAM partition pair 2 Burst Length" "4,4,4,4,4,4,4,4" textline " " hexmask.long 0x00 7.--14. 0x01 "MDMRS0 ,MRS value to be written to SDRAM for partition pair 0" hexmask.long 0x00 4.--6. 0x01 " MDCL0 , SDRAM partition pair 0 CAS Latency" bitfld.long 0x00 3.--3. " MDADD0 ,SDRAM partition pair 0 Burst Type" "sequential,sequential" bitfld.long 0x00 0.--2. " MDBL0 ,SDRAM partition pair 0 Burst Length" "4,4,4,4,4,4,4,4" if (d.l(asd:0x48000044)&0x00000008)==0x00000008 group asd:0x48000044++0x03 line.long 0x00 "BOOT_DEF,Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL values" bitfld.long 0x00 3.--3. " PKG_TYPE ,Processor type" "PXA210,PXA250" bitfld.long 0x00 0.--2. " BOOT_SEL ,Contains the three input pins BOOT_SEL[2:0]" "Async 32b ROM,Async 16b ROM,SDRAM-like 32b Flash,SDRAM-like 16b Flash,32b/2*16b Mask ROM (64Mb),16b Mask ROM (64Mb),2*16b Mask ROM (128Mb),16b Mask ROM (32Mb)" else group asd:0x48000044++0x03 line.long 0x00 "BOOT_DEF,Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL values" bitfld.long 0x00 3.--3. " PKG_TYPE ,Processor type" "PXA210,PXA250" bitfld.long 0x00 1.--2. " BOOT_SEL ,Contains the three input pins BOOT_SEL[2:0]" "Async 16b ROM,SDRAM-like 16b Flash,16b Mask ROM (64Mb),16b Mask ROM (32Mb)" endif tree.end ;end include file xscale/cotulla-memory.ph